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Line 103... Line 103...
103
 
103
 
104
struct opregion_header;
104
struct opregion_header;
105
struct opregion_acpi;
105
struct opregion_acpi;
106
struct opregion_swsci;
106
struct opregion_swsci;
-
 
107
struct opregion_asle;
Line 107... Line 108...
107
struct opregion_asle;
108
struct drm_i915_private;
108
 
109
 
109
struct intel_opregion {
110
struct intel_opregion {
110
	struct opregion_header *header;
111
	struct opregion_header *header;
Line 122... Line 123...
122
struct drm_i915_master_private {
123
struct drm_i915_master_private {
123
	drm_local_map_t *sarea;
124
	drm_local_map_t *sarea;
124
	struct _drm_i915_sarea *sarea_priv;
125
	struct _drm_i915_sarea *sarea_priv;
125
};
126
};
126
#define I915_FENCE_REG_NONE -1
127
#define I915_FENCE_REG_NONE -1
-
 
128
#define I915_MAX_NUM_FENCES 16
-
 
129
/* 16 fences + sign bit for FENCE_REG_NONE */
-
 
130
#define I915_MAX_NUM_FENCE_BITS 5
Line 127... Line 131...
127
 
131
 
128
struct drm_i915_fence_reg {
132
struct drm_i915_fence_reg {
129
	struct list_head lru_list;
133
	struct list_head lru_list;
130
	struct drm_i915_gem_object *obj;
134
	struct drm_i915_gem_object *obj;
Line 135... Line 139...
135
	u8 initialized;
139
	u8 initialized;
136
	u8 dvo_port;
140
	u8 dvo_port;
137
	u8 slave_addr;
141
	u8 slave_addr;
138
	u8 dvo_wiring;
142
	u8 dvo_wiring;
139
	u8 i2c_pin;
143
	u8 i2c_pin;
140
	u8 i2c_speed;
-
 
141
	u8 ddc_pin;
144
	u8 ddc_pin;
142
};
145
};
Line 143... Line 146...
143
 
146
 
Line 165... Line 168...
165
	u32 instpm;
168
	u32 instpm;
166
	u32 instps;
169
	u32 instps;
167
	u32 instdone1;
170
	u32 instdone1;
168
	u32 seqno;
171
	u32 seqno;
169
	u64 bbaddr;
172
	u64 bbaddr;
170
	u64 fence[16];
173
	u64 fence[I915_MAX_NUM_FENCES];
171
	struct timeval time;
174
	struct timeval time;
172
	struct drm_i915_error_object {
175
	struct drm_i915_error_object {
173
		int page_count;
176
		int page_count;
174
		u32 gtt_offset;
177
		u32 gtt_offset;
175
		u32 *pages[0];
178
		u32 *pages[0];
Line 179... Line 182...
179
		u32 name;
182
		u32 name;
180
		u32 seqno;
183
		u32 seqno;
181
		u32 gtt_offset;
184
		u32 gtt_offset;
182
		u32 read_domains;
185
		u32 read_domains;
183
		u32 write_domain;
186
		u32 write_domain;
184
		s32 fence_reg:5;
187
		s32 fence_reg:I915_MAX_NUM_FENCE_BITS;
185
		s32 pinned:2;
188
		s32 pinned:2;
186
		u32 tiling:2;
189
		u32 tiling:2;
187
		u32 dirty:1;
190
		u32 dirty:1;
188
		u32 purgeable:1;
191
		u32 purgeable:1;
189
		u32 ring:4;
192
		u32 ring:4;
Line 200... Line 203...
200
	void (*enable_fbc)(struct drm_crtc *crtc, unsigned long interval);
203
	void (*enable_fbc)(struct drm_crtc *crtc, unsigned long interval);
201
	void (*disable_fbc)(struct drm_device *dev);
204
	void (*disable_fbc)(struct drm_device *dev);
202
	int (*get_display_clock_speed)(struct drm_device *dev);
205
	int (*get_display_clock_speed)(struct drm_device *dev);
203
	int (*get_fifo_size)(struct drm_device *dev, int plane);
206
	int (*get_fifo_size)(struct drm_device *dev, int plane);
204
	void (*update_wm)(struct drm_device *dev);
207
	void (*update_wm)(struct drm_device *dev);
-
 
208
	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
-
 
209
				 uint32_t sprite_width, int pixel_size);
205
	int (*crtc_mode_set)(struct drm_crtc *crtc,
210
	int (*crtc_mode_set)(struct drm_crtc *crtc,
206
			     struct drm_display_mode *mode,
211
			     struct drm_display_mode *mode,
207
			     struct drm_display_mode *adjusted_mode,
212
			     struct drm_display_mode *adjusted_mode,
208
			     int x, int y,
213
			     int x, int y,
209
			     struct drm_framebuffer *old_fb);
214
			     struct drm_framebuffer *old_fb);
-
 
215
	void (*write_eld)(struct drm_connector *connector,
-
 
216
			  struct drm_crtc *crtc);
210
	void (*fdi_link_train)(struct drm_crtc *crtc);
217
	void (*fdi_link_train)(struct drm_crtc *crtc);
211
	void (*init_clock_gating)(struct drm_device *dev);
218
	void (*init_clock_gating)(struct drm_device *dev);
212
	void (*init_pch_clock_gating)(struct drm_device *dev);
219
	void (*init_pch_clock_gating)(struct drm_device *dev);
213
	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
220
	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
214
			  struct drm_framebuffer *fb,
221
			  struct drm_framebuffer *fb,
215
			  struct drm_i915_gem_object *obj);
222
			  struct drm_i915_gem_object *obj);
216
	int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
223
	int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
217
			    int x, int y);
224
			    int x, int y);
-
 
225
	void (*force_wake_get)(struct drm_i915_private *dev_priv);
-
 
226
	void (*force_wake_put)(struct drm_i915_private *dev_priv);
218
	/* clock updates for mode set */
227
	/* clock updates for mode set */
219
	/* cursor updates */
228
	/* cursor updates */
220
	/* render clock increase/decrease */
229
	/* render clock increase/decrease */
221
	/* display clock increase/decrease */
230
	/* display clock increase/decrease */
222
	/* pll clock increase/decrease */
231
	/* pll clock increase/decrease */
Line 275... Line 284...
275
 
284
 
276
	int has_gem;
285
	int has_gem;
Line 277... Line 286...
277
	int relative_constants_mode;
286
	int relative_constants_mode;
-
 
287
 
-
 
288
	void __iomem *regs;
278
 
289
	/** gt_fifo_count and the subsequent register write are synchronized
-
 
290
	 * with dev->struct_mutex. */
-
 
291
	unsigned gt_fifo_count;
-
 
292
	/** forcewake_count is protected by gt_lock */
-
 
293
	unsigned forcewake_count;
Line 279... Line 294...
279
	void __iomem *regs;
294
	/** gt_lock is also taken in irq contexts. */
280
	u32 gt_fifo_count;
295
    spinlock_t gt_lock;
281
 
296
 
282
    struct intel_gmbus {
297
    struct intel_gmbus {
Line 326... Line 341...
326
	/* For hangcheck timer */
341
	/* For hangcheck timer */
327
#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
342
#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
328
    struct timer_list hangcheck_timer;
343
    struct timer_list hangcheck_timer;
329
	int hangcheck_count;
344
	int hangcheck_count;
330
	uint32_t last_acthd;
345
	uint32_t last_acthd;
-
 
346
	uint32_t last_acthd_bsd;
-
 
347
	uint32_t last_acthd_blt;
331
	uint32_t last_instdone;
348
	uint32_t last_instdone;
332
	uint32_t last_instdone1;
349
	uint32_t last_instdone1;
Line 333... Line 350...
333
 
350
 
334
	unsigned long cfb_size;
351
	unsigned long cfb_size;
Line 339... Line 356...
339
 
356
 
Line 340... Line 357...
340
    struct intel_opregion opregion;
357
    struct intel_opregion opregion;
341
 
358
 
-
 
359
	/* overlay */
Line 342... Line 360...
342
	/* overlay */
360
//   struct intel_overlay *overlay;
343
//   struct intel_overlay *overlay;
361
	bool sprite_scaling_enabled;
344
 
362
 
345
	/* LVDS info */
-
 
346
	int backlight_level;  /* restore backlight to this value */
363
	/* LVDS info */
347
	bool backlight_enabled;
364
	int backlight_level;  /* restore backlight to this value */
Line 348... Line 365...
348
	struct drm_display_mode *panel_fixed_mode;
365
	bool backlight_enabled;
349
	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
366
	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
350
	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
367
	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
351
 
368
 
352
	/* Feature bits from the VBIOS */
369
	/* Feature bits from the VBIOS */
353
	unsigned int int_tv_support:1;
370
	unsigned int int_tv_support:1;
-
 
371
	unsigned int lvds_dither:1;
354
	unsigned int lvds_dither:1;
372
	unsigned int lvds_vbt:1;
355
	unsigned int lvds_vbt:1;
373
	unsigned int int_crt_support:1;
356
	unsigned int int_crt_support:1;
374
	unsigned int lvds_use_ssc:1;
357
	unsigned int lvds_use_ssc:1;
375
	unsigned int display_clock_mode:1;
358
	int lvds_ssc_freq;
376
	int lvds_ssc_freq;
Line 370... Line 388...
370
	bool no_aux_handshake;
388
	bool no_aux_handshake;
Line 371... Line 389...
371
 
389
 
Line 372... Line 390...
372
//   struct notifier_block lid_notifier;
390
//   struct notifier_block lid_notifier;
373
 
391
 
374
	int crt_ddc_pin;
392
	int crt_ddc_pin;
375
    struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
393
	struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */
Line 376... Line 394...
376
	int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
394
	int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
Line 501... Line 519...
501
	u8 saveGR[25];
519
	u8 saveGR[25];
502
	u8 saveAR_INDEX;
520
	u8 saveAR_INDEX;
503
	u8 saveAR[21];
521
	u8 saveAR[21];
504
	u8 saveDACMASK;
522
	u8 saveDACMASK;
505
	u8 saveCR[37];
523
	u8 saveCR[37];
506
	uint64_t saveFENCE[16];
524
	uint64_t saveFENCE[I915_MAX_NUM_FENCES];
507
	u32 saveCURACNTR;
525
	u32 saveCURACNTR;
508
	u32 saveCURAPOS;
526
	u32 saveCURAPOS;
509
	u32 saveCURABASE;
527
	u32 saveCURABASE;
510
	u32 saveCURBCNTR;
528
	u32 saveCURBCNTR;
511
	u32 saveCURBPOS;
529
	u32 saveCURBPOS;
Line 668... Line 686...
668
    struct sdvo_device_mapping sdvo_mappings[2];
686
    struct sdvo_device_mapping sdvo_mappings[2];
669
	/* indicate whether the LVDS_BORDER should be enabled or not */
687
	/* indicate whether the LVDS_BORDER should be enabled or not */
670
	unsigned int lvds_border_bits;
688
	unsigned int lvds_border_bits;
671
	/* Panel fitter placement and size for Ironlake+ */
689
	/* Panel fitter placement and size for Ironlake+ */
672
	u32 pch_pf_pos, pch_pf_size;
690
	u32 pch_pf_pos, pch_pf_size;
673
	int panel_t3, panel_t12;
-
 
Line 674... Line 691...
674
 
691
 
675
    struct drm_crtc *plane_to_crtc_mapping[2];
692
    struct drm_crtc *plane_to_crtc_mapping[3];
676
    struct drm_crtc *pipe_to_crtc_mapping[2];
693
    struct drm_crtc *pipe_to_crtc_mapping[3];
677
//   wait_queue_head_t pending_flip_queue;
694
//   wait_queue_head_t pending_flip_queue;
Line 678... Line 695...
678
	bool flip_pending_is_done;
695
	bool flip_pending_is_done;
679
 
696
 
Line 703... Line 720...
703
	u8 fmax;
720
	u8 fmax;
704
	u8 fstart;
721
	u8 fstart;
Line 705... Line 722...
705
 
722
 
706
	u64 last_count1;
723
	u64 last_count1;
-
 
724
	unsigned long last_time1;
707
	unsigned long last_time1;
725
	unsigned long chipset_power;
708
	u64 last_count2;
726
	u64 last_count2;
709
    struct timespec last_time2;
727
    struct timespec last_time2;
710
	unsigned long gfx_power;
728
	unsigned long gfx_power;
711
	int c_m;
729
	int c_m;
Line 725... Line 743...
725
 
743
 
Line 726... Line 744...
726
//   struct backlight_device *backlight;
744
//   struct backlight_device *backlight;
727
 
745
 
728
//   struct drm_property *broadcast_rgb_property;
-
 
729
//   struct drm_property *force_audio_property;
-
 
730
 
746
//   struct drm_property *broadcast_rgb_property;
Line 731... Line 747...
731
	atomic_t forcewake_count;
747
//   struct drm_property *force_audio_property;
732
} drm_i915_private_t;
748
} drm_i915_private_t;
733
 
749
 
Line 773... Line 789...
773
 
789
 
774
    /**
790
    /**
775
     * Fence register bits (if any) for this object.  Will be set
791
     * Fence register bits (if any) for this object.  Will be set
776
     * as needed when mapped into the GTT.
792
     * as needed when mapped into the GTT.
777
     * Protected by dev->struct_mutex.
-
 
778
     *
-
 
779
     * Size: 4 bits for 16 fences + sign (for FENCE_REG_NONE)
793
     * Protected by dev->struct_mutex.
780
     */
794
     */
Line 781... Line 795...
781
    signed int fence_reg : 5;
795
	signed int fence_reg:I915_MAX_NUM_FENCE_BITS;
782
 
796
 
783
    /**
797
    /**
784
     * Advice: are the backing pages purgeable?
798
     * Advice: are the backing pages purgeable?
Line 913... Line 927...
913
	struct list_head client_list;
927
	struct list_head client_list;
914
};
928
};
Line 915... Line 929...
915
 
929
 
916
struct drm_i915_file_private {
930
struct drm_i915_file_private {
917
	struct {
931
	struct {
918
//       struct spinlock lock;
932
        spinlock_t lock;
919
		struct list_head request_list;
933
		struct list_head request_list;
920
	} mm;
934
	} mm;
Line 921... Line 935...
921
};
935
};
Line 1157... Line 1171...
1157
{
1171
{
1158
   drm_i915_private_t *dev_priv = ring->dev->dev_private;
1172
   drm_i915_private_t *dev_priv = ring->dev->dev_private;
1159
   return ring->outstanding_lazy_request = dev_priv->next_seqno;
1173
   return ring->outstanding_lazy_request = dev_priv->next_seqno;
1160
}
1174
}
Line -... Line 1175...
-
 
1175
 
-
 
1176
int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
-
 
1177
					   struct intel_ring_buffer *pipelined);
Line 1161... Line 1178...
1161
 
1178
int __must_check i915_gem_object_put_fence(struct drm_i915_gem_object *obj);
1162
 
1179
 
1163
void i915_gem_retire_requests(struct drm_device *dev);
1180
void i915_gem_retire_requests(struct drm_device *dev);
1164
void i915_gem_reset(struct drm_device *dev);
1181
void i915_gem_reset(struct drm_device *dev);
Line 1253... Line 1270...
1253
/* intel_i2c.c */
1270
/* intel_i2c.c */
1254
extern int intel_setup_gmbus(struct drm_device *dev);
1271
extern int intel_setup_gmbus(struct drm_device *dev);
1255
extern void intel_teardown_gmbus(struct drm_device *dev);
1272
extern void intel_teardown_gmbus(struct drm_device *dev);
1256
extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
1273
extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
1257
extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
1274
extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
1258
 
-
 
1259
//extern inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
1275
extern inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
1260
//{
1276
{
1261
//   return container_of(adapter, struct intel_gmbus, adapter)->force_bit;
1277
	return container_of(adapter, struct intel_gmbus, adapter)->force_bit;
1262
//}
-
 
1263
 
1278
}
1264
extern void intel_i2c_reset(struct drm_device *dev);
1279
extern void intel_i2c_reset(struct drm_device *dev);
Line 1265... Line 1280...
1265
 
1280
 
1266
/* intel_opregion.c */
1281
/* intel_opregion.c */
1267
extern int intel_opregion_setup(struct drm_device *dev);
1282
extern int intel_opregion_setup(struct drm_device *dev);
Line 1294... Line 1309...
1294
extern void intel_modeset_cleanup(struct drm_device *dev);
1309
extern void intel_modeset_cleanup(struct drm_device *dev);
1295
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
1310
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
1296
extern bool intel_fbc_enabled(struct drm_device *dev);
1311
extern bool intel_fbc_enabled(struct drm_device *dev);
1297
extern void intel_disable_fbc(struct drm_device *dev);
1312
extern void intel_disable_fbc(struct drm_device *dev);
1298
extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
1313
extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
-
 
1314
extern void ironlake_init_pch_refclk(struct drm_device *dev);
1299
extern void ironlake_enable_rc6(struct drm_device *dev);
1315
extern void ironlake_enable_rc6(struct drm_device *dev);
1300
extern void gen6_set_rps(struct drm_device *dev, u8 val);
1316
extern void gen6_set_rps(struct drm_device *dev, u8 val);
1301
extern void intel_detect_pch (struct drm_device *dev);
1317
extern void intel_detect_pch(struct drm_device *dev);
1302
extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
1318
extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
Line -... Line 1319...
-
 
1319
 
-
 
1320
extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
-
 
1321
extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);
-
 
1322
extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
-
 
1323
extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);
1303
 
1324
 
1304
/* overlay */
1325
/* overlay */
1305
#ifdef CONFIG_DEBUG_FS
1326
#ifdef CONFIG_DEBUG_FS
1306
extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
1327
extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
Line 1347... Line 1368...
1347
	(((dev_priv)->info->gen >= 6) && \
1368
	(((dev_priv)->info->gen >= 6) && \
1348
	((reg) < 0x40000) && \
1369
	((reg) < 0x40000) && \
1349
	((reg) != FORCEWAKE))
1370
	((reg) != FORCEWAKE))
Line 1350... Line 1371...
1350
 
1371
 
1351
#define __i915_read(x, y) \
1372
#define __i915_read(x, y) \
1352
static inline u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
-
 
1353
	u##x val = 0; \
-
 
1354
	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-
 
1355
		gen6_gt_force_wake_get(dev_priv); \
-
 
1356
		val = read##y(dev_priv->regs + reg); \
-
 
1357
		gen6_gt_force_wake_put(dev_priv); \
-
 
1358
	} else { \
-
 
1359
		val = read##y(dev_priv->regs + reg); \
-
 
1360
	} \
-
 
1361
/*   trace_i915_reg_rw(false, reg, val, sizeof(val)); */\
-
 
1362
	return val; \
-
 
Line 1363... Line 1373...
1363
}
1373
	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
1364
 
1374
 
1365
__i915_read(8, b)
1375
__i915_read(8, b)
1366
__i915_read(16, w)
1376
__i915_read(16, w)
1367
__i915_read(32, l)
1377
__i915_read(32, l)
Line 1368... Line 1378...
1368
__i915_read(64, q)
1378
__i915_read(64, q)
1369
#undef __i915_read
1379
#undef __i915_read
1370
 
-
 
1371
#define __i915_write(x, y) \
-
 
1372
static inline void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
-
 
1373
/*   trace_i915_reg_rw(true, reg, val, sizeof(val));*/ \
-
 
1374
	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-
 
1375
		__gen6_gt_wait_for_fifo(dev_priv); \
1380
 
1376
	} \
1381
#define __i915_write(x, y) \
1377
	write##y(val, dev_priv->regs + reg); \
1382
	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val);
1378
}
1383
 
1379
__i915_write(8, b)
1384
__i915_write(8, b)
1380
__i915_write(16, w)
1385
__i915_write(16, w)