Subversion Repositories Kolibri OS

Rev

Rev 4293 | Rev 4560 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 4293 Rev 4398
Line 957... Line 957...
957 
 
 957 
 
958 
    return err;
 958 
    return err;
Line 959... Line -...
959 
}
 - 
 
960 
 
 - 
 
961 
 
 - 
 
962 
/* We give fast paths for the really cool registers */
 - 
 
963 
#define NEEDS_FORCE_WAKE(dev_priv, reg) \
 - 
 
964 
	((HAS_FORCE_WAKE((dev_priv)->dev)) && \
 - 
 
965 
	 ((reg) < 0x40000) &&            \
 - 
 
966 
	 ((reg) != FORCEWAKE))
 - 
 
967 
 
 - 
 
968 
static bool IS_DISPLAYREG(u32 reg)
 - 
 
969 
{
 - 
 
970 
	/*
 - 
 
971 
	 * This should make it easier to transition modules over to the
 - 
 
972 
	 * new register block scheme, since we can do it incrementally.
 - 
 
973 
	 */
 - 
 
974 
	if (reg >= VLV_DISPLAY_BASE)
 - 
 
975 
		return false;
 - 
 
976 
 
 - 
 
977 
	if (reg >= RENDER_RING_BASE &&
 - 
 
978 
	    reg < RENDER_RING_BASE + 0xff)
 - 
 
979 
		return false;
 - 
 
980 
	if (reg >= GEN6_BSD_RING_BASE &&
 - 
 
981 
	    reg < GEN6_BSD_RING_BASE + 0xff)
 - 
 
982 
		return false;
 - 
 
983 
	if (reg >= BLT_RING_BASE &&
 - 
 
984 
	    reg < BLT_RING_BASE + 0xff)
 - 
 
985 
		return false;
 - 
 
986 
 
 - 
 
987 
	if (reg == PGTBL_ER)
 - 
 
988 
		return false;
 - 
 
989 
 
 - 
 
990 
	if (reg >= IPEIR_I965 &&
 - 
 
991 
	    reg < HWSTAM)
 - 
 
992 
		return false;
 - 
 
993 
 
 - 
 
994 
	if (reg == MI_MODE)
 - 
 
995 
		return false;
 - 
 
996 
 
 - 
 
997 
	if (reg == GFX_MODE_GEN7)
 - 
 
998 
		return false;
 - 
 
999 
 
 - 
 
1000 
	if (reg == RENDER_HWS_PGA_GEN7 ||
 - 
 
1001 
	    reg == BSD_HWS_PGA_GEN7 ||
 - 
 
1002 
	    reg == BLT_HWS_PGA_GEN7)
 - 
 
1003 
		return false;
 - 
 
1004 
 
 - 
 
1005 
	if (reg == GEN6_BSD_SLEEP_PSMI_CONTROL ||
 - 
 
1006 
	    reg == GEN6_BSD_RNCID)
 - 
 
1007 
		return false;
 - 
 
1008 
 
 - 
 
1009 
	if (reg == GEN6_BLITTER_ECOSKPD)
 - 
 
1010 
		return false;
 - 
 
1011 
 
 - 
 
1012 
	if (reg >= 0x4000c &&
 - 
 
1013 
	    reg <= 0x4002c)
 - 
 
1014 
		return false;
 - 
 
1015 
 
 - 
 
1016 
	if (reg >= 0x4f000 &&
 - 
 
1017 
	    reg <= 0x4f08f)
 - 
 
1018 
		return false;
 - 
 
1019 
 
 - 
 
1020 
	if (reg >= 0x4f100 &&
 - 
 
1021 
	    reg <= 0x4f11f)
 - 
 
1022 
		return false;
 - 
 
1023 
 
 - 
 
1024 
	if (reg >= VLV_MASTER_IER &&
 - 
 
1025 
	    reg <= GEN6_PMIER)
 - 
 
1026 
		return false;
 - 
 
1027 
 
 - 
 
1028 
	if (reg >= FENCE_REG_SANDYBRIDGE_0 &&
 - 
 
1029 
	    reg < (FENCE_REG_SANDYBRIDGE_0 + (16*8)))
 - 
 
1030 
		return false;
 - 
 
1031 
 
 - 
 
1032 
	if (reg >= VLV_IIR_RW &&
 - 
 
1033 
	    reg <= VLV_ISR)
 - 
 
1034 
		return false;
 - 
 
1035 
 
 - 
 
1036 
	if (reg == FORCEWAKE_VLV ||
 - 
 
1037 
	    reg == FORCEWAKE_ACK_VLV)
 - 
 
1038 
		return false;
 - 
 
1039 
 
 - 
 
1040 
	if (reg == GEN6_GDRST)
 - 
 
1041 
		return false;
 - 
 
1042 
 
 - 
 
1043 
	switch (reg) {
 - 
 
1044 
	case _3D_CHICKEN3:
 - 
 
1045 
	case IVB_CHICKEN3:
 - 
 
1046 
	case GEN7_COMMON_SLICE_CHICKEN1:
 - 
 
1047 
	case GEN7_L3CNTLREG1:
 - 
 
1048 
	case GEN7_L3_CHICKEN_MODE_REGISTER:
 - 
 
1049 
	case GEN7_ROW_CHICKEN2:
 - 
 
1050 
	case GEN7_L3SQCREG4:
 - 
 
1051 
	case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG:
 - 
 
1052 
	case GEN7_HALF_SLICE_CHICKEN1:
 - 
 
1053 
	case GEN6_MBCTL:
 - 
 
1054 
	case GEN6_UCGCTL2:
 - 
 
1055 
		return false;
 - 
 
1056 
	default:
 - 
 
1057 
		break;
 - 
 
1058 
	}
 - 
 
1059 
 
 - 
 
1060 
	return true;
 - 
 
1061 
}
 - 
 
1062 
 
 - 
 
1063 
/* We give fast paths for the really cool registers */
 - 
 
1064 
#define NEEDS_FORCE_WAKE(dev_priv, reg) \
 - 
 
1065 
	((HAS_FORCE_WAKE((dev_priv)->dev)) && \
 - 
 
1066 
	 ((reg) < 0x40000) &&            \
 - 
 
1067 
	 ((reg) != FORCEWAKE))
 - 
 
1068 
static void
 - 
 
1069 
ilk_dummy_write(struct drm_i915_private *dev_priv)
 - 
 
1070 
{
 - 
 
1071 
	/* WaIssueDummyWriteToWakeupFromRC6:ilk Issue a dummy write to wake up
 - 
 
1072 
	 * the chip from rc6 before touching it for real. MI_MODE is masked,
 - 
 
1073 
	 * hence harmless to write 0 into. */
 - 
 
1074 
	I915_WRITE_NOTRACE(MI_MODE, 0);
 - 
 
1075 
}
 - 
 
1076 
 
 - 
 
1077 
static void
 - 
 
1078 
hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
 - 
 
1079 
{
 - 
 
1080 
	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
 - 
 
1081 
	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
 - 
 
1082 
		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
 - 
 
1083 
			  reg);
 - 
 
1084 
		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
 - 
 
1085 
	}
 - 
 
1086 
}
 - 
 
1087 
 
 - 
 
1088 
static void
 - 
 
1089 
hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
 - 
 
1090 
{
 - 
 
1091 
	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
 - 
 
1092 
	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
 - 
 
1093 
		DRM_ERROR("Unclaimed write to %x\n", reg);
 -