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int i915_enable_psr __read_mostly = 0;

module_param_named(enable_psr, i915_enable_psr, int, 0600);

MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");

MODULE_PARM_DESC(disable_power_well,

		 "Disable the power well when possible (default: true)");

int i915_enable_ips __read_mostly = 1;

module_param_named(enable_ips, i915_enable_ips, int, 0600);

MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");

bool i915_fastboot __read_mostly = 0;

module_param_named(fastboot, i915_fastboot, bool, 0600);

MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "

		 "(default: false)");

int i915_enable_pc8 __read_mostly = 0;

module_param_named(enable_pc8, i915_enable_pc8, int, 0600);

MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");

int i915_pc8_timeout __read_mostly = 5000;

module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);

MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");

bool i915_prefault_disable __read_mostly;

module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);

MODULE_PARM_DESC(prefault_disable,

		"Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");

	.is_mobile = 1,

	.is_haswell = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.is_haswell = 1,

	.is_mobile = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.has_vebox_ring = 1,

};

/*

 * Make sure any device matches here are from most specific to most

 * general.  For example, since the Quanta match is based on the subsystem

 * and subvendor IDs, we need it to come before the more general IVB

 * PCI ID matches, otherwise we'll use the wrong info struct above.

 */

#define INTEL_PCI_IDS \

	INTEL_I915G_IDS(&intel_i915g_info),	\

	INTEL_I915GM_IDS(&intel_i915gm_info),	\

	INTEL_I945G_IDS(&intel_i945g_info),	\

	INTEL_I945GM_IDS(&intel_i945gm_info),	\

	INTEL_I965G_IDS(&intel_i965g_info),	\

	INTEL_G33_IDS(&intel_g33_info),		\

	INTEL_I965GM_IDS(&intel_i965gm_info),	\

	INTEL_GM45_IDS(&intel_gm45_info), 	\

	INTEL_G45_IDS(&intel_g45_info), 	\

	INTEL_PINEVIEW_IDS(&intel_pineview_info),	\

	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),	\

	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),	\

	INTEL_SNB_D_IDS(&intel_sandybridge_d_info),	\

	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),	\

	INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ \

	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),	\

	INTEL_IVB_D_IDS(&intel_ivybridge_d_info),	\

	INTEL_HSW_D_IDS(&intel_haswell_d_info), \

	INTEL_HSW_M_IDS(&intel_haswell_m_info), \

     * underneath. This is a requirement from virtualization team.

	 *

	 * In some virtualized environments (e.g. XEN), there is irrelevant

	 * ISA bridge in the system. To work reliably, we should scan trhough

	 * all the ISA bridge devices and check for the first match, instead

	while (pch) {

				WARN_ON(!IS_HASWELL(dev));

				WARN_ON(!IS_ULT(dev));

			break;

        }

check_next:

//       pci_dev_put(curr);

    }

}

#if 0

static int i915_drm_freeze(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_crtc *crtc;

	/* ignore lid events during suspend */

	mutex_lock(&dev_priv->modeset_restore_lock);

	dev_priv->modeset_restore = MODESET_SUSPENDED;

	mutex_unlock(&dev_priv->modeset_restore_lock);

	/* We do a lot of poking in a lot of registers, make sure they work

	 * properly. */

	hsw_disable_package_c8(dev_priv);

	intel_set_power_well(dev, true);

	drm_kms_helper_poll_disable(dev);

	pci_save_state(dev->pdev);

	/* If KMS is active, we do the leavevt stuff here */

	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		int error;

		mutex_lock(&dev->struct_mutex);

		error = i915_gem_idle(dev);

		mutex_unlock(&dev->struct_mutex);

		if (error) {

			dev_err(&dev->pdev->dev,

				"GEM idle failed, resume might fail\n");

			return error;

		}

		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);

		drm_irq_uninstall(dev);

		dev_priv->enable_hotplug_processing = false;

		/*

		 * Disable CRTCs directly since we want to preserve sw state

		 * for _thaw.

		 */

		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)

			dev_priv->display.crtc_disable(crtc);

	i915_save_state(dev);

	intel_opregion_fini(dev);

	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);

	console_unlock();

	return 0;

int i915_suspend(struct drm_device *dev, pm_message_t state)

{

	int error;

	if (!dev || !dev->dev_private) {

		DRM_ERROR("dev: %p\n", dev);

		DRM_ERROR("DRM not initialized, aborting suspend.\n");

		return -ENODEV;

	}

	if (state.event == PM_EVENT_PRETHAW)

		return 0;

	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)

		return 0;

	error = i915_drm_freeze(dev);

	if (error)

		return error;

	if (state.event == PM_EVENT_SUSPEND) {

		/* Shut down the device */

		pci_disable_device(dev->pdev);

		pci_set_power_state(dev->pdev, PCI_D3hot);

	}

	return 0;

}

void intel_console_resume(struct work_struct *work)

{

	struct drm_i915_private *dev_priv =

		container_of(work, struct drm_i915_private,

			     console_resume_work);

	struct drm_device *dev = dev_priv->dev;

	console_lock();

	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);

	console_unlock();

}

static void intel_resume_hotplug(struct drm_device *dev)

{

	struct drm_mode_config *mode_config = &dev->mode_config;

	struct intel_encoder *encoder;

	mutex_lock(&mode_config->mutex);

	DRM_DEBUG_KMS("running encoder hotplug functions\n");

	list_for_each_entry(encoder, &mode_config->encoder_list, base.head)

		if (encoder->hot_plug)

			encoder->hot_plug(encoder);

	mutex_unlock(&mode_config->mutex);

	/* Just fire off a uevent and let userspace tell us what to do */

	drm_helper_hpd_irq_event(dev);

}

static int __i915_drm_thaw(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int error = 0;

	i915_restore_state(dev);

	intel_opregion_setup(dev);

	/* KMS EnterVT equivalent */

	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		intel_init_pch_refclk(dev);

		mutex_lock(&dev->struct_mutex);

		error = i915_gem_init_hw(dev);

		mutex_unlock(&dev->struct_mutex);

		/* We need working interrupts for modeset enabling ... */

		drm_irq_install(dev);

		intel_modeset_init_hw(dev);

		drm_modeset_lock_all(dev);

		drm_modeset_unlock_all(dev);

		/*

		 * ... but also need to make sure that hotplug processing

		 * doesn't cause havoc. Like in the driver load code we don't

		 * bother with the tiny race here where we might loose hotplug

		 * notifications.

		 * */

		intel_hpd_init(dev);

		dev_priv->enable_hotplug_processing = true;

		/* Config may have changed between suspend and resume */

		intel_resume_hotplug(dev);

	}

	intel_opregion_init(dev);

	/*

	 * The console lock can be pretty contented on resume due

	 * to all the printk activity.  Try to keep it out of the hot

	 * path of resume if possible.

	 */

	if (console_trylock()) {

		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);

		console_unlock();

	} else {

		schedule_work(&dev_priv->console_resume_work);

	}

	/* Undo what we did at i915_drm_freeze so the refcount goes back to the

	 * expected level. */

	hsw_enable_package_c8(dev_priv);

	mutex_lock(&dev_priv->modeset_restore_lock);

	dev_priv->modeset_restore = MODESET_DONE;

	mutex_unlock(&dev_priv->modeset_restore_lock);

	return error;

}

static int i915_drm_thaw(struct drm_device *dev)

{

	int error = 0;

	intel_uncore_sanitize(dev);

	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		mutex_lock(&dev->struct_mutex);

		i915_gem_restore_gtt_mappings(dev);

		mutex_unlock(&dev->struct_mutex);

	}

	__i915_drm_thaw(dev);

	return error;

}

int i915_resume(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;

	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)

		return 0;

	if (pci_enable_device(dev->pdev))

		return -EIO;

	pci_set_master(dev->pdev);

	intel_uncore_sanitize(dev);

	/*

	 * Platforms with opregion should have sane BIOS, older ones (gen3 and

	 * earlier) need this since the BIOS might clear all our scratch PTEs.

	 */

	if (drm_core_check_feature(dev, DRIVER_MODESET) &&

	    !dev_priv->opregion.header) {

		mutex_lock(&dev->struct_mutex);

		i915_gem_restore_gtt_mappings(dev);

		mutex_unlock(&dev->struct_mutex);

	}

	ret = __i915_drm_thaw(dev);

	if (ret)

		return ret;

	drm_kms_helper_poll_enable(dev);

	return 0;

}

/**

 * i915_reset - reset chip after a hang

 * @dev: drm device to reset

 *

 * Reset the chip.  Useful if a hang is detected. Returns zero on successful

 * reset or otherwise an error code.

 *

 * Procedure is fairly simple:

 *   - reset the chip using the reset reg

 *   - re-init context state

 *   - re-init hardware status page

 *   - re-init ring buffer

 *   - re-init interrupt state

 *   - re-init display

 */

int i915_reset(struct drm_device *dev)

{

	drm_i915_private_t *dev_priv = dev->dev_private;

	bool simulated;

	int ret;

	if (!i915_try_reset)

		return 0;

	mutex_lock(&dev->struct_mutex);

	i915_gem_reset(dev);

	simulated = dev_priv->gpu_error.stop_rings != 0;

	if (!simulated && get_seconds() - dev_priv->gpu_error.last_reset < 5) {

		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");

		ret = -ENODEV;

	} else {

		ret = intel_gpu_reset(dev);

		/* Also reset the gpu hangman. */

		if (simulated) {

			DRM_INFO("Simulated gpu hang, resetting stop_rings\n");

			dev_priv->gpu_error.stop_rings = 0;

			if (ret == -ENODEV) {

				DRM_ERROR("Reset not implemented, but ignoring "

					  "error for simulated gpu hangs\n");

				ret = 0;

			}

		} else

			dev_priv->gpu_error.last_reset = get_seconds();

	}

	if (ret) {

		DRM_ERROR("Failed to reset chip.\n");

		mutex_unlock(&dev->struct_mutex);

		return ret;

	}

	/* Ok, now get things going again... */

	/*

	 * Everything depends on having the GTT running, so we need to start

	 * there.  Fortunately we don't need to do this unless we reset the

	 * chip at a PCI level.

	 *

	 * Next we need to restore the context, but we don't use those

	 * yet either...

	 *

	 * Ring buffer needs to be re-initialized in the KMS case, or if X

	 * was running at the time of the reset (i.e. we weren't VT

	 * switched away).

	 */

	if (drm_core_check_feature(dev, DRIVER_MODESET) ||

			!dev_priv->ums.mm_suspended) {

		struct intel_ring_buffer *ring;

		int i;

		dev_priv->ums.mm_suspended = 0;

		i915_gem_init_swizzling(dev);

		for_each_ring(ring, dev_priv, i)

			ring->init(ring);

		i915_gem_context_init(dev);

		if (dev_priv->mm.aliasing_ppgtt) {

			ret = dev_priv->mm.aliasing_ppgtt->enable(dev);

			if (ret)

				i915_gem_cleanup_aliasing_ppgtt(dev);

		}

		/*

		 * It would make sense to re-init all the other hw state, at

		 * least the rps/rc6/emon init done within modeset_init_hw. For

		 * some unknown reason, this blows up my ilk, so don't.

		 */

		mutex_unlock(&dev->struct_mutex);

		drm_irq_uninstall(dev);

		drm_irq_install(dev);

		intel_hpd_init(dev);

	}

	return 0;

}

static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)

{

	struct intel_device_info *intel_info =

		(struct intel_device_info *) ent->driver_data;

	/* Only bind to function 0 of the device. Early generations

	 * used function 1 as a placeholder for multi-head. This causes

	 * functions have the same PCI-ID!

	 */

	 * (gasp!) to share buffers between X and the client. Hence we need to

	 * keep around the fake agp stuff for gen3, even when kms is enabled. */

		driver.driver_features &=

			~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);

	} else if (!intel_agp_enabled) {

		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");

		return -ENODEV;

	}

	return drm_get_pci_dev(pdev, ent, &driver);

}

static void

	drm_put_dev(dev);

}

{

	struct pci_dev *pdev = to_pci_dev(dev);

	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	int error;

		return -ENODEV;

	}

	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)

		return 0;

	error = i915_drm_freeze(drm_dev);

	if (error)

		return error;

	pci_disable_device(pdev);

	pci_set_power_state(pdev, PCI_D3hot);

	return 0;

}

static int i915_pm_resume(struct device *dev)

{

	struct pci_dev *pdev = to_pci_dev(dev);

	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_resume(drm_dev);

}

static int i915_pm_freeze(struct device *dev)

{

	struct pci_dev *pdev = to_pci_dev(dev);

	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	if (!drm_dev || !drm_dev->dev_private) {

		dev_err(dev, "DRM not initialized, aborting suspend.\n");

		return -ENODEV;

	}

	return i915_drm_freeze(drm_dev);

}

//    .master_destroy = i915_master_destroy,

#if defined(CONFIG_DEBUG_FS)

	.debugfs_init = i915_debugfs_init,

	.debugfs_cleanup = i915_debugfs_cleanup,

    const struct pci_device_id  *ent;

    {

        dbgprintf("device not found\n");

        return -ENODEV;

                                device.pci_dev.device);

/*

    } else if (init_agp() != 0) {