WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_drv.c


/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
/*
 *
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */
 
#include 
#include 
 
#include 
#include 
#include 
#include 
#include 
 
#include "i915_drv.h"
#include 
 
unsigned int i915_lvds_downclock =  0;
int i915_vbt_sdvo_panel_type     = -1;
unsigned int i915_panel_use_ssc  =  1;
unsigned int i915_powersave      =  1;
unsigned int i915_enable_fbc     =  1;
 
#define PCI_VENDOR_ID_INTEL        0x8086
 
#define INTEL_VGA_DEVICE(id, info) {        \
    .class = PCI_CLASS_DISPLAY_VGA << 8,    \
    .class_mask = 0xff0000,                 \
    .vendor = 0x8086,                       \
    .device = id,                           \
    .subvendor = PCI_ANY_ID,                \
    .subdevice = PCI_ANY_ID,                \
    .driver_data = (unsigned long) info }
 
static const struct intel_device_info intel_sandybridge_d_info = {
    .gen = 6,
    .need_gfx_hws = 1,
    .has_hotplug  = 1,
    .has_bsd_ring = 1,
    .has_blt_ring = 1,
};
 
static const struct intel_device_info intel_sandybridge_m_info = {
    .gen = 6,
    .is_mobile    = 1,
    .need_gfx_hws = 1,
    .has_hotplug  = 1,
    .has_fbc      = 1,
    .has_bsd_ring = 1,
    .has_blt_ring = 1,
};
 
 
static const struct pci_device_id pciidlist[] = {       /* aka */
    INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
    INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
    INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
    {0, 0, 0}
};
 
#define INTEL_PCH_DEVICE_ID_MASK        0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
#define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
 
void intel_detect_pch (struct drm_device *dev)
{
    struct drm_i915_private *dev_priv = dev->dev_private;
    struct pci_dev *pch;
 
    /*
     * The reason to probe ISA bridge instead of Dev31:Fun0 is to
     * make graphics device passthrough work easy for VMM, that only
     * need to expose ISA bridge to let driver know the real hardware
     * underneath. This is a requirement from virtualization team.
     */
    pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
    if (pch) {
        if (pch->vendor == PCI_VENDOR_ID_INTEL) {
            int id;
            id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 
            if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
                dev_priv->pch_type = PCH_IBX;
                DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
            } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
                dev_priv->pch_type = PCH_CPT;
                DRM_DEBUG_KMS("Found CougarPoint PCH\n");
            } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
                /* PantherPoint is CPT compatible */
                dev_priv->pch_type = PCH_CPT;
                DRM_DEBUG_KMS("Found PatherPoint PCH\n");
            }
        }
    }
}
 
static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
{
    int count;
 
    count = 0;
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
        udelay(10);
 
    I915_WRITE_NOTRACE(FORCEWAKE, 1);
    POSTING_READ(FORCEWAKE);
 
    count = 0;
    while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
        udelay(10);
}
 
/*
 * Generally this is called implicitly by the register read function. However,
 * if some sequence requires the GT to not power down then this function should
 * be called at the beginning of the sequence followed by a call to
 * gen6_gt_force_wake_put() at the end of the sequence.
 */
void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
{
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
    /* Forcewake is atomic in case we get in here without the lock */
    if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
        __gen6_gt_force_wake_get(dev_priv);
}
 
static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
{
    I915_WRITE_NOTRACE(FORCEWAKE, 0);
    POSTING_READ(FORCEWAKE);
}
 
/*
 * see gen6_gt_force_wake_get()
 */
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
{
//    WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
    if (atomic_dec_and_test(&dev_priv->forcewake_count))
        __gen6_gt_force_wake_put(dev_priv);
}
 
void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
{
    if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
        int loop = 500;
        u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
        while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
            udelay(10);
            fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
        }
//        WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
        dev_priv->gt_fifo_count = fifo;
    }
    dev_priv->gt_fifo_count--;
}
 
 
 
 
 
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent);
 
int i915_init(void)
{
    static pci_dev_t device;
    const struct pci_device_id  *ent;
    int  err;
 
    if( init_agp() != 0)
    {
        DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
        return 0;
    };
 
    ent = find_pci_device(&device, pciidlist);
 
    if( unlikely(ent == NULL) )
    {
        dbgprintf("device not found\n");
        return 0;
    };
 
    dbgprintf("device %x:%x\n", device.pci_dev.vendor,
                                device.pci_dev.device);
 
    err = drm_get_dev(&device.pci_dev, ent);
 
    return err;
}
 
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
{
    static struct drm_device *dev;
    int ret;
 
    ENTER();
 
    dev = kzalloc(sizeof(*dev), 0);
    if (!dev)
        return -ENOMEM;
 
 //   ret = pci_enable_device(pdev);
 //   if (ret)
 //       goto err_g1;
 
 //   pci_set_master(pdev);
 
 //   if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
 //       printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
 //       goto err_g2;
 //   }
 
    dev->pdev = pdev;
    dev->pci_device = pdev->device;
    dev->pci_vendor = pdev->vendor;
 
    INIT_LIST_HEAD(&dev->filelist);
    INIT_LIST_HEAD(&dev->ctxlist);
    INIT_LIST_HEAD(&dev->vmalist);
    INIT_LIST_HEAD(&dev->maplist);
 
    spin_lock_init(&dev->count_lock);
    mutex_init(&dev->struct_mutex);
    mutex_init(&dev->ctxlist_mutex);
 
//int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
    ret = i915_driver_load(dev, ent->driver_data );
//    if (ret)
//        goto err_g4;
 
//    if( radeon_modeset )
//        init_display_kms(dev->dev_private, &usermode);
//    else
//        init_display(dev->dev_private, &usermode);
 
    LEAVE();
 
    return 0;
 
err_g4:
//    drm_put_minor(&dev->primary);
//err_g3:
//    if (drm_core_check_feature(dev, DRIVER_MODESET))
//        drm_put_minor(&dev->control);
//err_g2:
//    pci_disable_device(pdev);
//err_g1:
    free(dev);
 
    LEAVE();
 
    return ret;
}

Rev 2326	Rev 2327
1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --	1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --
2	*/	2	*/
3	/*	3	/*
4	*	4	*
5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.	5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6	* All Rights Reserved.	6	* All Rights Reserved.
7	*	7	*
8	* Permission is hereby granted, free of charge, to any person obtaining a	8	* Permission is hereby granted, free of charge, to any person obtaining a
9	* copy of this software and associated documentation files (the	9	* copy of this software and associated documentation files (the
10	* "Software"), to deal in the Software without restriction, including	10	* "Software"), to deal in the Software without restriction, including
11	* without limitation the rights to use, copy, modify, merge, publish,	11	* without limitation the rights to use, copy, modify, merge, publish,
12	* distribute, sub license, and/or sell copies of the Software, and to	12	* distribute, sub license, and/or sell copies of the Software, and to
13	* permit persons to whom the Software is furnished to do so, subject to	13	* permit persons to whom the Software is furnished to do so, subject to
14	* the following conditions:	14	* the following conditions:
15	*	15	*
16	* The above copyright notice and this permission notice (including the	16	* The above copyright notice and this permission notice (including the
17	* next paragraph) shall be included in all copies or substantial portions	17	* next paragraph) shall be included in all copies or substantial portions
18	* of the Software.	18	* of the Software.
19	*	19	*
20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS	20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF	21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.	22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR	23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,	24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE	25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.	26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27	*	27	*
28	*/	28	*/
29		29
30	#include	30	#include
31	#include	31	#include
32		32
33	#include	33	#include
34	#include	34	#include
35	#include	35	#include
36	#include	36	#include
37	#include	37	#include
38		38
39	#include "i915_drv.h"	39	#include "i915_drv.h"
40	#include	40	#include
41		41
-		42	unsigned int i915_lvds_downclock = 0;
-		43	int i915_vbt_sdvo_panel_type = -1;
-		44	unsigned int i915_panel_use_ssc = 1;
-		45	unsigned int i915_powersave = 1;
-		46	unsigned int i915_enable_fbc = 1;
-		47
42	#define PCI_VENDOR_ID_INTEL 0x8086	48	#define PCI_VENDOR_ID_INTEL 0x8086
43		49
44	#define INTEL_VGA_DEVICE(id, info) { \	50	#define INTEL_VGA_DEVICE(id, info) { \
45	.class = PCI_CLASS_DISPLAY_VGA << 8, \	51	.class = PCI_CLASS_DISPLAY_VGA << 8, \
46	.class_mask = 0xff0000, \	52	.class_mask = 0xff0000, \
47	.vendor = 0x8086, \	53	.vendor = 0x8086, \
48	.device = id, \	54	.device = id, \
49	.subvendor = PCI_ANY_ID, \	55	.subvendor = PCI_ANY_ID, \
50	.subdevice = PCI_ANY_ID, \	56	.subdevice = PCI_ANY_ID, \
51	.driver_data = (unsigned long) info }	57	.driver_data = (unsigned long) info }
52		58
53	static const struct intel_device_info intel_sandybridge_d_info = {	59	static const struct intel_device_info intel_sandybridge_d_info = {
54	.gen = 6,	60	.gen = 6,
55	.need_gfx_hws = 1,	61	.need_gfx_hws = 1,
56	.has_hotplug = 1,	62	.has_hotplug = 1,
57	.has_bsd_ring = 1,	63	.has_bsd_ring = 1,
58	.has_blt_ring = 1,	64	.has_blt_ring = 1,
59	};	65	};
60		66
61	static const struct intel_device_info intel_sandybridge_m_info = {	67	static const struct intel_device_info intel_sandybridge_m_info = {
62	.gen = 6,	68	.gen = 6,
63	.is_mobile = 1,	69	.is_mobile = 1,
64	.need_gfx_hws = 1,	70	.need_gfx_hws = 1,
65	.has_hotplug = 1,	71	.has_hotplug = 1,
66	.has_fbc = 1,	72	.has_fbc = 1,
67	.has_bsd_ring = 1,	73	.has_bsd_ring = 1,
68	.has_blt_ring = 1,	74	.has_blt_ring = 1,
69	};	75	};
70		76
71		77
72	static const struct pci_device_id pciidlist[] = { /* aka */	78	static const struct pci_device_id pciidlist[] = { /* aka */
73	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),	79	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
74	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),	80	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
75	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),	81	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
76	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),	82	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
77	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),	83	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
78	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),	84	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
79	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),	85	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
80	{0, 0, 0}	86	{0, 0, 0}
81	};	87	};
82		88
83	#define INTEL_PCH_DEVICE_ID_MASK 0xff00	89	#define INTEL_PCH_DEVICE_ID_MASK 0xff00
84	#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00	90	#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
85	#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00	91	#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
86	#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00	92	#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00
87		93
88	void intel_detect_pch (struct drm_device *dev)	94	void intel_detect_pch (struct drm_device *dev)
89	{	95	{
90	struct drm_i915_private *dev_priv = dev->dev_private;	96	struct drm_i915_private *dev_priv = dev->dev_private;
91	struct pci_dev *pch;	97	struct pci_dev *pch;
92		98
93	/*	99	/*
94	* The reason to probe ISA bridge instead of Dev31:Fun0 is to	100	* The reason to probe ISA bridge instead of Dev31:Fun0 is to
95	* make graphics device passthrough work easy for VMM, that only	101	* make graphics device passthrough work easy for VMM, that only
96	* need to expose ISA bridge to let driver know the real hardware	102	* need to expose ISA bridge to let driver know the real hardware
97	* underneath. This is a requirement from virtualization team.	103	* underneath. This is a requirement from virtualization team.
98	*/	104	*/
99	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);	105	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
100	if (pch) {	106	if (pch) {
101	if (pch->vendor == PCI_VENDOR_ID_INTEL) {	107	if (pch->vendor == PCI_VENDOR_ID_INTEL) {
102	int id;	108	int id;
103	id = pch->device & INTEL_PCH_DEVICE_ID_MASK;	109	id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
104		110
105	if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {	111	if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
106	dev_priv->pch_type = PCH_IBX;	112	dev_priv->pch_type = PCH_IBX;
107	DRM_DEBUG_KMS("Found Ibex Peak PCH\n");	113	DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
108	} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {	114	} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
109	dev_priv->pch_type = PCH_CPT;	115	dev_priv->pch_type = PCH_CPT;
110	DRM_DEBUG_KMS("Found CougarPoint PCH\n");	116	DRM_DEBUG_KMS("Found CougarPoint PCH\n");
111	} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {	117	} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
112	/* PantherPoint is CPT compatible */	118	/* PantherPoint is CPT compatible */
113	dev_priv->pch_type = PCH_CPT;	119	dev_priv->pch_type = PCH_CPT;
114	DRM_DEBUG_KMS("Found PatherPoint PCH\n");	120	DRM_DEBUG_KMS("Found PatherPoint PCH\n");
115	}	121	}
116	}	122	}
117	}	123	}
118	}	124	}
119		125
120	static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)	126	static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
121	{	127	{
122	int count;	128	int count;
123		129
124	count = 0;	130	count = 0;
125	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))	131	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
126	udelay(10);	132	udelay(10);
127		133
128	I915_WRITE_NOTRACE(FORCEWAKE, 1);	134	I915_WRITE_NOTRACE(FORCEWAKE, 1);
129	POSTING_READ(FORCEWAKE);	135	POSTING_READ(FORCEWAKE);
130		136
131	count = 0;	137	count = 0;
132	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)	138	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
133	udelay(10);	139	udelay(10);
134	}	140	}
135		141
136	/*	142	/*
137	* Generally this is called implicitly by the register read function. However,	143	* Generally this is called implicitly by the register read function. However,
138	* if some sequence requires the GT to not power down then this function should	144	* if some sequence requires the GT to not power down then this function should
139	* be called at the beginning of the sequence followed by a call to	145	* be called at the beginning of the sequence followed by a call to
140	* gen6_gt_force_wake_put() at the end of the sequence.	146	* gen6_gt_force_wake_put() at the end of the sequence.
141	*/	147	*/
142	void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)	148	void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
143	{	149	{
144	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));	150	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
145		151
146	/* Forcewake is atomic in case we get in here without the lock */	152	/* Forcewake is atomic in case we get in here without the lock */
147	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)	153	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
148	__gen6_gt_force_wake_get(dev_priv);	154	__gen6_gt_force_wake_get(dev_priv);
149	}	155	}
150		156
151	static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)	157	static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
152	{	158	{
153	I915_WRITE_NOTRACE(FORCEWAKE, 0);	159	I915_WRITE_NOTRACE(FORCEWAKE, 0);
154	POSTING_READ(FORCEWAKE);	160	POSTING_READ(FORCEWAKE);
155	}	161	}
156		162
157	/*	163	/*
158	* see gen6_gt_force_wake_get()	164	* see gen6_gt_force_wake_get()
159	*/	165	*/
160	void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)	166	void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
161	{	167	{
162	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));	168	// WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
163		169
164	if (atomic_dec_and_test(&dev_priv->forcewake_count))	170	if (atomic_dec_and_test(&dev_priv->forcewake_count))
165	__gen6_gt_force_wake_put(dev_priv);	171	__gen6_gt_force_wake_put(dev_priv);
166	}	172	}
167		173
168	void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)	174	void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
169	{	175	{
170	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {	176	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
171	int loop = 500;	177	int loop = 500;
172	u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);	178	u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
173	while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {	179	while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
174	udelay(10);	180	udelay(10);
175	fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);	181	fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
176	}	182	}
177	// WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);	183	// WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
178	dev_priv->gt_fifo_count = fifo;	184	dev_priv->gt_fifo_count = fifo;
179	}	185	}
180	dev_priv->gt_fifo_count--;	186	dev_priv->gt_fifo_count--;
181	}	187	}
182		188
183		189
184		190
185		191
186		192
187	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent);	193	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent);
188		194
189	int i915_init(void)	195	int i915_init(void)
190	{	196	{
191	static pci_dev_t device;	197	static pci_dev_t device;
192	const struct pci_device_id *ent;	198	const struct pci_device_id *ent;
193	int err;	199	int err;
194		200
195	if( init_agp() != 0)	201	if( init_agp() != 0)
196	{	202	{
197	DRM_ERROR("drm/i915 can't work without intel_agp module!\n");	203	DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
198	return 0;	204	return 0;
199	};	205	};
200		206
201	ent = find_pci_device(&device, pciidlist);	207	ent = find_pci_device(&device, pciidlist);
202		208
203	if( unlikely(ent == NULL) )	209	if( unlikely(ent == NULL) )
204	{	210	{
205	dbgprintf("device not found\n");	211	dbgprintf("device not found\n");
206	return 0;	212	return 0;
207	};	213	};
208		214
209	dbgprintf("device %x:%x\n", device.pci_dev.vendor,	215	dbgprintf("device %x:%x\n", device.pci_dev.vendor,
210	device.pci_dev.device);	216	device.pci_dev.device);
211		217
212	err = drm_get_dev(&device.pci_dev, ent);	218	err = drm_get_dev(&device.pci_dev, ent);
213		219
214	return err;	220	return err;
215	}	221	}
216		222
217	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent)	223	int drm_get_dev(struct pci_dev pdev, const struct pci_device_id ent)
218	{	224	{
219	static struct drm_device *dev;	225	static struct drm_device *dev;
220	int ret;	226	int ret;
221		227
222	ENTER();	228	ENTER();
223		229
224	dev = kzalloc(sizeof(*dev), 0);	230	dev = kzalloc(sizeof(*dev), 0);
225	if (!dev)	231	if (!dev)
226	return -ENOMEM;	232	return -ENOMEM;
227		233
228	// ret = pci_enable_device(pdev);	234	// ret = pci_enable_device(pdev);
229	// if (ret)	235	// if (ret)
230	// goto err_g1;	236	// goto err_g1;
231		237
232	// pci_set_master(pdev);	238	// pci_set_master(pdev);
233		239
234	// if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {	240	// if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
235	// printk(KERN_ERR "DRM: Fill_in_dev failed.\n");	241	// printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
236	// goto err_g2;	242	// goto err_g2;
237	// }	243	// }
238		244
239	dev->pdev = pdev;	245	dev->pdev = pdev;
240	dev->pci_device = pdev->device;	246	dev->pci_device = pdev->device;
241	dev->pci_vendor = pdev->vendor;	247	dev->pci_vendor = pdev->vendor;
242		248
243	INIT_LIST_HEAD(&dev->filelist);	249	INIT_LIST_HEAD(&dev->filelist);
244	INIT_LIST_HEAD(&dev->ctxlist);	250	INIT_LIST_HEAD(&dev->ctxlist);
245	INIT_LIST_HEAD(&dev->vmalist);	251	INIT_LIST_HEAD(&dev->vmalist);
246	INIT_LIST_HEAD(&dev->maplist);	252	INIT_LIST_HEAD(&dev->maplist);
247		253
248	spin_lock_init(&dev->count_lock);	254	spin_lock_init(&dev->count_lock);
249	mutex_init(&dev->struct_mutex);	255	mutex_init(&dev->struct_mutex);
250	mutex_init(&dev->ctxlist_mutex);	256	mutex_init(&dev->ctxlist_mutex);
251		257
252	//int i915_driver_load(struct drm_device *dev, unsigned long flags)	258	//int i915_driver_load(struct drm_device *dev, unsigned long flags)
253		259
254	ret = i915_driver_load(dev, ent->driver_data );	260	ret = i915_driver_load(dev, ent->driver_data );
255	// if (ret)	261	// if (ret)
256	// goto err_g4;	262	// goto err_g4;
257		263
258	// if( radeon_modeset )	264	// if( radeon_modeset )
259	// init_display_kms(dev->dev_private, &usermode);	265	// init_display_kms(dev->dev_private, &usermode);
260	// else	266	// else
261	// init_display(dev->dev_private, &usermode);	267	// init_display(dev->dev_private, &usermode);
262		268
263	LEAVE();	269	LEAVE();
264		270
265	return 0;	271	return 0;
266		272
267	err_g4:	273	err_g4:
268	// drm_put_minor(&dev->primary);	274	// drm_put_minor(&dev->primary);
269	//err_g3:	275	//err_g3:
270	// if (drm_core_check_feature(dev, DRIVER_MODESET))	276	// if (drm_core_check_feature(dev, DRIVER_MODESET))
271	// drm_put_minor(&dev->control);	277	// drm_put_minor(&dev->control);
272	//err_g2:	278	//err_g2:
273	// pci_disable_device(pdev);	279	// pci_disable_device(pdev);
274	//err_g1:	280	//err_g1:
275	free(dev);	281	free(dev);
276		282
277	LEAVE();	283	LEAVE();
278		284
279	return ret;	285	return ret;
280	}	286	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_drv.c – Rev 2326 → 2327