WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_dma.c

 		addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
 	I915_WRITE(HWS_PGA, addr);
+}
-/**
- * Sets up the hardware status page for devices that need a physical address
- * in the register.
- */
-static int i915_init_phys_hws(struct drm_device *dev)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	/* Program Hardware Status Page */
-	dev_priv->status_page_dmah =
-		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
-	if (!dev_priv->status_page_dmah) {
-		DRM_ERROR("Can not allocate hardware status page\n");
-		return -ENOMEM;
-	}
-    memset((void __force __iomem *)dev_priv->status_page_dmah->vaddr,
-, PAGE_SIZE);
-	i915_write_hws_pga(dev);
-	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
-	return 0;
-}
 /**
  * Frees the hardware status page, whether it's a physical address or a virtual
  * address set up by the X Server.
  */
 static void i915_free_hws(struct drm_device *dev)
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
 		return;
 	ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
 	ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
-	ring->space = ring->head - (ring->tail + 8);
+	ring->space = ring->head - (ring->tail + I915_RING_FREE_SPACE);
 	if (ring->space < 0)
 		ring->space += ring->size;
 static void i915_emit_breadcrumb(struct drm_device *dev)
+{
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
-	dev_priv->counter++;
+	dev_priv->dri1.counter++;
-	if (dev_priv->counter > 0x7FFFFFFFUL)
+	if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
-		dev_priv->counter = 0;
+		dev_priv->dri1.counter = 0;
 	if (master_priv->sarea_priv)
-		master_priv->sarea_priv->last_enqueue = dev_priv->counter;
+		master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
 	if (BEGIN_LP_RING(4) == 0) {
 		OUT_RING(MI_STORE_DWORD_INDEX);
 		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-		OUT_RING(dev_priv->counter);
+		OUT_RING(dev_priv->dri1.counter);
 		OUT_RING(0);
 		ADVANCE_LP_RING();
 	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
 	OUT_RING(0);
 	ADVANCE_LP_RING();
-	master_priv->sarea_priv->last_enqueue = dev_priv->counter++;
+	master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter++;
 	if (BEGIN_LP_RING(4) == 0) {
 		OUT_RING(MI_STORE_DWORD_INDEX);
 		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-		OUT_RING(dev_priv->counter);
+		OUT_RING(dev_priv->dri1.counter);
 		OUT_RING(0);
 		ADVANCE_LP_RING();
+	}
 	master_priv->sarea_priv->pf_current_page = dev_priv->dri1.current_page;
-	return 0;
-}
 	return 0;
-static int i915_quiescent(struct drm_device *dev)
+}
-	struct intel_ring_buffer *ring = LP_RING(dev->dev_private);
+static int i915_quiescent(struct drm_device *dev)
+{
 	i915_kernel_lost_context(dev);
 	i915_kernel_lost_context(dev);
 	DRM_DEBUG_DRIVER("\n");
-	dev_priv->counter++;
+	dev_priv->dri1.counter++;
-	if (dev_priv->counter > 0x7FFFFFFFUL)
+	if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
-		dev_priv->counter = 1;
+		dev_priv->dri1.counter = 1;
 	if (master_priv->sarea_priv)
-		master_priv->sarea_priv->last_enqueue = dev_priv->counter;
+		master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
 	if (BEGIN_LP_RING(4) == 0) {
 		OUT_RING(MI_STORE_DWORD_INDEX);
 		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-		OUT_RING(dev_priv->counter);
+		OUT_RING(dev_priv->dri1.counter);
 		OUT_RING(MI_USER_INTERRUPT);
 		ADVANCE_LP_RING();
+	}
 	} else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
 		ret = -EBUSY;
 	if (ret == -EBUSY) {
 		DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
-			  READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
+			  READ_BREADCRUMB(dev_priv), (int)dev_priv->dri1.counter);
+	}
 		value = i915_semaphore_is_enabled(dev);
 		break;
 	case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
 		value = 1;
 		break;
+	case I915_PARAM_HAS_SECURE_BATCHES:
+		value = capable(CAP_SYS_ADMIN);
+		break;
+	case I915_PARAM_HAS_PINNED_BATCHES:
+		value = 1;
+		break;
 	default:
 		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
 				 param->param);
 		return -EINVAL;
+	}
 static int i915_set_status_page(struct drm_device *dev, void *data,
 				struct drm_file *file_priv)
+{
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	drm_i915_hws_addr_t *hws = data;
-	struct intel_ring_buffer *ring = LP_RING(dev_priv);
+	struct intel_ring_buffer *ring;
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
 		return -ENODEV;
 		return 0;
+	}
+	DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
 	DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
 	ring = LP_RING(dev_priv);
 	ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
 	int ret = 0, mmio_bar, mmio_size;
 	uint32_t aperture_size;
-	info = (struct intel_device_info *) flags;
-#if 0
-	/* Refuse to load on gen6+ without kms enabled. */
-	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
-		return -ENODEV;
-	/* i915 has 4 more counters */
-	dev->counters += 4;
-	dev->types[6] = _DRM_STAT_IRQ;
-	dev->types[7] = _DRM_STAT_PRIMARY;
-	dev->types[8] = _DRM_STAT_SECONDARY;
-	dev->types[9] = _DRM_STAT_DMA;
+	info = (struct intel_device_info *) flags;
 #endif
     if (i915_get_bridge_dev(dev)) {
         ret = -EIO;
         goto free_priv;
+    }
-	ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
+	ret = i915_gem_gtt_init(dev);
-	if (!ret) {
-		DRM_ERROR("failed to set up gmch\n");
-		ret = -EIO;
+	if (ret)
-		goto put_bridge;
-	}
-	dev_priv->mm.gtt = intel_gtt_get();
-	if (!dev_priv->mm.gtt) {
-		DRM_ERROR("Failed to initialize GTT\n");
-		ret = -ENODEV;
-		goto put_gmch;
 		goto put_bridge;
-	pci_set_master(dev->pdev);
-    /* overlay on gen2 is broken and can't address above 1G */
+	pci_set_master(dev->pdev);
 //    if (IS_GEN2(dev))
-//        dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
+    /* overlay on gen2 is broken and can't address above 1G */
     /* 965GM sometimes incorrectly writes to hardware status page (HWS)
      * using 32bit addressing, overwriting memory if HWS is located
      * above 4GB.
-     *
-     * The documentation also mentions an issue with undefined
      * behaviour if any general state is accessed within a page above 4GB,
-     * which also needs to be handled carefully.
+     * The documentation also mentions an issue with undefined
-     */
+     * behaviour if any general state is accessed within a page above 4GB,
-//    if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
+     * which also needs to be handled carefully.
+    }
 	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
-	dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
-    DRM_INFO("gtt_base_addr %x aperture_size %d\n",
-               dev_priv->mm.gtt_base_addr, aperture_size );
 	dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
 //	i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
 //			aperture_size);
     /* Try to make sure MCHBAR is enabled before poking at it */
 	intel_setup_mchbar(dev);
     intel_setup_gmbus(dev);
     intel_opregion_setup(dev);
     /* Make sure the bios did its job and set up vital registers */
     intel_setup_bios(dev);
-    i915_gem_load(dev);
-    /* Init HWS */
-    if (!I915_NEED_GFX_HWS(dev)) {
-        ret = i915_init_phys_hws(dev);
-        if (ret)
             goto out_gem_unload;
     i915_gem_load(dev);
     /* On the 945G/GM, the chipset reports the MSI capability on the
      * integrated graphics even though the support isn't actually there
     spin_lock_init(&dev_priv->irq_lock);
     spin_lock_init(&dev_priv->error_lock);
 	spin_lock_init(&dev_priv->rps.lock);
 	spin_lock_init(&dev_priv->dpio_lock);
+	mutex_init(&dev_priv->rps.hw_lock);
 	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
 		dev_priv->num_pipe = 3;
 	else if (IS_MOBILE(dev) || !IS_GEN2(dev))
         dev_priv->num_pipe = 2;
         DRM_ERROR("failed to init modeset\n");
             goto out_gem_unload;
+    }
-    /* Must be done after probing outputs */
-//    intel_opregion_init(dev);
-//    acpi_video_register();
-//    setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
-//            (unsigned long) dev);
+    /* Must be done after probing outputs */
 	acpi_video_unregister();
 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 		intel_fbdev_fini(dev);
+		intel_modeset_cleanup(dev);
-		intel_modeset_cleanup(dev);
+		cancel_work_sync(&dev_priv->console_resume_work);
 		/*
 		 * free the memory space allocated for the child device

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_dma.c – Rev 3037 → 3243