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58 | #define NS2501_9_RSVD (1<<1) |
58 | #define NS2501_9_RSVD (1<<1) |
59 | #define NS2501_9_MDI (1<<0) |
59 | #define NS2501_9_MDI (1<<0) |
Line 60... | Line 60... | ||
60 | 60 | ||
Line -... | Line 61... | ||
- | 61 | #define NS2501_REGC 0x0c |
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- | 62 | ||
- | 63 | enum { |
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- | 64 | MODE_640x480, |
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- | 65 | MODE_800x600, |
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- | 66 | MODE_1024x768, |
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- | 67 | }; |
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- | 68 | ||
- | 69 | struct ns2501_reg { |
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- | 70 | uint8_t offset; |
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- | 71 | uint8_t value; |
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- | 72 | }; |
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- | 73 | ||
- | 74 | /* |
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- | 75 | * Magic values based on what the BIOS on |
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- | 76 | * Fujitsu-Siemens Lifebook S6010 programs (1024x768 panel). |
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- | 77 | */ |
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- | 78 | static const struct ns2501_reg regs_1024x768[][86] = { |
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- | 79 | [MODE_640x480] = { |
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- | 80 | [0] = { .offset = 0x0a, .value = 0x81, }, |
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- | 81 | [1] = { .offset = 0x18, .value = 0x07, }, |
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- | 82 | [2] = { .offset = 0x19, .value = 0x00, }, |
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- | 83 | [3] = { .offset = 0x1a, .value = 0x00, }, |
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- | 84 | [4] = { .offset = 0x1b, .value = 0x11, }, |
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- | 85 | [5] = { .offset = 0x1c, .value = 0x54, }, |
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- | 86 | [6] = { .offset = 0x1d, .value = 0x03, }, |
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- | 87 | [7] = { .offset = 0x1e, .value = 0x02, }, |
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- | 88 | [8] = { .offset = 0xf3, .value = 0x90, }, |
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- | 89 | [9] = { .offset = 0xf9, .value = 0x00, }, |
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- | 90 | [10] = { .offset = 0xc1, .value = 0x90, }, |
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- | 91 | [11] = { .offset = 0xc2, .value = 0x00, }, |
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- | 92 | [12] = { .offset = 0xc3, .value = 0x0f, }, |
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- | 93 | [13] = { .offset = 0xc4, .value = 0x03, }, |
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- | 94 | [14] = { .offset = 0xc5, .value = 0x16, }, |
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- | 95 | [15] = { .offset = 0xc6, .value = 0x00, }, |
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- | 96 | [16] = { .offset = 0xc7, .value = 0x02, }, |
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- | 97 | [17] = { .offset = 0xc8, .value = 0x02, }, |
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- | 98 | [18] = { .offset = 0xf4, .value = 0x00, }, |
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- | 99 | [19] = { .offset = 0x80, .value = 0xff, }, |
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- | 100 | [20] = { .offset = 0x81, .value = 0x07, }, |
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- | 101 | [21] = { .offset = 0x82, .value = 0x3d, }, |
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- | 102 | [22] = { .offset = 0x83, .value = 0x05, }, |
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- | 103 | [23] = { .offset = 0x94, .value = 0x00, }, |
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- | 104 | [24] = { .offset = 0x95, .value = 0x00, }, |
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- | 105 | [25] = { .offset = 0x96, .value = 0x05, }, |
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- | 106 | [26] = { .offset = 0x97, .value = 0x00, }, |
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- | 107 | [27] = { .offset = 0x9a, .value = 0x88, }, |
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- | 108 | [28] = { .offset = 0x9b, .value = 0x00, }, |
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- | 109 | [29] = { .offset = 0x98, .value = 0x00, }, |
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- | 110 | [30] = { .offset = 0x99, .value = 0x00, }, |
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- | 111 | [31] = { .offset = 0xf7, .value = 0x88, }, |
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- | 112 | [32] = { .offset = 0xf8, .value = 0x0a, }, |
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- | 113 | [33] = { .offset = 0x9c, .value = 0x24, }, |
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- | 114 | [34] = { .offset = 0x9d, .value = 0x00, }, |
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- | 115 | [35] = { .offset = 0x9e, .value = 0x25, }, |
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- | 116 | [36] = { .offset = 0x9f, .value = 0x03, }, |
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- | 117 | [37] = { .offset = 0xa0, .value = 0x28, }, |
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- | 118 | [38] = { .offset = 0xa1, .value = 0x01, }, |
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- | 119 | [39] = { .offset = 0xa2, .value = 0x28, }, |
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- | 120 | [40] = { .offset = 0xa3, .value = 0x05, }, |
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- | 121 | [41] = { .offset = 0xb6, .value = 0x09, }, |
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- | 122 | [42] = { .offset = 0xb8, .value = 0x00, }, |
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- | 123 | [43] = { .offset = 0xb9, .value = 0xa0, }, |
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- | 124 | [44] = { .offset = 0xba, .value = 0x00, }, |
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- | 125 | [45] = { .offset = 0xbb, .value = 0x20, }, |
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- | 126 | [46] = { .offset = 0x10, .value = 0x00, }, |
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- | 127 | [47] = { .offset = 0x11, .value = 0xa0, }, |
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- | 128 | [48] = { .offset = 0x12, .value = 0x02, }, |
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- | 129 | [49] = { .offset = 0x20, .value = 0x00, }, |
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- | 130 | [50] = { .offset = 0x22, .value = 0x00, }, |
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- | 131 | [51] = { .offset = 0x23, .value = 0x00, }, |
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- | 132 | [52] = { .offset = 0x24, .value = 0x00, }, |
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- | 133 | [53] = { .offset = 0x25, .value = 0x00, }, |
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- | 134 | [54] = { .offset = 0x8c, .value = 0x10, }, |
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- | 135 | [55] = { .offset = 0x8d, .value = 0x02, }, |
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- | 136 | [56] = { .offset = 0x8e, .value = 0x10, }, |
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- | 137 | [57] = { .offset = 0x8f, .value = 0x00, }, |
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- | 138 | [58] = { .offset = 0x90, .value = 0xff, }, |
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- | 139 | [59] = { .offset = 0x91, .value = 0x07, }, |
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- | 140 | [60] = { .offset = 0x92, .value = 0xa0, }, |
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- | 141 | [61] = { .offset = 0x93, .value = 0x02, }, |
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- | 142 | [62] = { .offset = 0xa5, .value = 0x00, }, |
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- | 143 | [63] = { .offset = 0xa6, .value = 0x00, }, |
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- | 144 | [64] = { .offset = 0xa7, .value = 0x00, }, |
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- | 145 | [65] = { .offset = 0xa8, .value = 0x00, }, |
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- | 146 | [66] = { .offset = 0xa9, .value = 0x04, }, |
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- | 147 | [67] = { .offset = 0xaa, .value = 0x70, }, |
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- | 148 | [68] = { .offset = 0xab, .value = 0x4f, }, |
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- | 149 | [69] = { .offset = 0xac, .value = 0x00, }, |
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- | 150 | [70] = { .offset = 0xa4, .value = 0x84, }, |
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- | 151 | [71] = { .offset = 0x7e, .value = 0x18, }, |
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- | 152 | [72] = { .offset = 0x84, .value = 0x00, }, |
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- | 153 | [73] = { .offset = 0x85, .value = 0x00, }, |
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- | 154 | [74] = { .offset = 0x86, .value = 0x00, }, |
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- | 155 | [75] = { .offset = 0x87, .value = 0x00, }, |
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- | 156 | [76] = { .offset = 0x88, .value = 0x00, }, |
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- | 157 | [77] = { .offset = 0x89, .value = 0x00, }, |
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- | 158 | [78] = { .offset = 0x8a, .value = 0x00, }, |
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- | 159 | [79] = { .offset = 0x8b, .value = 0x00, }, |
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- | 160 | [80] = { .offset = 0x26, .value = 0x00, }, |
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- | 161 | [81] = { .offset = 0x27, .value = 0x00, }, |
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- | 162 | [82] = { .offset = 0xad, .value = 0x00, }, |
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- | 163 | [83] = { .offset = 0x08, .value = 0x30, }, /* 0x31 */ |
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- | 164 | [84] = { .offset = 0x41, .value = 0x00, }, |
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- | 165 | [85] = { .offset = 0xc0, .value = 0x05, }, |
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- | 166 | }, |
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- | 167 | [MODE_800x600] = { |
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- | 168 | [0] = { .offset = 0x0a, .value = 0x81, }, |
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- | 169 | [1] = { .offset = 0x18, .value = 0x07, }, |
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- | 170 | [2] = { .offset = 0x19, .value = 0x00, }, |
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- | 171 | [3] = { .offset = 0x1a, .value = 0x00, }, |
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- | 172 | [4] = { .offset = 0x1b, .value = 0x19, }, |
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- | 173 | [5] = { .offset = 0x1c, .value = 0x64, }, |
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- | 174 | [6] = { .offset = 0x1d, .value = 0x02, }, |
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- | 175 | [7] = { .offset = 0x1e, .value = 0x02, }, |
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- | 176 | [8] = { .offset = 0xf3, .value = 0x90, }, |
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- | 177 | [9] = { .offset = 0xf9, .value = 0x00, }, |
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- | 178 | [10] = { .offset = 0xc1, .value = 0xd7, }, |
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- | 179 | [11] = { .offset = 0xc2, .value = 0x00, }, |
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- | 180 | [12] = { .offset = 0xc3, .value = 0xf8, }, |
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- | 181 | [13] = { .offset = 0xc4, .value = 0x03, }, |
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- | 182 | [14] = { .offset = 0xc5, .value = 0x1a, }, |
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- | 183 | [15] = { .offset = 0xc6, .value = 0x00, }, |
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- | 184 | [16] = { .offset = 0xc7, .value = 0x73, }, |
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- | 185 | [17] = { .offset = 0xc8, .value = 0x02, }, |
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- | 186 | [18] = { .offset = 0xf4, .value = 0x00, }, |
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- | 187 | [19] = { .offset = 0x80, .value = 0x27, }, |
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- | 188 | [20] = { .offset = 0x81, .value = 0x03, }, |
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- | 189 | [21] = { .offset = 0x82, .value = 0x41, }, |
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- | 190 | [22] = { .offset = 0x83, .value = 0x05, }, |
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- | 191 | [23] = { .offset = 0x94, .value = 0x00, }, |
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- | 192 | [24] = { .offset = 0x95, .value = 0x00, }, |
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- | 193 | [25] = { .offset = 0x96, .value = 0x05, }, |
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- | 194 | [26] = { .offset = 0x97, .value = 0x00, }, |
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- | 195 | [27] = { .offset = 0x9a, .value = 0x88, }, |
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- | 196 | [28] = { .offset = 0x9b, .value = 0x00, }, |
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- | 197 | [29] = { .offset = 0x98, .value = 0x00, }, |
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- | 198 | [30] = { .offset = 0x99, .value = 0x00, }, |
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- | 199 | [31] = { .offset = 0xf7, .value = 0x88, }, |
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- | 200 | [32] = { .offset = 0xf8, .value = 0x06, }, |
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- | 201 | [33] = { .offset = 0x9c, .value = 0x23, }, |
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- | 202 | [34] = { .offset = 0x9d, .value = 0x00, }, |
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- | 203 | [35] = { .offset = 0x9e, .value = 0x25, }, |
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- | 204 | [36] = { .offset = 0x9f, .value = 0x03, }, |
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- | 205 | [37] = { .offset = 0xa0, .value = 0x28, }, |
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- | 206 | [38] = { .offset = 0xa1, .value = 0x01, }, |
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- | 207 | [39] = { .offset = 0xa2, .value = 0x28, }, |
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- | 208 | [40] = { .offset = 0xa3, .value = 0x05, }, |
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- | 209 | [41] = { .offset = 0xb6, .value = 0x09, }, |
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- | 210 | [42] = { .offset = 0xb8, .value = 0x30, }, |
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- | 211 | [43] = { .offset = 0xb9, .value = 0xc8, }, |
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- | 212 | [44] = { .offset = 0xba, .value = 0x00, }, |
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- | 213 | [45] = { .offset = 0xbb, .value = 0x20, }, |
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- | 214 | [46] = { .offset = 0x10, .value = 0x20, }, |
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- | 215 | [47] = { .offset = 0x11, .value = 0xc8, }, |
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- | 216 | [48] = { .offset = 0x12, .value = 0x02, }, |
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- | 217 | [49] = { .offset = 0x20, .value = 0x00, }, |
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- | 218 | [50] = { .offset = 0x22, .value = 0x00, }, |
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- | 219 | [51] = { .offset = 0x23, .value = 0x00, }, |
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- | 220 | [52] = { .offset = 0x24, .value = 0x00, }, |
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- | 221 | [53] = { .offset = 0x25, .value = 0x00, }, |
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- | 222 | [54] = { .offset = 0x8c, .value = 0x10, }, |
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- | 223 | [55] = { .offset = 0x8d, .value = 0x02, }, |
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- | 224 | [56] = { .offset = 0x8e, .value = 0x04, }, |
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- | 225 | [57] = { .offset = 0x8f, .value = 0x00, }, |
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- | 226 | [58] = { .offset = 0x90, .value = 0xff, }, |
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- | 227 | [59] = { .offset = 0x91, .value = 0x07, }, |
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- | 228 | [60] = { .offset = 0x92, .value = 0xa0, }, |
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- | 229 | [61] = { .offset = 0x93, .value = 0x02, }, |
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- | 230 | [62] = { .offset = 0xa5, .value = 0x00, }, |
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- | 231 | [63] = { .offset = 0xa6, .value = 0x00, }, |
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- | 232 | [64] = { .offset = 0xa7, .value = 0x00, }, |
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- | 233 | [65] = { .offset = 0xa8, .value = 0x00, }, |
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- | 234 | [66] = { .offset = 0xa9, .value = 0x83, }, |
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- | 235 | [67] = { .offset = 0xaa, .value = 0x40, }, |
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- | 236 | [68] = { .offset = 0xab, .value = 0x32, }, |
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- | 237 | [69] = { .offset = 0xac, .value = 0x00, }, |
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- | 238 | [70] = { .offset = 0xa4, .value = 0x80, }, |
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- | 239 | [71] = { .offset = 0x7e, .value = 0x18, }, |
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- | 240 | [72] = { .offset = 0x84, .value = 0x00, }, |
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- | 241 | [73] = { .offset = 0x85, .value = 0x00, }, |
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- | 242 | [74] = { .offset = 0x86, .value = 0x00, }, |
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- | 243 | [75] = { .offset = 0x87, .value = 0x00, }, |
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- | 244 | [76] = { .offset = 0x88, .value = 0x00, }, |
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- | 245 | [77] = { .offset = 0x89, .value = 0x00, }, |
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- | 246 | [78] = { .offset = 0x8a, .value = 0x00, }, |
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- | 247 | [79] = { .offset = 0x8b, .value = 0x00, }, |
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- | 248 | [80] = { .offset = 0x26, .value = 0x00, }, |
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- | 249 | [81] = { .offset = 0x27, .value = 0x00, }, |
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- | 250 | [82] = { .offset = 0xad, .value = 0x00, }, |
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- | 251 | [83] = { .offset = 0x08, .value = 0x30, }, /* 0x31 */ |
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- | 252 | [84] = { .offset = 0x41, .value = 0x00, }, |
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- | 253 | [85] = { .offset = 0xc0, .value = 0x07, }, |
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- | 254 | }, |
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- | 255 | [MODE_1024x768] = { |
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- | 256 | [0] = { .offset = 0x0a, .value = 0x81, }, |
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- | 257 | [1] = { .offset = 0x18, .value = 0x07, }, |
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- | 258 | [2] = { .offset = 0x19, .value = 0x00, }, |
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- | 259 | [3] = { .offset = 0x1a, .value = 0x00, }, |
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- | 260 | [4] = { .offset = 0x1b, .value = 0x11, }, |
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- | 261 | [5] = { .offset = 0x1c, .value = 0x54, }, |
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- | 262 | [6] = { .offset = 0x1d, .value = 0x03, }, |
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- | 263 | [7] = { .offset = 0x1e, .value = 0x02, }, |
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- | 264 | [8] = { .offset = 0xf3, .value = 0x90, }, |
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- | 265 | [9] = { .offset = 0xf9, .value = 0x00, }, |
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- | 266 | [10] = { .offset = 0xc1, .value = 0x90, }, |
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- | 267 | [11] = { .offset = 0xc2, .value = 0x00, }, |
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- | 268 | [12] = { .offset = 0xc3, .value = 0x0f, }, |
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- | 269 | [13] = { .offset = 0xc4, .value = 0x03, }, |
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- | 270 | [14] = { .offset = 0xc5, .value = 0x16, }, |
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- | 271 | [15] = { .offset = 0xc6, .value = 0x00, }, |
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- | 272 | [16] = { .offset = 0xc7, .value = 0x02, }, |
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- | 273 | [17] = { .offset = 0xc8, .value = 0x02, }, |
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- | 274 | [18] = { .offset = 0xf4, .value = 0x00, }, |
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- | 275 | [19] = { .offset = 0x80, .value = 0xff, }, |
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- | 276 | [20] = { .offset = 0x81, .value = 0x07, }, |
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- | 277 | [21] = { .offset = 0x82, .value = 0x3d, }, |
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- | 278 | [22] = { .offset = 0x83, .value = 0x05, }, |
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- | 279 | [23] = { .offset = 0x94, .value = 0x00, }, |
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- | 280 | [24] = { .offset = 0x95, .value = 0x00, }, |
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- | 281 | [25] = { .offset = 0x96, .value = 0x05, }, |
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- | 282 | [26] = { .offset = 0x97, .value = 0x00, }, |
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- | 283 | [27] = { .offset = 0x9a, .value = 0x88, }, |
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- | 284 | [28] = { .offset = 0x9b, .value = 0x00, }, |
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- | 285 | [29] = { .offset = 0x98, .value = 0x00, }, |
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- | 286 | [30] = { .offset = 0x99, .value = 0x00, }, |
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- | 287 | [31] = { .offset = 0xf7, .value = 0x88, }, |
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- | 288 | [32] = { .offset = 0xf8, .value = 0x0a, }, |
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- | 289 | [33] = { .offset = 0x9c, .value = 0x24, }, |
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- | 290 | [34] = { .offset = 0x9d, .value = 0x00, }, |
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- | 291 | [35] = { .offset = 0x9e, .value = 0x25, }, |
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- | 292 | [36] = { .offset = 0x9f, .value = 0x03, }, |
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- | 293 | [37] = { .offset = 0xa0, .value = 0x28, }, |
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- | 294 | [38] = { .offset = 0xa1, .value = 0x01, }, |
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- | 295 | [39] = { .offset = 0xa2, .value = 0x28, }, |
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- | 296 | [40] = { .offset = 0xa3, .value = 0x05, }, |
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- | 297 | [41] = { .offset = 0xb6, .value = 0x09, }, |
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- | 298 | [42] = { .offset = 0xb8, .value = 0x00, }, |
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- | 299 | [43] = { .offset = 0xb9, .value = 0xa0, }, |
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- | 300 | [44] = { .offset = 0xba, .value = 0x00, }, |
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- | 301 | [45] = { .offset = 0xbb, .value = 0x20, }, |
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- | 302 | [46] = { .offset = 0x10, .value = 0x00, }, |
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- | 303 | [47] = { .offset = 0x11, .value = 0xa0, }, |
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- | 304 | [48] = { .offset = 0x12, .value = 0x02, }, |
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- | 305 | [49] = { .offset = 0x20, .value = 0x00, }, |
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- | 306 | [50] = { .offset = 0x22, .value = 0x00, }, |
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- | 307 | [51] = { .offset = 0x23, .value = 0x00, }, |
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- | 308 | [52] = { .offset = 0x24, .value = 0x00, }, |
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- | 309 | [53] = { .offset = 0x25, .value = 0x00, }, |
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- | 310 | [54] = { .offset = 0x8c, .value = 0x10, }, |
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- | 311 | [55] = { .offset = 0x8d, .value = 0x02, }, |
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- | 312 | [56] = { .offset = 0x8e, .value = 0x10, }, |
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- | 313 | [57] = { .offset = 0x8f, .value = 0x00, }, |
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- | 314 | [58] = { .offset = 0x90, .value = 0xff, }, |
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- | 315 | [59] = { .offset = 0x91, .value = 0x07, }, |
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- | 316 | [60] = { .offset = 0x92, .value = 0xa0, }, |
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- | 317 | [61] = { .offset = 0x93, .value = 0x02, }, |
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- | 318 | [62] = { .offset = 0xa5, .value = 0x00, }, |
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- | 319 | [63] = { .offset = 0xa6, .value = 0x00, }, |
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- | 320 | [64] = { .offset = 0xa7, .value = 0x00, }, |
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- | 321 | [65] = { .offset = 0xa8, .value = 0x00, }, |
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- | 322 | [66] = { .offset = 0xa9, .value = 0x04, }, |
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- | 323 | [67] = { .offset = 0xaa, .value = 0x70, }, |
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- | 324 | [68] = { .offset = 0xab, .value = 0x4f, }, |
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- | 325 | [69] = { .offset = 0xac, .value = 0x00, }, |
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- | 326 | [70] = { .offset = 0xa4, .value = 0x84, }, |
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- | 327 | [71] = { .offset = 0x7e, .value = 0x18, }, |
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- | 328 | [72] = { .offset = 0x84, .value = 0x00, }, |
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- | 329 | [73] = { .offset = 0x85, .value = 0x00, }, |
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- | 330 | [74] = { .offset = 0x86, .value = 0x00, }, |
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- | 331 | [75] = { .offset = 0x87, .value = 0x00, }, |
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- | 332 | [76] = { .offset = 0x88, .value = 0x00, }, |
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- | 333 | [77] = { .offset = 0x89, .value = 0x00, }, |
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- | 334 | [78] = { .offset = 0x8a, .value = 0x00, }, |
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- | 335 | [79] = { .offset = 0x8b, .value = 0x00, }, |
|
- | 336 | [80] = { .offset = 0x26, .value = 0x00, }, |
|
- | 337 | [81] = { .offset = 0x27, .value = 0x00, }, |
|
- | 338 | [82] = { .offset = 0xad, .value = 0x00, }, |
|
- | 339 | [83] = { .offset = 0x08, .value = 0x34, }, /* 0x35 */ |
|
- | 340 | [84] = { .offset = 0x41, .value = 0x00, }, |
|
- | 341 | [85] = { .offset = 0xc0, .value = 0x01, }, |
|
- | 342 | }, |
|
- | 343 | }; |
|
- | 344 | ||
- | 345 | static const struct ns2501_reg regs_init[] = { |
|
- | 346 | [0] = { .offset = 0x35, .value = 0xff, }, |
|
- | 347 | [1] = { .offset = 0x34, .value = 0x00, }, |
|
- | 348 | [2] = { .offset = 0x08, .value = 0x30, }, |
|
61 | #define NS2501_REGC 0x0c |
349 | }; |
62 | - | ||
63 | struct ns2501_priv { |
350 | |
64 | //I2CDevRec d; |
- | |
65 | bool quiet; |
- | |
66 | int reg_8_shadow; |
351 | struct ns2501_priv { |
67 | int reg_8_set; |
- | |
68 | // Shadow registers for i915 |
- | |
69 | int dvoc; |
- | |
70 | int pll_a; |
- | |
71 | int srcdim; |
352 | bool quiet; |
Line 72... | Line 353... | ||
72 | int fw_blc; |
353 | const struct ns2501_reg *regs; |
Line 73... | Line 354... | ||
73 | }; |
354 | }; |
Line 203... | Line 484... | ||
203 | DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", |
484 | DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", |
204 | ch, adapter->name, dvo->slave_addr); |
485 | ch, adapter->name, dvo->slave_addr); |
205 | goto out; |
486 | goto out; |
206 | } |
487 | } |
207 | ns->quiet = false; |
488 | ns->quiet = false; |
208 | ns->reg_8_set = 0; |
- | |
209 | ns->reg_8_shadow = |
- | |
210 | NS2501_8_PD | NS2501_8_BPAS | NS2501_8_VEN | NS2501_8_HEN; |
- | |
Line 211... | Line 489... | ||
211 | 489 | ||
- | 490 | DRM_DEBUG_KMS("init ns2501 dvo controller successfully!\n"); |
|
212 | DRM_DEBUG_KMS("init ns2501 dvo controller successfully!\n"); |
491 | |
Line 213... | Line 492... | ||
213 | return true; |
492 | return true; |
214 | 493 | ||
215 | out: |
494 | out: |
Line 240... | Line 519... | ||
240 | * Currently, these are all the modes I have data from. |
519 | * Currently, these are all the modes I have data from. |
241 | * More might exist. Unclear how to find the native resolution |
520 | * More might exist. Unclear how to find the native resolution |
242 | * of the panel in here so we could always accept it |
521 | * of the panel in here so we could always accept it |
243 | * by disabling the scaler. |
522 | * by disabling the scaler. |
244 | */ |
523 | */ |
245 | if ((mode->hdisplay == 800 && mode->vdisplay == 600) || |
524 | if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) || |
246 | (mode->hdisplay == 640 && mode->vdisplay == 480) || |
525 | (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) || |
247 | (mode->hdisplay == 1024 && mode->vdisplay == 768)) { |
526 | (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) { |
248 | return MODE_OK; |
527 | return MODE_OK; |
249 | } else { |
528 | } else { |
250 | return MODE_ONE_SIZE; /* Is this a reasonable error? */ |
529 | return MODE_ONE_SIZE; /* Is this a reasonable error? */ |
251 | } |
530 | } |
252 | } |
531 | } |
Line 253... | Line 532... | ||
253 | 532 | ||
254 | static void ns2501_mode_set(struct intel_dvo_device *dvo, |
533 | static void ns2501_mode_set(struct intel_dvo_device *dvo, |
255 | struct drm_display_mode *mode, |
534 | struct drm_display_mode *mode, |
256 | struct drm_display_mode *adjusted_mode) |
535 | struct drm_display_mode *adjusted_mode) |
257 | { |
- | |
258 | bool ok; |
- | |
259 | int retries = 10; |
536 | { |
- | 537 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
|
Line 260... | Line 538... | ||
260 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
538 | int mode_idx, i; |
261 | 539 | ||
262 | DRM_DEBUG_KMS |
540 | DRM_DEBUG_KMS |
Line 263... | Line -... | ||
263 | ("set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n", |
- | |
264 | mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); |
- | |
265 | - | ||
266 | /* |
- | |
267 | * Where do I find the native resolution for which scaling is not required??? |
- | |
268 | * |
- | |
269 | * First trigger the DVO on as otherwise the chip does not appear on the i2c |
- | |
270 | * bus. |
- | |
271 | */ |
- | |
272 | do { |
541 | ("set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n", |
273 | ok = true; |
- | |
274 | 542 | mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); |
|
275 | if (mode->hdisplay == 800 && mode->vdisplay == 600) { |
- | |
276 | /* mode 277 */ |
- | |
277 | ns->reg_8_shadow &= ~NS2501_8_BPAS; |
- | |
278 | DRM_DEBUG_KMS("switching to 800x600\n"); |
- | |
279 | - | ||
280 | /* |
- | |
281 | * No, I do not know where this data comes from. |
543 | |
282 | * It is just what the video bios left in the DVO, so |
- | |
283 | * I'm just copying it here over. |
- | |
284 | * This also means that I cannot support any other modes |
- | |
285 | * except the ones supported by the bios. |
- | |
286 | */ |
- | |
287 | ok &= ns2501_writeb(dvo, 0x11, 0xc8); // 0xc7 also works. |
- | |
288 | ok &= ns2501_writeb(dvo, 0x1b, 0x19); |
- | |
289 | ok &= ns2501_writeb(dvo, 0x1c, 0x62); // VBIOS left 0x64 here, but 0x62 works nicer |
- | |
290 | ok &= ns2501_writeb(dvo, 0x1d, 0x02); |
- | |
291 | - | ||
292 | ok &= ns2501_writeb(dvo, 0x34, 0x03); |
- | |
293 | ok &= ns2501_writeb(dvo, 0x35, 0xff); |
- | |
294 | - | ||
295 | ok &= ns2501_writeb(dvo, 0x80, 0x27); |
- | |
296 | ok &= ns2501_writeb(dvo, 0x81, 0x03); |
- | |
297 | ok &= ns2501_writeb(dvo, 0x82, 0x41); |
- | |
298 | ok &= ns2501_writeb(dvo, 0x83, 0x05); |
- | |
299 | - | ||
300 | ok &= ns2501_writeb(dvo, 0x8d, 0x02); |
- | |
301 | ok &= ns2501_writeb(dvo, 0x8e, 0x04); |
- | |
302 | ok &= ns2501_writeb(dvo, 0x8f, 0x00); |
- | |
303 | - | ||
304 | ok &= ns2501_writeb(dvo, 0x90, 0xfe); /* vertical. VBIOS left 0xff here, but 0xfe works better */ |
- | |
305 | ok &= ns2501_writeb(dvo, 0x91, 0x07); |
- | |
306 | ok &= ns2501_writeb(dvo, 0x94, 0x00); |
- | |
307 | ok &= ns2501_writeb(dvo, 0x95, 0x00); |
- | |
308 | - | ||
309 | ok &= ns2501_writeb(dvo, 0x96, 0x00); |
- | |
310 | - | ||
311 | ok &= ns2501_writeb(dvo, 0x99, 0x00); |
- | |
312 | ok &= ns2501_writeb(dvo, 0x9a, 0x88); |
- | |
313 | - | ||
314 | ok &= ns2501_writeb(dvo, 0x9c, 0x23); /* Looks like first and last line of the image. */ |
- | |
315 | ok &= ns2501_writeb(dvo, 0x9d, 0x00); |
- | |
316 | ok &= ns2501_writeb(dvo, 0x9e, 0x25); |
- | |
317 | ok &= ns2501_writeb(dvo, 0x9f, 0x03); |
- | |
318 | - | ||
319 | ok &= ns2501_writeb(dvo, 0xa4, 0x80); |
- | |
320 | - | ||
321 | ok &= ns2501_writeb(dvo, 0xb6, 0x00); |
- | |
322 | - | ||
323 | ok &= ns2501_writeb(dvo, 0xb9, 0xc8); /* horizontal? */ |
- | |
324 | ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ |
- | |
325 | - | ||
326 | ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ |
- | |
327 | ok &= ns2501_writeb(dvo, 0xc1, 0xd7); |
- | |
328 | - | ||
329 | ok &= ns2501_writeb(dvo, 0xc2, 0x00); |
- | |
330 | ok &= ns2501_writeb(dvo, 0xc3, 0xf8); |
- | |
331 | - | ||
332 | ok &= ns2501_writeb(dvo, 0xc4, 0x03); |
544 | if (mode->hdisplay == 640 && mode->vdisplay == 480) |
333 | ok &= ns2501_writeb(dvo, 0xc5, 0x1a); |
- | |
334 | - | ||
335 | ok &= ns2501_writeb(dvo, 0xc6, 0x00); |
- | |
336 | ok &= ns2501_writeb(dvo, 0xc7, 0x73); |
545 | mode_idx = MODE_640x480; |
337 | ok &= ns2501_writeb(dvo, 0xc8, 0x02); |
546 | else if (mode->hdisplay == 800 && mode->vdisplay == 600) |
338 | - | ||
339 | } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { |
547 | mode_idx = MODE_800x600; |
340 | /* mode 274 */ |
- | |
341 | DRM_DEBUG_KMS("switching to 640x480\n"); |
- | |
342 | /* |
- | |
343 | * No, I do not know where this data comes from. |
- | |
344 | * It is just what the video bios left in the DVO, so |
- | |
345 | * I'm just copying it here over. |
548 | else if (mode->hdisplay == 1024 && mode->vdisplay == 768) |
346 | * This also means that I cannot support any other modes |
- | |
347 | * except the ones supported by the bios. |
- | |
348 | */ |
- | |
349 | ns->reg_8_shadow &= ~NS2501_8_BPAS; |
- | |
350 | - | ||
351 | ok &= ns2501_writeb(dvo, 0x11, 0xa0); |
- | |
352 | ok &= ns2501_writeb(dvo, 0x1b, 0x11); |
- | |
353 | ok &= ns2501_writeb(dvo, 0x1c, 0x54); |
- | |
354 | ok &= ns2501_writeb(dvo, 0x1d, 0x03); |
- | |
355 | - | ||
356 | ok &= ns2501_writeb(dvo, 0x34, 0x03); |
- | |
357 | ok &= ns2501_writeb(dvo, 0x35, 0xff); |
- | |
358 | - | ||
359 | ok &= ns2501_writeb(dvo, 0x80, 0xff); |
- | |
360 | ok &= ns2501_writeb(dvo, 0x81, 0x07); |
- | |
361 | ok &= ns2501_writeb(dvo, 0x82, 0x3d); |
- | |
362 | ok &= ns2501_writeb(dvo, 0x83, 0x05); |
- | |
363 | - | ||
364 | ok &= ns2501_writeb(dvo, 0x8d, 0x02); |
- | |
365 | ok &= ns2501_writeb(dvo, 0x8e, 0x10); |
- | |
366 | ok &= ns2501_writeb(dvo, 0x8f, 0x00); |
- | |
367 | - | ||
368 | ok &= ns2501_writeb(dvo, 0x90, 0xff); /* vertical */ |
- | |
369 | ok &= ns2501_writeb(dvo, 0x91, 0x07); |
- | |
370 | ok &= ns2501_writeb(dvo, 0x94, 0x00); |
- | |
371 | ok &= ns2501_writeb(dvo, 0x95, 0x00); |
- | |
372 | - | ||
373 | ok &= ns2501_writeb(dvo, 0x96, 0x05); |
- | |
374 | - | ||
375 | ok &= ns2501_writeb(dvo, 0x99, 0x00); |
- | |
376 | ok &= ns2501_writeb(dvo, 0x9a, 0x88); |
- | |
377 | - | ||
378 | ok &= ns2501_writeb(dvo, 0x9c, 0x24); |
- | |
379 | ok &= ns2501_writeb(dvo, 0x9d, 0x00); |
- | |
380 | ok &= ns2501_writeb(dvo, 0x9e, 0x25); |
- | |
381 | ok &= ns2501_writeb(dvo, 0x9f, 0x03); |
- | |
382 | - | ||
383 | ok &= ns2501_writeb(dvo, 0xa4, 0x84); |
- | |
384 | - | ||
385 | ok &= ns2501_writeb(dvo, 0xb6, 0x09); |
- | |
386 | - | ||
387 | ok &= ns2501_writeb(dvo, 0xb9, 0xa0); /* horizontal? */ |
- | |
388 | ok &= ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ |
- | |
389 | - | ||
390 | ok &= ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ |
- | |
391 | ok &= ns2501_writeb(dvo, 0xc1, 0x90); |
- | |
Line -... | Line 549... | ||
- | 549 | mode_idx = MODE_1024x768; |
|
392 | 550 | else |
|
393 | ok &= ns2501_writeb(dvo, 0xc2, 0x00); |
551 | return; |
Line 394... | Line -... | ||
394 | ok &= ns2501_writeb(dvo, 0xc3, 0x0f); |
- | |
395 | - | ||
396 | ok &= ns2501_writeb(dvo, 0xc4, 0x03); |
552 | |
Line 397... | Line -... | ||
397 | ok &= ns2501_writeb(dvo, 0xc5, 0x16); |
- | |
398 | - | ||
399 | ok &= ns2501_writeb(dvo, 0xc6, 0x00); |
- | |
400 | ok &= ns2501_writeb(dvo, 0xc7, 0x02); |
- | |
401 | ok &= ns2501_writeb(dvo, 0xc8, 0x02); |
- | |
402 | - | ||
403 | } else if (mode->hdisplay == 1024 && mode->vdisplay == 768) { |
- | |
404 | /* mode 280 */ |
- | |
405 | DRM_DEBUG_KMS("switching to 1024x768\n"); |
- | |
406 | /* |
- | |
407 | * This might or might not work, actually. I'm silently |
- | |
408 | * assuming here that the native panel resolution is |
- | |
409 | * 1024x768. If not, then this leaves the scaler disabled |
- | |
410 | * generating a picture that is likely not the expected. |
- | |
411 | * |
- | |
412 | * Problem is that I do not know where to take the panel |
- | |
413 | * dimensions from. |
- | |
414 | * |
- | |
415 | * Enable the bypass, scaling not required. |
- | |
416 | * |
- | |
417 | * The scaler registers are irrelevant here.... |
- | |
418 | * |
553 | /* Hopefully doing it every time won't hurt... */ |
419 | */ |
- | |
420 | ns->reg_8_shadow |= NS2501_8_BPAS; |
- | |
421 | ok &= ns2501_writeb(dvo, 0x37, 0x44); |
- | |
422 | } else { |
- | |
423 | /* |
- | |
424 | * Data not known. Bummer! |
554 | for (i = 0; i < ARRAY_SIZE(regs_init); i++) |
425 | * Hopefully, the code should not go here |
- | |
426 | * as mode_OK delivered no other modes. |
555 | ns2501_writeb(dvo, regs_init[i].offset, regs_init[i].value); |
Line 427... | Line 556... | ||
427 | */ |
556 | |
428 | ns->reg_8_shadow |= NS2501_8_BPAS; |
557 | ns->regs = regs_1024x768[mode_idx]; |
429 | } |
558 | |
430 | ok &= ns2501_writeb(dvo, NS2501_REG8, ns->reg_8_shadow); |
559 | for (i = 0; i < 84; i++) |
Line 431... | Line 560... | ||
431 | } while (!ok && retries--); |
560 | ns2501_writeb(dvo, ns->regs[i].offset, ns->regs[i].value); |
432 | } |
561 | } |
Line 433... | Line 562... | ||
433 | 562 | ||
434 | /* set the NS2501 power state */ |
- | |
435 | static bool ns2501_get_hw_state(struct intel_dvo_device *dvo) |
- | |
436 | { |
- | |
437 | unsigned char ch; |
563 | /* set the NS2501 power state */ |
Line 438... | Line 564... | ||
438 | 564 | static bool ns2501_get_hw_state(struct intel_dvo_device *dvo) |
|
439 | if (!ns2501_readb(dvo, NS2501_REG8, &ch)) |
565 | { |
440 | return false; |
566 | unsigned char ch; |
441 | - | ||
442 | if (ch & NS2501_8_PD) |
- | |
443 | return true; |
567 | |
444 | else |
- | |
Line 445... | Line 568... | ||
445 | return false; |
568 | if (!ns2501_readb(dvo, NS2501_REG8, &ch)) |
Line -... | Line 569... | ||
- | 569 | return false; |
|
- | 570 | ||
- | 571 | return ch & NS2501_8_PD; |
|
446 | } |
572 | } |
- | 573 | ||
Line 447... | Line -... | ||
447 | - | ||
448 | /* set the NS2501 power state */ |
- | |
449 | static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable) |
- | |
450 | { |
574 | /* set the NS2501 power state */ |
Line 451... | Line 575... | ||
451 | bool ok; |
575 | static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable) |
452 | int retries = 10; |
- | |
453 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
- | |
454 | unsigned char ch; |
576 | { |
455 | - | ||
456 | DRM_DEBUG_KMS("Trying set the dpms of the DVO to %i\n", enable); |
- | |
457 | 577 | struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); |
|
458 | ch = ns->reg_8_shadow; |
578 | |
- | 579 | DRM_DEBUG_KMS("Trying set the dpms of the DVO to %i\n", enable); |
|
459 | 580 | ||
460 | if (enable) |
581 | if (enable) { |
461 | ch |= NS2501_8_PD; |
- | |
462 | else |
582 | if (WARN_ON(ns->regs[83].offset != 0x08 || |
463 | ch &= ~NS2501_8_PD; |
583 | ns->regs[84].offset != 0x41 || |
464 | - | ||
465 | if (ns->reg_8_set == 0 || ns->reg_8_shadow != ch) { |
- | |
466 | ns->reg_8_set = 1; |
584 | ns->regs[85].offset != 0xc0)) |
- | 585 | return; |
|
Line 467... | Line 586... | ||
467 | ns->reg_8_shadow = ch; |
586 | |
468 | 587 | ns2501_writeb(dvo, 0xc0, ns->regs[85].value | 0x08); |
|
- | 588 | ||
469 | do { |
589 | ns2501_writeb(dvo, 0x41, ns->regs[84].value); |
470 | ok = true; |
590 | |
471 | ok &= ns2501_writeb(dvo, NS2501_REG8, ch); |
- | |
472 | ok &= |
- | |
473 | ns2501_writeb(dvo, 0x34, |
- | |
474 | enable ? 0x03 : 0x00); |
- | |
475 | ok &= |
591 | ns2501_writeb(dvo, 0x34, 0x01); |
476 | ns2501_writeb(dvo, 0x35, |
- | |
477 | enable ? 0xff : 0x00); |
592 | msleep(15); |
478 | } while (!ok && retries--); |
- | |
- | 593 | ||
479 | } |
594 | ns2501_writeb(dvo, 0x08, 0x35); |
480 | } |
- | |
- | 595 | if (!(ns->regs[83].value & NS2501_8_BPAS)) |
|
481 | 596 | ns2501_writeb(dvo, 0x08, 0x31); |
|
Line 482... | Line 597... | ||
482 | static void ns2501_dump_regs(struct intel_dvo_device *dvo) |
597 | msleep(200); |
483 | { |
598 | |
484 | uint8_t val; |
599 | ns2501_writeb(dvo, 0x34, 0x03); |
Line 510... | Line 625... | ||
510 | .detect = ns2501_detect, |
625 | .detect = ns2501_detect, |
511 | .mode_valid = ns2501_mode_valid, |
626 | .mode_valid = ns2501_mode_valid, |
512 | .mode_set = ns2501_mode_set, |
627 | .mode_set = ns2501_mode_set, |
513 | .dpms = ns2501_dpms, |
628 | .dpms = ns2501_dpms, |
514 | .get_hw_state = ns2501_get_hw_state, |
629 | .get_hw_state = ns2501_get_hw_state, |
515 | .dump_regs = ns2501_dump_regs, |
- | |
516 | .destroy = ns2501_destroy, |
630 | .destroy = ns2501_destroy, |
517 | };0) |
631 | };>>0) |