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Rev 2342 | Rev 3031 | ||
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Line 287... | Line 287... | ||
287 | 287 | ||
288 | ch7xxx_writeb(dvo, CH7xxx_IDF, idf); |
288 | ch7xxx_writeb(dvo, CH7xxx_IDF, idf); |
Line 289... | Line 289... | ||
289 | } |
289 | } |
290 | 290 | ||
291 | /* set the CH7xxx power state */ |
291 | /* set the CH7xxx power state */ |
292 | static void ch7xxx_dpms(struct intel_dvo_device *dvo, int mode) |
292 | static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable) |
293 | { |
293 | { |
294 | if (mode == DRM_MODE_DPMS_ON) |
294 | if (enable) |
295 | ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP); |
295 | ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP); |
296 | else |
296 | else |
Line -... | Line 297... | ||
- | 297 | ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD); |
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- | 298 | } |
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- | 299 | ||
- | 300 | static bool ch7xxx_get_hw_state(struct intel_dvo_device *dvo) |
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- | 301 | { |
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- | 302 | u8 val; |
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- | 303 | ||
- | 304 | ch7xxx_readb(dvo, CH7xxx_PM, &val); |
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- | 305 | ||
- | 306 | if (val & (CH7xxx_PM_DVIL | CH7xxx_PM_DVIP)) |
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- | 307 | return true; |
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- | 308 | else |
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297 | ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD); |
309 | return false; |
298 | } |
310 | } |
299 | 311 | ||
Line 300... | Line 312... | ||
300 | static void ch7xxx_dump_regs(struct intel_dvo_device *dvo) |
312 | static void ch7xxx_dump_regs(struct intel_dvo_device *dvo) |
Line 324... | Line 336... | ||
324 | .init = ch7xxx_init, |
336 | .init = ch7xxx_init, |
325 | .detect = ch7xxx_detect, |
337 | .detect = ch7xxx_detect, |
326 | .mode_valid = ch7xxx_mode_valid, |
338 | .mode_valid = ch7xxx_mode_valid, |
327 | .mode_set = ch7xxx_mode_set, |
339 | .mode_set = ch7xxx_mode_set, |
328 | .dpms = ch7xxx_dpms, |
340 | .dpms = ch7xxx_dpms, |
- | 341 | .get_hw_state = ch7xxx_get_hw_state, |
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329 | .dump_regs = ch7xxx_dump_regs, |
342 | .dump_regs = ch7xxx_dump_regs, |
330 | .destroy = ch7xxx_destroy, |
343 | .destroy = ch7xxx_destroy, |
331 | };>=>>5) |
344 | };>=>>5) |