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| Rev 2327 | Rev 2332 | ||
|---|---|---|---|
| Line 278... | Line 278... | ||
| 278 | break; |
278 | break; |
| 279 | } |
279 | } |
| 280 | } |
280 | } |
| Line 281... | Line 281... | ||
| 281 | 281 | ||
| 282 | if (stolen_size > 0) { |
282 | if (stolen_size > 0) { |
| 283 | dbgprintf("detected %dK %s memory\n", |
283 | dev_info(&intel_private.bridge_dev->dev, "detected %dK %s memory\n", |
| 284 | stolen_size / KB(1), local ? "local" : "stolen"); |
284 | stolen_size / KB(1), local ? "local" : "stolen"); |
| - | 285 | } else { |
|
| 285 | } else { |
286 | dev_info(&intel_private.bridge_dev->dev, |
| 286 | dbgprintf("no pre-allocated video memory detected\n"); |
287 | "no pre-allocated video memory detected\n"); |
| 287 | stolen_size = 0; |
288 | stolen_size = 0; |
| Line 288... | Line 289... | ||
| 288 | } |
289 | } |
| 289 | 290 | ||
| Line 352... | Line 353... | ||
| 352 | break; |
353 | break; |
| 353 | case I965_PGETBL_SIZE_1_5MB: |
354 | case I965_PGETBL_SIZE_1_5MB: |
| 354 | size = KB(1024 + 512); |
355 | size = KB(1024 + 512); |
| 355 | break; |
356 | break; |
| 356 | default: |
357 | default: |
| - | 358 | dev_info(&intel_private.pcidev->dev, |
|
| 357 | dbgprintf("unknown page table size, assuming 512KB\n"); |
359 | "unknown page table size, assuming 512KB\n"); |
| 358 | size = KB(512); |
360 | size = KB(512); |
| 359 | } |
361 | } |
| Line 360... | Line 362... | ||
| 360 | 362 | ||
| 361 | return size/4; |
363 | return size/4; |
| Line 527... | Line 529... | ||
| 527 | I830_GMCH_CTRL, gmch_ctrl); |
529 | I830_GMCH_CTRL, gmch_ctrl); |
| Line 528... | Line 530... | ||
| 528 | 530 | ||
| 529 | pci_read_config_word(intel_private.bridge_dev, |
531 | pci_read_config_word(intel_private.bridge_dev, |
| 530 | I830_GMCH_CTRL, &gmch_ctrl); |
532 | I830_GMCH_CTRL, &gmch_ctrl); |
| - | 533 | if ((gmch_ctrl & I830_GMCH_ENABLED) == 0) { |
|
| 531 | if ((gmch_ctrl & I830_GMCH_ENABLED) == 0) { |
534 | dev_err(&intel_private.pcidev->dev, |
| 532 | dbgprintf("failed to enable the GTT: GMCH_CTRL=%x\n", |
535 | "failed to enable the GTT: GMCH_CTRL=%x\n", |
| 533 | gmch_ctrl); |
536 | gmch_ctrl); |
| 534 | return false; |
537 | return false; |
| 535 | } |
538 | } |
| Line 542... | Line 545... | ||
| 542 | writel(0, intel_private.registers+GFX_FLSH_CNTL); |
545 | writel(0, intel_private.registers+GFX_FLSH_CNTL); |
| Line 543... | Line 546... | ||
| 543 | 546 | ||
| 544 | reg = intel_private.registers+I810_PGETBL_CTL; |
547 | reg = intel_private.registers+I810_PGETBL_CTL; |
| 545 | writel(intel_private.PGETBL_save, reg); |
548 | writel(intel_private.PGETBL_save, reg); |
| - | 549 | if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) { |
|
| 546 | if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) { |
550 | dev_err(&intel_private.pcidev->dev, |
| 547 | dbgprintf("failed to enable the GTT: PGETBL=%x [expected %x]\n", |
551 | "failed to enable the GTT: PGETBL=%x [expected %x]\n", |
| 548 | readl(reg), intel_private.PGETBL_save); |
552 | readl(reg), intel_private.PGETBL_save); |
| 549 | return false; |
553 | return false; |
| Line 550... | Line 554... | ||
| 550 | } |
554 | } |
| Line 554... | Line 558... | ||
| 554 | 558 | ||
| 555 | return true; |
559 | return true; |
| Line -... | Line 560... | ||
| - | 560 | } |
|
| - | 561 | ||
| - | 562 | ||
| - | 563 | void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries, |
|
| - | 564 | struct page **pages, unsigned int flags) |
|
| - | 565 | { |
|
| - | 566 | int i, j; |
|
| - | 567 | ||
| - | 568 | for (i = 0, j = first_entry; i < num_entries; i++, j++) { |
|
| - | 569 | dma_addr_t addr = (dma_addr_t)(pages[i]); |
|
| - | 570 | intel_private.driver->write_entry(addr, |
|
| - | 571 | j, flags); |
|
| - | 572 | } |
|
| - | 573 | readl(intel_private.gtt+j-1); |
|
| - | 574 | } |
|
| - | 575 | ||
| - | 576 | ||
| - | 577 | void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries) |
|
| - | 578 | { |
|
| - | 579 | unsigned int i; |
|
| - | 580 | ||
| - | 581 | for (i = first_entry; i < (first_entry + num_entries); i++) { |
|
| - | 582 | intel_private.driver->write_entry(intel_private.scratch_page_dma, |
|
| - | 583 | i, 0); |
|
| - | 584 | } |
|
| Line 556... | Line 585... | ||
| 556 | } |
585 | readl(intel_private.gtt+i-1); |
| 557 | 586 | } |
|
| 558 | 587 | ||
| 559 | 588 | ||
| Line 764... | Line 793... | ||
| 764 | const struct intel_gtt *intel_gtt_get(void) |
793 | const struct intel_gtt *intel_gtt_get(void) |
| 765 | { |
794 | { |
| 766 | return &intel_private.base; |
795 | return &intel_private.base; |
| 767 | } |
796 | } |
| Line -... | Line 797... | ||
| - | 797 | ||
| - | 798 | void intel_gtt_chipset_flush(void) |
|
| - | 799 | { |
|
| - | 800 | if (intel_private.driver->chipset_flush) |
|
| - | 801 | intel_private.driver->chipset_flush(); |
|
| - | 802 | } |
|
| Line 768... | Line 803... | ||
| 768 | 803 | ||
| 769 | 804 | ||
| 770 | phys_addr_t get_bus_addr(void) |
805 | phys_addr_t get_bus_addr(void) |
| 771 | { |
806 | { |