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1
/*
1
/*
2
 * Copyright (c) 2006 Luc Verhaegen (quirks list)
2
 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3
 * Copyright (c) 2007-2008 Intel Corporation
3
 * Copyright (c) 2007-2008 Intel Corporation
4
 *   Jesse Barnes 
4
 *   Jesse Barnes 
5
 *
5
 *
6
 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
6
 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
7
 * FB layer.
7
 * FB layer.
8
 *   Copyright (C) 2006 Dennis Munsie 
8
 *   Copyright (C) 2006 Dennis Munsie 
9
 *
9
 *
10
 * Permission is hereby granted, free of charge, to any person obtaining a
10
 * Permission is hereby granted, free of charge, to any person obtaining a
11
 * copy of this software and associated documentation files (the "Software"),
11
 * copy of this software and associated documentation files (the "Software"),
12
 * to deal in the Software without restriction, including without limitation
12
 * to deal in the Software without restriction, including without limitation
13
 * the rights to use, copy, modify, merge, publish, distribute, sub license,
13
 * the rights to use, copy, modify, merge, publish, distribute, sub license,
14
 * and/or sell copies of the Software, and to permit persons to whom the
14
 * and/or sell copies of the Software, and to permit persons to whom the
15
 * Software is furnished to do so, subject to the following conditions:
15
 * Software is furnished to do so, subject to the following conditions:
16
 *
16
 *
17
 * The above copyright notice and this permission notice (including the
17
 * The above copyright notice and this permission notice (including the
18
 * next paragraph) shall be included in all copies or substantial portions
18
 * next paragraph) shall be included in all copies or substantial portions
19
 * of the Software.
19
 * of the Software.
20
 *
20
 *
21
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
23
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27
 * DEALINGS IN THE SOFTWARE.
27
 * DEALINGS IN THE SOFTWARE.
28
 */
28
 */
29
#include 
29
#include 
30
#include 
30
#include 
31
#include 
31
#include 
32
#include "drmP.h"
32
#include "drmP.h"
33
#include "drm_edid.h"
33
#include "drm_edid.h"
34
 
34
 
35
/*
35
/*
36
 * TODO:
36
 * TODO:
37
 *   - support EDID 1.4 (incl. CE blocks)
37
 *   - support EDID 1.4 (incl. CE blocks)
38
 */
38
 */
39
 
39
 
40
/*
40
/*
41
 * EDID blocks out in the wild have a variety of bugs, try to collect
41
 * EDID blocks out in the wild have a variety of bugs, try to collect
42
 * them here (note that userspace may work around broken monitors first,
42
 * them here (note that userspace may work around broken monitors first,
43
 * but fixes should make their way here so that the kernel "just works"
43
 * but fixes should make their way here so that the kernel "just works"
44
 * on as many displays as possible).
44
 * on as many displays as possible).
45
 */
45
 */
46
 
46
 
47
/* First detailed mode wrong, use largest 60Hz mode */
47
/* First detailed mode wrong, use largest 60Hz mode */
48
#define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
48
#define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
49
/* Reported 135MHz pixel clock is too high, needs adjustment */
49
/* Reported 135MHz pixel clock is too high, needs adjustment */
50
#define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
50
#define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
51
/* Prefer the largest mode at 75 Hz */
51
/* Prefer the largest mode at 75 Hz */
52
#define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
52
#define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
53
/* Detail timing is in cm not mm */
53
/* Detail timing is in cm not mm */
54
#define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
54
#define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
55
/* Detailed timing descriptors have bogus size values, so just take the
55
/* Detailed timing descriptors have bogus size values, so just take the
56
 * maximum size and use that.
56
 * maximum size and use that.
57
 */
57
 */
58
#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
58
#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
59
/* Monitor forgot to set the first detailed is preferred bit. */
59
/* Monitor forgot to set the first detailed is preferred bit. */
60
#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
60
#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
61
/* use +hsync +vsync for detailed mode */
61
/* use +hsync +vsync for detailed mode */
62
#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
62
#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
63
/* define the number of Extension EDID block */
-
 
64
#define MAX_EDID_EXT_NUM 4
-
 
-
 
63
 
65
 
64
 
66
#define LEVEL_DMT	0
65
#define LEVEL_DMT	0
67
#define LEVEL_GTF	1
66
#define LEVEL_GTF	1
68
#define LEVEL_CVT	2
67
#define LEVEL_CVT	2
69
 
68
 
70
static struct edid_quirk {
69
static struct edid_quirk {
71
	char *vendor;
70
	char *vendor;
72
	int product_id;
71
	int product_id;
73
	u32 quirks;
72
	u32 quirks;
74
} edid_quirk_list[] = {
73
} edid_quirk_list[] = {
75
	/* Acer AL1706 */
74
	/* Acer AL1706 */
76
	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
75
	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77
	/* Acer F51 */
76
	/* Acer F51 */
78
	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
77
	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79
	/* Unknown Acer */
78
	/* Unknown Acer */
80
	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
79
	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81
 
80
 
82
	/* Belinea 10 15 55 */
81
	/* Belinea 10 15 55 */
83
	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
82
	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
84
	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
83
	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85
 
84
 
86
	/* Envision Peripherals, Inc. EN-7100e */
85
	/* Envision Peripherals, Inc. EN-7100e */
87
	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
86
	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88
 
87
 
89
	/* Funai Electronics PM36B */
88
	/* Funai Electronics PM36B */
90
	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
89
	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
91
	  EDID_QUIRK_DETAILED_IN_CM },
90
	  EDID_QUIRK_DETAILED_IN_CM },
92
 
91
 
93
	/* LG Philips LCD LP154W01-A5 */
92
	/* LG Philips LCD LP154W01-A5 */
94
	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
93
	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
95
	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
94
	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
96
 
95
 
97
	/* Philips 107p5 CRT */
96
	/* Philips 107p5 CRT */
98
	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
97
	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99
 
98
 
100
	/* Proview AY765C */
99
	/* Proview AY765C */
101
	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
100
	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102
 
101
 
103
	/* Samsung SyncMaster 205BW.  Note: irony */
102
	/* Samsung SyncMaster 205BW.  Note: irony */
104
	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
103
	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
105
	/* Samsung SyncMaster 22[5-6]BW */
104
	/* Samsung SyncMaster 22[5-6]BW */
106
	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
105
	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
107
	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
106
	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
108
};
107
};
109
 
108
 
110
 
109
 
111
/* Valid EDID header has these bytes */
110
/* Valid EDID header has these bytes */
112
static const u8 edid_header[] = {
111
static const u8 edid_header[] = {
113
	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
112
	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
114
};
113
};
115
 
114
 
116
/**
115
/**
117
 * edid_is_valid - sanity check EDID data
116
 * drm_edid_is_valid - sanity check EDID data
118
 * @edid: EDID data
117
 * @edid: EDID data
119
 *
118
 *
120
 * Sanity check the EDID block by looking at the header, the version number
119
 * Sanity check the EDID block by looking at the header, the version number
121
 * and the checksum.  Return 0 if the EDID doesn't check out, or 1 if it's
120
 * and the checksum.  Return 0 if the EDID doesn't check out, or 1 if it's
122
 * valid.
121
 * valid.
123
 */
122
 */
124
static bool edid_is_valid(struct edid *edid)
123
bool drm_edid_is_valid(struct edid *edid)
125
{
124
{
126
	int i, score = 0;
125
	int i, score = 0;
127
	u8 csum = 0;
126
	u8 csum = 0;
128
	u8 *raw_edid = (u8 *)edid;
127
	u8 *raw_edid = (u8 *)edid;
129
 
128
 
130
	for (i = 0; i < sizeof(edid_header); i++)
129
	for (i = 0; i < sizeof(edid_header); i++)
131
		if (raw_edid[i] == edid_header[i])
130
		if (raw_edid[i] == edid_header[i])
132
			score++;
131
			score++;
133
 
132
 
134
	if (score == 8) ;
133
	if (score == 8) ;
135
	else if (score >= 6) {
134
	else if (score >= 6) {
136
		DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
135
		DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
137
		memcpy(raw_edid, edid_header, sizeof(edid_header));
136
		memcpy(raw_edid, edid_header, sizeof(edid_header));
138
	} else
137
	} else
139
		goto bad;
138
		goto bad;
140
 
139
 
141
	for (i = 0; i < EDID_LENGTH; i++)
140
	for (i = 0; i < EDID_LENGTH; i++)
142
		csum += raw_edid[i];
141
		csum += raw_edid[i];
143
	if (csum) {
142
	if (csum) {
144
		DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
143
		DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
145
		goto bad;
144
		goto bad;
146
	}
145
	}
147
 
146
 
148
	if (edid->version != 1) {
147
	if (edid->version != 1) {
149
		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
148
		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
150
		goto bad;
149
		goto bad;
151
	}
150
	}
152
 
151
 
153
	if (edid->revision > 4)
152
	if (edid->revision > 4)
154
		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
153
		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
155
 
154
 
156
	return 1;
155
	return 1;
157
 
156
 
158
bad:
157
bad:
159
	if (raw_edid) {
158
	if (raw_edid) {
160
		DRM_ERROR("Raw EDID:\n");
159
		DRM_ERROR("Raw EDID:\n");
161
//       print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
160
//       print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
162
//       printk("\n");
161
//       printk("\n");
163
	}
162
	}
164
	return 0;
163
	return 0;
165
}
164
}
-
 
165
EXPORT_SYMBOL(drm_edid_is_valid);
166
 
166
 
167
/**
167
/**
168
 * edid_vendor - match a string against EDID's obfuscated vendor field
168
 * edid_vendor - match a string against EDID's obfuscated vendor field
169
 * @edid: EDID to match
169
 * @edid: EDID to match
170
 * @vendor: vendor string
170
 * @vendor: vendor string
171
 *
171
 *
172
 * Returns true if @vendor is in @edid, false otherwise
172
 * Returns true if @vendor is in @edid, false otherwise
173
 */
173
 */
174
static bool edid_vendor(struct edid *edid, char *vendor)
174
static bool edid_vendor(struct edid *edid, char *vendor)
175
{
175
{
176
	char edid_vendor[3];
176
	char edid_vendor[3];
177
 
177
 
178
	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
178
	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
179
	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
179
	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
180
			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
180
			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
181
	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
181
	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
182
 
182
 
183
	return !strncmp(edid_vendor, vendor, 3);
183
	return !strncmp(edid_vendor, vendor, 3);
184
}
184
}
185
 
185
 
186
/**
186
/**
187
 * edid_get_quirks - return quirk flags for a given EDID
187
 * edid_get_quirks - return quirk flags for a given EDID
188
 * @edid: EDID to process
188
 * @edid: EDID to process
189
 *
189
 *
190
 * This tells subsequent routines what fixes they need to apply.
190
 * This tells subsequent routines what fixes they need to apply.
191
 */
191
 */
192
static u32 edid_get_quirks(struct edid *edid)
192
static u32 edid_get_quirks(struct edid *edid)
193
{
193
{
194
	struct edid_quirk *quirk;
194
	struct edid_quirk *quirk;
195
	int i;
195
	int i;
196
 
196
 
197
	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
197
	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
198
		quirk = &edid_quirk_list[i];
198
		quirk = &edid_quirk_list[i];
199
 
199
 
200
		if (edid_vendor(edid, quirk->vendor) &&
200
		if (edid_vendor(edid, quirk->vendor) &&
201
		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
201
		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
202
			return quirk->quirks;
202
			return quirk->quirks;
203
	}
203
	}
204
 
204
 
205
	return 0;
205
	return 0;
206
}
206
}
207
 
207
 
208
#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
208
#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
209
#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
209
#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
210
 
210
 
211
 
211
 
212
/**
212
/**
213
 * edid_fixup_preferred - set preferred modes based on quirk list
213
 * edid_fixup_preferred - set preferred modes based on quirk list
214
 * @connector: has mode list to fix up
214
 * @connector: has mode list to fix up
215
 * @quirks: quirks list
215
 * @quirks: quirks list
216
 *
216
 *
217
 * Walk the mode list for @connector, clearing the preferred status
217
 * Walk the mode list for @connector, clearing the preferred status
218
 * on existing modes and setting it anew for the right mode ala @quirks.
218
 * on existing modes and setting it anew for the right mode ala @quirks.
219
 */
219
 */
220
static void edid_fixup_preferred(struct drm_connector *connector,
220
static void edid_fixup_preferred(struct drm_connector *connector,
221
				 u32 quirks)
221
				 u32 quirks)
222
{
222
{
223
	struct drm_display_mode *t, *cur_mode, *preferred_mode;
223
	struct drm_display_mode *t, *cur_mode, *preferred_mode;
224
	int target_refresh = 0;
224
	int target_refresh = 0;
225
 
225
 
226
	if (list_empty(&connector->probed_modes))
226
	if (list_empty(&connector->probed_modes))
227
		return;
227
		return;
228
 
228
 
229
	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
229
	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
230
		target_refresh = 60;
230
		target_refresh = 60;
231
	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
231
	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
232
		target_refresh = 75;
232
		target_refresh = 75;
233
 
233
 
234
	preferred_mode = list_first_entry(&connector->probed_modes,
234
	preferred_mode = list_first_entry(&connector->probed_modes,
235
					  struct drm_display_mode, head);
235
					  struct drm_display_mode, head);
236
 
236
 
237
	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
237
	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
238
		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
238
		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
239
 
239
 
240
		if (cur_mode == preferred_mode)
240
		if (cur_mode == preferred_mode)
241
			continue;
241
			continue;
242
 
242
 
243
		/* Largest mode is preferred */
243
		/* Largest mode is preferred */
244
		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
244
		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
245
			preferred_mode = cur_mode;
245
			preferred_mode = cur_mode;
246
 
246
 
247
		/* At a given size, try to get closest to target refresh */
247
		/* At a given size, try to get closest to target refresh */
248
		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
248
		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
249
		    MODE_REFRESH_DIFF(cur_mode, target_refresh) <
249
		    MODE_REFRESH_DIFF(cur_mode, target_refresh) <
250
		    MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
250
		    MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
251
			preferred_mode = cur_mode;
251
			preferred_mode = cur_mode;
252
		}
252
		}
253
	}
253
	}
254
 
254
 
255
	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
255
	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
256
}
256
}
257
 
257
 
258
/*
258
/*
259
 * Add the Autogenerated from the DMT spec.
259
 * Add the Autogenerated from the DMT spec.
260
 * This table is copied from xfree86/modes/xf86EdidModes.c.
260
 * This table is copied from xfree86/modes/xf86EdidModes.c.
261
 * But the mode with Reduced blank feature is deleted.
261
 * But the mode with Reduced blank feature is deleted.
262
 */
262
 */
263
static struct drm_display_mode drm_dmt_modes[] = {
263
static struct drm_display_mode drm_dmt_modes[] = {
264
	/* 640x350@85Hz */
264
	/* 640x350@85Hz */
265
	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
265
	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
266
		   736, 832, 0, 350, 382, 385, 445, 0,
266
		   736, 832, 0, 350, 382, 385, 445, 0,
267
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
267
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
268
	/* 640x400@85Hz */
268
	/* 640x400@85Hz */
269
	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
269
	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
270
		   736, 832, 0, 400, 401, 404, 445, 0,
270
		   736, 832, 0, 400, 401, 404, 445, 0,
271
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
271
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
272
	/* 720x400@85Hz */
272
	/* 720x400@85Hz */
273
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
273
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
274
		   828, 936, 0, 400, 401, 404, 446, 0,
274
		   828, 936, 0, 400, 401, 404, 446, 0,
275
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
276
	/* 640x480@60Hz */
276
	/* 640x480@60Hz */
277
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
277
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
278
		   752, 800, 0, 480, 489, 492, 525, 0,
278
		   752, 800, 0, 480, 489, 492, 525, 0,
279
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
279
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
280
	/* 640x480@72Hz */
280
	/* 640x480@72Hz */
281
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
281
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
282
		   704, 832, 0, 480, 489, 492, 520, 0,
282
		   704, 832, 0, 480, 489, 492, 520, 0,
283
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
283
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
284
	/* 640x480@75Hz */
284
	/* 640x480@75Hz */
285
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
285
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
286
		   720, 840, 0, 480, 481, 484, 500, 0,
286
		   720, 840, 0, 480, 481, 484, 500, 0,
287
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
287
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
288
	/* 640x480@85Hz */
288
	/* 640x480@85Hz */
289
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
289
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
290
		   752, 832, 0, 480, 481, 484, 509, 0,
290
		   752, 832, 0, 480, 481, 484, 509, 0,
291
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
291
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
292
	/* 800x600@56Hz */
292
	/* 800x600@56Hz */
293
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
293
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
294
		   896, 1024, 0, 600, 601, 603, 625, 0,
294
		   896, 1024, 0, 600, 601, 603, 625, 0,
295
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
295
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
296
	/* 800x600@60Hz */
296
	/* 800x600@60Hz */
297
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
297
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
298
		   968, 1056, 0, 600, 601, 605, 628, 0,
298
		   968, 1056, 0, 600, 601, 605, 628, 0,
299
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
299
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
300
	/* 800x600@72Hz */
300
	/* 800x600@72Hz */
301
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
301
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
302
		   976, 1040, 0, 600, 637, 643, 666, 0,
302
		   976, 1040, 0, 600, 637, 643, 666, 0,
303
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
303
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
304
	/* 800x600@75Hz */
304
	/* 800x600@75Hz */
305
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
305
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
306
		   896, 1056, 0, 600, 601, 604, 625, 0,
306
		   896, 1056, 0, 600, 601, 604, 625, 0,
307
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
307
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
308
	/* 800x600@85Hz */
308
	/* 800x600@85Hz */
309
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
309
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
310
		   896, 1048, 0, 600, 601, 604, 631, 0,
310
		   896, 1048, 0, 600, 601, 604, 631, 0,
311
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
311
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
312
	/* 848x480@60Hz */
312
	/* 848x480@60Hz */
313
	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
313
	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
314
		   976, 1088, 0, 480, 486, 494, 517, 0,
314
		   976, 1088, 0, 480, 486, 494, 517, 0,
315
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
316
	/* 1024x768@43Hz, interlace */
316
	/* 1024x768@43Hz, interlace */
317
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
317
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
318
		   1208, 1264, 0, 768, 768, 772, 817, 0,
318
		   1208, 1264, 0, 768, 768, 772, 817, 0,
319
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
319
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
320
			DRM_MODE_FLAG_INTERLACE) },
320
			DRM_MODE_FLAG_INTERLACE) },
321
	/* 1024x768@60Hz */
321
	/* 1024x768@60Hz */
322
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
322
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
323
		   1184, 1344, 0, 768, 771, 777, 806, 0,
323
		   1184, 1344, 0, 768, 771, 777, 806, 0,
324
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
324
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
325
	/* 1024x768@70Hz */
325
	/* 1024x768@70Hz */
326
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
326
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
327
		   1184, 1328, 0, 768, 771, 777, 806, 0,
327
		   1184, 1328, 0, 768, 771, 777, 806, 0,
328
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
328
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
329
	/* 1024x768@75Hz */
329
	/* 1024x768@75Hz */
330
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
330
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
331
		   1136, 1312, 0, 768, 769, 772, 800, 0,
331
		   1136, 1312, 0, 768, 769, 772, 800, 0,
332
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
332
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
333
	/* 1024x768@85Hz */
333
	/* 1024x768@85Hz */
334
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
334
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
335
		   1072, 1376, 0, 768, 769, 772, 808, 0,
335
		   1072, 1376, 0, 768, 769, 772, 808, 0,
336
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
336
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
337
	/* 1152x864@75Hz */
337
	/* 1152x864@75Hz */
338
	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
338
	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
339
		   1344, 1600, 0, 864, 865, 868, 900, 0,
339
		   1344, 1600, 0, 864, 865, 868, 900, 0,
340
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
340
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
341
	/* 1280x768@60Hz */
341
	/* 1280x768@60Hz */
342
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
342
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
343
		   1472, 1664, 0, 768, 771, 778, 798, 0,
343
		   1472, 1664, 0, 768, 771, 778, 798, 0,
344
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
344
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
345
	/* 1280x768@75Hz */
345
	/* 1280x768@75Hz */
346
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
346
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
347
		   1488, 1696, 0, 768, 771, 778, 805, 0,
347
		   1488, 1696, 0, 768, 771, 778, 805, 0,
348
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
348
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
349
	/* 1280x768@85Hz */
349
	/* 1280x768@85Hz */
350
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
350
	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
351
		   1496, 1712, 0, 768, 771, 778, 809, 0,
351
		   1496, 1712, 0, 768, 771, 778, 809, 0,
352
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
352
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
353
	/* 1280x800@60Hz */
353
	/* 1280x800@60Hz */
354
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
354
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
355
		   1480, 1680, 0, 800, 803, 809, 831, 0,
355
		   1480, 1680, 0, 800, 803, 809, 831, 0,
356
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
356
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
357
	/* 1280x800@75Hz */
357
	/* 1280x800@75Hz */
358
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
358
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
359
		   1488, 1696, 0, 800, 803, 809, 838, 0,
359
		   1488, 1696, 0, 800, 803, 809, 838, 0,
360
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
360
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
361
	/* 1280x800@85Hz */
361
	/* 1280x800@85Hz */
362
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
362
	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
363
		   1496, 1712, 0, 800, 803, 809, 843, 0,
363
		   1496, 1712, 0, 800, 803, 809, 843, 0,
364
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
364
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
365
	/* 1280x960@60Hz */
365
	/* 1280x960@60Hz */
366
	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
366
	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
367
		   1488, 1800, 0, 960, 961, 964, 1000, 0,
367
		   1488, 1800, 0, 960, 961, 964, 1000, 0,
368
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
368
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
369
	/* 1280x960@85Hz */
369
	/* 1280x960@85Hz */
370
	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
370
	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
371
		   1504, 1728, 0, 960, 961, 964, 1011, 0,
371
		   1504, 1728, 0, 960, 961, 964, 1011, 0,
372
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
372
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
373
	/* 1280x1024@60Hz */
373
	/* 1280x1024@60Hz */
374
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
374
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
375
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
375
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
376
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
376
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
377
	/* 1280x1024@75Hz */
377
	/* 1280x1024@75Hz */
378
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
378
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
379
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
379
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
380
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
380
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
381
	/* 1280x1024@85Hz */
381
	/* 1280x1024@85Hz */
382
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
382
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
383
		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
383
		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
384
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
384
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
385
	/* 1360x768@60Hz */
385
	/* 1360x768@60Hz */
386
	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
386
	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
387
		   1536, 1792, 0, 768, 771, 777, 795, 0,
387
		   1536, 1792, 0, 768, 771, 777, 795, 0,
388
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
388
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
389
	/* 1440x1050@60Hz */
389
	/* 1440x1050@60Hz */
390
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
390
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
391
		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
391
		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
392
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
392
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
393
	/* 1440x1050@75Hz */
393
	/* 1440x1050@75Hz */
394
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
394
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
395
		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
395
		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
396
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
396
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
397
	/* 1440x1050@85Hz */
397
	/* 1440x1050@85Hz */
398
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
398
	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
399
		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
399
		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
400
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
401
	/* 1440x900@60Hz */
401
	/* 1440x900@60Hz */
402
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
402
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
403
		   1672, 1904, 0, 900, 903, 909, 934, 0,
403
		   1672, 1904, 0, 900, 903, 909, 934, 0,
404
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
404
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
405
	/* 1440x900@75Hz */
405
	/* 1440x900@75Hz */
406
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
406
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
407
		   1688, 1936, 0, 900, 903, 909, 942, 0,
407
		   1688, 1936, 0, 900, 903, 909, 942, 0,
408
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
408
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
409
	/* 1440x900@85Hz */
409
	/* 1440x900@85Hz */
410
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
410
	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
411
		   1696, 1952, 0, 900, 903, 909, 948, 0,
411
		   1696, 1952, 0, 900, 903, 909, 948, 0,
412
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
412
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
413
	/* 1600x1200@60Hz */
413
	/* 1600x1200@60Hz */
414
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
414
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
415
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
415
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
416
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
416
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
417
	/* 1600x1200@65Hz */
417
	/* 1600x1200@65Hz */
418
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
418
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
419
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
419
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
420
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
420
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
421
	/* 1600x1200@70Hz */
421
	/* 1600x1200@70Hz */
422
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
422
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
423
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
423
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
424
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
424
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
425
	/* 1600x1200@75Hz */
425
	/* 1600x1200@75Hz */
426
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
426
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
427
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
427
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
428
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
428
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
429
	/* 1600x1200@85Hz */
429
	/* 1600x1200@85Hz */
430
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
430
	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
431
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
431
		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
432
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
432
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
433
	/* 1680x1050@60Hz */
433
	/* 1680x1050@60Hz */
434
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
434
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
435
		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
435
		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
436
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
436
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437
	/* 1680x1050@75Hz */
437
	/* 1680x1050@75Hz */
438
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
438
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
439
		   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
439
		   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
440
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
441
	/* 1680x1050@85Hz */
441
	/* 1680x1050@85Hz */
442
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
442
	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
443
		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
443
		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
444
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
444
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445
	/* 1792x1344@60Hz */
445
	/* 1792x1344@60Hz */
446
	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
446
	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
447
		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
447
		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
448
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
448
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449
	/* 1729x1344@75Hz */
449
	/* 1729x1344@75Hz */
450
	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
450
	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
451
		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
451
		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
452
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
453
	/* 1853x1392@60Hz */
453
	/* 1853x1392@60Hz */
454
	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
454
	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
455
		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
455
		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
456
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
456
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
457
	/* 1856x1392@75Hz */
457
	/* 1856x1392@75Hz */
458
	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
458
	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
459
		   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
459
		   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
460
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
460
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
461
	/* 1920x1200@60Hz */
461
	/* 1920x1200@60Hz */
462
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
462
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
463
		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
463
		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
464
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
464
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
465
	/* 1920x1200@75Hz */
465
	/* 1920x1200@75Hz */
466
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
466
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
467
		   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
467
		   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
468
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
468
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469
	/* 1920x1200@85Hz */
469
	/* 1920x1200@85Hz */
470
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
470
	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
471
		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
471
		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
472
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
472
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
473
	/* 1920x1440@60Hz */
473
	/* 1920x1440@60Hz */
474
	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
474
	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
475
		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
475
		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
476
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
476
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
477
	/* 1920x1440@75Hz */
477
	/* 1920x1440@75Hz */
478
	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
478
	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
479
		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
479
		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
480
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
480
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
481
	/* 2560x1600@60Hz */
481
	/* 2560x1600@60Hz */
482
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
482
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
483
		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
483
		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
484
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
484
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
485
	/* 2560x1600@75HZ */
485
	/* 2560x1600@75HZ */
486
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
486
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
487
		   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
487
		   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
488
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
488
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
489
	/* 2560x1600@85HZ */
489
	/* 2560x1600@85HZ */
490
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
490
	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
491
		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
491
		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
492
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
492
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
493
};
493
};
494
static const int drm_num_dmt_modes =
494
static const int drm_num_dmt_modes =
495
	sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
495
	sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
496
 
496
 
497
static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
497
static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
498
			int hsize, int vsize, int fresh)
498
			int hsize, int vsize, int fresh)
499
{
499
{
500
	int i;
500
	int i;
501
	struct drm_display_mode *ptr, *mode;
501
	struct drm_display_mode *ptr, *mode;
502
 
502
 
503
	mode = NULL;
503
	mode = NULL;
504
	for (i = 0; i < drm_num_dmt_modes; i++) {
504
	for (i = 0; i < drm_num_dmt_modes; i++) {
505
		ptr = &drm_dmt_modes[i];
505
		ptr = &drm_dmt_modes[i];
506
		if (hsize == ptr->hdisplay &&
506
		if (hsize == ptr->hdisplay &&
507
			vsize == ptr->vdisplay &&
507
			vsize == ptr->vdisplay &&
508
			fresh == drm_mode_vrefresh(ptr)) {
508
			fresh == drm_mode_vrefresh(ptr)) {
509
			/* get the expected default mode */
509
			/* get the expected default mode */
510
			mode = drm_mode_duplicate(dev, ptr);
510
			mode = drm_mode_duplicate(dev, ptr);
511
			break;
511
			break;
512
		}
512
		}
513
	}
513
	}
514
	return mode;
514
	return mode;
515
}
515
}
516
 
516
 
517
/*
517
/*
518
 * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
518
 * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
519
 * monitors fill with ascii space (0x20) instead.
519
 * monitors fill with ascii space (0x20) instead.
520
 */
520
 */
521
static int
521
static int
522
bad_std_timing(u8 a, u8 b)
522
bad_std_timing(u8 a, u8 b)
523
{
523
{
524
	return (a == 0x00 && b == 0x00) ||
524
	return (a == 0x00 && b == 0x00) ||
525
	       (a == 0x01 && b == 0x01) ||
525
	       (a == 0x01 && b == 0x01) ||
526
	       (a == 0x20 && b == 0x20);
526
	       (a == 0x20 && b == 0x20);
527
}
527
}
528
 
528
 
529
/**
529
/**
530
 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
530
 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
531
 * @t: standard timing params
531
 * @t: standard timing params
532
 * @timing_level: standard timing level
532
 * @timing_level: standard timing level
533
 *
533
 *
534
 * Take the standard timing params (in this case width, aspect, and refresh)
534
 * Take the standard timing params (in this case width, aspect, and refresh)
535
 * and convert them into a real mode using CVT/GTF/DMT.
535
 * and convert them into a real mode using CVT/GTF/DMT.
536
 *
536
 *
537
 * Punts for now, but should eventually use the FB layer's CVT based mode
537
 * Punts for now, but should eventually use the FB layer's CVT based mode
538
 * generation code.
538
 * generation code.
539
 */
539
 */
540
struct drm_display_mode *drm_mode_std(struct drm_device *dev,
540
struct drm_display_mode *drm_mode_std(struct drm_device *dev,
541
				      struct std_timing *t,
541
				      struct std_timing *t,
542
				      int revision,
542
				      int revision,
543
				      int timing_level)
543
				      int timing_level)
544
{
544
{
545
	struct drm_display_mode *mode;
545
	struct drm_display_mode *mode;
546
	int hsize, vsize;
546
	int hsize, vsize;
547
	int vrefresh_rate;
547
	int vrefresh_rate;
548
	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
548
	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
549
		>> EDID_TIMING_ASPECT_SHIFT;
549
		>> EDID_TIMING_ASPECT_SHIFT;
550
	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
550
	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
551
		>> EDID_TIMING_VFREQ_SHIFT;
551
		>> EDID_TIMING_VFREQ_SHIFT;
552
 
552
 
553
	if (bad_std_timing(t->hsize, t->vfreq_aspect))
553
	if (bad_std_timing(t->hsize, t->vfreq_aspect))
554
		return NULL;
554
		return NULL;
555
 
555
 
556
	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
556
	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
557
	hsize = t->hsize * 8 + 248;
557
	hsize = t->hsize * 8 + 248;
558
	/* vrefresh_rate = vfreq + 60 */
558
	/* vrefresh_rate = vfreq + 60 */
559
	vrefresh_rate = vfreq + 60;
559
	vrefresh_rate = vfreq + 60;
560
	/* the vdisplay is calculated based on the aspect ratio */
560
	/* the vdisplay is calculated based on the aspect ratio */
561
	if (aspect_ratio == 0) {
561
	if (aspect_ratio == 0) {
562
		if (revision < 3)
562
		if (revision < 3)
563
			vsize = hsize;
563
			vsize = hsize;
564
		else
564
		else
565
		vsize = (hsize * 10) / 16;
565
		vsize = (hsize * 10) / 16;
566
	} else if (aspect_ratio == 1)
566
	} else if (aspect_ratio == 1)
567
		vsize = (hsize * 3) / 4;
567
		vsize = (hsize * 3) / 4;
568
	else if (aspect_ratio == 2)
568
	else if (aspect_ratio == 2)
569
		vsize = (hsize * 4) / 5;
569
		vsize = (hsize * 4) / 5;
570
	else
570
	else
571
		vsize = (hsize * 9) / 16;
571
		vsize = (hsize * 9) / 16;
572
	/* HDTV hack */
572
	/* HDTV hack */
573
	if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
573
	if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
574
		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
574
		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
575
				    false);
575
				    false);
576
		mode->hdisplay = 1366;
576
		mode->hdisplay = 1366;
577
		mode->vsync_start = mode->vsync_start - 1;
577
		mode->vsync_start = mode->vsync_start - 1;
578
		mode->vsync_end = mode->vsync_end - 1;
578
		mode->vsync_end = mode->vsync_end - 1;
579
		return mode;
579
		return mode;
580
	}
580
	}
581
	mode = NULL;
581
	mode = NULL;
582
	/* check whether it can be found in default mode table */
582
	/* check whether it can be found in default mode table */
583
	mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
583
	mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
584
	if (mode)
584
	if (mode)
585
		return mode;
585
		return mode;
586
 
586
 
587
	switch (timing_level) {
587
	switch (timing_level) {
588
	case LEVEL_DMT:
588
	case LEVEL_DMT:
589
		break;
589
		break;
590
	case LEVEL_GTF:
590
	case LEVEL_GTF:
591
		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
591
		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
592
		break;
592
		break;
593
	case LEVEL_CVT:
593
	case LEVEL_CVT:
594
		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
594
		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
595
				    false);
595
				    false);
596
		break;
596
		break;
597
	}
597
	}
598
	return mode;
598
	return mode;
599
}
599
}
600
 
600
 
601
/*
601
/*
602
 * EDID is delightfully ambiguous about how interlaced modes are to be
602
 * EDID is delightfully ambiguous about how interlaced modes are to be
603
 * encoded.  Our internal representation is of frame height, but some
603
 * encoded.  Our internal representation is of frame height, but some
604
 * HDTV detailed timings are encoded as field height.
604
 * HDTV detailed timings are encoded as field height.
605
 *
605
 *
606
 * The format list here is from CEA, in frame size.  Technically we
606
 * The format list here is from CEA, in frame size.  Technically we
607
 * should be checking refresh rate too.  Whatever.
607
 * should be checking refresh rate too.  Whatever.
608
 */
608
 */
609
static void
609
static void
610
drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
610
drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
611
			    struct detailed_pixel_timing *pt)
611
			    struct detailed_pixel_timing *pt)
612
{
612
{
613
	int i;
613
	int i;
614
	static const struct {
614
	static const struct {
615
		int w, h;
615
		int w, h;
616
	} cea_interlaced[] = {
616
	} cea_interlaced[] = {
617
		{ 1920, 1080 },
617
		{ 1920, 1080 },
618
		{  720,  480 },
618
		{  720,  480 },
619
		{ 1440,  480 },
619
		{ 1440,  480 },
620
		{ 2880,  480 },
620
		{ 2880,  480 },
621
		{  720,  576 },
621
		{  720,  576 },
622
		{ 1440,  576 },
622
		{ 1440,  576 },
623
		{ 2880,  576 },
623
		{ 2880,  576 },
624
	};
624
	};
625
	static const int n_sizes =
625
	static const int n_sizes =
626
		sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
626
		sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
627
 
627
 
628
	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
628
	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
629
		return;
629
		return;
630
 
630
 
631
	for (i = 0; i < n_sizes; i++) {
631
	for (i = 0; i < n_sizes; i++) {
632
		if ((mode->hdisplay == cea_interlaced[i].w) &&
632
		if ((mode->hdisplay == cea_interlaced[i].w) &&
633
		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
633
		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
634
			mode->vdisplay *= 2;
634
			mode->vdisplay *= 2;
635
			mode->vsync_start *= 2;
635
			mode->vsync_start *= 2;
636
			mode->vsync_end *= 2;
636
			mode->vsync_end *= 2;
637
			mode->vtotal *= 2;
637
			mode->vtotal *= 2;
638
			mode->vtotal |= 1;
638
			mode->vtotal |= 1;
639
		}
639
		}
640
	}
640
	}
641
 
641
 
642
	mode->flags |= DRM_MODE_FLAG_INTERLACE;
642
	mode->flags |= DRM_MODE_FLAG_INTERLACE;
643
}
643
}
644
 
644
 
645
/**
645
/**
646
 * drm_mode_detailed - create a new mode from an EDID detailed timing section
646
 * drm_mode_detailed - create a new mode from an EDID detailed timing section
647
 * @dev: DRM device (needed to create new mode)
647
 * @dev: DRM device (needed to create new mode)
648
 * @edid: EDID block
648
 * @edid: EDID block
649
 * @timing: EDID detailed timing info
649
 * @timing: EDID detailed timing info
650
 * @quirks: quirks to apply
650
 * @quirks: quirks to apply
651
 *
651
 *
652
 * An EDID detailed timing block contains enough info for us to create and
652
 * An EDID detailed timing block contains enough info for us to create and
653
 * return a new struct drm_display_mode.
653
 * return a new struct drm_display_mode.
654
 */
654
 */
655
static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
655
static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
656
						  struct edid *edid,
656
						  struct edid *edid,
657
						  struct detailed_timing *timing,
657
						  struct detailed_timing *timing,
658
						  u32 quirks)
658
						  u32 quirks)
659
{
659
{
660
	struct drm_display_mode *mode;
660
	struct drm_display_mode *mode;
661
	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
661
	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
662
	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
662
	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
663
	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
663
	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
664
	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
664
	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
665
	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
665
	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
666
	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
666
	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
667
	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
667
	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
668
	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
668
	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
669
	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
669
	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
670
 
670
 
671
	/* ignore tiny modes */
671
	/* ignore tiny modes */
672
	if (hactive < 64 || vactive < 64)
672
	if (hactive < 64 || vactive < 64)
673
		return NULL;
673
		return NULL;
674
 
674
 
675
	if (pt->misc & DRM_EDID_PT_STEREO) {
675
	if (pt->misc & DRM_EDID_PT_STEREO) {
676
		printk(KERN_WARNING "stereo mode not supported\n");
676
		printk(KERN_WARNING "stereo mode not supported\n");
677
		return NULL;
677
		return NULL;
678
	}
678
	}
679
	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
679
	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
680
		printk(KERN_WARNING "composite sync not supported\n");
680
		printk(KERN_WARNING "composite sync not supported\n");
681
	}
681
	}
682
 
682
 
683
	/* it is incorrect if hsync/vsync width is zero */
683
	/* it is incorrect if hsync/vsync width is zero */
684
	if (!hsync_pulse_width || !vsync_pulse_width) {
684
	if (!hsync_pulse_width || !vsync_pulse_width) {
685
		DRM_DEBUG_KMS("Incorrect Detailed timing. "
685
		DRM_DEBUG_KMS("Incorrect Detailed timing. "
686
				"Wrong Hsync/Vsync pulse width\n");
686
				"Wrong Hsync/Vsync pulse width\n");
687
		return NULL;
687
		return NULL;
688
	}
688
	}
689
	mode = drm_mode_create(dev);
689
	mode = drm_mode_create(dev);
690
	if (!mode)
690
	if (!mode)
691
		return NULL;
691
		return NULL;
692
 
692
 
693
	mode->type = DRM_MODE_TYPE_DRIVER;
693
	mode->type = DRM_MODE_TYPE_DRIVER;
694
 
694
 
695
	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
695
	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
696
		timing->pixel_clock = cpu_to_le16(1088);
696
		timing->pixel_clock = cpu_to_le16(1088);
697
 
697
 
698
	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
698
	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
699
 
699
 
700
	mode->hdisplay = hactive;
700
	mode->hdisplay = hactive;
701
	mode->hsync_start = mode->hdisplay + hsync_offset;
701
	mode->hsync_start = mode->hdisplay + hsync_offset;
702
	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
702
	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
703
	mode->htotal = mode->hdisplay + hblank;
703
	mode->htotal = mode->hdisplay + hblank;
704
 
704
 
705
	mode->vdisplay = vactive;
705
	mode->vdisplay = vactive;
706
	mode->vsync_start = mode->vdisplay + vsync_offset;
706
	mode->vsync_start = mode->vdisplay + vsync_offset;
707
	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
707
	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
708
	mode->vtotal = mode->vdisplay + vblank;
708
	mode->vtotal = mode->vdisplay + vblank;
709
 
709
 
710
	/* perform the basic check for the detailed timing */
710
	/* perform the basic check for the detailed timing */
711
	if (mode->hsync_end > mode->htotal ||
711
	if (mode->hsync_end > mode->htotal ||
712
		mode->vsync_end > mode->vtotal) {
712
		mode->vsync_end > mode->vtotal) {
713
		drm_mode_destroy(dev, mode);
713
		drm_mode_destroy(dev, mode);
714
		DRM_DEBUG_KMS("Incorrect detailed timing. "
714
		DRM_DEBUG_KMS("Incorrect detailed timing. "
715
				"Sync is beyond the blank.\n");
715
				"Sync is beyond the blank.\n");
716
		return NULL;
716
		return NULL;
717
	}
717
	}
718
 
718
 
719
	/* Some EDIDs have bogus h/vtotal values */
719
	/* Some EDIDs have bogus h/vtotal values */
720
	if (mode->hsync_end > mode->htotal)
720
	if (mode->hsync_end > mode->htotal)
721
		mode->htotal = mode->hsync_end + 1;
721
		mode->htotal = mode->hsync_end + 1;
722
	if (mode->vsync_end > mode->vtotal)
722
	if (mode->vsync_end > mode->vtotal)
723
		mode->vtotal = mode->vsync_end + 1;
723
		mode->vtotal = mode->vsync_end + 1;
724
 
724
 
725
	drm_mode_set_name(mode);
725
	drm_mode_set_name(mode);
726
 
726
 
727
	drm_mode_do_interlace_quirk(mode, pt);
727
	drm_mode_do_interlace_quirk(mode, pt);
728
 
728
 
729
	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
729
	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
730
		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
730
		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
731
	}
731
	}
732
 
732
 
733
	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
733
	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
734
		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
734
		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
735
	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
735
	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
736
		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
736
		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
737
 
737
 
738
	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
738
	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
739
	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
739
	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
740
 
740
 
741
	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
741
	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
742
		mode->width_mm *= 10;
742
		mode->width_mm *= 10;
743
		mode->height_mm *= 10;
743
		mode->height_mm *= 10;
744
	}
744
	}
745
 
745
 
746
	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
746
	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
747
		mode->width_mm = edid->width_cm * 10;
747
		mode->width_mm = edid->width_cm * 10;
748
		mode->height_mm = edid->height_cm * 10;
748
		mode->height_mm = edid->height_cm * 10;
749
	}
749
	}
750
 
750
 
751
	return mode;
751
	return mode;
752
}
752
}
753
 
753
 
754
/*
754
/*
755
 * Detailed mode info for the EDID "established modes" data to use.
755
 * Detailed mode info for the EDID "established modes" data to use.
756
 */
756
 */
757
static struct drm_display_mode edid_est_modes[] = {
757
static struct drm_display_mode edid_est_modes[] = {
758
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
758
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
759
		   968, 1056, 0, 600, 601, 605, 628, 0,
759
		   968, 1056, 0, 600, 601, 605, 628, 0,
760
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
760
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
761
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
761
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
762
		   896, 1024, 0, 600, 601, 603,  625, 0,
762
		   896, 1024, 0, 600, 601, 603,  625, 0,
763
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
763
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
764
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
764
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
765
		   720, 840, 0, 480, 481, 484, 500, 0,
765
		   720, 840, 0, 480, 481, 484, 500, 0,
766
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
766
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
767
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
767
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
768
		   704,  832, 0, 480, 489, 491, 520, 0,
768
		   704,  832, 0, 480, 489, 491, 520, 0,
769
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
769
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
770
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
770
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
771
		   768,  864, 0, 480, 483, 486, 525, 0,
771
		   768,  864, 0, 480, 483, 486, 525, 0,
772
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
772
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
773
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
773
	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
774
		   752, 800, 0, 480, 490, 492, 525, 0,
774
		   752, 800, 0, 480, 490, 492, 525, 0,
775
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
775
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
776
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
776
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
777
		   846, 900, 0, 400, 421, 423,  449, 0,
777
		   846, 900, 0, 400, 421, 423,  449, 0,
778
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
778
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
779
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
779
	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
780
		   846,  900, 0, 400, 412, 414, 449, 0,
780
		   846,  900, 0, 400, 412, 414, 449, 0,
781
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
781
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
782
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
782
	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
783
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
783
		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
784
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
784
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
785
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
785
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
786
		   1136, 1312, 0,  768, 769, 772, 800, 0,
786
		   1136, 1312, 0,  768, 769, 772, 800, 0,
787
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
787
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
788
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
788
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
789
		   1184, 1328, 0,  768, 771, 777, 806, 0,
789
		   1184, 1328, 0,  768, 771, 777, 806, 0,
790
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
790
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
791
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
791
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
792
		   1184, 1344, 0,  768, 771, 777, 806, 0,
792
		   1184, 1344, 0,  768, 771, 777, 806, 0,
793
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
793
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
794
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
794
	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
795
		   1208, 1264, 0, 768, 768, 776, 817, 0,
795
		   1208, 1264, 0, 768, 768, 776, 817, 0,
796
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
796
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
797
	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
797
	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
798
		   928, 1152, 0, 624, 625, 628, 667, 0,
798
		   928, 1152, 0, 624, 625, 628, 667, 0,
799
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
799
		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
800
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
800
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
801
		   896, 1056, 0, 600, 601, 604,  625, 0,
801
		   896, 1056, 0, 600, 601, 604,  625, 0,
802
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
802
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
803
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
803
	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
804
		   976, 1040, 0, 600, 637, 643, 666, 0,
804
		   976, 1040, 0, 600, 637, 643, 666, 0,
805
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
805
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
806
	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
806
	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
807
		   1344, 1600, 0,  864, 865, 868, 900, 0,
807
		   1344, 1600, 0,  864, 865, 868, 900, 0,
808
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
808
		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
809
};
809
};
810
 
810
 
811
#define EDID_EST_TIMINGS 16
811
#define EDID_EST_TIMINGS 16
812
#define EDID_STD_TIMINGS 8
812
#define EDID_STD_TIMINGS 8
813
#define EDID_DETAILED_TIMINGS 4
813
#define EDID_DETAILED_TIMINGS 4
814
 
814
 
815
/**
815
/**
816
 * add_established_modes - get est. modes from EDID and add them
816
 * add_established_modes - get est. modes from EDID and add them
817
 * @edid: EDID block to scan
817
 * @edid: EDID block to scan
818
 *
818
 *
819
 * Each EDID block contains a bitmap of the supported "established modes" list
819
 * Each EDID block contains a bitmap of the supported "established modes" list
820
 * (defined above).  Tease them out and add them to the global modes list.
820
 * (defined above).  Tease them out and add them to the global modes list.
821
 */
821
 */
822
static int add_established_modes(struct drm_connector *connector, struct edid *edid)
822
static int add_established_modes(struct drm_connector *connector, struct edid *edid)
823
{
823
{
824
	struct drm_device *dev = connector->dev;
824
	struct drm_device *dev = connector->dev;
825
	unsigned long est_bits = edid->established_timings.t1 |
825
	unsigned long est_bits = edid->established_timings.t1 |
826
		(edid->established_timings.t2 << 8) |
826
		(edid->established_timings.t2 << 8) |
827
		((edid->established_timings.mfg_rsvd & 0x80) << 9);
827
		((edid->established_timings.mfg_rsvd & 0x80) << 9);
828
	int i, modes = 0;
828
	int i, modes = 0;
829
 
829
 
830
	for (i = 0; i <= EDID_EST_TIMINGS; i++)
830
	for (i = 0; i <= EDID_EST_TIMINGS; i++)
831
		if (est_bits & (1<
831
		if (est_bits & (1<
832
			struct drm_display_mode *newmode;
832
			struct drm_display_mode *newmode;
833
			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
833
			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
834
			if (newmode) {
834
			if (newmode) {
835
				drm_mode_probed_add(connector, newmode);
835
				drm_mode_probed_add(connector, newmode);
836
				modes++;
836
				modes++;
837
			}
837
			}
838
		}
838
		}
839
 
839
 
840
	return modes;
840
	return modes;
841
}
841
}
842
/**
842
/**
843
 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
843
 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
844
 * @edid: EDID block to scan
844
 * @edid: EDID block to scan
845
 */
845
 */
846
static int standard_timing_level(struct edid *edid)
846
static int standard_timing_level(struct edid *edid)
847
{
847
{
848
	if (edid->revision >= 2) {
848
	if (edid->revision >= 2) {
849
		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
849
		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
850
			return LEVEL_CVT;
850
			return LEVEL_CVT;
851
		return LEVEL_GTF;
851
		return LEVEL_GTF;
852
	}
852
	}
853
	return LEVEL_DMT;
853
	return LEVEL_DMT;
854
}
854
}
855
 
855
 
856
/**
856
/**
857
 * add_standard_modes - get std. modes from EDID and add them
857
 * add_standard_modes - get std. modes from EDID and add them
858
 * @edid: EDID block to scan
858
 * @edid: EDID block to scan
859
 *
859
 *
860
 * Standard modes can be calculated using the CVT standard.  Grab them from
860
 * Standard modes can be calculated using the CVT standard.  Grab them from
861
 * @edid, calculate them, and add them to the list.
861
 * @edid, calculate them, and add them to the list.
862
 */
862
 */
863
static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
863
static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
864
{
864
{
865
	struct drm_device *dev = connector->dev;
865
	struct drm_device *dev = connector->dev;
866
	int i, modes = 0;
866
	int i, modes = 0;
867
	int timing_level;
867
	int timing_level;
868
 
868
 
869
	timing_level = standard_timing_level(edid);
869
	timing_level = standard_timing_level(edid);
870
 
870
 
871
	for (i = 0; i < EDID_STD_TIMINGS; i++) {
871
	for (i = 0; i < EDID_STD_TIMINGS; i++) {
872
		struct std_timing *t = &edid->standard_timings[i];
872
		struct std_timing *t = &edid->standard_timings[i];
873
		struct drm_display_mode *newmode;
873
		struct drm_display_mode *newmode;
874
 
874
 
875
		/* If std timings bytes are 1, 1 it's empty */
875
		/* If std timings bytes are 1, 1 it's empty */
876
		if (t->hsize == 1 && t->vfreq_aspect == 1)
876
		if (t->hsize == 1 && t->vfreq_aspect == 1)
877
			continue;
877
			continue;
878
 
878
 
879
		newmode = drm_mode_std(dev, &edid->standard_timings[i],
879
		newmode = drm_mode_std(dev, &edid->standard_timings[i],
880
				       edid->revision, timing_level);
880
				       edid->revision, timing_level);
881
		if (newmode) {
881
		if (newmode) {
882
			drm_mode_probed_add(connector, newmode);
882
			drm_mode_probed_add(connector, newmode);
883
			modes++;
883
			modes++;
884
		}
884
		}
885
	}
885
	}
886
 
886
 
887
	return modes;
887
	return modes;
888
}
888
}
889
 
889
 
890
/*
890
/*
891
 * XXX fix this for:
891
 * XXX fix this for:
892
 * - GTF secondary curve formula
892
 * - GTF secondary curve formula
893
 * - EDID 1.4 range offsets
893
 * - EDID 1.4 range offsets
894
 * - CVT extended bits
894
 * - CVT extended bits
895
 */
895
 */
896
static bool
896
static bool
897
mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
897
mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
898
{
898
{
899
	struct detailed_data_monitor_range *range;
899
	struct detailed_data_monitor_range *range;
900
	int hsync, vrefresh;
900
	int hsync, vrefresh;
901
 
901
 
902
	range = &timing->data.other_data.data.range;
902
	range = &timing->data.other_data.data.range;
903
 
903
 
904
	hsync = drm_mode_hsync(mode);
904
	hsync = drm_mode_hsync(mode);
905
	vrefresh = drm_mode_vrefresh(mode);
905
	vrefresh = drm_mode_vrefresh(mode);
906
 
906
 
907
	if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
907
	if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
908
		return false;
908
		return false;
909
 
909
 
910
	if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
910
	if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
911
		return false;
911
		return false;
912
 
912
 
913
	if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
913
	if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
914
		/* be forgiving since it's in units of 10MHz */
914
		/* be forgiving since it's in units of 10MHz */
915
		int max_clock = range->pixel_clock_mhz * 10 + 9;
915
		int max_clock = range->pixel_clock_mhz * 10 + 9;
916
		max_clock *= 1000;
916
		max_clock *= 1000;
917
		if (mode->clock > max_clock)
917
		if (mode->clock > max_clock)
918
			return false;
918
			return false;
919
	}
919
	}
920
 
920
 
921
	return true;
921
	return true;
922
}
922
}
923
 
923
 
924
/*
924
/*
925
 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
925
 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
926
 * need to account for them.
926
 * need to account for them.
927
 */
927
 */
928
static int drm_gtf_modes_for_range(struct drm_connector *connector,
928
static int drm_gtf_modes_for_range(struct drm_connector *connector,
929
				   struct detailed_timing *timing)
929
				   struct detailed_timing *timing)
930
{
930
{
931
	int i, modes = 0;
931
	int i, modes = 0;
932
	struct drm_display_mode *newmode;
932
	struct drm_display_mode *newmode;
933
	struct drm_device *dev = connector->dev;
933
	struct drm_device *dev = connector->dev;
934
 
934
 
935
	for (i = 0; i < drm_num_dmt_modes; i++) {
935
	for (i = 0; i < drm_num_dmt_modes; i++) {
936
		if (mode_in_range(drm_dmt_modes + i, timing)) {
936
		if (mode_in_range(drm_dmt_modes + i, timing)) {
937
			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
937
			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
938
			if (newmode) {
938
			if (newmode) {
939
				drm_mode_probed_add(connector, newmode);
939
				drm_mode_probed_add(connector, newmode);
940
				modes++;
940
				modes++;
941
			}
941
			}
942
		}
942
		}
943
	}
943
	}
944
 
944
 
945
	return modes;
945
	return modes;
946
}
946
}
947
 
947
 
948
static int drm_cvt_modes(struct drm_connector *connector,
948
static int drm_cvt_modes(struct drm_connector *connector,
949
			 struct detailed_timing *timing)
949
			 struct detailed_timing *timing)
950
{
950
{
951
	int i, j, modes = 0;
951
	int i, j, modes = 0;
952
	struct drm_display_mode *newmode;
952
	struct drm_display_mode *newmode;
953
	struct drm_device *dev = connector->dev;
953
	struct drm_device *dev = connector->dev;
954
	struct cvt_timing *cvt;
954
	struct cvt_timing *cvt;
955
	const int rates[] = { 60, 85, 75, 60, 50 };
955
	const int rates[] = { 60, 85, 75, 60, 50 };
956
	const u8 empty[3] = { 0, 0, 0 };
956
	const u8 empty[3] = { 0, 0, 0 };
957
 
957
 
958
	for (i = 0; i < 4; i++) {
958
	for (i = 0; i < 4; i++) {
959
		int uninitialized_var(width), height;
959
		int uninitialized_var(width), height;
960
		cvt = &(timing->data.other_data.data.cvt[i]);
960
		cvt = &(timing->data.other_data.data.cvt[i]);
961
 
961
 
962
		if (!memcmp(cvt->code, empty, 3))
962
		if (!memcmp(cvt->code, empty, 3))
963
			continue;
963
			continue;
964
 
964
 
965
		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
965
		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
966
		switch (cvt->code[1] & 0x0c) {
966
		switch (cvt->code[1] & 0x0c) {
967
		case 0x00:
967
		case 0x00:
968
			width = height * 4 / 3;
968
			width = height * 4 / 3;
969
			break;
969
			break;
970
		case 0x04:
970
		case 0x04:
971
			width = height * 16 / 9;
971
			width = height * 16 / 9;
972
			break;
972
			break;
973
		case 0x08:
973
		case 0x08:
974
			width = height * 16 / 10;
974
			width = height * 16 / 10;
975
			break;
975
			break;
976
		case 0x0c:
976
		case 0x0c:
977
			width = height * 15 / 9;
977
			width = height * 15 / 9;
978
			break;
978
			break;
979
		}
979
		}
980
 
980
 
981
		for (j = 1; j < 5; j++) {
981
		for (j = 1; j < 5; j++) {
982
			if (cvt->code[2] & (1 << j)) {
982
			if (cvt->code[2] & (1 << j)) {
983
				newmode = drm_cvt_mode(dev, width, height,
983
				newmode = drm_cvt_mode(dev, width, height,
984
						       rates[j], j == 0,
984
						       rates[j], j == 0,
985
						       false, false);
985
						       false, false);
986
				if (newmode) {
986
				if (newmode) {
987
					drm_mode_probed_add(connector, newmode);
987
					drm_mode_probed_add(connector, newmode);
988
					modes++;
988
					modes++;
989
				}
989
				}
990
			}
990
			}
991
		}
991
		}
992
	}
992
	}
993
 
993
 
994
	return modes;
994
	return modes;
995
}
995
}
996
 
996
 
997
static int add_detailed_modes(struct drm_connector *connector,
997
static int add_detailed_modes(struct drm_connector *connector,
998
			      struct detailed_timing *timing,
998
			      struct detailed_timing *timing,
999
			      struct edid *edid, u32 quirks, int preferred)
999
			      struct edid *edid, u32 quirks, int preferred)
1000
{
1000
{
1001
	int i, modes = 0;
1001
	int i, modes = 0;
1002
		struct detailed_non_pixel *data = &timing->data.other_data;
1002
		struct detailed_non_pixel *data = &timing->data.other_data;
1003
	int timing_level = standard_timing_level(edid);
1003
	int timing_level = standard_timing_level(edid);
1004
	int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1004
	int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1005
		struct drm_display_mode *newmode;
1005
		struct drm_display_mode *newmode;
1006
	struct drm_device *dev = connector->dev;
1006
	struct drm_device *dev = connector->dev;
1007
 
1007
 
1008
	if (timing->pixel_clock) {
1008
	if (timing->pixel_clock) {
1009
		newmode = drm_mode_detailed(dev, edid, timing, quirks);
1009
		newmode = drm_mode_detailed(dev, edid, timing, quirks);
1010
		if (!newmode)
1010
		if (!newmode)
1011
			return 0;
1011
			return 0;
1012
 
1012
 
1013
		if (preferred)
1013
		if (preferred)
1014
			newmode->type |= DRM_MODE_TYPE_PREFERRED;
1014
			newmode->type |= DRM_MODE_TYPE_PREFERRED;
1015
 
1015
 
1016
		drm_mode_probed_add(connector, newmode);
1016
		drm_mode_probed_add(connector, newmode);
1017
		return 1;
1017
		return 1;
1018
	}
1018
	}
1019
 
1019
 
1020
	/* other timing types */
1020
	/* other timing types */
1021
		switch (data->type) {
1021
		switch (data->type) {
1022
		case EDID_DETAIL_MONITOR_RANGE:
1022
		case EDID_DETAIL_MONITOR_RANGE:
1023
		if (gtf)
1023
		if (gtf)
1024
			modes += drm_gtf_modes_for_range(connector, timing);
1024
			modes += drm_gtf_modes_for_range(connector, timing);
1025
			break;
1025
			break;
1026
		case EDID_DETAIL_STD_MODES:
1026
		case EDID_DETAIL_STD_MODES:
1027
		/* Six modes per detailed section */
1027
		/* Six modes per detailed section */
1028
		for (i = 0; i < 6; i++) {
1028
		for (i = 0; i < 6; i++) {
1029
				struct std_timing *std;
1029
				struct std_timing *std;
1030
				struct drm_display_mode *newmode;
1030
				struct drm_display_mode *newmode;
1031
 
1031
 
1032
			std = &data->data.timings[i];
1032
			std = &data->data.timings[i];
1033
			newmode = drm_mode_std(dev, std, edid->revision,
1033
			newmode = drm_mode_std(dev, std, edid->revision,
1034
							       timing_level);
1034
							       timing_level);
1035
				if (newmode) {
1035
				if (newmode) {
1036
					drm_mode_probed_add(connector, newmode);
1036
					drm_mode_probed_add(connector, newmode);
1037
					modes++;
1037
					modes++;
1038
				}
1038
				}
1039
			}
1039
			}
1040
			break;
1040
			break;
1041
	case EDID_DETAIL_CVT_3BYTE:
1041
	case EDID_DETAIL_CVT_3BYTE:
1042
		modes += drm_cvt_modes(connector, timing);
1042
		modes += drm_cvt_modes(connector, timing);
1043
		break;
1043
		break;
1044
		default:
1044
		default:
1045
			break;
1045
			break;
1046
		}
1046
		}
1047
 
1047
 
1048
	return modes;
1048
	return modes;
1049
}
1049
}
1050
 
1050
 
1051
/**
1051
/**
1052
 * add_detailed_info - get detailed mode info from EDID data
1052
 * add_detailed_info - get detailed mode info from EDID data
1053
 * @connector: attached connector
1053
 * @connector: attached connector
1054
 * @edid: EDID block to scan
1054
 * @edid: EDID block to scan
1055
 * @quirks: quirks to apply
1055
 * @quirks: quirks to apply
1056
 *
1056
 *
1057
 * Some of the detailed timing sections may contain mode information.  Grab
1057
 * Some of the detailed timing sections may contain mode information.  Grab
1058
 * it and add it to the list.
1058
 * it and add it to the list.
1059
 */
1059
 */
1060
static int add_detailed_info(struct drm_connector *connector,
1060
static int add_detailed_info(struct drm_connector *connector,
1061
			     struct edid *edid, u32 quirks)
1061
			     struct edid *edid, u32 quirks)
1062
{
1062
{
1063
	int i, modes = 0;
1063
	int i, modes = 0;
1064
 
1064
 
1065
	for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1065
	for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1066
		struct detailed_timing *timing = &edid->detailed_timings[i];
1066
		struct detailed_timing *timing = &edid->detailed_timings[i];
1067
		int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1067
		int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1068
 
1068
 
1069
		/* In 1.0, only timings are allowed */
1069
		/* In 1.0, only timings are allowed */
1070
		if (!timing->pixel_clock && edid->version == 1 &&
1070
		if (!timing->pixel_clock && edid->version == 1 &&
1071
			edid->revision == 0)
1071
			edid->revision == 0)
1072
				continue;
1072
				continue;
1073
 
1073
 
1074
		modes += add_detailed_modes(connector, timing, edid, quirks,
1074
		modes += add_detailed_modes(connector, timing, edid, quirks,
1075
					    preferred);
1075
					    preferred);
1076
		}
1076
		}
1077
 
1077
 
1078
	return modes;
1078
	return modes;
1079
}
1079
}
1080
 
1080
 
1081
/**
1081
/**
1082
 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1082
 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1083
 * 			EDID block
1083
 * 			EDID block
1084
 * @connector: attached connector
1084
 * @connector: attached connector
1085
 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1085
 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1086
 * @quirks: quirks to apply
1086
 * @quirks: quirks to apply
1087
 *
1087
 *
1088
 * Some of the detailed timing sections may contain mode information.  Grab
1088
 * Some of the detailed timing sections may contain mode information.  Grab
1089
 * it and add it to the list.
1089
 * it and add it to the list.
1090
 */
1090
 */
1091
static int add_detailed_info_eedid(struct drm_connector *connector,
1091
static int add_detailed_info_eedid(struct drm_connector *connector,
1092
			     struct edid *edid, u32 quirks)
1092
			     struct edid *edid, u32 quirks)
1093
{
1093
{
1094
	int i, modes = 0;
1094
	int i, modes = 0;
1095
	char *edid_ext = NULL;
1095
	char *edid_ext = NULL;
1096
	struct detailed_timing *timing;
1096
	struct detailed_timing *timing;
1097
	int edid_ext_num;
1097
	int edid_ext_num;
1098
	int start_offset, end_offset;
1098
	int start_offset, end_offset;
1099
	int timing_level;
1099
	int timing_level;
1100
 
1100
 
1101
	if (edid->version == 1 && edid->revision < 3) {
1101
	if (edid->version == 1 && edid->revision < 3) {
1102
		/* If the EDID version is less than 1.3, there is no
1102
		/* If the EDID version is less than 1.3, there is no
1103
		 * extension EDID.
1103
		 * extension EDID.
1104
		 */
1104
		 */
1105
		return 0;
1105
		return 0;
1106
	}
1106
	}
1107
	if (!edid->extensions) {
1107
	if (!edid->extensions) {
1108
		/* if there is no extension EDID, it is unnecessary to
1108
		/* if there is no extension EDID, it is unnecessary to
1109
		 * parse the E-EDID to get detailed info
1109
		 * parse the E-EDID to get detailed info
1110
		 */
1110
		 */
1111
		return 0;
1111
		return 0;
1112
	}
1112
	}
1113
 
1113
 
1114
	/* Chose real EDID extension number */
1114
	/* Chose real EDID extension number */
1115
	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
1115
	edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1116
		       MAX_EDID_EXT_NUM : edid->extensions;
1116
		DRM_MAX_EDID_EXT_NUM : edid->extensions;
1117
 
1117
 
1118
	/* Find CEA extension */
1118
	/* Find CEA extension */
1119
	for (i = 0; i < edid_ext_num; i++) {
1119
	for (i = 0; i < edid_ext_num; i++) {
1120
		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1120
		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1121
		/* This block is CEA extension */
1121
		/* This block is CEA extension */
1122
		if (edid_ext[0] == 0x02)
1122
		if (edid_ext[0] == 0x02)
1123
			break;
1123
			break;
1124
	}
1124
	}
1125
 
1125
 
1126
	if (i == edid_ext_num) {
1126
	if (i == edid_ext_num) {
1127
		/* if there is no additional timing EDID block, return */
1127
		/* if there is no additional timing EDID block, return */
1128
		return 0;
1128
		return 0;
1129
	}
1129
	}
1130
 
1130
 
1131
	/* Get the start offset of detailed timing block */
1131
	/* Get the start offset of detailed timing block */
1132
	start_offset = edid_ext[2];
1132
	start_offset = edid_ext[2];
1133
	if (start_offset == 0) {
1133
	if (start_offset == 0) {
1134
		/* If the start_offset is zero, it means that neither detailed
1134
		/* If the start_offset is zero, it means that neither detailed
1135
		 * info nor data block exist. In such case it is also
1135
		 * info nor data block exist. In such case it is also
1136
		 * unnecessary to parse the detailed timing info.
1136
		 * unnecessary to parse the detailed timing info.
1137
		 */
1137
		 */
1138
		return 0;
1138
		return 0;
1139
	}
1139
	}
1140
 
1140
 
1141
	timing_level = standard_timing_level(edid);
1141
	timing_level = standard_timing_level(edid);
1142
	end_offset = EDID_LENGTH;
1142
	end_offset = EDID_LENGTH;
1143
	end_offset -= sizeof(struct detailed_timing);
1143
	end_offset -= sizeof(struct detailed_timing);
1144
	for (i = start_offset; i < end_offset;
1144
	for (i = start_offset; i < end_offset;
1145
			i += sizeof(struct detailed_timing)) {
1145
			i += sizeof(struct detailed_timing)) {
1146
		timing = (struct detailed_timing *)(edid_ext + i);
1146
		timing = (struct detailed_timing *)(edid_ext + i);
1147
		modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1147
		modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1148
	}
1148
	}
1149
 
1149
 
1150
	return modes;
1150
	return modes;
1151
}
1151
}
1152
 
1152
 
1153
#define DDC_ADDR 0x50
1153
#define DDC_ADDR 0x50
1154
/**
1154
/**
1155
 * Get EDID information via I2C.
1155
 * Get EDID information via I2C.
1156
 *
1156
 *
1157
 * \param adapter : i2c device adaptor
1157
 * \param adapter : i2c device adaptor
1158
 * \param buf     : EDID data buffer to be filled
1158
 * \param buf     : EDID data buffer to be filled
1159
 * \param len     : EDID data buffer length
1159
 * \param len     : EDID data buffer length
1160
 * \return 0 on success or -1 on failure.
1160
 * \return 0 on success or -1 on failure.
1161
 *
1161
 *
1162
 * Try to fetch EDID information by calling i2c driver function.
1162
 * Try to fetch EDID information by calling i2c driver function.
1163
 */
1163
 */
1164
int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
1164
int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
1165
			  unsigned char *buf, int len)
1165
			  unsigned char *buf, int len)
1166
{
1166
{
1167
	unsigned char start = 0x0;
1167
	unsigned char start = 0x0;
1168
	struct i2c_msg msgs[] = {
1168
	struct i2c_msg msgs[] = {
1169
		{
1169
		{
1170
			.addr	= DDC_ADDR,
1170
			.addr	= DDC_ADDR,
1171
			.flags	= 0,
1171
			.flags	= 0,
1172
			.len	= 1,
1172
			.len	= 1,
1173
			.buf	= &start,
1173
			.buf	= &start,
1174
		}, {
1174
		}, {
1175
			.addr	= DDC_ADDR,
1175
			.addr	= DDC_ADDR,
1176
			.flags	= I2C_M_RD,
1176
			.flags	= I2C_M_RD,
1177
			.len	= len,
1177
			.len	= len,
1178
			.buf	= buf,
1178
			.buf	= buf,
1179
		}
1179
		}
1180
	};
1180
	};
1181
 
1181
 
1182
	if (i2c_transfer(adapter, msgs, 2) == 2)
1182
	if (i2c_transfer(adapter, msgs, 2) == 2)
1183
		return 0;
1183
		return 0;
1184
 
1184
 
1185
	return -1;
1185
	return -1;
1186
}
1186
}
1187
EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1187
EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1188
 
1188
 
1189
static int drm_ddc_read_edid(struct drm_connector *connector,
1189
static int drm_ddc_read_edid(struct drm_connector *connector,
1190
			     struct i2c_adapter *adapter,
1190
			     struct i2c_adapter *adapter,
1191
			     char *buf, int len)
1191
			     char *buf, int len)
1192
{
1192
{
1193
	int i;
1193
	int i;
1194
 
1194
 
1195
	for (i = 0; i < 4; i++) {
1195
	for (i = 0; i < 4; i++) {
1196
		if (drm_do_probe_ddc_edid(adapter, buf, len))
1196
		if (drm_do_probe_ddc_edid(adapter, buf, len))
1197
			return -1;
1197
			return -1;
1198
		if (edid_is_valid((struct edid *)buf))
1198
		if (drm_edid_is_valid((struct edid *)buf))
1199
			return 0;
1199
			return 0;
1200
	}
1200
	}
1201
 
1201
 
1202
	/* repeated checksum failures; warn, but carry on */
1202
	/* repeated checksum failures; warn, but carry on */
1203
		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1203
		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1204
			 drm_get_connector_name(connector));
1204
			 drm_get_connector_name(connector));
1205
	return -1;
1205
	return -1;
1206
}
1206
}
1207
 
1207
 
1208
/**
1208
/**
1209
 * drm_get_edid - get EDID data, if available
1209
 * drm_get_edid - get EDID data, if available
1210
 * @connector: connector we're probing
1210
 * @connector: connector we're probing
1211
 * @adapter: i2c adapter to use for DDC
1211
 * @adapter: i2c adapter to use for DDC
1212
 *
1212
 *
1213
 * Poke the given connector's i2c channel to grab EDID data if possible.
1213
 * Poke the given connector's i2c channel to grab EDID data if possible.
1214
 *
1214
 *
1215
 * Return edid data or NULL if we couldn't find any.
1215
 * Return edid data or NULL if we couldn't find any.
1216
 */
1216
 */
1217
struct edid *drm_get_edid(struct drm_connector *connector,
1217
struct edid *drm_get_edid(struct drm_connector *connector,
1218
			  struct i2c_adapter *adapter)
1218
			  struct i2c_adapter *adapter)
1219
{
1219
{
1220
	int ret;
1220
	int ret;
1221
	struct edid *edid;
1221
	struct edid *edid;
1222
 
1222
 
1223
	edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
1223
	edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),
1224
		       GFP_KERNEL);
1224
		       GFP_KERNEL);
1225
	if (edid == NULL) {
1225
	if (edid == NULL) {
1226
		dev_warn(&connector->dev->pdev->dev,
1226
		dev_warn(&connector->dev->pdev->dev,
1227
			 "Failed to allocate EDID\n");
1227
			 "Failed to allocate EDID\n");
1228
		goto end;
1228
		goto end;
1229
	}
1229
	}
1230
 
1230
 
1231
	/* Read first EDID block */
1231
	/* Read first EDID block */
1232
	ret = drm_ddc_read_edid(connector, adapter,
1232
	ret = drm_ddc_read_edid(connector, adapter,
1233
				(unsigned char *)edid, EDID_LENGTH);
1233
				(unsigned char *)edid, EDID_LENGTH);
1234
	if (ret != 0)
1234
	if (ret != 0)
1235
		goto clean_up;
1235
		goto clean_up;
1236
 
1236
 
1237
	/* There are EDID extensions to be read */
1237
	/* There are EDID extensions to be read */
1238
	if (edid->extensions != 0) {
1238
	if (edid->extensions != 0) {
1239
		int edid_ext_num = edid->extensions;
1239
		int edid_ext_num = edid->extensions;
1240
 
1240
 
1241
		if (edid_ext_num > MAX_EDID_EXT_NUM) {
1241
		if (edid_ext_num > DRM_MAX_EDID_EXT_NUM) {
1242
			dev_warn(&connector->dev->pdev->dev,
1242
			dev_warn(&connector->dev->pdev->dev,
1243
				 "The number of extension(%d) is "
1243
				 "The number of extension(%d) is "
1244
				 "over max (%d), actually read number (%d)\n",
1244
				 "over max (%d), actually read number (%d)\n",
1245
				 edid_ext_num, MAX_EDID_EXT_NUM,
1245
				 edid_ext_num, DRM_MAX_EDID_EXT_NUM,
1246
				 MAX_EDID_EXT_NUM);
1246
				 DRM_MAX_EDID_EXT_NUM);
1247
			/* Reset EDID extension number to be read */
1247
			/* Reset EDID extension number to be read */
1248
			edid_ext_num = MAX_EDID_EXT_NUM;
1248
			edid_ext_num = DRM_MAX_EDID_EXT_NUM;
1249
		}
1249
		}
1250
		/* Read EDID including extensions too */
1250
		/* Read EDID including extensions too */
1251
		ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1251
		ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1252
					EDID_LENGTH * (edid_ext_num + 1));
1252
					EDID_LENGTH * (edid_ext_num + 1));
1253
		if (ret != 0)
1253
		if (ret != 0)
1254
			goto clean_up;
1254
			goto clean_up;
1255
 
1255
 
1256
	}
1256
	}
1257
 
1257
 
1258
	connector->display_info.raw_edid = (char *)edid;
1258
	connector->display_info.raw_edid = (char *)edid;
1259
	goto end;
1259
	goto end;
1260
 
1260
 
1261
clean_up:
1261
clean_up:
1262
	kfree(edid);
1262
	kfree(edid);
1263
	edid = NULL;
1263
	edid = NULL;
1264
end:
1264
end:
1265
	return edid;
1265
	return edid;
1266
 
1266
 
1267
}
1267
}
1268
EXPORT_SYMBOL(drm_get_edid);
1268
EXPORT_SYMBOL(drm_get_edid);
1269
 
1269
 
1270
#define HDMI_IDENTIFIER 0x000C03
1270
#define HDMI_IDENTIFIER 0x000C03
1271
#define VENDOR_BLOCK    0x03
1271
#define VENDOR_BLOCK    0x03
1272
/**
1272
/**
1273
 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1273
 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1274
 * @edid: monitor EDID information
1274
 * @edid: monitor EDID information
1275
 *
1275
 *
1276
 * Parse the CEA extension according to CEA-861-B.
1276
 * Parse the CEA extension according to CEA-861-B.
1277
 * Return true if HDMI, false if not or unknown.
1277
 * Return true if HDMI, false if not or unknown.
1278
 */
1278
 */
1279
bool drm_detect_hdmi_monitor(struct edid *edid)
1279
bool drm_detect_hdmi_monitor(struct edid *edid)
1280
{
1280
{
1281
	char *edid_ext = NULL;
1281
	char *edid_ext = NULL;
1282
	int i, hdmi_id, edid_ext_num;
1282
	int i, hdmi_id, edid_ext_num;
1283
	int start_offset, end_offset;
1283
	int start_offset, end_offset;
1284
	bool is_hdmi = false;
1284
	bool is_hdmi = false;
1285
 
1285
 
1286
	/* No EDID or EDID extensions */
1286
	/* No EDID or EDID extensions */
1287
	if (edid == NULL || edid->extensions == 0)
1287
	if (edid == NULL || edid->extensions == 0)
1288
		goto end;
1288
		goto end;
1289
 
1289
 
1290
	/* Chose real EDID extension number */
1290
	/* Chose real EDID extension number */
1291
	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
1291
	edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1292
		       MAX_EDID_EXT_NUM : edid->extensions;
1292
		       DRM_MAX_EDID_EXT_NUM : edid->extensions;
1293
 
1293
 
1294
	/* Find CEA extension */
1294
	/* Find CEA extension */
1295
	for (i = 0; i < edid_ext_num; i++) {
1295
	for (i = 0; i < edid_ext_num; i++) {
1296
		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1296
		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1297
		/* This block is CEA extension */
1297
		/* This block is CEA extension */
1298
		if (edid_ext[0] == 0x02)
1298
		if (edid_ext[0] == 0x02)
1299
			break;
1299
			break;
1300
	}
1300
	}
1301
 
1301
 
1302
	if (i == edid_ext_num)
1302
	if (i == edid_ext_num)
1303
		goto end;
1303
		goto end;
1304
 
1304
 
1305
	/* Data block offset in CEA extension block */
1305
	/* Data block offset in CEA extension block */
1306
	start_offset = 4;
1306
	start_offset = 4;
1307
	end_offset = edid_ext[2];
1307
	end_offset = edid_ext[2];
1308
 
1308
 
1309
	/*
1309
	/*
1310
	 * Because HDMI identifier is in Vendor Specific Block,
1310
	 * Because HDMI identifier is in Vendor Specific Block,
1311
	 * search it from all data blocks of CEA extension.
1311
	 * search it from all data blocks of CEA extension.
1312
	 */
1312
	 */
1313
	for (i = start_offset; i < end_offset;
1313
	for (i = start_offset; i < end_offset;
1314
		/* Increased by data block len */
1314
		/* Increased by data block len */
1315
		i += ((edid_ext[i] & 0x1f) + 1)) {
1315
		i += ((edid_ext[i] & 0x1f) + 1)) {
1316
		/* Find vendor specific block */
1316
		/* Find vendor specific block */
1317
		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1317
		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1318
			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1318
			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1319
				  edid_ext[i + 3] << 16;
1319
				  edid_ext[i + 3] << 16;
1320
			/* Find HDMI identifier */
1320
			/* Find HDMI identifier */
1321
			if (hdmi_id == HDMI_IDENTIFIER)
1321
			if (hdmi_id == HDMI_IDENTIFIER)
1322
				is_hdmi = true;
1322
				is_hdmi = true;
1323
			break;
1323
			break;
1324
		}
1324
		}
1325
	}
1325
	}
1326
 
1326
 
1327
end:
1327
end:
1328
	return is_hdmi;
1328
	return is_hdmi;
1329
}
1329
}
1330
EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1330
EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1331
 
1331
 
1332
/**
1332
/**
1333
 * drm_add_edid_modes - add modes from EDID data, if available
1333
 * drm_add_edid_modes - add modes from EDID data, if available
1334
 * @connector: connector we're probing
1334
 * @connector: connector we're probing
1335
 * @edid: edid data
1335
 * @edid: edid data
1336
 *
1336
 *
1337
 * Add the specified modes to the connector's mode list.
1337
 * Add the specified modes to the connector's mode list.
1338
 *
1338
 *
1339
 * Return number of modes added or 0 if we couldn't find any.
1339
 * Return number of modes added or 0 if we couldn't find any.
1340
 */
1340
 */
1341
int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1341
int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1342
{
1342
{
1343
	int num_modes = 0;
1343
	int num_modes = 0;
1344
	u32 quirks;
1344
	u32 quirks;
1345
 
1345
 
1346
	if (edid == NULL) {
1346
	if (edid == NULL) {
1347
		return 0;
1347
		return 0;
1348
	}
1348
	}
1349
	if (!edid_is_valid(edid)) {
1349
	if (!drm_edid_is_valid(edid)) {
1350
		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1350
		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1351
			 drm_get_connector_name(connector));
1351
			 drm_get_connector_name(connector));
1352
		return 0;
1352
		return 0;
1353
	}
1353
	}
1354
 
1354
 
1355
	quirks = edid_get_quirks(edid);
1355
	quirks = edid_get_quirks(edid);
1356
 
1356
 
1357
	num_modes += add_established_modes(connector, edid);
1357
	num_modes += add_established_modes(connector, edid);
1358
	num_modes += add_standard_modes(connector, edid);
1358
	num_modes += add_standard_modes(connector, edid);
1359
	num_modes += add_detailed_info(connector, edid, quirks);
1359
	num_modes += add_detailed_info(connector, edid, quirks);
1360
	num_modes += add_detailed_info_eedid(connector, edid, quirks);
1360
	num_modes += add_detailed_info_eedid(connector, edid, quirks);
1361
 
1361
 
1362
	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1362
	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1363
		edid_fixup_preferred(connector, quirks);
1363
		edid_fixup_preferred(connector, quirks);
1364
 
1364
 
1365
	connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1365
	connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1366
	connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1366
	connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1367
	connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1367
	connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1368
	connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1368
	connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1369
	connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1369
	connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1370
	connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1370
	connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1371
	connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1371
	connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1372
	connector->display_info.width_mm = edid->width_cm * 10;
1372
	connector->display_info.width_mm = edid->width_cm * 10;
1373
	connector->display_info.height_mm = edid->height_cm * 10;
1373
	connector->display_info.height_mm = edid->height_cm * 10;
1374
	connector->display_info.gamma = edid->gamma;
1374
	connector->display_info.gamma = edid->gamma;
1375
	connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1375
	connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1376
	connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1376
	connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1377
	connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1377
	connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1378
	connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1378
	connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1379
	connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1379
	connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1380
	connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1380
	connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1381
	connector->display_info.gamma = edid->gamma;
1381
	connector->display_info.gamma = edid->gamma;
1382
 
1382
 
1383
	return num_modes;
1383
	return num_modes;
1384
}
1384
}
1385
EXPORT_SYMBOL(drm_add_edid_modes);
1385
EXPORT_SYMBOL(drm_add_edid_modes);
1386
 
1386
 
1387
/**
1387
/**
1388
 * drm_add_modes_noedid - add modes for the connectors without EDID
1388
 * drm_add_modes_noedid - add modes for the connectors without EDID
1389
 * @connector: connector we're probing
1389
 * @connector: connector we're probing
1390
 * @hdisplay: the horizontal display limit
1390
 * @hdisplay: the horizontal display limit
1391
 * @vdisplay: the vertical display limit
1391
 * @vdisplay: the vertical display limit
1392
 *
1392
 *
1393
 * Add the specified modes to the connector's mode list. Only when the
1393
 * Add the specified modes to the connector's mode list. Only when the
1394
 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1394
 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1395
 *
1395
 *
1396
 * Return number of modes added or 0 if we couldn't find any.
1396
 * Return number of modes added or 0 if we couldn't find any.
1397
 */
1397
 */
1398
int drm_add_modes_noedid(struct drm_connector *connector,
1398
int drm_add_modes_noedid(struct drm_connector *connector,
1399
			int hdisplay, int vdisplay)
1399
			int hdisplay, int vdisplay)
1400
{
1400
{
1401
	int i, count, num_modes = 0;
1401
	int i, count, num_modes = 0;
1402
	struct drm_display_mode *mode, *ptr;
1402
	struct drm_display_mode *mode, *ptr;
1403
	struct drm_device *dev = connector->dev;
1403
	struct drm_device *dev = connector->dev;
1404
 
1404
 
1405
	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1405
	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1406
	if (hdisplay < 0)
1406
	if (hdisplay < 0)
1407
		hdisplay = 0;
1407
		hdisplay = 0;
1408
	if (vdisplay < 0)
1408
	if (vdisplay < 0)
1409
		vdisplay = 0;
1409
		vdisplay = 0;
1410
 
1410
 
1411
	for (i = 0; i < count; i++) {
1411
	for (i = 0; i < count; i++) {
1412
		ptr = &drm_dmt_modes[i];
1412
		ptr = &drm_dmt_modes[i];
1413
		if (hdisplay && vdisplay) {
1413
		if (hdisplay && vdisplay) {
1414
			/*
1414
			/*
1415
			 * Only when two are valid, they will be used to check
1415
			 * Only when two are valid, they will be used to check
1416
			 * whether the mode should be added to the mode list of
1416
			 * whether the mode should be added to the mode list of
1417
			 * the connector.
1417
			 * the connector.
1418
			 */
1418
			 */
1419
			if (ptr->hdisplay > hdisplay ||
1419
			if (ptr->hdisplay > hdisplay ||
1420
					ptr->vdisplay > vdisplay)
1420
					ptr->vdisplay > vdisplay)
1421
				continue;
1421
				continue;
1422
		}
1422
		}
1423
		if (drm_mode_vrefresh(ptr) > 61)
1423
		if (drm_mode_vrefresh(ptr) > 61)
1424
			continue;
1424
			continue;
1425
		mode = drm_mode_duplicate(dev, ptr);
1425
		mode = drm_mode_duplicate(dev, ptr);
1426
		if (mode) {
1426
		if (mode) {
1427
			drm_mode_probed_add(connector, mode);
1427
			drm_mode_probed_add(connector, mode);
1428
			num_modes++;
1428
			num_modes++;
1429
		}
1429
		}
1430
	}
1430
	}
1431
	return num_modes;
1431
	return num_modes;
1432
}
1432
}
1433
EXPORT_SYMBOL(drm_add_modes_noedid);
1433
EXPORT_SYMBOL(drm_add_modes_noedid);
1434
>
1434
>