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1 | #ifndef _DMA_REMAPPING_H |
1 | #ifndef _DMA_REMAPPING_H |
2 | #define _DMA_REMAPPING_H |
2 | #define _DMA_REMAPPING_H |
3 | 3 | ||
4 | /* |
4 | /* |
5 | * VT-d hardware uses 4KiB page size regardless of host page size. |
5 | * VT-d hardware uses 4KiB page size regardless of host page size. |
6 | */ |
6 | */ |
7 | #define VTD_PAGE_SHIFT (12) |
7 | #define VTD_PAGE_SHIFT (12) |
8 | #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT) |
8 | #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT) |
9 | #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) |
9 | #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) |
10 | #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) |
10 | #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) |
11 | 11 | ||
12 | #define VTD_STRIDE_SHIFT (9) |
12 | #define VTD_STRIDE_SHIFT (9) |
13 | #define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT) |
13 | #define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT) |
14 | 14 | ||
15 | #define DMA_PTE_READ (1) |
15 | #define DMA_PTE_READ (1) |
16 | #define DMA_PTE_WRITE (2) |
16 | #define DMA_PTE_WRITE (2) |
17 | #define DMA_PTE_LARGE_PAGE (1 << 7) |
17 | #define DMA_PTE_LARGE_PAGE (1 << 7) |
18 | #define DMA_PTE_SNP (1 << 11) |
18 | #define DMA_PTE_SNP (1 << 11) |
19 | 19 | ||
20 | #define CONTEXT_TT_MULTI_LEVEL 0 |
20 | #define CONTEXT_TT_MULTI_LEVEL 0 |
21 | #define CONTEXT_TT_DEV_IOTLB 1 |
21 | #define CONTEXT_TT_DEV_IOTLB 1 |
22 | #define CONTEXT_TT_PASS_THROUGH 2 |
22 | #define CONTEXT_TT_PASS_THROUGH 2 |
- | 23 | /* Extended context entry types */ |
|
- | 24 | #define CONTEXT_TT_PT_PASID 4 |
|
- | 25 | #define CONTEXT_TT_PT_PASID_DEV_IOTLB 5 |
|
- | 26 | #define CONTEXT_TT_MASK (7ULL << 2) |
|
- | 27 | ||
- | 28 | #define CONTEXT_DINVE (1ULL << 8) |
|
- | 29 | #define CONTEXT_PRS (1ULL << 9) |
|
- | 30 | #define CONTEXT_PASIDE (1ULL << 11) |
|
23 | 31 | ||
24 | struct intel_iommu; |
32 | struct intel_iommu; |
25 | struct dmar_domain; |
33 | struct dmar_domain; |
26 | struct root_entry; |
34 | struct root_entry; |
27 | 35 | ||
28 | 36 | ||
29 | #ifdef CONFIG_INTEL_IOMMU |
37 | #ifdef CONFIG_INTEL_IOMMU |
30 | extern int iommu_calculate_agaw(struct intel_iommu *iommu); |
38 | extern int iommu_calculate_agaw(struct intel_iommu *iommu); |
31 | extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu); |
39 | extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu); |
32 | extern int dmar_disabled; |
40 | extern int dmar_disabled; |
33 | extern int intel_iommu_enabled; |
41 | extern int intel_iommu_enabled; |
34 | #else |
42 | #else |
35 | static inline int iommu_calculate_agaw(struct intel_iommu *iommu) |
43 | static inline int iommu_calculate_agaw(struct intel_iommu *iommu) |
36 | { |
44 | { |
37 | return 0; |
45 | return 0; |
38 | } |
46 | } |
39 | static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) |
47 | static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) |
40 | { |
48 | { |
41 | return 0; |
49 | return 0; |
42 | } |
50 | } |
43 | #define dmar_disabled (1) |
51 | #define dmar_disabled (1) |
44 | #define intel_iommu_enabled (0) |
52 | #define intel_iommu_enabled (0) |
45 | #endif |
53 | #endif |
46 | 54 | ||
47 | 55 | ||
48 | #endif><>><>><>><>><> |
56 | #endif><>><>><>><>><>><>><>><>><> |