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| Rev 3192 | Rev 3243 | ||
|---|---|---|---|
| Line 17... | Line 17... | ||
| 17 | unsigned int needs_dmar : 1; |
17 | unsigned int needs_dmar : 1; |
| 18 | /* Whether we idle the gpu before mapping/unmapping */ |
18 | /* Whether we idle the gpu before mapping/unmapping */ |
| 19 | unsigned int do_idle_maps : 1; |
19 | unsigned int do_idle_maps : 1; |
| 20 | /* Share the scratch page dma with ppgtts. */ |
20 | /* Share the scratch page dma with ppgtts. */ |
| 21 | dma_addr_t scratch_page_dma; |
21 | dma_addr_t scratch_page_dma; |
| - | 22 | struct page *scratch_page; |
|
| 22 | /* for ppgtt PDE access */ |
23 | /* for ppgtt PDE access */ |
| 23 | u32 __iomem *gtt; |
24 | u32 __iomem *gtt; |
| 24 | /* needed for ioremap in drm/i915 */ |
25 | /* needed for ioremap in drm/i915 */ |
| 25 | phys_addr_t gma_bus_addr; |
26 | phys_addr_t gma_bus_addr; |
| 26 | } *intel_gtt_get(void); |
27 | } *intel_gtt_get(void); |
| Line 30... | Line 31... | ||
| 30 | void intel_gmch_remove(void); |
31 | void intel_gmch_remove(void); |
| Line 31... | Line 32... | ||
| 31 | 32 | ||
| Line 32... | Line 33... | ||
| 32 | bool intel_enable_gtt(void); |
33 | bool intel_enable_gtt(void); |
| 33 | 34 | ||
| - | 35 | void intel_gtt_chipset_flush(void); |
|
| 34 | void intel_gtt_chipset_flush(void); |
36 | void intel_gtt_insert_sg_entries(struct sg_table *st, |
| 35 | void intel_gtt_insert_sg_entries(struct pagelist *st, unsigned int pg_start, |
37 | unsigned int pg_start, |
| Line 36... | Line 38... | ||
| 36 | unsigned int flags); |
38 | unsigned int flags); |
| 37 | void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); |
39 | void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); |