WebSVN – Kolibri OS – Diff – /drivers/include/drm/drm_mode.h


/*
 * Copyright (c) 2007 Dave Airlie 
 * Copyright (c) 2007 Jakob Bornecrantz 
 * Copyright (c) 2008 Red Hat Inc.
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
 * Copyright (c) 2007-2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */
 
#ifndef _DRM_MODE_H
#define _DRM_MODE_H
 
#include 
 
#define DRM_DISPLAY_INFO_LEN	32
#define DRM_CONNECTOR_NAME_LEN	32
#define DRM_DISPLAY_MODE_LEN	32
#define DRM_PROP_NAME_LEN	32
 
#define DRM_MODE_TYPE_BUILTIN	(1<<0)
#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_PREFERRED	(1<<3)
#define DRM_MODE_TYPE_DEFAULT	(1<<4)
#define DRM_MODE_TYPE_USERDEF	(1<<5)
#define DRM_MODE_TYPE_DRIVER	(1<<6)
 
/* Video mode flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_FLAG_PHSYNC	(1<<0)
#define DRM_MODE_FLAG_NHSYNC	(1<<1)
#define DRM_MODE_FLAG_PVSYNC	(1<<2)
#define DRM_MODE_FLAG_NVSYNC	(1<<3)
#define DRM_MODE_FLAG_INTERLACE	(1<<4)
#define DRM_MODE_FLAG_DBLSCAN	(1<<5)
#define DRM_MODE_FLAG_CSYNC	(1<<6)
#define DRM_MODE_FLAG_PCSYNC	(1<<7)
#define DRM_MODE_FLAG_NCSYNC	(1<<8)
#define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST	(1<<10)
#define DRM_MODE_FLAG_PIXMUX	(1<<11)
#define DRM_MODE_FLAG_DBLCLK	(1<<12)
#define DRM_MODE_FLAG_CLKDIV2	(1<<13)
 /*
  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  * (define not exposed to user space).
  */
#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
 
 
/* DPMS flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_DPMS_ON	0
#define DRM_MODE_DPMS_STANDBY	1
#define DRM_MODE_DPMS_SUSPEND	2
#define DRM_MODE_DPMS_OFF	3
 
/* Scaling mode options */
#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
					     software can still scale) */
#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
 
/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF	0
#define DRM_MODE_DITHERING_ON	1
#define DRM_MODE_DITHERING_AUTO 2
 
/* Dirty info options */
#define DRM_MODE_DIRTY_OFF      0
#define DRM_MODE_DIRTY_ON       1
#define DRM_MODE_DIRTY_ANNOTATE 2
 
struct drm_mode_modeinfo {
	__u32 clock;
	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
 
	__u32 vrefresh;
 
	__u32 flags;
	__u32 type;
	char name[DRM_DISPLAY_MODE_LEN];
};
 
struct drm_mode_card_res {
	__u64 fb_id_ptr;
	__u64 crtc_id_ptr;
	__u64 connector_id_ptr;
	__u64 encoder_id_ptr;
	__u32 count_fbs;
	__u32 count_crtcs;
	__u32 count_connectors;
	__u32 count_encoders;
	__u32 min_width, max_width;
	__u32 min_height, max_height;
};
 
struct drm_mode_crtc {
	__u64 set_connectors_ptr;
	__u32 count_connectors;
 
	__u32 crtc_id; /**< Id */
	__u32 fb_id; /**< Id of framebuffer */
 
	__u32 x, y; /**< Position on the frameuffer */
 
	__u32 gamma_size;
	__u32 mode_valid;
	struct drm_mode_modeinfo mode;
};
 
#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
 
/* Planes blend with or override other bits on the CRTC */
struct drm_mode_set_plane {
	__u32 plane_id;
	__u32 crtc_id;
	__u32 fb_id; /* fb object contains surface format type */
	__u32 flags; /* see above flags */
 
	/* Signed dest location allows it to be partially off screen */
	__s32 crtc_x, crtc_y;
	__u32 crtc_w, crtc_h;
 
	/* Source values are 16.16 fixed point */
	__u32 src_x, src_y;
	__u32 src_h, src_w;
};
 
struct drm_mode_get_plane {
	__u32 plane_id;
 
	__u32 crtc_id;
	__u32 fb_id;
 
	__u32 possible_crtcs;
	__u32 gamma_size;
 
	__u32 count_format_types;
	__u64 format_type_ptr;
};
 
struct drm_mode_get_plane_res {
	__u64 plane_id_ptr;
	__u32 count_planes;
};
 
#define DRM_MODE_ENCODER_NONE	0
#define DRM_MODE_ENCODER_DAC	1
#define DRM_MODE_ENCODER_TMDS	2
#define DRM_MODE_ENCODER_LVDS	3
#define DRM_MODE_ENCODER_TVDAC	4
#define DRM_MODE_ENCODER_VIRTUAL 5
#define DRM_MODE_ENCODER_DSI	6
 
struct drm_mode_get_encoder {
	__u32 encoder_id;
	__u32 encoder_type;
 
	__u32 crtc_id; /**< Id of crtc */
 
	__u32 possible_crtcs;
	__u32 possible_clones;
};
 
/* This is for connectors with multiple signal types. */
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
#define DRM_MODE_SUBCONNECTOR_Automatic	0
#define DRM_MODE_SUBCONNECTOR_Unknown	0
#define DRM_MODE_SUBCONNECTOR_DVID	3
#define DRM_MODE_SUBCONNECTOR_DVIA	4
#define DRM_MODE_SUBCONNECTOR_Composite	5
#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
#define DRM_MODE_SUBCONNECTOR_Component	8
#define DRM_MODE_SUBCONNECTOR_SCART	9
 
#define DRM_MODE_CONNECTOR_Unknown	0
#define DRM_MODE_CONNECTOR_VGA		1
#define DRM_MODE_CONNECTOR_DVII		2
#define DRM_MODE_CONNECTOR_DVID		3
#define DRM_MODE_CONNECTOR_DVIA		4
#define DRM_MODE_CONNECTOR_Composite	5
#define DRM_MODE_CONNECTOR_SVIDEO	6
#define DRM_MODE_CONNECTOR_LVDS		7
#define DRM_MODE_CONNECTOR_Component	8
#define DRM_MODE_CONNECTOR_9PinDIN	9
#define DRM_MODE_CONNECTOR_DisplayPort	10
#define DRM_MODE_CONNECTOR_HDMIA	11
#define DRM_MODE_CONNECTOR_HDMIB	12
#define DRM_MODE_CONNECTOR_TV		13
#define DRM_MODE_CONNECTOR_eDP		14
#define DRM_MODE_CONNECTOR_VIRTUAL      15
#define DRM_MODE_CONNECTOR_DSI		16
 
struct drm_mode_get_connector {
 
	__u64 encoders_ptr;
	__u64 modes_ptr;
	__u64 props_ptr;
	__u64 prop_values_ptr;
 
	__u32 count_modes;
	__u32 count_props;
	__u32 count_encoders;
 
	__u32 encoder_id; /**< Current Encoder */
	__u32 connector_id; /**< Id */
	__u32 connector_type;
	__u32 connector_type_id;
 
	__u32 connection;
	__u32 mm_width, mm_height; /**< HxW in millimeters */
	__u32 subpixel;
 
	__u32 pad;
};
 
#define DRM_MODE_PROP_PENDING	(1<<0)
#define DRM_MODE_PROP_RANGE	(1<<1)
#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
#define DRM_MODE_PROP_BLOB	(1<<4)
#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
 
struct drm_mode_property_enum {
	__u64 value;
	char name[DRM_PROP_NAME_LEN];
};
 
struct drm_mode_get_property {
	__u64 values_ptr; /* values and blob lengths */
	__u64 enum_blob_ptr; /* enum and blob id ptrs */
 
	__u32 prop_id;
	__u32 flags;
	char name[DRM_PROP_NAME_LEN];
 
	__u32 count_values;
	__u32 count_enum_blobs;
};
 
struct drm_mode_connector_set_property {
	__u64 value;
	__u32 prop_id;
	__u32 connector_id;
};
 
struct drm_mode_obj_get_properties {
	__u64 props_ptr;
	__u64 prop_values_ptr;
	__u32 count_props;
	__u32 obj_id;
	__u32 obj_type;
};
 
struct drm_mode_obj_set_property {
	__u64 value;
	__u32 prop_id;
	__u32 obj_id;
	__u32 obj_type;
};
 
struct drm_mode_get_blob {
	__u32 blob_id;
	__u32 length;
	__u64 data;
};
 
struct drm_mode_fb_cmd {
	__u32 fb_id;
	__u32 width, height;
	__u32 pitch;
	__u32 bpp;
	__u32 depth;
	/* driver specific handle */
	__u32 handle;
};
 
#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
 
struct drm_mode_fb_cmd2 {
	__u32 fb_id;
	__u32 width, height;
	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
	__u32 flags; /* see above flags */
 
	/*
	 * In case of planar formats, this ioctl allows up to 4
	 * buffer objects with offets and pitches per plane.
	 * The pitch and offset order is dictated by the fourcc,
	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
	 *
	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
	 *   followed by an interleaved U/V plane containing
	 *   8 bit 2x2 subsampled colour difference samples.
	 *
	 * So it would consist of Y as offset[0] and UV as
	 * offeset[1].  Note that offset[0] will generally
	 * be 0.
	 */
	__u32 handles[4];
	__u32 pitches[4]; /* pitch for each plane */
	__u32 offsets[4]; /* offset of each plane */
};
 
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
#define DRM_MODE_FB_DIRTY_FLAGS         0x03
 
#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
 
/*
 * Mark a region of a framebuffer as dirty.
 *
 * Some hardware does not automatically update display contents
 * as a hardware or software draw to a framebuffer. This ioctl
 * allows userspace to tell the kernel and the hardware what
 * regions of the framebuffer have changed.
 *
 * The kernel or hardware is free to update more then just the
 * region specified by the clip rects. The kernel or hardware
 * may also delay and/or coalesce several calls to dirty into a
 * single update.
 *
 * Userspace may annotate the updates, the annotates are a
 * promise made by the caller that the change is either a copy
 * of pixels or a fill of a single color in the region specified.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 * the number of updated regions are half of num_clips given,
 * where the clip rects are paired in src and dst. The width and
 * height of each one of the pairs must match.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 * promises that the region specified of the clip rects is filled
 * completely with a single color as given in the color argument.
 */
 
struct drm_mode_fb_dirty_cmd {
	__u32 fb_id;
	__u32 flags;
	__u32 color;
	__u32 num_clips;
	__u64 clips_ptr;
};
 
struct drm_mode_mode_cmd {
	__u32 connector_id;
	struct drm_mode_modeinfo mode;
};
 
#define DRM_MODE_CURSOR_BO	0x01
#define DRM_MODE_CURSOR_MOVE	0x02
#define DRM_MODE_CURSOR_FLAGS	0x03
 
/*
 * depending on the value in flags different members are used.
 *
 * CURSOR_BO uses
 *    crtc_id
 *    width
 *    height
 *    handle - if 0 turns the cursor off
 *
 * CURSOR_MOVE uses
 *    crtc_id
 *    x
 *    y
 */
struct drm_mode_cursor {
	__u32 flags;
	__u32 crtc_id;
	__s32 x;
	__s32 y;
	__u32 width;
	__u32 height;
	/* driver specific handle */
	__u32 handle;
};
 
struct drm_mode_cursor2 {
	__u32 flags;
	__u32 crtc_id;
	__s32 x;
	__s32 y;
	__u32 width;
	__u32 height;
	/* driver specific handle */
	__u32 handle;
	__s32 hot_x;
	__s32 hot_y;
};
 
struct drm_mode_crtc_lut {
	__u32 crtc_id;
	__u32 gamma_size;
 
	/* pointers to arrays */
	__u64 red;
	__u64 green;
	__u64 blue;
};
 
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
 
/*
 * Request a page flip on the specified crtc.
 *
 * This ioctl will ask KMS to schedule a page flip for the specified
 * crtc.  Once any pending rendering targeting the specified fb (as of
 * ioctl time) has completed, the crtc will be reprogrammed to display
 * that fb after the next vertical refresh.  The ioctl returns
 * immediately, but subsequent rendering to the current fb will block
 * in the execbuffer ioctl until the page flip happens.  If a page
 * flip is already pending as the ioctl is called, EBUSY will be
 * returned.
 *
 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
 * event (see drm.h: struct drm_event_vblank) when the page flip is
 * done.  The user_data field passed in with this ioctl will be
 * returned as the user_data field in the vblank event struct.
 *
 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
 * 'as soon as possible', meaning that it not delay waiting for vblank.
 * This may cause tearing on the screen.
 *
 * The reserved field must be zero until we figure out something
 * clever to use it for.
 */
 
struct drm_mode_crtc_page_flip {
	__u32 crtc_id;
	__u32 fb_id;
	__u32 flags;
	__u32 reserved;
	__u64 user_data;
};
 
/* create a dumb scanout buffer */
struct drm_mode_create_dumb {
	uint32_t height;
	uint32_t width;
	uint32_t bpp;
	uint32_t flags;
	/* handle, pitch, size will be returned */
	uint32_t handle;
	uint32_t pitch;
	uint64_t size;
};
 
/* set up for mmap of a dumb scanout buffer */
struct drm_mode_map_dumb {
	/** Handle for the object being mapped. */
	__u32 handle;
	__u32 pad;
	/**
	 * Fake offset to use for subsequent mmap call
	 *
	 * This is a fixed-size type for 32/64 compatibility.
	 */
	__u64 offset;
};
 
struct drm_mode_destroy_dumb {
	uint32_t handle;
};
 
#endif
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
 
/*>
 
/*>
#define>
#define>
 
 
/*>
 
 
/*>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
>
>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
 
/*>
 
/*>
#define>
#define>
#define>
#define>
#define>
#define>
#define>
#define>

Rev 3031	Rev 4559
1	/*	1	/*
2	* Copyright (c) 2007 Dave Airlie	2	* Copyright (c) 2007 Dave Airlie
3	* Copyright (c) 2007 Jakob Bornecrantz	3	* Copyright (c) 2007 Jakob Bornecrantz
4	* Copyright (c) 2008 Red Hat Inc.	4	* Copyright (c) 2008 Red Hat Inc.
5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA	5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6	* Copyright (c) 2007-2008 Intel Corporation	6	* Copyright (c) 2007-2008 Intel Corporation
7	*	7	*
8	* Permission is hereby granted, free of charge, to any person obtaining a	8	* Permission is hereby granted, free of charge, to any person obtaining a
9	* copy of this software and associated documentation files (the "Software"),	9	* copy of this software and associated documentation files (the "Software"),
10	* to deal in the Software without restriction, including without limitation	10	* to deal in the Software without restriction, including without limitation
11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
12	* and/or sell copies of the Software, and to permit persons to whom the	12	* and/or sell copies of the Software, and to permit persons to whom the
13	* Software is furnished to do so, subject to the following conditions:	13	* Software is furnished to do so, subject to the following conditions:
14	*	14	*
15	* The above copyright notice and this permission notice shall be included in	15	* The above copyright notice and this permission notice shall be included in
16	* all copies or substantial portions of the Software.	16	* all copies or substantial portions of the Software.
17	*	17	*
18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS	23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24	* IN THE SOFTWARE.	24	* IN THE SOFTWARE.
25	*/	25	*/
26		26
27	#ifndef _DRM_MODE_H	27	#ifndef _DRM_MODE_H
28	#define _DRM_MODE_H	28	#define _DRM_MODE_H
29		29
30	#include	30	#include
31		31
32	#define DRM_DISPLAY_INFO_LEN 32	32	#define DRM_DISPLAY_INFO_LEN 32
33	#define DRM_CONNECTOR_NAME_LEN 32	33	#define DRM_CONNECTOR_NAME_LEN 32
34	#define DRM_DISPLAY_MODE_LEN 32	34	#define DRM_DISPLAY_MODE_LEN 32
35	#define DRM_PROP_NAME_LEN 32	35	#define DRM_PROP_NAME_LEN 32
36		36
37	#define DRM_MODE_TYPE_BUILTIN (1<<0)	37	#define DRM_MODE_TYPE_BUILTIN (1<<0)
38	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)	38	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)
39	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)	39	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)
40	#define DRM_MODE_TYPE_PREFERRED (1<<3)	40	#define DRM_MODE_TYPE_PREFERRED (1<<3)
41	#define DRM_MODE_TYPE_DEFAULT (1<<4)	41	#define DRM_MODE_TYPE_DEFAULT (1<<4)
42	#define DRM_MODE_TYPE_USERDEF (1<<5)	42	#define DRM_MODE_TYPE_USERDEF (1<<5)
43	#define DRM_MODE_TYPE_DRIVER (1<<6)	43	#define DRM_MODE_TYPE_DRIVER (1<<6)
44		44
45	/* Video mode flags */	45	/* Video mode flags */
46	/* bit compatible with the xorg definitions. */	46	/* bit compatible with the xorg definitions. */
47	#define DRM_MODE_FLAG_PHSYNC (1<<0)	47	#define DRM_MODE_FLAG_PHSYNC (1<<0)
48	#define DRM_MODE_FLAG_NHSYNC (1<<1)	48	#define DRM_MODE_FLAG_NHSYNC (1<<1)
49	#define DRM_MODE_FLAG_PVSYNC (1<<2)	49	#define DRM_MODE_FLAG_PVSYNC (1<<2)
50	#define DRM_MODE_FLAG_NVSYNC (1<<3)	50	#define DRM_MODE_FLAG_NVSYNC (1<<3)
51	#define DRM_MODE_FLAG_INTERLACE (1<<4)	51	#define DRM_MODE_FLAG_INTERLACE (1<<4)
52	#define DRM_MODE_FLAG_DBLSCAN (1<<5)	52	#define DRM_MODE_FLAG_DBLSCAN (1<<5)
53	#define DRM_MODE_FLAG_CSYNC (1<<6)	53	#define DRM_MODE_FLAG_CSYNC (1<<6)
54	#define DRM_MODE_FLAG_PCSYNC (1<<7)	54	#define DRM_MODE_FLAG_PCSYNC (1<<7)
55	#define DRM_MODE_FLAG_NCSYNC (1<<8)	55	#define DRM_MODE_FLAG_NCSYNC (1<<8)
56	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */	56	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
57	#define DRM_MODE_FLAG_BCAST (1<<10)	57	#define DRM_MODE_FLAG_BCAST (1<<10)
58	#define DRM_MODE_FLAG_PIXMUX (1<<11)	58	#define DRM_MODE_FLAG_PIXMUX (1<<11)
59	#define DRM_MODE_FLAG_DBLCLK (1<<12)	59	#define DRM_MODE_FLAG_DBLCLK (1<<12)
60	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)	60	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
-		61	/*
-		62	* When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
-		63	* (define not exposed to user space).
-		64	*/
-		65	#define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
-		66	#define DRM_MODE_FLAG_3D_NONE (0<<14)
-		67	#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
-		68	#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
-		69	#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
-		70	#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
-		71	#define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
-		72	#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
-		73	#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
-		74	#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
-		75
61		76
62	/* DPMS flags */	77	/* DPMS flags */
63	/* bit compatible with the xorg definitions. */	78	/* bit compatible with the xorg definitions. */
64	#define DRM_MODE_DPMS_ON 0	79	#define DRM_MODE_DPMS_ON 0
65	#define DRM_MODE_DPMS_STANDBY 1	80	#define DRM_MODE_DPMS_STANDBY 1
66	#define DRM_MODE_DPMS_SUSPEND 2	81	#define DRM_MODE_DPMS_SUSPEND 2
67	#define DRM_MODE_DPMS_OFF 3	82	#define DRM_MODE_DPMS_OFF 3
68		83
69	/* Scaling mode options */	84	/* Scaling mode options */
70	#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or	85	#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
71	software can still scale) */	86	software can still scale) */
72	#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */	87	#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
73	#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */	88	#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
74	#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */	89	#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
75		90
76	/* Dithering mode options */	91	/* Dithering mode options */
77	#define DRM_MODE_DITHERING_OFF 0	92	#define DRM_MODE_DITHERING_OFF 0
78	#define DRM_MODE_DITHERING_ON 1	93	#define DRM_MODE_DITHERING_ON 1
79	#define DRM_MODE_DITHERING_AUTO 2	94	#define DRM_MODE_DITHERING_AUTO 2
80		95
81	/* Dirty info options */	96	/* Dirty info options */
82	#define DRM_MODE_DIRTY_OFF 0	97	#define DRM_MODE_DIRTY_OFF 0
83	#define DRM_MODE_DIRTY_ON 1	98	#define DRM_MODE_DIRTY_ON 1
84	#define DRM_MODE_DIRTY_ANNOTATE 2	99	#define DRM_MODE_DIRTY_ANNOTATE 2
85		100
86	struct drm_mode_modeinfo {	101	struct drm_mode_modeinfo {
87	__u32 clock;	102	__u32 clock;
88	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;	103	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
89	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;	104	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
90		105
91	__u32 vrefresh;	106	__u32 vrefresh;
92		107
93	__u32 flags;	108	__u32 flags;
94	__u32 type;	109	__u32 type;
95	char name[DRM_DISPLAY_MODE_LEN];	110	char name[DRM_DISPLAY_MODE_LEN];
96	};	111	};
97		112
98	struct drm_mode_card_res {	113	struct drm_mode_card_res {
99	__u64 fb_id_ptr;	114	__u64 fb_id_ptr;
100	__u64 crtc_id_ptr;	115	__u64 crtc_id_ptr;
101	__u64 connector_id_ptr;	116	__u64 connector_id_ptr;
102	__u64 encoder_id_ptr;	117	__u64 encoder_id_ptr;
103	__u32 count_fbs;	118	__u32 count_fbs;
104	__u32 count_crtcs;	119	__u32 count_crtcs;
105	__u32 count_connectors;	120	__u32 count_connectors;
106	__u32 count_encoders;	121	__u32 count_encoders;
107	__u32 min_width, max_width;	122	__u32 min_width, max_width;
108	__u32 min_height, max_height;	123	__u32 min_height, max_height;
109	};	124	};
110		125
111	struct drm_mode_crtc {	126	struct drm_mode_crtc {
112	__u64 set_connectors_ptr;	127	__u64 set_connectors_ptr;
113	__u32 count_connectors;	128	__u32 count_connectors;
114		129
115	__u32 crtc_id; /*< Id /	130	__u32 crtc_id; /*< Id /
116	__u32 fb_id; /*< Id of framebuffer /	131	__u32 fb_id; /*< Id of framebuffer /
117		132
118	__u32 x, y; /*< Position on the frameuffer /	133	__u32 x, y; /*< Position on the frameuffer /
119		134
120	__u32 gamma_size;	135	__u32 gamma_size;
121	__u32 mode_valid;	136	__u32 mode_valid;
122	struct drm_mode_modeinfo mode;	137	struct drm_mode_modeinfo mode;
123	};	138	};
124		139
125	#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)	140	#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
126	#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)	141	#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
127		142
128	/* Planes blend with or override other bits on the CRTC */	143	/* Planes blend with or override other bits on the CRTC */
129	struct drm_mode_set_plane {	144	struct drm_mode_set_plane {
130	__u32 plane_id;	145	__u32 plane_id;
131	__u32 crtc_id;	146	__u32 crtc_id;
132	__u32 fb_id; /* fb object contains surface format type */	147	__u32 fb_id; /* fb object contains surface format type */
133	__u32 flags; /* see above flags */	148	__u32 flags; /* see above flags */
134		149
135	/* Signed dest location allows it to be partially off screen */	150	/* Signed dest location allows it to be partially off screen */
136	__s32 crtc_x, crtc_y;	151	__s32 crtc_x, crtc_y;
137	__u32 crtc_w, crtc_h;	152	__u32 crtc_w, crtc_h;
138		153
139	/* Source values are 16.16 fixed point */	154	/* Source values are 16.16 fixed point */
140	__u32 src_x, src_y;	155	__u32 src_x, src_y;
141	__u32 src_h, src_w;	156	__u32 src_h, src_w;
142	};	157	};
143		158
144	struct drm_mode_get_plane {	159	struct drm_mode_get_plane {
145	__u32 plane_id;	160	__u32 plane_id;
146		161
147	__u32 crtc_id;	162	__u32 crtc_id;
148	__u32 fb_id;	163	__u32 fb_id;
149		164
150	__u32 possible_crtcs;	165	__u32 possible_crtcs;
151	__u32 gamma_size;	166	__u32 gamma_size;
152		167
153	__u32 count_format_types;	168	__u32 count_format_types;
154	__u64 format_type_ptr;	169	__u64 format_type_ptr;
155	};	170	};
156		171
157	struct drm_mode_get_plane_res {	172	struct drm_mode_get_plane_res {
158	__u64 plane_id_ptr;	173	__u64 plane_id_ptr;
159	__u32 count_planes;	174	__u32 count_planes;
160	};	175	};
161		176
162	#define DRM_MODE_ENCODER_NONE 0	177	#define DRM_MODE_ENCODER_NONE 0
163	#define DRM_MODE_ENCODER_DAC 1	178	#define DRM_MODE_ENCODER_DAC 1
164	#define DRM_MODE_ENCODER_TMDS 2	179	#define DRM_MODE_ENCODER_TMDS 2
165	#define DRM_MODE_ENCODER_LVDS 3	180	#define DRM_MODE_ENCODER_LVDS 3
166	#define DRM_MODE_ENCODER_TVDAC 4	181	#define DRM_MODE_ENCODER_TVDAC 4
167	#define DRM_MODE_ENCODER_VIRTUAL 5	182	#define DRM_MODE_ENCODER_VIRTUAL 5
-		183	#define DRM_MODE_ENCODER_DSI 6
168		184
169	struct drm_mode_get_encoder {	185	struct drm_mode_get_encoder {
170	__u32 encoder_id;	186	__u32 encoder_id;
171	__u32 encoder_type;	187	__u32 encoder_type;
172		188
173	__u32 crtc_id; /*< Id of crtc /	189	__u32 crtc_id; /*< Id of crtc /
174		190
175	__u32 possible_crtcs;	191	__u32 possible_crtcs;
176	__u32 possible_clones;	192	__u32 possible_clones;
177	};	193	};
178		194
179	/* This is for connectors with multiple signal types. */	195	/* This is for connectors with multiple signal types. */
180	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */	196	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
181	#define DRM_MODE_SUBCONNECTOR_Automatic 0	197	#define DRM_MODE_SUBCONNECTOR_Automatic 0
182	#define DRM_MODE_SUBCONNECTOR_Unknown 0	198	#define DRM_MODE_SUBCONNECTOR_Unknown 0
183	#define DRM_MODE_SUBCONNECTOR_DVID 3	199	#define DRM_MODE_SUBCONNECTOR_DVID 3
184	#define DRM_MODE_SUBCONNECTOR_DVIA 4	200	#define DRM_MODE_SUBCONNECTOR_DVIA 4
185	#define DRM_MODE_SUBCONNECTOR_Composite 5	201	#define DRM_MODE_SUBCONNECTOR_Composite 5
186	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6	202	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
187	#define DRM_MODE_SUBCONNECTOR_Component 8	203	#define DRM_MODE_SUBCONNECTOR_Component 8
188	#define DRM_MODE_SUBCONNECTOR_SCART 9	204	#define DRM_MODE_SUBCONNECTOR_SCART 9
189		205
190	#define DRM_MODE_CONNECTOR_Unknown 0	206	#define DRM_MODE_CONNECTOR_Unknown 0
191	#define DRM_MODE_CONNECTOR_VGA 1	207	#define DRM_MODE_CONNECTOR_VGA 1
192	#define DRM_MODE_CONNECTOR_DVII 2	208	#define DRM_MODE_CONNECTOR_DVII 2
193	#define DRM_MODE_CONNECTOR_DVID 3	209	#define DRM_MODE_CONNECTOR_DVID 3
194	#define DRM_MODE_CONNECTOR_DVIA 4	210	#define DRM_MODE_CONNECTOR_DVIA 4
195	#define DRM_MODE_CONNECTOR_Composite 5	211	#define DRM_MODE_CONNECTOR_Composite 5
196	#define DRM_MODE_CONNECTOR_SVIDEO 6	212	#define DRM_MODE_CONNECTOR_SVIDEO 6
197	#define DRM_MODE_CONNECTOR_LVDS 7	213	#define DRM_MODE_CONNECTOR_LVDS 7
198	#define DRM_MODE_CONNECTOR_Component 8	214	#define DRM_MODE_CONNECTOR_Component 8
199	#define DRM_MODE_CONNECTOR_9PinDIN 9	215	#define DRM_MODE_CONNECTOR_9PinDIN 9
200	#define DRM_MODE_CONNECTOR_DisplayPort 10	216	#define DRM_MODE_CONNECTOR_DisplayPort 10
201	#define DRM_MODE_CONNECTOR_HDMIA 11	217	#define DRM_MODE_CONNECTOR_HDMIA 11
202	#define DRM_MODE_CONNECTOR_HDMIB 12	218	#define DRM_MODE_CONNECTOR_HDMIB 12
203	#define DRM_MODE_CONNECTOR_TV 13	219	#define DRM_MODE_CONNECTOR_TV 13
204	#define DRM_MODE_CONNECTOR_eDP 14	220	#define DRM_MODE_CONNECTOR_eDP 14
205	#define DRM_MODE_CONNECTOR_VIRTUAL 15	221	#define DRM_MODE_CONNECTOR_VIRTUAL 15
-		222	#define DRM_MODE_CONNECTOR_DSI 16
206		223
207	struct drm_mode_get_connector {	224	struct drm_mode_get_connector {
208		225
209	__u64 encoders_ptr;	226	__u64 encoders_ptr;
210	__u64 modes_ptr;	227	__u64 modes_ptr;
211	__u64 props_ptr;	228	__u64 props_ptr;
212	__u64 prop_values_ptr;	229	__u64 prop_values_ptr;
213		230
214	__u32 count_modes;	231	__u32 count_modes;
215	__u32 count_props;	232	__u32 count_props;
216	__u32 count_encoders;	233	__u32 count_encoders;
217		234
218	__u32 encoder_id; /*< Current Encoder /	235	__u32 encoder_id; /*< Current Encoder /
219	__u32 connector_id; /*< Id /	236	__u32 connector_id; /*< Id /
220	__u32 connector_type;	237	__u32 connector_type;
221	__u32 connector_type_id;	238	__u32 connector_type_id;
222		239
223	__u32 connection;	240	__u32 connection;
224	__u32 mm_width, mm_height; /*< HxW in millimeters /	241	__u32 mm_width, mm_height; /*< HxW in millimeters /
225	__u32 subpixel;	242	__u32 subpixel;
-		243
-		244	__u32 pad;
226	};	245	};
227		246
228	#define DRM_MODE_PROP_PENDING (1<<0)	247	#define DRM_MODE_PROP_PENDING (1<<0)
229	#define DRM_MODE_PROP_RANGE (1<<1)	248	#define DRM_MODE_PROP_RANGE (1<<1)
230	#define DRM_MODE_PROP_IMMUTABLE (1<<2)	249	#define DRM_MODE_PROP_IMMUTABLE (1<<2)
231	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */	250	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
232	#define DRM_MODE_PROP_BLOB (1<<4)	251	#define DRM_MODE_PROP_BLOB (1<<4)
233	#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */	252	#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
234		253
235	struct drm_mode_property_enum {	254	struct drm_mode_property_enum {
236	__u64 value;	255	__u64 value;
237	char name[DRM_PROP_NAME_LEN];	256	char name[DRM_PROP_NAME_LEN];
238	};	257	};
239		258
240	struct drm_mode_get_property {	259	struct drm_mode_get_property {
241	__u64 values_ptr; /* values and blob lengths */	260	__u64 values_ptr; /* values and blob lengths */
242	__u64 enum_blob_ptr; /* enum and blob id ptrs */	261	__u64 enum_blob_ptr; /* enum and blob id ptrs */
243		262
244	__u32 prop_id;	263	__u32 prop_id;
245	__u32 flags;	264	__u32 flags;
246	char name[DRM_PROP_NAME_LEN];	265	char name[DRM_PROP_NAME_LEN];
247		266
248	__u32 count_values;	267	__u32 count_values;
249	__u32 count_enum_blobs;	268	__u32 count_enum_blobs;
250	};	269	};
251		270
252	struct drm_mode_connector_set_property {	271	struct drm_mode_connector_set_property {
253	__u64 value;	272	__u64 value;
254	__u32 prop_id;	273	__u32 prop_id;
255	__u32 connector_id;	274	__u32 connector_id;
256	};	275	};
257		276
258	struct drm_mode_obj_get_properties {	277	struct drm_mode_obj_get_properties {
259	__u64 props_ptr;	278	__u64 props_ptr;
260	__u64 prop_values_ptr;	279	__u64 prop_values_ptr;
261	__u32 count_props;	280	__u32 count_props;
262	__u32 obj_id;	281	__u32 obj_id;
263	__u32 obj_type;	282	__u32 obj_type;
264	};	283	};
265		284
266	struct drm_mode_obj_set_property {	285	struct drm_mode_obj_set_property {
267	__u64 value;	286	__u64 value;
268	__u32 prop_id;	287	__u32 prop_id;
269	__u32 obj_id;	288	__u32 obj_id;
270	__u32 obj_type;	289	__u32 obj_type;
271	};	290	};
272		291
273	struct drm_mode_get_blob {	292	struct drm_mode_get_blob {
274	__u32 blob_id;	293	__u32 blob_id;
275	__u32 length;	294	__u32 length;
276	__u64 data;	295	__u64 data;
277	};	296	};
278		297
279	struct drm_mode_fb_cmd {	298	struct drm_mode_fb_cmd {
280	__u32 fb_id;	299	__u32 fb_id;
281	__u32 width, height;	300	__u32 width, height;
282	__u32 pitch;	301	__u32 pitch;
283	__u32 bpp;	302	__u32 bpp;
284	__u32 depth;	303	__u32 depth;
285	/* driver specific handle */	304	/* driver specific handle */
286	__u32 handle;	305	__u32 handle;
287	};	306	};
288		307
289	#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */	308	#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
290		309
291	struct drm_mode_fb_cmd2 {	310	struct drm_mode_fb_cmd2 {
292	__u32 fb_id;	311	__u32 fb_id;
293	__u32 width, height;	312	__u32 width, height;
294	__u32 pixel_format; /* fourcc code from drm_fourcc.h */	313	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
295	__u32 flags; /* see above flags */	314	__u32 flags; /* see above flags */
296		315
297	/*	316	/*
298	* In case of planar formats, this ioctl allows up to 4	317	* In case of planar formats, this ioctl allows up to 4
299	* buffer objects with offets and pitches per plane.	318	* buffer objects with offets and pitches per plane.
300	* The pitch and offset order is dictated by the fourcc,	319	* The pitch and offset order is dictated by the fourcc,
301	* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:	320	* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
302	*	321	*
303	* YUV 4:2:0 image with a plane of 8 bit Y samples	322	* YUV 4:2:0 image with a plane of 8 bit Y samples
304	* followed by an interleaved U/V plane containing	323	* followed by an interleaved U/V plane containing
305	* 8 bit 2x2 subsampled colour difference samples.	324	* 8 bit 2x2 subsampled colour difference samples.
306	*	325	*
307	* So it would consist of Y as offset[0] and UV as	326	* So it would consist of Y as offset[0] and UV as
308	* offeset[1]. Note that offset[0] will generally	327	* offeset[1]. Note that offset[0] will generally
309	* be 0.	328	* be 0.
310	*/	329	*/
311	__u32 handles[4];	330	__u32 handles[4];
312	__u32 pitches[4]; /* pitch for each plane */	331	__u32 pitches[4]; /* pitch for each plane */
313	__u32 offsets[4]; /* offset of each plane */	332	__u32 offsets[4]; /* offset of each plane */
314	};	333	};
315		334
316	#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01	335	#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
317	#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02	336	#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
318	#define DRM_MODE_FB_DIRTY_FLAGS 0x03	337	#define DRM_MODE_FB_DIRTY_FLAGS 0x03
319		338
320	#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256	339	#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
321		340
322	/*	341	/*
323	* Mark a region of a framebuffer as dirty.	342	* Mark a region of a framebuffer as dirty.
324	*	343	*
325	* Some hardware does not automatically update display contents	344	* Some hardware does not automatically update display contents
326	* as a hardware or software draw to a framebuffer. This ioctl	345	* as a hardware or software draw to a framebuffer. This ioctl
327	* allows userspace to tell the kernel and the hardware what	346	* allows userspace to tell the kernel and the hardware what
328	* regions of the framebuffer have changed.	347	* regions of the framebuffer have changed.
329	*	348	*
330	* The kernel or hardware is free to update more then just the	349	* The kernel or hardware is free to update more then just the
331	* region specified by the clip rects. The kernel or hardware	350	* region specified by the clip rects. The kernel or hardware
332	* may also delay and/or coalesce several calls to dirty into a	351	* may also delay and/or coalesce several calls to dirty into a
333	* single update.	352	* single update.
334	*	353	*
335	* Userspace may annotate the updates, the annotates are a	354	* Userspace may annotate the updates, the annotates are a
336	* promise made by the caller that the change is either a copy	355	* promise made by the caller that the change is either a copy
337	* of pixels or a fill of a single color in the region specified.	356	* of pixels or a fill of a single color in the region specified.
338	*	357	*
339	* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then	358	* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
340	* the number of updated regions are half of num_clips given,	359	* the number of updated regions are half of num_clips given,
341	* where the clip rects are paired in src and dst. The width and	360	* where the clip rects are paired in src and dst. The width and
342	* height of each one of the pairs must match.	361	* height of each one of the pairs must match.
343	*	362	*
344	* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller	363	* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
345	* promises that the region specified of the clip rects is filled	364	* promises that the region specified of the clip rects is filled
346	* completely with a single color as given in the color argument.	365	* completely with a single color as given in the color argument.
347	*/	366	*/
348		367
349	struct drm_mode_fb_dirty_cmd {	368	struct drm_mode_fb_dirty_cmd {
350	__u32 fb_id;	369	__u32 fb_id;
351	__u32 flags;	370	__u32 flags;
352	__u32 color;	371	__u32 color;
353	__u32 num_clips;	372	__u32 num_clips;
354	__u64 clips_ptr;	373	__u64 clips_ptr;
355	};	374	};
356		375
357	struct drm_mode_mode_cmd {	376	struct drm_mode_mode_cmd {
358	__u32 connector_id;	377	__u32 connector_id;
359	struct drm_mode_modeinfo mode;	378	struct drm_mode_modeinfo mode;
360	};	379	};
361		380
362	#define DRM_MODE_CURSOR_BO 0x01	381	#define DRM_MODE_CURSOR_BO 0x01
363	#define DRM_MODE_CURSOR_MOVE 0x02	382	#define DRM_MODE_CURSOR_MOVE 0x02
364	#define DRM_MODE_CURSOR_FLAGS 0x03	383	#define DRM_MODE_CURSOR_FLAGS 0x03
365		384
366	/*	385	/*
367	* depending on the value in flags different members are used.	386	* depending on the value in flags different members are used.
368	*	387	*
369	* CURSOR_BO uses	388	* CURSOR_BO uses
370	* crtc	389	* crtc_id
371	* width	390	* width
372	* height	391	* height
373	* handle - if 0 turns the cursor of	392	* handle - if 0 turns the cursor off
374	*	393	*
375	* CURSOR_MOVE uses	394	* CURSOR_MOVE uses
376	* crtc	395	* crtc_id
377	* x	396	* x
378	* y	397	* y
379	*/	398	*/
380	struct drm_mode_cursor {	399	struct drm_mode_cursor {
381	__u32 flags;	400	__u32 flags;
382	__u32 crtc_id;	401	__u32 crtc_id;
383	__s32 x;	402	__s32 x;
384	__s32 y;	403	__s32 y;
385	__u32 width;	404	__u32 width;
386	__u32 height;	405	__u32 height;
387	/* driver specific handle */	406	/* driver specific handle */
388	__u32 handle;	407	__u32 handle;
389	};	408	};
-		409
-		410	struct drm_mode_cursor2 {
-		411	__u32 flags;
-		412	__u32 crtc_id;
-		413	__s32 x;
-		414	__s32 y;
-		415	__u32 width;
-		416	__u32 height;
-		417	/* driver specific handle */
-		418	__u32 handle;
-		419	__s32 hot_x;
-		420	__s32 hot_y;
-		421	};
390		422
391	struct drm_mode_crtc_lut {	423	struct drm_mode_crtc_lut {
392	__u32 crtc_id;	424	__u32 crtc_id;
393	__u32 gamma_size;	425	__u32 gamma_size;
394		426
395	/* pointers to arrays */	427	/* pointers to arrays */
396	__u64 red;	428	__u64 red;
397	__u64 green;	429	__u64 green;
398	__u64 blue;	430	__u64 blue;
399	};	431	};
400		432
401	#define DRM_MODE_PAGE_FLIP_EVENT 0x01	433	#define DRM_MODE_PAGE_FLIP_EVENT 0x01
-		434	#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
402	#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT	435	#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT\|DRM_MODE_PAGE_FLIP_ASYNC)
403		436
404	/*	437	/*
405	* Request a page flip on the specified crtc.	438	* Request a page flip on the specified crtc.
406	*	439	*
407	* This ioctl will ask KMS to schedule a page flip for the specified	440	* This ioctl will ask KMS to schedule a page flip for the specified
408	* crtc. Once any pending rendering targeting the specified fb (as of	441	* crtc. Once any pending rendering targeting the specified fb (as of
409	* ioctl time) has completed, the crtc will be reprogrammed to display	442	* ioctl time) has completed, the crtc will be reprogrammed to display
410	* that fb after the next vertical refresh. The ioctl returns	443	* that fb after the next vertical refresh. The ioctl returns
411	* immediately, but subsequent rendering to the current fb will block	444	* immediately, but subsequent rendering to the current fb will block
412	* in the execbuffer ioctl until the page flip happens. If a page	445	* in the execbuffer ioctl until the page flip happens. If a page
413	* flip is already pending as the ioctl is called, EBUSY will be	446	* flip is already pending as the ioctl is called, EBUSY will be
414	* returned.	447	* returned.
415	*	448	*
416	* The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will	449	* Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
417	* request that drm sends back a vblank event (see drm.h: struct	450	* event (see drm.h: struct drm_event_vblank) when the page flip is
418	* drm_event_vblank) when the page flip is done. The user_data field	451	* done. The user_data field passed in with this ioctl will be
419	* passed in with this ioctl will be returned as the user_data field	452	* returned as the user_data field in the vblank event struct.
-		453	*
-		454	* Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
-		455	* 'as soon as possible', meaning that it not delay waiting for vblank.
420	* in the vblank event struct.	456	* This may cause tearing on the screen.
421	*	457	*
422	* The reserved field must be zero until we figure out something	458	* The reserved field must be zero until we figure out something
423	* clever to use it for.	459	* clever to use it for.
424	*/	460	*/
425		461
426	struct drm_mode_crtc_page_flip {	462	struct drm_mode_crtc_page_flip {
427	__u32 crtc_id;	463	__u32 crtc_id;
428	__u32 fb_id;	464	__u32 fb_id;
429	__u32 flags;	465	__u32 flags;
430	__u32 reserved;	466	__u32 reserved;
431	__u64 user_data;	467	__u64 user_data;
432	};	468	};
433		469
434	/* create a dumb scanout buffer */	470	/* create a dumb scanout buffer */
435	struct drm_mode_create_dumb {	471	struct drm_mode_create_dumb {
436	uint32_t height;	472	uint32_t height;
437	uint32_t width;	473	uint32_t width;
438	uint32_t bpp;	474	uint32_t bpp;
439	uint32_t flags;	475	uint32_t flags;
440	/* handle, pitch, size will be returned */	476	/* handle, pitch, size will be returned */
441	uint32_t handle;	477	uint32_t handle;
442	uint32_t pitch;	478	uint32_t pitch;
443	uint64_t size;	479	uint64_t size;
444	};	480	};
445		481
446	/* set up for mmap of a dumb scanout buffer */	482	/* set up for mmap of a dumb scanout buffer */
447	struct drm_mode_map_dumb {	483	struct drm_mode_map_dumb {
448	/** Handle for the object being mapped. */	484	/** Handle for the object being mapped. */
449	__u32 handle;	485	__u32 handle;
450	__u32 pad;	486	__u32 pad;
451	/**	487	/**
452	* Fake offset to use for subsequent mmap call	488	* Fake offset to use for subsequent mmap call
453	*	489	*
454	* This is a fixed-size type for 32/64 compatibility.	490	* This is a fixed-size type for 32/64 compatibility.
455	*/	491	*/
456	__u64 offset;	492	__u64 offset;
457	};	493	};
458		494
459	struct drm_mode_destroy_dumb {	495	struct drm_mode_destroy_dumb {
460	uint32_t handle;	496	uint32_t handle;
461	};	497	};
462		498
463	#endif	499	#endif
464	#define>	500	#define>

Subversion Repositories Kolibri OS

(root)/drivers/include/drm/drm_mode.h – Rev 3031 → 4559