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 * MST: Multistream Transport - part of DP 1.2a

/* Multiple stream transport */

#define DP_FAUX_CAP			    0x020   /* 1.2 */

#define DP_MSTM_CAP			    0x021   /* 1.2 */

# define DP_MST_CAP			    (1 << 0)

#define DP_ADAPTER_CTRL			    0x1a0

# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)

#define DP_BRANCH_DEVICE_CTRL		    0x1a1

# define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)

#define DP_PAYLOAD_ALLOCATE_SET		    0x1c0

#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1

#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2

# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)

# define DP_CP_IRQ			    (1 << 2)

# define DP_MCCS_IRQ			    (1 << 3)

#define DP_TEST_PATTERN			    0x221

#define DP_TEST_CRC_R_CR		    0x240

#define DP_TEST_CRC_G_Y			    0x242

#define DP_TEST_CRC_B_CB		    0x244

# define DP_TEST_ACK			    (1 << 0)

# define DP_TEST_NAK			    (1 << 1)

# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)

#define DP_TEST_EDID_CHECKSUM		    0x261

#define DP_TEST_SINK			    0x270

#define DP_TEST_SINK_START	    (1 << 0)

#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */

# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)

# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)

#define DP_BRANCH_OUI			    0x500

#define DP_SET_POWER                        0x600

# define DP_SET_POWER_D0                    0x1

# define DP_SET_POWER_D3                    0x2

# define DP_SET_POWER_MASK                  0x3

#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */

#define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */

#define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */

#define DP_SIDEBAND_MSG_UP_REQ_BASE	    0x1600   /* 1.2 MST */

#define DP_SINK_COUNT_ESI		    0x2002   /* 1.2 */

/* 0-5 sink count */

# define DP_SINK_COUNT_CP_READY             (1 << 6)

/* DP 1.2 Sideband message defines */

/* peer device type - DP 1.2a Table 2-92 */

#define DP_PEER_DEVICE_NONE		0x0

#define DP_PEER_DEVICE_SOURCE_OR_SST	0x1

#define DP_PEER_DEVICE_MST_BRANCHING	0x2

#define DP_PEER_DEVICE_SST_SINK		0x3

#define DP_PEER_DEVICE_DP_LEGACY_CONV	0x4

/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */

#define DP_LINK_ADDRESS			0x01

#define DP_CONNECTION_STATUS_NOTIFY	0x02

#define DP_ENUM_PATH_RESOURCES		0x10

#define DP_ALLOCATE_PAYLOAD		0x11

#define DP_QUERY_PAYLOAD		0x12

#define DP_RESOURCE_STATUS_NOTIFY	0x13

#define DP_CLEAR_PAYLOAD_ID_TABLE	0x14

#define DP_REMOTE_DPCD_READ		0x20

#define DP_REMOTE_DPCD_WRITE		0x21

#define DP_REMOTE_I2C_READ		0x22

#define DP_REMOTE_I2C_WRITE		0x23

#define DP_POWER_UP_PHY			0x24

#define DP_POWER_DOWN_PHY		0x25

#define DP_SINK_EVENT_NOTIFY		0x30

#define DP_QUERY_STREAM_ENC_STATUS	0x38

/* DP 1.2 MST sideband nak reasons - table 2.84 */

#define DP_NAK_WRITE_FAILURE		0x01

#define DP_NAK_INVALID_READ		0x02

#define DP_NAK_CRC_FAILURE		0x03

#define DP_NAK_BAD_PARAM		0x04

#define DP_NAK_DEFER			0x05

#define DP_NAK_LINK_FAILURE		0x06

#define DP_NAK_NO_RESOURCES		0x07

#define DP_NAK_DPCD_FAIL		0x08

#define DP_NAK_I2C_NAK			0x09

#define DP_NAK_ALLOCATE_FAIL		0x0a

/*

 * DisplayPort AUX channel

 */

/**

 * struct drm_dp_aux_msg - DisplayPort AUX channel transaction

 * @address: address of the (first) register to access

 * @request: contains the type of transaction (see DP_AUX_* macros)

 * @reply: upon completion, contains the reply type of the transaction

 * @buffer: pointer to a transmission or reception buffer

 * @size: size of @buffer

 */

struct drm_dp_aux_msg {

	unsigned int address;

	u8 request;

	u8 reply;

	void *buffer;

	size_t size;

};

/**

 * struct drm_dp_aux - DisplayPort AUX channel

 * @name: user-visible name of this AUX channel and the I2C-over-AUX adapter

 * @ddc: I2C adapter that can be used for I2C-over-AUX communication

 * @dev: pointer to struct device that is the parent for this AUX channel

 * @hw_mutex: internal mutex used for locking transfers

 * @transfer: transfers a message representing a single AUX transaction

 *

 * The .dev field should be set to a pointer to the device that implements

 * the AUX channel.

 *

 * The .name field may be used to specify the name of the I2C adapter. If set to

 * NULL, dev_name() of .dev will be used.

 *

 * Drivers provide a hardware-specific implementation of how transactions

 * are executed via the .transfer() function. A pointer to a drm_dp_aux_msg

 * structure describing the transaction is passed into this function. Upon

 * success, the implementation should return the number of payload bytes

 * that were transferred, or a negative error-code on failure. Helpers

 * propagate errors from the .transfer() function, with the exception of

 * the -EBUSY error, which causes a transaction to be retried. On a short,

 * helpers will return -EPROTO to make it simpler to check for failure.

 *

 * An AUX channel can also be used to transport I2C messages to a sink. A

 * typical application of that is to access an EDID that's present in the

 * sink device. The .transfer() function can also be used to execute such

 * transactions. The drm_dp_aux_register_i2c_bus() function registers an

 * I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers

 * should call drm_dp_aux_unregister_i2c_bus() to remove the I2C adapter.

 *

 * Note that the aux helper code assumes that the .transfer() function

 * only modifies the reply field of the drm_dp_aux_msg structure.  The

 * retry logic and i2c helpers assume this is the case.

 */

struct drm_dp_aux {

	const char *name;

	struct i2c_adapter ddc;

	struct device *dev;

	struct mutex hw_mutex;

	ssize_t (*transfer)(struct drm_dp_aux *aux,

			    struct drm_dp_aux_msg *msg);

};

ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,

			 void *buffer, size_t size);

ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,

			  void *buffer, size_t size);

/**

 * drm_dp_dpcd_readb() - read a single byte from the DPCD

 * @aux: DisplayPort AUX channel

 * @offset: address of the register to read

 * @valuep: location where the value of the register will be stored

 *

 * Returns the number of bytes transferred (1) on success, or a negative

 * error code on failure.

 */

static inline ssize_t drm_dp_dpcd_readb(struct drm_dp_aux *aux,

					unsigned int offset, u8 *valuep)

{

	return drm_dp_dpcd_read(aux, offset, valuep, 1);

}

/**

 * drm_dp_dpcd_writeb() - write a single byte to the DPCD

 * @aux: DisplayPort AUX channel

 * @offset: address of the register to write

 * @value: value to write to the register

 *

 * Returns the number of bytes transferred (1) on success, or a negative

 * error code on failure.

 */

static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux,

					 unsigned int offset, u8 value)

{

	return drm_dp_dpcd_write(aux, offset, &value, 1);

}

int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,

				 u8 status[DP_LINK_STATUS_SIZE]);

/*

 * DisplayPort link

 */

#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)

struct drm_dp_link {

	unsigned char revision;

	unsigned int rate;

	unsigned int num_lanes;

	unsigned long capabilities;

};

int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);

int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);

int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);

int drm_dp_aux_register(struct drm_dp_aux *aux);

void drm_dp_aux_unregister(struct drm_dp_aux *aux);