WebSVN – Kolibri OS – Diff – /drivers/include/asm/pgtable_types.h


#ifndef _ASM_X86_PGTABLE_DEFS_H
#define _ASM_X86_PGTABLE_DEFS_H
 
#include 
#include 
 
#define FIRST_USER_ADDRESS	0UL
 
#define _PAGE_BIT_PRESENT	0	/* is present */
#define _PAGE_BIT_RW		1	/* writeable */
#define _PAGE_BIT_USER		2	/* userspace addressable */
#define _PAGE_BIT_PWT		3	/* page write through */
#define _PAGE_BIT_PCD		4	/* page cache disabled */
#define _PAGE_BIT_ACCESSED	5	/* was accessed (raised by CPU) */
#define _PAGE_BIT_DIRTY		6	/* was written to (raised by CPU) */
#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page */
#define _PAGE_BIT_PAT		7	/* on 4KB pages */
#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
#define _PAGE_BIT_SOFTW1	9	/* available for programmer */
#define _PAGE_BIT_SOFTW2	10	/* " */
#define _PAGE_BIT_SOFTW3	11	/* " */
#define _PAGE_BIT_PAT_LARGE	12	/* On 2MB or 1GB pages */
#define _PAGE_BIT_SPECIAL	_PAGE_BIT_SOFTW1
#define _PAGE_BIT_CPA_TEST	_PAGE_BIT_SOFTW1
#define _PAGE_BIT_SPLITTING	_PAGE_BIT_SOFTW2 /* only valid on a PSE pmd */
#define _PAGE_BIT_HIDDEN	_PAGE_BIT_SOFTW3 /* hidden by kmemcheck */
#define _PAGE_BIT_SOFT_DIRTY	_PAGE_BIT_SOFTW3 /* software dirty tracking */
#define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
 
 
 
 
 
 
 
 
 
/* If _PAGE_BIT_PRESENT is clear, we use these: */
/* - if the user mapped it with PROT_NONE; pte_present gives true */
#define _PAGE_BIT_PROTNONE	_PAGE_BIT_GLOBAL
 
 
 
#define _PAGE_PRESENT	(_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
#define _PAGE_RW	(_AT(pteval_t, 1) << _PAGE_BIT_RW)
#define _PAGE_USER	(_AT(pteval_t, 1) << _PAGE_BIT_USER)
#define _PAGE_PWT	(_AT(pteval_t, 1) << _PAGE_BIT_PWT)
#define _PAGE_PCD	(_AT(pteval_t, 1) << _PAGE_BIT_PCD)
#define _PAGE_ACCESSED	(_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
#define _PAGE_DIRTY	(_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
#define _PAGE_PSE	(_AT(pteval_t, 1) << _PAGE_BIT_PSE)
#define _PAGE_GLOBAL	(_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
#define _PAGE_SOFTW1	(_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
#define _PAGE_SOFTW2	(_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
#define _PAGE_PAT	(_AT(pteval_t, 1) << _PAGE_BIT_PAT)
#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
#define _PAGE_SPECIAL	(_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
#define _PAGE_CPA_TEST	(_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
#define _PAGE_SPLITTING	(_AT(pteval_t, 1) << _PAGE_BIT_SPLITTING)
#define __HAVE_ARCH_PTE_SPECIAL
 
#ifdef CONFIG_KMEMCHECK
#define _PAGE_HIDDEN	(_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)
#else
#define _PAGE_HIDDEN	(_AT(pteval_t, 0))
#endif
 
/*
 * The same hidden bit is used by kmemcheck, but since kmemcheck
 * works on kernel pages while soft-dirty engine on user space,
 * they do not conflict with each other.
 */
 
#ifdef CONFIG_MEM_SOFT_DIRTY
#define _PAGE_SOFT_DIRTY	(_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
#else
#define _PAGE_SOFT_DIRTY	(_AT(pteval_t, 0))
#endif
 
/*
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 * Tracking soft dirty bit when a page goes to a swap is tricky.
 * We need a bit which can be stored in pte _and_ not conflict
 * with swap entry format. On x86 bits 6 and 7 are *not* involved
 * into swap entry computation, but bit 6 is used for nonlinear
 * file mapping, so we borrow bit 7 for soft dirty tracking.
 *
 * Please note that this bit must be treated as swap dirty page
 * mark if and only if the PTE has present bit clear!
 */
#ifdef CONFIG_MEM_SOFT_DIRTY
#define _PAGE_SWP_SOFT_DIRTY	_PAGE_PSE
#else
#define _PAGE_SWP_SOFT_DIRTY	(_AT(pteval_t, 0))
#endif
 
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
#define _PAGE_NX	(_AT(pteval_t, 1) << _PAGE_BIT_NX)
#else
#define _PAGE_NX	(_AT(pteval_t, 0))
#endif
 
 
#define _PAGE_PROTNONE	(_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
 
#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |	\
			 _PAGE_ACCESSED | _PAGE_DIRTY)
#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED |	\
			 _PAGE_DIRTY)
 
/* Set of bits not changed in pte_modify */
#define _PAGE_CHG_MASK	(PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |		\
			 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY |	\
			 _PAGE_SOFT_DIRTY)
#define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
 
/*
 * The cache modes defined here are used to translate between pure SW usage
 * and the HW defined cache mode bits and/or PAT entries.
 *
 * The resulting bits for PWT, PCD and PAT should be chosen in a way
 * to have the WB mode at index 0 (all bits clear). This is the default
 * right now and likely would break too much if changed.
 */
#ifndef __ASSEMBLY__
enum page_cache_mode {
	_PAGE_CACHE_MODE_WB = 0,
	_PAGE_CACHE_MODE_WC = 1,
	_PAGE_CACHE_MODE_UC_MINUS = 2,
	_PAGE_CACHE_MODE_UC = 3,
	_PAGE_CACHE_MODE_WT = 4,
	_PAGE_CACHE_MODE_WP = 5,
	_PAGE_CACHE_MODE_NUM = 8
};
#endif
 
#define _PAGE_CACHE_MASK	(_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
#define _PAGE_NOCACHE		(cachemode2protval(_PAGE_CACHE_MODE_UC))
 
#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
				 _PAGE_ACCESSED | _PAGE_NX)
 
#define PAGE_SHARED_EXEC	__pgprot(_PAGE_PRESENT | _PAGE_RW |	\
					 _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_COPY_NOEXEC	__pgprot(_PAGE_PRESENT | _PAGE_USER |	\
					 _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_COPY_EXEC		__pgprot(_PAGE_PRESENT | _PAGE_USER |	\
					 _PAGE_ACCESSED)
#define PAGE_COPY		PAGE_COPY_NOEXEC
#define PAGE_READONLY		__pgprot(_PAGE_PRESENT | _PAGE_USER |	\
					 _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_READONLY_EXEC	__pgprot(_PAGE_PRESENT | _PAGE_USER |	\
					 _PAGE_ACCESSED)
 
#define __PAGE_KERNEL_EXEC						\
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
#define __PAGE_KERNEL		(__PAGE_KERNEL_EXEC | _PAGE_NX)
 
#define __PAGE_KERNEL_RO		(__PAGE_KERNEL & ~_PAGE_RW)
#define __PAGE_KERNEL_RX		(__PAGE_KERNEL_EXEC & ~_PAGE_RW)
#define __PAGE_KERNEL_NOCACHE		(__PAGE_KERNEL | _PAGE_NOCACHE)
#define __PAGE_KERNEL_VSYSCALL		(__PAGE_KERNEL_RX | _PAGE_USER)
#define __PAGE_KERNEL_VVAR		(__PAGE_KERNEL_RO | _PAGE_USER)
#define __PAGE_KERNEL_LARGE		(__PAGE_KERNEL | _PAGE_PSE)
#define __PAGE_KERNEL_LARGE_EXEC	(__PAGE_KERNEL_EXEC | _PAGE_PSE)
 
#define __PAGE_KERNEL_IO		(__PAGE_KERNEL)
#define __PAGE_KERNEL_IO_NOCACHE	(__PAGE_KERNEL_NOCACHE)
 
#define PAGE_KERNEL			__pgprot(__PAGE_KERNEL)
#define PAGE_KERNEL_RO			__pgprot(__PAGE_KERNEL_RO)
#define PAGE_KERNEL_EXEC		__pgprot(__PAGE_KERNEL_EXEC)
#define PAGE_KERNEL_RX			__pgprot(__PAGE_KERNEL_RX)
#define PAGE_KERNEL_NOCACHE		__pgprot(__PAGE_KERNEL_NOCACHE)
#define PAGE_KERNEL_LARGE		__pgprot(__PAGE_KERNEL_LARGE)
#define PAGE_KERNEL_LARGE_EXEC		__pgprot(__PAGE_KERNEL_LARGE_EXEC)
#define PAGE_KERNEL_VSYSCALL		__pgprot(__PAGE_KERNEL_VSYSCALL)
#define PAGE_KERNEL_VVAR		__pgprot(__PAGE_KERNEL_VVAR)
 
#define PAGE_KERNEL_IO			__pgprot(__PAGE_KERNEL_IO)
#define PAGE_KERNEL_IO_NOCACHE		__pgprot(__PAGE_KERNEL_IO_NOCACHE)
 
/*         xwr */
#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY_EXEC
#define __P101	PAGE_READONLY_EXEC
#define __P110	PAGE_COPY_EXEC
#define __P111	PAGE_COPY_EXEC
 
#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY_EXEC
#define __S101	PAGE_READONLY_EXEC
#define __S110	PAGE_SHARED_EXEC
#define __S111	PAGE_SHARED_EXEC
 
/*
 * early identity mapping  pte attrib macros.
 */
#ifdef CONFIG_X86_64
#define __PAGE_KERNEL_IDENT_LARGE_EXEC	__PAGE_KERNEL_LARGE_EXEC
#else
#define PTE_IDENT_ATTR	 0x003		/* PRESENT+RW */
#define PDE_IDENT_ATTR	 0x063		/* PRESENT+RW+DIRTY+ACCESSED */
#define PGD_IDENT_ATTR	 0x001		/* PRESENT (no other attributes) */
#endif
 
#ifdef CONFIG_X86_32
# include 
#else
# include 
#endif
 
#ifndef __ASSEMBLY__
 
#include 
 
/* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
#define PTE_PFN_MASK		((pteval_t)PHYSICAL_PAGE_MASK)
 
/* Extracts the flags from a (pte|pmd|pud|pgd)val_t of a 4KB page */
#define PTE_FLAGS_MASK		(~PTE_PFN_MASK)
 
typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
 
typedef struct { pgdval_t pgd; } pgd_t;
 
static inline pgd_t native_make_pgd(pgdval_t val)
{
	return (pgd_t) { val };
}
 
static inline pgdval_t native_pgd_val(pgd_t pgd)
{
	return pgd.pgd;
}
 
static inline pgdval_t pgd_flags(pgd_t pgd)
{
	return native_pgd_val(pgd) & PTE_FLAGS_MASK;
}
 
#if CONFIG_PGTABLE_LEVELS > 3
typedef struct { pudval_t pud; } pud_t;
 
static inline pud_t native_make_pud(pmdval_t val)
{
	return (pud_t) { val };
}
 
static inline pudval_t native_pud_val(pud_t pud)
{
	return pud.pud;
}
#else
#include 
 
static inline pudval_t native_pud_val(pud_t pud)
{
	return native_pgd_val(pud.pgd);
}
#endif
 
#if CONFIG_PGTABLE_LEVELS > 2
typedef struct { pmdval_t pmd; } pmd_t;
 
static inline pmd_t native_make_pmd(pmdval_t val)
{
	return (pmd_t) { val };
}
 
static inline pmdval_t native_pmd_val(pmd_t pmd)
{
	return pmd.pmd;
}
#else
#include 
 
static inline pmdval_t native_pmd_val(pmd_t pmd)
{
	return native_pgd_val(pmd.pud.pgd);
}
#endif
 
static inline pudval_t pud_pfn_mask(pud_t pud)
{
	if (native_pud_val(pud) & _PAGE_PSE)
		return PHYSICAL_PUD_PAGE_MASK;
	else
		return PTE_PFN_MASK;
}
 
static inline pudval_t pud_flags_mask(pud_t pud)
{
	return ~pud_pfn_mask(pud);
}
 
static inline pudval_t pud_flags(pud_t pud)
{
	return native_pud_val(pud) & pud_flags_mask(pud);
}
 
static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
{
	if (native_pmd_val(pmd) & _PAGE_PSE)
		return PHYSICAL_PMD_PAGE_MASK;
	else
		return PTE_PFN_MASK;
}
 
static inline pmdval_t pmd_flags_mask(pmd_t pmd)
{
	return ~pmd_pfn_mask(pmd);
}
 
static inline pmdval_t pmd_flags(pmd_t pmd)
{
	return native_pmd_val(pmd) & pmd_flags_mask(pmd);
}
 
static inline pte_t native_make_pte(pteval_t val)
{
	return (pte_t) { .pte = val };
}
 
static inline pteval_t native_pte_val(pte_t pte)
{
	return pte.pte;
}
 
static inline pteval_t pte_flags(pte_t pte)
{
	return native_pte_val(pte) & PTE_FLAGS_MASK;
}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#define pgprot_val(x)	((x).pgprot)
#define __pgprot(x)	((pgprot_t) { (x) } )
 
extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];
extern uint8_t __pte2cachemode_tbl[8];
 
#define __pte2cm_idx(cb)				\
	((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) |		\
	 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) |		\
	 (((cb) >> _PAGE_BIT_PWT) & 1))
#define __cm_idx2pte(i)					\
	((((i) & 4) << (_PAGE_BIT_PAT - 2)) |		\
	 (((i) & 2) << (_PAGE_BIT_PCD - 1)) |		\
	 (((i) & 1) << _PAGE_BIT_PWT))
 
static inline unsigned long cachemode2protval(enum page_cache_mode pcm)
{
	if (likely(pcm == 0))
		return 0;
	return __cachemode2pte_tbl[pcm];
}
static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
{
	return __pgprot(cachemode2protval(pcm));
}
static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
{
	unsigned long masked;
 
	masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
	if (likely(masked == 0))
		return 0;
	return __pte2cachemode_tbl[__pte2cm_idx(masked)];
}
static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
{
	pgprot_t new;
	unsigned long val;
 
	val = pgprot_val(pgprot);
	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
		((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
	return new;
}
static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
{
	pgprot_t new;
	unsigned long val;
 
	val = pgprot_val(pgprot);
	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
			  ((val & _PAGE_PAT_LARGE) >>
			   (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
	return new;
}
 
 
typedef struct page *pgtable_t;
 
extern pteval_t __supported_pte_mask;
extern void set_nx(void);
extern int nx_enabled;
 
#define pgprot_writecombine	pgprot_writecombine
extern pgprot_t pgprot_writecombine(pgprot_t prot);
 
#define pgprot_writethrough	pgprot_writethrough
extern pgprot_t pgprot_writethrough(pgprot_t prot);
 
/* Indicate that x86 has its own track and untrack pfn vma functions */
#define __HAVE_PFNMAP_TRACKING
 
#define __HAVE_PHYS_MEM_ACCESS_PROT
struct file;
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                              unsigned long size, pgprot_t vma_prot);
int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
                              unsigned long size, pgprot_t *vma_prot);
 
/* Install a pte for a particular vaddr in kernel space. */
void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 
#ifdef CONFIG_X86_32
extern void native_pagetable_init(void);
#else
#define native_pagetable_init        paging_init
#endif
 
struct seq_file;
extern void arch_report_meminfo(struct seq_file *m);
 
enum pg_level {
	PG_LEVEL_NONE,
	PG_LEVEL_4K,
	PG_LEVEL_2M,
	PG_LEVEL_1G,
	PG_LEVEL_NUM
};
 
#ifdef CONFIG_PROC_FS
extern void update_page_count(int level, unsigned long pages);
#else
static inline void update_page_count(int level, unsigned long pages) { }
#endif
 
/*
 * Helper function that returns the kernel pagetable entry controlling
 * the virtual address 'address'. NULL means no pagetable entry present.
 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
 * as a pte too.
 */
extern pte_t *lookup_address(unsigned long address, unsigned int *level);
extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
				    unsigned int *level);
extern pmd_t *lookup_pmd_address(unsigned long address);
extern phys_addr_t slow_virt_to_phys(void *__address);
extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
				   unsigned numpages, unsigned long page_flags);
void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
			       unsigned numpages);
#endif	/* !__ASSEMBLY__ */
 
#endif /* _ASM_X86_PGTABLE_DEFS_H */

Rev 5270	Rev 6082
1	#ifndef _ASM_X86_PGTABLE_DEFS_H	1	#ifndef _ASM_X86_PGTABLE_DEFS_H
2	#define _ASM_X86_PGTABLE_DEFS_H	2	#define _ASM_X86_PGTABLE_DEFS_H
3		3
4	#include	4	#include
5	#include	5	#include
6		6
7	#define FIRST_USER_ADDRESS 0	7	#define FIRST_USER_ADDRESS 0UL
8		8
9	#define _PAGE_BIT_PRESENT 0 /* is present */	9	#define _PAGE_BIT_PRESENT 0 /* is present */
10	#define _PAGE_BIT_RW 1 /* writeable */	10	#define _PAGE_BIT_RW 1 /* writeable */
11	#define _PAGE_BIT_USER 2 /* userspace addressable */	11	#define _PAGE_BIT_USER 2 /* userspace addressable */
12	#define _PAGE_BIT_PWT 3 /* page write through */	12	#define _PAGE_BIT_PWT 3 /* page write through */
13	#define _PAGE_BIT_PCD 4 /* page cache disabled */	13	#define _PAGE_BIT_PCD 4 /* page cache disabled */
14	#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */	14	#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15	#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */	15	#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16	#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */	16	#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17	#define _PAGE_BIT_PAT 7 /* on 4KB pages */	17	#define _PAGE_BIT_PAT 7 /* on 4KB pages */
18	#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */	18	#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19	#define _PAGE_BIT_SOFTW1 9 /* available for programmer */	19	#define _PAGE_BIT_SOFTW1 9 /* available for programmer */
20	#define _PAGE_BIT_SOFTW2 10 /* " */	20	#define _PAGE_BIT_SOFTW2 10 /* " */
21	#define _PAGE_BIT_SOFTW3 11 /* " */	21	#define _PAGE_BIT_SOFTW3 11 /* " */
22	#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */	22	#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23	#define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1	23	#define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
24	#define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1	24	#define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
25	#define _PAGE_BIT_SPLITTING _PAGE_BIT_SOFTW2 /* only valid on a PSE pmd */	25	#define _PAGE_BIT_SPLITTING _PAGE_BIT_SOFTW2 /* only valid on a PSE pmd */
26	#define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */	26	#define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */
27	#define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */	27	#define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
28	#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */	28	#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
29		-
30	/*	-
31	* Swap offsets on configurations that allow automatic NUMA balancing use the	-
32	* bits after _PAGE_BIT_GLOBAL. To uniquely distinguish NUMA hinting PTEs from	-
33	* swap entries, we use the first bit after _PAGE_BIT_GLOBAL and shrink the	-
34	* maximum possible swap space from 16TB to 8TB.	-
35	*/	-
36	#define _PAGE_BIT_NUMA (_PAGE_BIT_GLOBAL+1)	-
37		29
38	/* If _PAGE_BIT_PRESENT is clear, we use these: */	30	/* If _PAGE_BIT_PRESENT is clear, we use these: */
39	/* - if the user mapped it with PROT_NONE; pte_present gives true */	31	/* - if the user mapped it with PROT_NONE; pte_present gives true */
40	#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL	32	#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
41	/* - set: nonlinear file mapping, saved PTE; unset:swap */	-
42	#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY	-
43		33
44	#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)	34	#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
45	#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)	35	#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
46	#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)	36	#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
47	#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)	37	#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
48	#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)	38	#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
49	#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)	39	#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
50	#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)	40	#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
51	#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)	41	#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
52	#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)	42	#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
53	#define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)	43	#define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
54	#define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)	44	#define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
55	#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)	45	#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
56	#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)	46	#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
57	#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)	47	#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
58	#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)	48	#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
59	#define _PAGE_SPLITTING (_AT(pteval_t, 1) << _PAGE_BIT_SPLITTING)	49	#define _PAGE_SPLITTING (_AT(pteval_t, 1) << _PAGE_BIT_SPLITTING)
60	#define __HAVE_ARCH_PTE_SPECIAL	50	#define __HAVE_ARCH_PTE_SPECIAL
61		51
62	#ifdef CONFIG_KMEMCHECK	52	#ifdef CONFIG_KMEMCHECK
63	#define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)	53	#define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)
64	#else	54	#else
65	#define _PAGE_HIDDEN (_AT(pteval_t, 0))	55	#define _PAGE_HIDDEN (_AT(pteval_t, 0))
66	#endif	56	#endif
67		57
68	/*	58	/*
69	* The same hidden bit is used by kmemcheck, but since kmemcheck	59	* The same hidden bit is used by kmemcheck, but since kmemcheck
70	* works on kernel pages while soft-dirty engine on user space,	60	* works on kernel pages while soft-dirty engine on user space,
71	* they do not conflict with each other.	61	* they do not conflict with each other.
72	*/	62	*/
73		63
74	#ifdef CONFIG_MEM_SOFT_DIRTY	64	#ifdef CONFIG_MEM_SOFT_DIRTY
75	#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)	65	#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
76	#else	66	#else
77	#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))	67	#define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
78	#endif	68	#endif
79		69
80	/*	70	/*
81	* _PAGE_NUMA distinguishes between a numa hinting minor fault and a page	-
82	* that is not present. The hinting fault gathers numa placement statistics	-
83	* (see pte_numa()). The bit is always zero when the PTE is not present.	-
84	*	-
85	* The bit picked must be always zero when the pmd is present and not	-
86	* present, so that we don't lose information when we set it while	-
87	* atomically clearing the present bit.	-
88	*/	-
89	#ifdef CONFIG_NUMA_BALANCING	-
90	#define _PAGE_NUMA (_AT(pteval_t, 1) << _PAGE_BIT_NUMA)	-
91	#else	-
92	#define _PAGE_NUMA (_AT(pteval_t, 0))	-
93	#endif	-
94		-
95	/*	-
96	* Tracking soft dirty bit when a page goes to a swap is tricky.	71	* Tracking soft dirty bit when a page goes to a swap is tricky.
97	* We need a bit which can be stored in pte _and_ not conflict	72	* We need a bit which can be stored in pte _and_ not conflict
98	* with swap entry format. On x86 bits 6 and 7 are not involved	73	* with swap entry format. On x86 bits 6 and 7 are not involved
99	* into swap entry computation, but bit 6 is used for nonlinear	74	* into swap entry computation, but bit 6 is used for nonlinear
100	* file mapping, so we borrow bit 7 for soft dirty tracking.	75	* file mapping, so we borrow bit 7 for soft dirty tracking.
101	*	76	*
102	* Please note that this bit must be treated as swap dirty page	77	* Please note that this bit must be treated as swap dirty page
103	* mark if and only if the PTE has present bit clear!	78	* mark if and only if the PTE has present bit clear!
104	*/	79	*/
105	#ifdef CONFIG_MEM_SOFT_DIRTY	80	#ifdef CONFIG_MEM_SOFT_DIRTY
106	#define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE	81	#define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE
107	#else	82	#else
108	#define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))	83	#define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
109	#endif	84	#endif
110		85
111	#if defined(CONFIG_X86_64) \|\| defined(CONFIG_X86_PAE)	86	#if defined(CONFIG_X86_64) \|\| defined(CONFIG_X86_PAE)
112	#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)	87	#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
113	#else	88	#else
114	#define _PAGE_NX (_AT(pteval_t, 0))	89	#define _PAGE_NX (_AT(pteval_t, 0))
115	#endif	90	#endif
116		-
117	#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)	91
118	#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)	92	#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
119		93
120	#define _PAGE_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| \	94	#define _PAGE_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| \
121	_PAGE_ACCESSED \| _PAGE_DIRTY)	95	_PAGE_ACCESSED \| _PAGE_DIRTY)
122	#define _KERNPG_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_ACCESSED \| \	96	#define _KERNPG_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_ACCESSED \| \
123	_PAGE_DIRTY)	97	_PAGE_DIRTY)
124		98
125	/* Set of bits not changed in pte_modify */	99	/* Set of bits not changed in pte_modify */
126	#define _PAGE_CHG_MASK (PTE_PFN_MASK \| _PAGE_PCD \| _PAGE_PWT \| \	100	#define _PAGE_CHG_MASK (PTE_PFN_MASK \| _PAGE_PCD \| _PAGE_PWT \| \
127	_PAGE_SPECIAL \| _PAGE_ACCESSED \| _PAGE_DIRTY \| \	101	_PAGE_SPECIAL \| _PAGE_ACCESSED \| _PAGE_DIRTY \| \
128	_PAGE_SOFT_DIRTY \| _PAGE_NUMA)	102	_PAGE_SOFT_DIRTY)
129	#define _HPAGE_CHG_MASK (_PAGE_CHG_MASK \| _PAGE_PSE \| _PAGE_NUMA)	103	#define _HPAGE_CHG_MASK (_PAGE_CHG_MASK \| _PAGE_PSE)
130		104
131	/*	105	/*
132	* The cache modes defined here are used to translate between pure SW usage	106	* The cache modes defined here are used to translate between pure SW usage
133	* and the HW defined cache mode bits and/or PAT entries.	107	* and the HW defined cache mode bits and/or PAT entries.
134	*	108	*
135	* The resulting bits for PWT, PCD and PAT should be chosen in a way	109	* The resulting bits for PWT, PCD and PAT should be chosen in a way
136	* to have the WB mode at index 0 (all bits clear). This is the default	110	* to have the WB mode at index 0 (all bits clear). This is the default
137	* right now and likely would break too much if changed.	111	* right now and likely would break too much if changed.
138	*/	112	*/
139	#ifndef __ASSEMBLY__	113	#ifndef __ASSEMBLY__
140	enum page_cache_mode {	114	enum page_cache_mode {
141	_PAGE_CACHE_MODE_WB = 0,	115	_PAGE_CACHE_MODE_WB = 0,
142	_PAGE_CACHE_MODE_WC = 1,	116	_PAGE_CACHE_MODE_WC = 1,
143	_PAGE_CACHE_MODE_UC_MINUS = 2,	117	_PAGE_CACHE_MODE_UC_MINUS = 2,
144	_PAGE_CACHE_MODE_UC = 3,	118	_PAGE_CACHE_MODE_UC = 3,
145	_PAGE_CACHE_MODE_WT = 4,	119	_PAGE_CACHE_MODE_WT = 4,
146	_PAGE_CACHE_MODE_WP = 5,	120	_PAGE_CACHE_MODE_WP = 5,
147	_PAGE_CACHE_MODE_NUM = 8	121	_PAGE_CACHE_MODE_NUM = 8
148	};	122	};
149	#endif	123	#endif
150		124
151	#define _PAGE_CACHE_MASK (_PAGE_PAT \| _PAGE_PCD \| _PAGE_PWT)	125	#define _PAGE_CACHE_MASK (_PAGE_PAT \| _PAGE_PCD \| _PAGE_PWT)
152	#define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))	126	#define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
153		127
154	#define PAGE_NONE __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)	128	#define PAGE_NONE __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)
155	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| \	129	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| \
156	_PAGE_ACCESSED \| _PAGE_NX)	130	_PAGE_ACCESSED \| _PAGE_NX)
157		131
158	#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_RW \| \	132	#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_RW \| \
159	_PAGE_USER \| _PAGE_ACCESSED)	133	_PAGE_USER \| _PAGE_ACCESSED)
160	#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \	134	#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \
161	_PAGE_ACCESSED \| _PAGE_NX)	135	_PAGE_ACCESSED \| _PAGE_NX)
162	#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \	136	#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \
163	_PAGE_ACCESSED)	137	_PAGE_ACCESSED)
164	#define PAGE_COPY PAGE_COPY_NOEXEC	138	#define PAGE_COPY PAGE_COPY_NOEXEC
165	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \	139	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \
166	_PAGE_ACCESSED \| _PAGE_NX)	140	_PAGE_ACCESSED \| _PAGE_NX)
167	#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \	141	#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| \
168	_PAGE_ACCESSED)	142	_PAGE_ACCESSED)
169		143
170	#define __PAGE_KERNEL_EXEC \	144	#define __PAGE_KERNEL_EXEC \
171	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED \| _PAGE_GLOBAL)	145	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED \| _PAGE_GLOBAL)
172	#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC \| _PAGE_NX)	146	#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC \| _PAGE_NX)
173		147
174	#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)	148	#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
175	#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)	149	#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
176	#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL \| _PAGE_NOCACHE)	150	#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL \| _PAGE_NOCACHE)
177	#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX \| _PAGE_USER)	151	#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX \| _PAGE_USER)
178	#define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO \| _PAGE_USER)	152	#define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO \| _PAGE_USER)
179	#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL \| _PAGE_PSE)	153	#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL \| _PAGE_PSE)
180	#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC \| _PAGE_PSE)	154	#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC \| _PAGE_PSE)
181		155
182	#define __PAGE_KERNEL_IO (__PAGE_KERNEL)	156	#define __PAGE_KERNEL_IO (__PAGE_KERNEL)
183	#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE)	157	#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE)
184		158
185	#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)	159	#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
186	#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)	160	#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
187	#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)	161	#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
188	#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)	162	#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
189	#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)	163	#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
190	#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)	164	#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
191	#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)	165	#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
192	#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)	166	#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
193	#define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR)	167	#define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR)
194		168
195	#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)	169	#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
196	#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)	170	#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
197		171
198	/* xwr */	172	/* xwr */
199	#define __P000 PAGE_NONE	173	#define __P000 PAGE_NONE
200	#define __P001 PAGE_READONLY	174	#define __P001 PAGE_READONLY
201	#define __P010 PAGE_COPY	175	#define __P010 PAGE_COPY
202	#define __P011 PAGE_COPY	176	#define __P011 PAGE_COPY
203	#define __P100 PAGE_READONLY_EXEC	177	#define __P100 PAGE_READONLY_EXEC
204	#define __P101 PAGE_READONLY_EXEC	178	#define __P101 PAGE_READONLY_EXEC
205	#define __P110 PAGE_COPY_EXEC	179	#define __P110 PAGE_COPY_EXEC
206	#define __P111 PAGE_COPY_EXEC	180	#define __P111 PAGE_COPY_EXEC
207		181
208	#define __S000 PAGE_NONE	182	#define __S000 PAGE_NONE
209	#define __S001 PAGE_READONLY	183	#define __S001 PAGE_READONLY
210	#define __S010 PAGE_SHARED	184	#define __S010 PAGE_SHARED
211	#define __S011 PAGE_SHARED	185	#define __S011 PAGE_SHARED
212	#define __S100 PAGE_READONLY_EXEC	186	#define __S100 PAGE_READONLY_EXEC
213	#define __S101 PAGE_READONLY_EXEC	187	#define __S101 PAGE_READONLY_EXEC
214	#define __S110 PAGE_SHARED_EXEC	188	#define __S110 PAGE_SHARED_EXEC
215	#define __S111 PAGE_SHARED_EXEC	189	#define __S111 PAGE_SHARED_EXEC
216		190
217	/*	191	/*
218	* early identity mapping pte attrib macros.	192	* early identity mapping pte attrib macros.
219	*/	193	*/
220	#ifdef CONFIG_X86_64	194	#ifdef CONFIG_X86_64
221	#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC	195	#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
222	#else	196	#else
223	#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */	197	#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
224	#define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */	198	#define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
225	#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */	199	#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
226	#endif	200	#endif
227		201
228	#ifdef CONFIG_X86_32	202	#ifdef CONFIG_X86_32
229	# include	203	# include
230	#else	204	#else
231	# include	205	# include
232	#endif	206	#endif
233		207
234	#ifndef __ASSEMBLY__	208	#ifndef __ASSEMBLY__
235		209
236	#include	210	#include
237		211
238	/* PTE_PFN_MASK extracts the PFN from a (pte\|pmd\|pud\|pgd)val_t */	212	/* Extracts the PFN from a (pte\|pmd\|pud\|pgd)val_t of a 4KB page */
239	#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)	213	#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
240		214
241	/* PTE_FLAGS_MASK extracts the flags from a (pte\|pmd\|pud\|pgd)val_t */	215	/* Extracts the flags from a (pte\|pmd\|pud\|pgd)val_t of a 4KB page */
242	#define PTE_FLAGS_MASK (~PTE_PFN_MASK)	216	#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
243		217
244	typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;	218	typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
245		219
246	typedef struct { pgdval_t pgd; } pgd_t;	220	typedef struct { pgdval_t pgd; } pgd_t;
247		221
248	static inline pgd_t native_make_pgd(pgdval_t val)	222	static inline pgd_t native_make_pgd(pgdval_t val)
249	{	223	{
250	return (pgd_t) { val };	224	return (pgd_t) { val };
251	}	225	}
252		226
253	static inline pgdval_t native_pgd_val(pgd_t pgd)	227	static inline pgdval_t native_pgd_val(pgd_t pgd)
254	{	228	{
255	return pgd.pgd;	229	return pgd.pgd;
256	}	230	}
257		231
258	static inline pgdval_t pgd_flags(pgd_t pgd)	232	static inline pgdval_t pgd_flags(pgd_t pgd)
259	{	233	{
260	return native_pgd_val(pgd) & PTE_FLAGS_MASK;	234	return native_pgd_val(pgd) & PTE_FLAGS_MASK;
261	}	235	}
262		236
263	#if PAGETABLE_LEVELS > 3	237	#if CONFIG_PGTABLE_LEVELS > 3
264	typedef struct { pudval_t pud; } pud_t;	238	typedef struct { pudval_t pud; } pud_t;
265		239
266	static inline pud_t native_make_pud(pmdval_t val)	240	static inline pud_t native_make_pud(pmdval_t val)
267	{	241	{
268	return (pud_t) { val };	242	return (pud_t) { val };
269	}	243	}
270		244
271	static inline pudval_t native_pud_val(pud_t pud)	245	static inline pudval_t native_pud_val(pud_t pud)
272	{	246	{
273	return pud.pud;	247	return pud.pud;
274	}	248	}
275	#else	249	#else
276	#include	250	#include
277		251
278	static inline pudval_t native_pud_val(pud_t pud)	252	static inline pudval_t native_pud_val(pud_t pud)
279	{	253	{
280	return native_pgd_val(pud.pgd);	254	return native_pgd_val(pud.pgd);
281	}	255	}
282	#endif	256	#endif
283		257
284	#if PAGETABLE_LEVELS > 2	258	#if CONFIG_PGTABLE_LEVELS > 2
285	typedef struct { pmdval_t pmd; } pmd_t;	259	typedef struct { pmdval_t pmd; } pmd_t;
286		260
287	static inline pmd_t native_make_pmd(pmdval_t val)	261	static inline pmd_t native_make_pmd(pmdval_t val)
288	{	262	{
289	return (pmd_t) { val };	263	return (pmd_t) { val };
290	}	264	}
291		265
292	static inline pmdval_t native_pmd_val(pmd_t pmd)	266	static inline pmdval_t native_pmd_val(pmd_t pmd)
293	{	267	{
294	return pmd.pmd;	268	return pmd.pmd;
295	}	269	}
296	#else	270	#else
297	#include	271	#include
298		272
299	static inline pmdval_t native_pmd_val(pmd_t pmd)	273	static inline pmdval_t native_pmd_val(pmd_t pmd)
300	{	274	{
301	return native_pgd_val(pmd.pud.pgd);	275	return native_pgd_val(pmd.pud.pgd);
302	}	276	}
303	#endif	277	#endif
-		278
-		279	static inline pudval_t pud_pfn_mask(pud_t pud)
-		280	{
-		281	if (native_pud_val(pud) & _PAGE_PSE)
-		282	return PHYSICAL_PUD_PAGE_MASK;
-		283	else
-		284	return PTE_PFN_MASK;
-		285	}
-		286
-		287	static inline pudval_t pud_flags_mask(pud_t pud)
-		288	{
-		289	return ~pud_pfn_mask(pud);
-		290	}
304		291
305	static inline pudval_t pud_flags(pud_t pud)	292	static inline pudval_t pud_flags(pud_t pud)
306	{	293	{
-		294	return native_pud_val(pud) & pud_flags_mask(pud);
-		295	}
-		296
-		297	static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
-		298	{
-		299	if (native_pmd_val(pmd) & _PAGE_PSE)
-		300	return PHYSICAL_PMD_PAGE_MASK;
-		301	else
-		302	return PTE_PFN_MASK;
-		303	}
-		304
-		305	static inline pmdval_t pmd_flags_mask(pmd_t pmd)
-		306	{
307	return native_pud_val(pud) & PTE_FLAGS_MASK;	307	return ~pmd_pfn_mask(pmd);
308	}	308	}
309		309
310	static inline pmdval_t pmd_flags(pmd_t pmd)	310	static inline pmdval_t pmd_flags(pmd_t pmd)
311	{	311	{
312	return native_pmd_val(pmd) & PTE_FLAGS_MASK;	312	return native_pmd_val(pmd) & pmd_flags_mask(pmd);
313	}	313	}
314		314
315	static inline pte_t native_make_pte(pteval_t val)	315	static inline pte_t native_make_pte(pteval_t val)
316	{	316	{
317	return (pte_t) { .pte = val };	317	return (pte_t) { .pte = val };
318	}	318	}
319		319
320	static inline pteval_t native_pte_val(pte_t pte)	320	static inline pteval_t native_pte_val(pte_t pte)
321	{	321	{
322	return pte.pte;	322	return pte.pte;
323	}	323	}
324		324
325	static inline pteval_t pte_flags(pte_t pte)	325	static inline pteval_t pte_flags(pte_t pte)
326	{	326	{
327	return native_pte_val(pte) & PTE_FLAGS_MASK;	327	return native_pte_val(pte) & PTE_FLAGS_MASK;
328	}	328	}
329		-
330	#ifdef CONFIG_NUMA_BALANCING	-
331	/* Set of bits that distinguishes present, prot_none and numa ptes */	-
332	#define _PAGE_NUMA_MASK (_PAGE_NUMA\|_PAGE_PROTNONE\|_PAGE_PRESENT)	-
333	static inline pteval_t ptenuma_flags(pte_t pte)	-
334	{	-
335	return pte_flags(pte) & _PAGE_NUMA_MASK;	-
336	}	-
337		-
338	static inline pmdval_t pmdnuma_flags(pmd_t pmd)	-
339	{	-
340	return pmd_flags(pmd) & _PAGE_NUMA_MASK;	-
341	}	-
342	#endif /* CONFIG_NUMA_BALANCING */	-
343		329
344	#define pgprot_val(x) ((x).pgprot)	330	#define pgprot_val(x) ((x).pgprot)
345	#define __pgprot(x) ((pgprot_t) { (x) } )	331	#define __pgprot(x) ((pgprot_t) { (x) } )
346		332
347	extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];	333	extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];
348	extern uint8_t __pte2cachemode_tbl[8];	334	extern uint8_t __pte2cachemode_tbl[8];
349		335
350	#define __pte2cm_idx(cb) \	336	#define __pte2cm_idx(cb) \
351	((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) \| \	337	((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) \| \
352	(((cb) >> (_PAGE_BIT_PCD - 1)) & 2) \| \	338	(((cb) >> (_PAGE_BIT_PCD - 1)) & 2) \| \
353	(((cb) >> _PAGE_BIT_PWT) & 1))	339	(((cb) >> _PAGE_BIT_PWT) & 1))
354	#define __cm_idx2pte(i) \	340	#define __cm_idx2pte(i) \
355	((((i) & 4) << (_PAGE_BIT_PAT - 2)) \| \	341	((((i) & 4) << (_PAGE_BIT_PAT - 2)) \| \
356	(((i) & 2) << (_PAGE_BIT_PCD - 1)) \| \	342	(((i) & 2) << (_PAGE_BIT_PCD - 1)) \| \
357	(((i) & 1) << _PAGE_BIT_PWT))	343	(((i) & 1) << _PAGE_BIT_PWT))
358		344
359	static inline unsigned long cachemode2protval(enum page_cache_mode pcm)	345	static inline unsigned long cachemode2protval(enum page_cache_mode pcm)
360	{	346	{
361	if (likely(pcm == 0))	347	if (likely(pcm == 0))
362	return 0;	348	return 0;
363	return __cachemode2pte_tbl[pcm];	349	return __cachemode2pte_tbl[pcm];
364	}	350	}
365	static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)	351	static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
366	{	352	{
367	return __pgprot(cachemode2protval(pcm));	353	return __pgprot(cachemode2protval(pcm));
368	}	354	}
369	static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)	355	static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
370	{	356	{
371	unsigned long masked;	357	unsigned long masked;
372		358
373	masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;	359	masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
374	if (likely(masked == 0))	360	if (likely(masked == 0))
375	return 0;	361	return 0;
376	return __pte2cachemode_tbl[__pte2cm_idx(masked)];	362	return __pte2cachemode_tbl[__pte2cm_idx(masked)];
377	}	363	}
378	static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)	364	static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
379	{	365	{
380	pgprot_t new;	366	pgprot_t new;
381	unsigned long val;	367	unsigned long val;
382		368
383	val = pgprot_val(pgprot);	369	val = pgprot_val(pgprot);
384	pgprot_val(new) = (val & ~(_PAGE_PAT \| _PAGE_PAT_LARGE)) \|	370	pgprot_val(new) = (val & ~(_PAGE_PAT \| _PAGE_PAT_LARGE)) \|
385	((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));	371	((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
386	return new;	372	return new;
387	}	373	}
388	static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)	374	static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
389	{	375	{
390	pgprot_t new;	376	pgprot_t new;
391	unsigned long val;	377	unsigned long val;
392		378
393	val = pgprot_val(pgprot);	379	val = pgprot_val(pgprot);
394	pgprot_val(new) = (val & ~(_PAGE_PAT \| _PAGE_PAT_LARGE)) \|	380	pgprot_val(new) = (val & ~(_PAGE_PAT \| _PAGE_PAT_LARGE)) \|
395	((val & _PAGE_PAT_LARGE) >>	381	((val & _PAGE_PAT_LARGE) >>
396	(_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));	382	(_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
397	return new;	383	return new;
398	}	384	}
399		385
400		386
401	typedef struct page *pgtable_t;	387	typedef struct page *pgtable_t;
402		388
403	extern pteval_t __supported_pte_mask;	389	extern pteval_t __supported_pte_mask;
404	extern void set_nx(void);	390	extern void set_nx(void);
405	extern int nx_enabled;	391	extern int nx_enabled;
406		392
407	#define pgprot_writecombine pgprot_writecombine	393	#define pgprot_writecombine pgprot_writecombine
408	extern pgprot_t pgprot_writecombine(pgprot_t prot);	394	extern pgprot_t pgprot_writecombine(pgprot_t prot);
-		395
-		396	#define pgprot_writethrough pgprot_writethrough
-		397	extern pgprot_t pgprot_writethrough(pgprot_t prot);
409		398
410	/* Indicate that x86 has its own track and untrack pfn vma functions */	399	/* Indicate that x86 has its own track and untrack pfn vma functions */
411	#define __HAVE_PFNMAP_TRACKING	400	#define __HAVE_PFNMAP_TRACKING
412		401
413	#define __HAVE_PHYS_MEM_ACCESS_PROT	402	#define __HAVE_PHYS_MEM_ACCESS_PROT
414	struct file;	403	struct file;
415	pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,	404	pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
416	unsigned long size, pgprot_t vma_prot);	405	unsigned long size, pgprot_t vma_prot);
417	int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,	406	int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
418	unsigned long size, pgprot_t *vma_prot);	407	unsigned long size, pgprot_t *vma_prot);
419		408
420	/* Install a pte for a particular vaddr in kernel space. */	409	/* Install a pte for a particular vaddr in kernel space. */
421	void set_pte_vaddr(unsigned long vaddr, pte_t pte);	410	void set_pte_vaddr(unsigned long vaddr, pte_t pte);
422		411
423	#ifdef CONFIG_X86_32	412	#ifdef CONFIG_X86_32
424	extern void native_pagetable_init(void);	413	extern void native_pagetable_init(void);
425	#else	414	#else
426	#define native_pagetable_init paging_init	415	#define native_pagetable_init paging_init
427	#endif	416	#endif
428		417
429	struct seq_file;	418	struct seq_file;
430	extern void arch_report_meminfo(struct seq_file *m);	419	extern void arch_report_meminfo(struct seq_file *m);
431		420
432	enum pg_level {	421	enum pg_level {
433	PG_LEVEL_NONE,	422	PG_LEVEL_NONE,
434	PG_LEVEL_4K,	423	PG_LEVEL_4K,
435	PG_LEVEL_2M,	424	PG_LEVEL_2M,
436	PG_LEVEL_1G,	425	PG_LEVEL_1G,
437	PG_LEVEL_NUM	426	PG_LEVEL_NUM
438	};	427	};
439		428
440	#ifdef CONFIG_PROC_FS	429	#ifdef CONFIG_PROC_FS
441	extern void update_page_count(int level, unsigned long pages);	430	extern void update_page_count(int level, unsigned long pages);
442	#else	431	#else
443	static inline void update_page_count(int level, unsigned long pages) { }	432	static inline void update_page_count(int level, unsigned long pages) { }
444	#endif	433	#endif
445		434
446	/*	435	/*
447	* Helper function that returns the kernel pagetable entry controlling	436	* Helper function that returns the kernel pagetable entry controlling
448	* the virtual address 'address'. NULL means no pagetable entry present.	437	* the virtual address 'address'. NULL means no pagetable entry present.
449	* NOTE: the return type is pte_t but if the pmd is PSE then we return it	438	* NOTE: the return type is pte_t but if the pmd is PSE then we return it
450	* as a pte too.	439	* as a pte too.
451	*/	440	*/
452	extern pte_t lookup_address(unsigned long address, unsigned int level);	441	extern pte_t lookup_address(unsigned long address, unsigned int level);
453	extern pte_t lookup_address_in_pgd(pgd_t pgd, unsigned long address,	442	extern pte_t lookup_address_in_pgd(pgd_t pgd, unsigned long address,
454	unsigned int *level);	443	unsigned int *level);
455	extern pmd_t *lookup_pmd_address(unsigned long address);	444	extern pmd_t *lookup_pmd_address(unsigned long address);
456	extern phys_addr_t slow_virt_to_phys(void *__address);	445	extern phys_addr_t slow_virt_to_phys(void *__address);
457	extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,	446	extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
458	unsigned numpages, unsigned long page_flags);	447	unsigned numpages, unsigned long page_flags);
459	void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,	448	void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
460	unsigned numpages);	449	unsigned numpages);
461	#endif /* !__ASSEMBLY__ */	450	#endif /* !__ASSEMBLY__ */
462		451
463	#endif /* _ASM_X86_PGTABLE_DEFS_H */	452	#endif /* _ASM_X86_PGTABLE_DEFS_H */

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(root)/drivers/include/asm/pgtable_types.h – Rev 5270 → 6082