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Rev 5558 Rev 6878
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;                                                              ;;
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;;                                                              ;;
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;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
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;; Copyright (C) KolibriOS team 2015-2017. All rights reserved. ;;
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;; Distributed under terms of the GNU General Public License    ;;
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;; Distributed under terms of the GNU General Public License    ;;
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;;                                                              ;;
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;;                                                              ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;driver sceletone
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format PE DLL native 0.05
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format PE DLL native 0.05
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entry START
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entry START
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        SRV_GETVERSION          = 0
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        SRV_GETVERSION          = 0
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section '.flat' code readable writable executable
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section '.flat' code readable writable executable
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include 'proc32.inc'
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include '../proc32.inc'
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include 'struct.inc'
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include '../struct.inc'
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include '../macros.inc'
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include '../peimport.inc'
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include '../fdo.inc'
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include 'macros.inc'
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GPIO_PORT_CONFIG_ADDR = 0xF100
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include 'peimport.inc'
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GPIO_DATA_ADDR = 0xF200
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include 'fdo.inc'
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ADC_ADDR = 0xFE00
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        pop     esi
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        pop     esi
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        test    eax, eax
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        test    eax, eax
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        jz      .fail
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        jz      .fail
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; Set crossbar base address register in southbridge
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; Set crossbar base address register in southbridge
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        invoke  PciWrite16, [bus], [dev], 64h, 0x0A00 or 1
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        invoke  PciWrite16, [bus], [dev], 0x64, 0x0A00 or 1
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; Set GPIO base address register in southbridge
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        invoke  PciWrite16, [bus], [dev], 0x62, GPIO_PORT_CONFIG_ADDR or 1
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        DEBUGF  1,"Setting up ADC\n"
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; Enable ADC
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        invoke  PciRead32, [bus], [dev], 0xBC
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        and     eax, not (1 shl 28)
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        invoke  PciWrite32, [bus], [dev], 0xBC, eax
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        DEBUGF  1,"1\n"
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; Set ADC base address
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        mov     ebx, [dev]
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        inc     ebx
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        invoke  PciRead16, [bus], ebx, 0xDE
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        or      ax, 0x02
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        invoke  PciWrite16, [bus], ebx, 0xDE, eax
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        invoke  PciWrite32, [bus], ebx, 0xE0, 0x00500000 or ADC_ADDR
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        DEBUGF  1,"2\n"
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; set up ADC
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        mov     dx, ADC_ADDR + 1
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        xor     al, al
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        out     dx, al
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        DEBUGF  1,"3\n"
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; Empty FIFO
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  @@:
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        mov     dx, ADC_ADDR + 2        ; Status register
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        in      al, dx
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        test    al, 0x01                ; FIFO ready
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        jz      @f
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        mov     dx, ADC_ADDR + 4
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        in      ax, dx
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        jmp     @r
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  @@:
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; Set GPIO base address register in southbridge
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        invoke  PciWrite16, [bus], [dev], 62h, 0xF100 or 1
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        DEBUGF  1,"4\n"
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; Enable GPIO0-9
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; Enable GPIO0-9
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        mov     dx, 0xf100
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        mov     dx, GPIO_PORT_CONFIG_ADDR + 0  ; General-Purpose I/O Data & Direction Decode Enable
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        mov     eax, 0x000001ff
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        mov     eax, 0x000001ff
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        out     dx, eax
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        out     dx, eax
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        mov     ecx, 10
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        mov     ecx, 10                 ; 10 GPIO ports total
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        mov     dx, 0xf104
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        mov     dx, GPIO_PORT_CONFIG_ADDR + 4  ; General-Purpose I/O Port0 Data & Direction Decode Address
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        mov     ax, 0xf200
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        mov     ax, GPIO_DATA_ADDR
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  .gpio_init:
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  .gpio_init:
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        dec     ecx
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        dec     ecx
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        jnz     .gpio_init
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        jnz     .gpio_init
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; Set GPIO0 pin 0 as output
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; Set GPIO0 pin 0 as output
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        mov     al, 0x01
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        mov     al, 0x01
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        mov     dx, 0xf202
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        out     dx, al
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; Set GPIO4 pin 0 as output
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        mov     al, 0x01
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        mov     dx, 0xf212
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        mov     dx, GPIO_DATA_ADDR + 0*4 + 2
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        out     dx, al
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        out     dx, al
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        invoke  RegService, my_service, service_proc
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        invoke  RegService, my_service, service_proc
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        mov     dword [eax], API_VERSION
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        mov     dword [eax], API_VERSION
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        xor     eax, eax
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        xor     eax, eax
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        ret
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        ret
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@@:
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  @@:
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        cmp     eax, 1  ; read GPIO P0
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        cmp     eax, 1  ; read GPIO P0
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        jne     @f
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        jne     .no_gpioread
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        mov     dx, 0xf200
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        mov     dx, GPIO_DATA_ADDR + 0x00
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        in      al, dx
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        in      al, dx
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        ret
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        ret
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@@:
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  .no_gpioread:
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        cmp     eax, 2  ; write GPIO P0
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        cmp     eax, 2  ; write GPIO P0
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        jne     @f
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        jne     .no_gpiowrite
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        mov     eax, [ebx + IOCTL.input]
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        mov     eax, [ebx + IOCTL.input]
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        mov     dx, 0xf200
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        mov     dx, GPIO_DATA_ADDR + 0x00
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        out     dx, al
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        out     dx, al
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        xor     eax, eax
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        xor     eax, eax
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        ret
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  .no_gpiowrite:
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        cmp     eax, 3  ; read ADC channel 0
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        jne     .no_adcread
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        mov     dx, ADC_ADDR + 1
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        mov     al, 1 shl 3             ; Power down ADC
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        out     dx, al
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        mov     dx, ADC_ADDR + 0        ; AUX channel select register
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        mov     al, 1 shl 0             ; Enable AUX0 scan
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        out     dx, al
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        mov     dx, ADC_ADDR + 1
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        mov     al, 1 shl 0             ; Single shot, no interrupts, start
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        out     dx, al
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        ret
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        mov     dx, ADC_ADDR + 2
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  @@:
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        in      al, dx
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        test    al, 1 shl 0             ; data ready?
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        jz      @r
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        mov     dx, ADC_ADDR + 4
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        in      ax, dx                  ; read the data and return to user call
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        DEBUGF  1, "ADC read: 0x%x\n", eax:4
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        ret
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@@:
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  .no_adcread:
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.fail:
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  .fail:
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        or      eax, -1
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        or      eax, -1
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        ret
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        ret