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Rev 4470 | Rev 4803 | ||
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Line 285... | Line 285... | ||
285 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
285 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
Line 286... | Line 286... | ||
286 | 286 | ||
Line 287... | Line 287... | ||
287 | 287 | ||
288 | macro udelay msec { |
288 | macro udelay msec { |
289 | 289 | ||
290 | push esi |
290 | push esi ecx |
Line 291... | Line 291... | ||
291 | mov esi, msec |
291 | mov esi, msec |
Line 292... | Line 292... | ||
292 | call Sleep |
292 | call Sleep |
Line 646... | Line 646... | ||
646 | PCI_adjust_latency 0x40 |
646 | PCI_adjust_latency 0x40 |
647 | @@: |
647 | @@: |
648 | cmp [tpc.mcfg], MCFG_METHOD_02 |
648 | cmp [tpc.mcfg], MCFG_METHOD_02 |
649 | jne @f |
649 | jne @f |
650 | DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
650 | DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
- | 651 | set_io 0 |
|
651 | set_io 0x82 |
652 | set_io 0x82 |
652 | mov al, 0x01 |
653 | mov al, 0x01 |
653 | out dx, al |
654 | out dx, al |
654 | DEBUGF 1,"Set PHY Reg 0x0bh = 0x00h\n" |
655 | DEBUGF 1,"Set PHY Reg 0x0bh = 0x00h\n" |
655 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
656 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
Line 671... | Line 672... | ||
671 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
672 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
Line 672... | Line 673... | ||
672 | 673 | ||
673 | ; Enable auto-negotiation and restart auto-nigotiation |
674 | ; Enable auto-negotiation and restart auto-nigotiation |
Line 674... | Line 675... | ||
674 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
675 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
675 | 676 | ||
- | 677 | udelay 1 ; 100 |
|
676 | udelay 100 |
678 | mov ecx, 200 ; 10000 |
677 | mov ecx, 10000 |
679 | DEBUGF 1, "Waiting for auto-negotiation to complete\n" |
678 | ; wait for auto-negotiation process |
680 | ; wait for auto-negotiation process |
679 | @@: dec ecx |
681 | @@: dec ecx |
680 | jz @f |
682 | jz @f |
681 | set_io 0 |
683 | set_io 0 |
682 | READ_GMII_REG PHY_STAT_REG |
684 | READ_GMII_REG PHY_STAT_REG |
683 | udelay 100 |
685 | udelay 1 ; 100 |
684 | test eax, PHY_Auto_Neco_Comp |
686 | test eax, PHY_Auto_Neco_Comp |
685 | jz @b |
687 | jz @b |
686 | set_io REG_PHYstatus |
688 | set_io REG_PHYstatus |
687 | in al, dx |
689 | in al, dx |
688 | jmp @f |
690 | jmp @f |
689 | .tbi_dis: |
691 | .tbi_dis: |
690 | udelay 100 |
- | |
- | 692 | udelay 1 ; 100 |
|
Line 691... | Line 693... | ||
691 | @@: |
693 | @@: |
692 | 694 | DEBUGF 1, "auto-negotiation complete\n" |
|
693 | 695 | ||
694 | ;*************************************************************************** |
696 | ;*************************************************************************** |
Line 701... | Line 703... | ||
701 | ; |
703 | ; |
702 | ;*************************************************************************** |
704 | ;*************************************************************************** |
703 | align 4 |
705 | align 4 |
704 | reset: |
706 | reset: |
Line 705... | Line 707... | ||
705 | 707 | ||
Line 706... | Line 708... | ||
706 | DEBUGF 1,"reset\n" |
708 | DEBUGF 1,"resetting\n" |
707 | 709 | ||
708 | lea eax, [device.tx_ring] |
710 | lea eax, [device.tx_ring] |
Line 726... | Line 728... | ||
726 | mov [device.mtu], 1500 |
728 | mov [device.mtu], 1500 |
Line 727... | Line 729... | ||
727 | 729 | ||
728 | ; Set link state to unknown |
730 | ; Set link state to unknown |
Line -... | Line 731... | ||
- | 731 | mov [device.state], ETH_LINK_UNKOWN |
|
729 | mov [device.state], ETH_LINK_UNKOWN |
732 | |
730 | 733 | DEBUGF 2,"init OK!\n" |