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Rev 4301 Rev 4334
Line 631... Line 631...
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        call    init_board
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        call    init_board
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        call    read_mac
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        call    read_mac
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        call    PHY_config
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        call    PHY_config
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;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
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        DEBUGF  1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
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        set_io  0
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        set_io  0
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        set_io  0x82
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        set_io  0x82
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        mov     al, 0x01
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        mov     al, 0x01
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        out     dx, al
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        out     dx, al
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        cmp     [tpc.mcfg], MCFG_METHOD_03
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        cmp     [tpc.mcfg], MCFG_METHOD_03
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        jae     @f
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        jae     @f
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;       DEBUGF  1,"K :   Set PCI Latency=0x40\n"
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        DEBUGF  1,"Set PCI Latency=0x40\n"
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;       stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40
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        PCI_adjust_latency 0x40
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   @@:
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   @@:
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        cmp     [tpc.mcfg], MCFG_METHOD_02
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        cmp     [tpc.mcfg], MCFG_METHOD_02
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        jne     @f
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        jne     @f
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;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
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        DEBUGF  1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
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        set_io  0x82
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        set_io  0x82
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        mov     al, 0x01
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        mov     al, 0x01
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        out     dx, al
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        out     dx, al
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;       DEBUGF  1,"K :   Set PHY Reg 0x0bh = 0x00h\n"
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        DEBUGF  1,"Set PHY Reg 0x0bh = 0x00h\n"
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        WRITE_GMII_REG 0x0b, 0x0000      ; w 0x0b 15 0 0
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        WRITE_GMII_REG 0x0b, 0x0000      ; w 0x0b 15 0 0
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    @@:
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    @@:
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        ; if TBI is not enabled
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        ; if TBI is not enabled
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        xor     eax, eax
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        xor     eax, eax
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        ret     8
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        ret     8
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  .fail:
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  .fail:
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        DEBUGF  1,"transmit failed\n"
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        or      eax, -1
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        DEBUGF  1,"transmit failed\n"
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        stdcall KernelFree, [esp+4]
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        stdcall KernelFree, [esp+4]
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        or      eax, -1
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        ret     8
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        ret     8
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align 4
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align 4
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int_handler:
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int_handler:
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        push    ebx esi edi
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        push    ebx esi edi
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        DEBUGF  1,"\n%s int\n", my_service
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        DEBUGF  1,"INT\n"
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