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Line 1... Line 1...
1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
;;                                                                 ;;
2
;;                                                                 ;;
3
;; Copyright (C) KolibriOS team 2004-2013. All rights reserved.    ;;
3
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved.    ;;
4
;; Distributed under terms of the GNU General Public License       ;;
4
;; Distributed under terms of the GNU General Public License       ;;
5
;;                                                                 ;;
5
;;                                                                 ;;
6
;;  R6040 driver for KolibriOS                                     ;;
6
;;  R6040 driver for KolibriOS                                     ;;
7
;;                                                                 ;;
7
;;                                                                 ;;
8
;;  based on R6040.c from linux                                    ;;
8
;;  based on R6040.c from linux                                    ;;
Line 64... Line 64...
64
PHY_CAP         = 0x01E1    ;PHY CHIP Register 4
64
PHY_CAP         = 0x01E1                ; PHY CHIP Register 4
Line 65... Line 65...
65
 
65
 
66
;**************************************************************************
66
;**************************************************************************
67
; RDC R6040 Register Definitions
67
; RDC R6040 Register Definitions
-
 
68
;**************************************************************************
68
;**************************************************************************
69
 
-
 
70
MCR0            = 0x00                  ; Control register 0
-
 
71
MCR0_RCVEN      = 0x0002                ; Receive enable
-
 
72
MCR0_PROMISC    = 0x0020                ; Promiscuous mode
-
 
73
MCR0_HASH_EN    = 0x0100                ; Enable multicast hash table function
-
 
74
MCR0_XMTEN      = 0x1000                ; Transmission enable
-
 
75
MCR0_FD         = 0x8000                ; Full/Half Duplex mode
69
MCR0            = 0x00      ;Control register 0
76
 
70
MCR1            = 0x01      ;Control register 1
77
MCR1            = 0x01                  ; Control register 1
-
 
78
MAC_RST         = 0x0001                ; Reset the MAC
71
MAC_RST         = 0x0001    ;Reset the MAC
79
 
72
MBCR            = 0x08      ;Bus control
80
MBCR            = 0x08                  ; Bus control
73
MT_ICR          = 0x0C      ;TX interrupt control
81
MT_ICR          = 0x0C                  ; TX interrupt control
74
MR_ICR          = 0x10      ;RX interrupt control
82
MR_ICR          = 0x10                  ; RX interrupt control
75
MTPR            = 0x14      ;TX poll command register
83
MTPR            = 0x14                  ; TX poll command register
76
MR_BSR          = 0x18      ;RX buffer size
84
MR_BSR          = 0x18                  ; RX buffer size
77
MR_DCR          = 0x1A      ;RX descriptor control
85
MR_DCR          = 0x1A                  ; RX descriptor control
-
 
86
MLSR            = 0x1C                  ; Last status
78
MLSR            = 0x1C      ;Last status
87
 
79
MMDIO           = 0x20      ;MDIO control register
88
MMDIO           = 0x20                  ; MDIO control register
80
MDIO_WRITE      = 0x4000    ;MDIO write
89
MDIO_WRITE      = 0x4000                ; MDIO write
81
MDIO_READ       = 0x2000    ;MDIO read
90
MDIO_READ       = 0x2000                ; MDIO read
82
MMRD            = 0x24      ;MDIO read data register
91
MMRD            = 0x24                  ; MDIO read data register
-
 
92
MMWD            = 0x28                  ; MDIO write data register
83
MMWD            = 0x28      ;MDIO write data register
93
 
84
MTD_SA0         = 0x2C      ;TX descriptor start address 0
94
MTD_SA0         = 0x2C                  ; TX descriptor start address 0
85
MTD_SA1         = 0x30      ;TX descriptor start address 1
95
MTD_SA1         = 0x30                  ; TX descriptor start address 1
86
MRD_SA0         = 0x34      ;RX descriptor start address 0
96
MRD_SA0         = 0x34                  ; RX descriptor start address 0
-
 
97
MRD_SA1         = 0x38                  ; RX descriptor start address 1
87
MRD_SA1         = 0x38      ;RX descriptor start address 1
98
 
88
MISR            = 0x3C      ;Status register
99
MISR            = 0x3C                  ; Status register
89
MIER            = 0x40      ;INT enable register
100
MIER            = 0x40                  ; INT enable register
90
MSK_INT         = 0x0000    ;Mask off interrupts
101
MSK_INT         = 0x0000                ; Mask off interrupts
91
RX_FINISH       = 0x0001    ;RX finished
102
RX_FINISH       = 0x0001                ; RX finished
Line 94... Line 105...
94
RX_EARLY        = 0x0008    ;RX early
105
RX_EARLY        = 0x0008                ; RX early
95
TX_FINISH       = 0x0010    ;TX finished
106
TX_FINISH       = 0x0010                ; TX finished
96
TX_EARLY        = 0x0080    ;TX early
107
TX_EARLY        = 0x0080                ; TX early
97
EVENT_OVRFL     = 0x0100    ;Event counter overflow
108
EVENT_OVRFL     = 0x0100                ; Event counter overflow
98
LINK_CHANGED    = 0x0200    ;PHY link changed
109
LINK_CHANGED    = 0x0200                ; PHY link changed
-
 
110
 
99
ME_CISR         = 0x44      ;Event counter INT status
111
ME_CISR         = 0x44                  ; Event counter INT status
100
ME_CIER         = 0x48      ;Event counter INT enable
112
ME_CIER         = 0x48                  ; Event counter INT enable
101
MR_CNT          = 0x50      ;Successfully received packet counter
113
MR_CNT          = 0x50                  ; Successfully received packet counter
102
ME_CNT0         = 0x52      ;Event counter 0
114
ME_CNT0         = 0x52                  ; Event counter 0
103
ME_CNT1         = 0x54      ;Event counter 1
115
ME_CNT1         = 0x54                  ; Event counter 1
Line 222... Line 234...
222
        cmp [state], 1
234
        cmp [state], 1
223
        jne .exit
235
        jne .exit
Line 224... Line 236...
224
 
236
 
Line 225... Line 237...
225
  .entry:
237
  .entry:
226
 
238
 
227
        DEBUGF  2,"Loading %s driver\n", my_service
239
        DEBUGF  2,"Loading driver\n"
Line 228... Line 240...
228
        stdcall RegService, my_service, service_proc
240
        stdcall RegService, my_service, service_proc
229
        ret
241
        ret
Line 413... Line 425...
413
;;
425
;;
414
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
426
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Line 415... Line 427...
415
 
427
 
416
align 4
428
align 4
417
probe:
429
probe:
Line 418... Line 430...
418
        DEBUGF  2,"Probing R6040 device\n"
430
        DEBUGF  1,"Probing R6040 device\n"
Line 419... Line 431...
419
 
431
 
420
        PCI_make_bus_master
432
        PCI_make_bus_master
Line 436... Line 448...
436
        ; Some bootloaders/BIOSes do not initialize MAC address, warn about that
448
        ; Some bootloaders/BIOSes do not initialize MAC address, warn about that
437
        and     eax, 0xFF
449
        and     eax, 0xFF
438
        or      eax, dword [device.mac]
450
        or      eax, dword [device.mac]
439
        test    eax, eax
451
        test    eax, eax
440
        jnz     @f
452
        jnz     @f
441
        DEBUGF  2, "ERROR: MAC address not initialized!\n"
453
        DEBUGF  2, "MAC address not initialized!\n"
Line 442... Line 454...
442
 
454
 
443
     @@:
455
     @@:
444
        ; Init RDC private data
456
        ; Init RDC private data
445
        mov     [device.mcr0], 0x1002
457
        mov     [device.mcr0], MCR0_XMTEN or MCR0_RCVEN
446
        ;mov     [private.phy_addr], 1 ; Asper: Only one network card is supported now.
458
        ;mov     [private.phy_addr], 1 ; Asper: Only one network card is supported now.
Line 447... Line 459...
447
        mov     [device.switch_sig], 0
459
        mov     [device.switch_sig], 0
448
 
460
 
Line 461... Line 473...
461
        ; Initialize and alloc RX/TX buffers
473
        ; Initialize and alloc RX/TX buffers
462
        call    init_txbufs
474
        call    init_txbufs
463
        call    init_rxbufs
475
        call    init_rxbufs
Line 464... Line 476...
464
 
476
 
465
        ; Read the PHY ID
477
        ; Read the PHY ID
466
        mov     [device.phy_mode], 0x8000
478
        mov     [device.phy_mode], MCR0_FD
467
        stdcall phy_read, 0, 2
479
        stdcall phy_read, 0, 2
468
        mov     [device.switch_sig], ax
480
        mov     [device.switch_sig], ax
469
        cmp     ax, ICPLUS_PHY_ID
481
        cmp     ax, ICPLUS_PHY_ID
470
        jne     @f
482
        jne     @f
Line 511... Line 523...
511
 
523
 
512
 
524
 
Line 513... Line 525...
513
align 4
525
align 4
Line 514... Line 526...
514
reset:
526
reset:
515
 
527
 
516
        DEBUGF  2,"Resetting R6040\n"
528
        DEBUGF  1,"Resetting R6040\n"
517
 
529
 
Line 523... Line 535...
523
 
535
 
Line 524... Line 536...
524
 
536
 
525
; attach int handler
537
; attach int handler
526
 
538
 
527
        movzx   eax, [device.irq_line]
539
        movzx   eax, [device.irq_line]
528
        DEBUGF  2,"Attaching int handler to irq %x\n", eax:1
540
        DEBUGF  1,"Attaching int handler to irq %x\n", eax:1
529
        stdcall AttachIntHandler, eax, int_handler, dword 0
541
        stdcall AttachIntHandler, eax, int_handler, dword 0
530
        test    eax, eax
542
        test    eax, eax
531
        jnz     @f
543
        jnz     @f
532
        DEBUGF  2,"\nCould not attach int handler!\n"
544
        DEBUGF  2,"Could not attach int handler!\n"
Line 598... Line 610...
598
        ;Enable interrupts
610
        ;Enable interrupts
599
        mov     ax, INT_MASK
611
        mov     ax, INT_MASK
600
        set_io  MIER
612
        set_io  MIER
601
        out     dx, ax
613
        out     dx, ax
Line 602... Line 614...
602
 
614
 
603
        ;Enable TX and RX
615
        ;Enable RX
604
        mov     ax, [device.mcr0]
616
        mov     ax, [device.mcr0]
605
        or      ax, 0x0002
617
        or      ax, MCR0_RCVEN
606
        set_io  0
618
        set_io  0
Line 607... Line 619...
607
        out     dx, ax
619
        out     dx, ax
608
 
620
 
Line 668... Line 680...
668
        mov     ecx, RX_RING_SIZE
680
        mov     ecx, RX_RING_SIZE
Line 669... Line 681...
669
 
681
 
670
    .next_desc:
682
    .next_desc:
Line 671... Line 683...
671
         mov     [esi + x_head.ndesc], edx
683
        mov     [esi + x_head.ndesc], edx
672
 
684
 
673
        push    esi ecx
685
        push    esi ecx edx
Line 674... Line 686...
674
        stdcall KernelAlloc, MAX_BUF_SIZE
686
        stdcall KernelAlloc, MAX_BUF_SIZE
675
        pop     ecx esi
687
        pop     edx ecx esi
676
 
688
 
677
        mov     [esi + x_head.skb_ptr], eax
689
        mov     [esi + x_head.skb_ptr], eax
Line 684... Line 696...
684
 
696
 
685
        dec     ecx
697
        dec     ecx
Line 686... Line 698...
686
        jnz     .next_desc
698
        jnz     .next_desc
687
 
-
 
688
        ; complete the ring by linking the last to the first
699
 
689
 
700
; complete the ring by linking the last to the first
690
        lea     eax, [device.rx_ring]
701
        lea     eax, [device.rx_ring]
Line 691... Line 702...
691
        GetRealAddr
702
        GetRealAddr
Line 749... Line 760...
749
;;     pointer to device structure in ebx  ;;
760
;;     pointer to device structure in ebx  ;;
750
;;                                         ;;
761
;;                                         ;;
751
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
762
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
752
align 4
763
align 4
753
transmit:
764
transmit:
754
        DEBUGF  2,"\nTransmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8]
765
        DEBUGF  1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8]
755
        mov     eax, [esp+4]
766
        mov     eax, [esp+4]
756
        DEBUGF  2,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
767
        DEBUGF  1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
757
        [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
768
        [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
758
        [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
769
        [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
759
        [eax+13]:2,[eax+12]:2
770
        [eax+13]:2,[eax+12]:2
Line 760... Line 771...
760
 
771
 
Line 766... Line 777...
766
        movzx   edi, [device.cur_tx]
777
        movzx   edi, [device.cur_tx]
767
        shl     edi, 5
778
        shl     edi, 5
768
        add     edi, ebx
779
        add     edi, ebx
769
        add     edi, device.tx_ring - ebx
780
        add     edi, device.tx_ring - ebx
Line 770... Line 781...
770
 
781
 
Line 771... Line 782...
771
        DEBUGF  2,"TX buffer status: 0x%x\n", [edi + x_head.status]:4
782
        DEBUGF  1,"TX buffer status: 0x%x\n", [edi + x_head.status]:4
772
 
783
 
Line 773... Line 784...
773
        test    [edi + x_head.status], DSC_OWNER_MAC    ; check if buffer is available
784
        test    [edi + x_head.status], DSC_OWNER_MAC    ; check if buffer is available
774
        jnz     .wait_to_send
-
 
775
 
785
        jnz     .wait_to_send
Line 776... Line 786...
776
  .do_send:
786
 
777
 
787
  .do_send:
778
        DEBUGF  2,"Sending now\n"
788
        DEBUGF  1,"Sending now\n"
779
 
789
 
Line 803... Line 813...
803
 
813
 
Line 804... Line 814...
804
        ret     8
814
        ret     8
Line 805... Line 815...
805
 
815
 
Line 806... Line 816...
806
  .wait_to_send:
816
  .wait_to_send:
807
 
817
 
808
        DEBUGF  2,"Waiting for TX buffer\n"
818
        DEBUGF  1,"Waiting for TX buffer\n"
809
 
819
 
Line 816... Line 826...
816
        call    Sleep
826
        call    Sleep
817
        call    GetTimerTicks
827
        call    GetTimerTicks
818
        cmp     edx, eax
828
        cmp     edx, eax
819
        jb      .l2
829
        jb      .l2
Line 820... Line 830...
820
 
830
 
821
        DEBUGF  1,"Send timeout\n"
831
        DEBUGF  2,"Send timeout\n"
822
        xor     eax, eax
832
        xor     eax, eax
823
        dec     eax
833
        dec     eax
824
  .fail:
834
  .fail:
825
        DEBUGF  1,"Send failed\n"
835
        DEBUGF  2,"Send failed\n"
826
        stdcall KernelFree, [esp+4]
836
        stdcall KernelFree, [esp+4]
827
        or      eax, -1
837
        or      eax, -1
Line 840... Line 850...
840
align 4
850
align 4
841
int_handler:
851
int_handler:
Line 842... Line 852...
842
 
852
 
Line 843... Line 853...
843
        push    ebx esi edi
853
        push    ebx esi edi
Line 844... Line 854...
844
 
854
 
Line 845... Line 855...
845
        DEBUGF  1,"\n%s int\n", my_service
855
        DEBUGF  1,"int\n"
846
 
856
 
Line 872... Line 882...
872
 
882
 
Line 873... Line 883...
873
; At this point, test for all possible reasons, and handle accordingly
883
; At this point, test for all possible reasons, and handle accordingly
Line 874... Line 884...
874
 
884
 
Line 875... Line 885...
875
  .got_it:
885
  .got_it:
Line 876... Line 886...
876
 
886
 
877
        DEBUGF  1,"Device: %x Status: %x ", ebx, ax
887
        DEBUGF  1,"Device: %x Status: %x\n", ebx, ax
Line 884... Line 894...
884
        push    ebx
894
        push    ebx
885
  .more_RX:
895
  .more_RX:
886
        pop     ebx
896
        pop     ebx
Line 887... Line 897...
887
 
897
 
888
        ; Find the current RX descriptor
-
 
889
 
898
        ; Find the current RX descriptor
890
        movzx   edx, [device.cur_rx]
899
        movzx   edx, [device.cur_rx]
891
        shl     edx, 5
900
        shl     edx, 5
Line 892... Line 901...
892
        lea     edx, [device.rx_ring + edx]
901
        lea     edx, [device.rx_ring + edx]
893
 
-
 
894
        ; Check the descriptor status
902
 
895
 
903
        ; Check the descriptor status
896
        mov     cx, [edx + x_head.status]
904
        mov     cx, [edx + x_head.status]
Line 897... Line 905...
897
        test    cx, DSC_OWNER_MAC
905
        test    cx, DSC_OWNER_MAC
Line 898... Line 906...
898
        jnz     .no_RX
906
        jnz     .no_RX
899
 
907
 
Line 900... Line 908...
900
        DEBUGF  2,"packet status=0x%x\n", cx
908
        DEBUGF  1,"packet status=0x%x\n", cx
901
 
-
 
902
        test    cx, DSC_RX_ERR          ; Global error status set
909
 
903
        jnz     .no_RX
910
        test    cx, DSC_RX_ERR          ; Global error status set
904
 
911
        jnz     .no_RX
Line 905... Line 912...
905
        ; Packet successfully received
912
 
906
 
913
        ; Packet successfully received
907
        movzx   ecx, [edx + x_head.len]
914
        movzx   ecx, [edx + x_head.len]
908
        and     ecx, 0xFFF
915
        and     ecx, 0xFFF
Line 909... Line 916...
909
        sub     ecx, 4                  ; Do not count the CRC
916
        sub     ecx, 4                  ; Do not count the CRC
910
 
-
 
911
; Update stats
917
 
912
        add     dword [device.bytes_rx], ecx
918
        ; Update stats
Line 913... Line 919...
913
        adc     dword [device.bytes_rx + 4], 0
919
        add     dword[device.bytes_rx], ecx
914
        inc     dword [device.packets_rx]
920
        adc     dword[device.bytes_rx + 4], 0
Line 915... Line 921...
915
 
921
        inc     dword[device.packets_rx]
Line 916... Line 922...
916
        ; Push packet size and pointer, kernel will need it..
922
 
917
 
-
 
918
        push    ebx
923
        ; Push packet size and pointer, kernel will need it..
919
        push    .more_RX
924
        push    ebx
920
 
925
        push    .more_RX
921
        push    ecx
926
 
922
        push    [edx + x_head.skb_ptr]
927
        push    ecx
923
 
928
        push    [edx + x_head.skb_ptr]
924
        DEBUGF  2,"packet ptr=0x%x\n", [edx + x_head.skb_ptr]
929
 
Line 925... Line 930...
925
 
930
        DEBUGF  1,"packet ptr=0x%x\n", [edx + x_head.skb_ptr]
926
        ; reset the RX descriptor
-
 
927
 
931
 
928
        push    edx
932
        ; reset the RX descriptor
Line 929... Line 933...
929
        stdcall KernelAlloc, MAX_BUF_SIZE
933
        push    edx
930
        pop     edx
-
 
931
        mov     [edx + x_head.skb_ptr], eax
934
        stdcall KernelAlloc, MAX_BUF_SIZE
Line 932... Line 935...
932
        GetRealAddr
935
        pop     edx
Line 957... Line 960...
957
        jnz     .no_TX
960
        jnz     .no_TX
Line 958... Line 961...
958
 
961
 
959
        cmp     [edi + x_head.skb_ptr], 0
962
        cmp     [edi + x_head.skb_ptr], 0
Line 960... Line 963...
960
        je      .no_TX
963
        je      .no_TX
Line 961... Line 964...
961
 
964
 
962
        DEBUGF  2,"Freeing buffer 0x%x\n", [edi + x_head.skb_ptr]
965
        DEBUGF  1,"Freeing buffer 0x%x\n", [edi + x_head.skb_ptr]
963
 
966
 
Line 969... Line 972...
969
        and     [device.last_tx], TX_RING_SIZE - 1
972
        and     [device.last_tx], TX_RING_SIZE - 1
Line 970... Line 973...
970
 
973
 
Line 971... Line 974...
971
        jmp     .loop_tx
974
        jmp     .loop_tx
-
 
975
 
-
 
976
  .no_TX:
-
 
977
        test    word[esp], RX_NO_DESC
-
 
978
        jz      .no_rxdesc
-
 
979
 
-
 
980
        DEBUGF  2, "No more RX descriptors!\n"
-
 
981
 
-
 
982
  .no_rxdesc:
-
 
983
        test    word[esp], RX_FIFO_FULL
-
 
984
        jz      .no_rxfifo
-
 
985
 
-
 
986
        DEBUGF  2, "RX FIFO full!\n"
-
 
987
 
-
 
988
  .no_rxfifo:
-
 
989
        test    word[esp], RX_EARLY
-
 
990
        jz      .no_rxearly
-
 
991
 
-
 
992
        DEBUGF  1, "RX early\n"
-
 
993
 
-
 
994
  .no_rxearly:
-
 
995
        test    word[esp], TX_EARLY
-
 
996
        jz      .no_txearly
-
 
997
 
-
 
998
        DEBUGF  1, "TX early\n"
-
 
999
 
-
 
1000
  .no_txearly:
-
 
1001
        test    word[esp], EVENT_OVRFL
-
 
1002
        jz      .no_ovrfl
-
 
1003
 
-
 
1004
        DEBUGF  2, "Event counter overflow!\n"
-
 
1005
 
-
 
1006
  .no_ovrfl:
-
 
1007
        test    word[esp], LINK_CHANGED
-
 
1008
        jz      .no_link
-
 
1009
 
-
 
1010
        DEBUGF  1, "Link changed\n"
972
 
1011
 
Line 973... Line 1012...
973
  .no_TX:
1012
  .no_link:
Line 974... Line 1013...
974
        pop     ax
1013
        pop     ax
Line 981... Line 1020...
981
 
1020
 
982
 
1021
 
Line 983... Line 1022...
983
align 4
1022
align 4
Line 984... Line 1023...
984
init_mac_regs:
1023
init_mac_regs:
985
 
1024
 
986
        DEBUGF  2,"initializing MAC regs\n"
1025
        DEBUGF  1,"initializing MAC regs\n"
987
 
1026
 
Line 1010... Line 1049...
1010
; Read a word data from PHY Chip
1049
; Read a word data from PHY Chip
Line 1011... Line 1050...
1011
 
1050
 
1012
align 4
1051
align 4
Line 1013... Line 1052...
1013
proc  phy_read stdcall, phy_addr:dword, reg:dword
1052
proc  phy_read stdcall, phy_addr:dword, reg:dword
Line 1014... Line 1053...
1014
 
1053
 
1015
        DEBUGF  2,"PHY read, addr=0x%x reg=0x%x\n", [phy_addr]:8, [reg]:8
1054
        DEBUGF  1,"PHY read, addr=0x%x reg=0x%x\n", [phy_addr]:8, [reg]:8
1016
 
1055
 
1017
        mov     eax, [phy_addr]
1056
        mov     eax, [phy_addr]
Line 1034... Line 1073...
1034
 
1073
 
1035
        set_io  MMRD
1074
        set_io  MMRD
1036
        in      ax, dx
1075
        in      ax, dx
Line 1037... Line 1076...
1037
        and     eax, 0xFFFF
1076
        and     eax, 0xFFFF
Line 1038... Line 1077...
1038
 
1077
 
Line 1039... Line 1078...
1039
        DEBUGF  2,"PHY read, val=0x%x\n", eax:4
1078
        DEBUGF  1,"PHY read, val=0x%x\n", eax:4
Line 1048... Line 1087...
1048
; Write a word data to PHY Chip
1087
; Write a word data to PHY Chip
Line 1049... Line 1088...
1049
 
1088
 
1050
align 4
1089
align 4
Line 1051... Line 1090...
1051
proc  phy_write stdcall, phy_addr:dword, reg:dword, val:dword
1090
proc  phy_write stdcall, phy_addr:dword, reg:dword, val:dword
Line 1052... Line 1091...
1052
 
1091
 
1053
        DEBUGF  2,"PHY write, addr=0x%x reg=0x%x val=0x%x\n", [phy_addr]:8, [reg]:8, [val]:8
1092
        DEBUGF  1,"PHY write, addr=0x%x reg=0x%x val=0x%x\n", [phy_addr]:8, [reg]:8, [val]:8
1054
 
1093
 
1055
        mov     eax, [val]
1094
        mov     eax, [val]
Line 1074... Line 1113...
1074
        jz      @f
1113
        jz      @f
1075
        dec     ecx
1114
        dec     ecx
1076
        jnz     .write
1115
        jnz     .write
1077
  @@:
1116
  @@:
Line 1078... Line 1117...
1078
 
1117
 
Line 1079... Line 1118...
1079
        DEBUGF  2,"PHY write ok\n"
1118
        DEBUGF  1,"PHY write ok\n"
1080
 
1119
 
Line 1081... Line 1120...
1081
        ret
1120
        ret
1082
endp
1121
endp
Line 1083... Line 1122...
1083
 
1122
 
Line 1084... Line 1123...
1084
 
1123
 
1085
 
1124
 
1086
align 4
1125
align 4
1087
read_mac:
1126
read_mac:
Line 1098... Line 1137...
1098
        inc     dx
1137
        inc     dx
1099
        inc     dx
1138
        inc     dx
1100
        dec     cx
1139
        dec     cx
1101
        jnz     .mac
1140
        jnz     .mac
Line 1102... Line 1141...
1102
 
1141
 
Line 1103... Line 1142...
1103
        DEBUGF  2,"%x-%x-%x-%x-%x-%x\n",[edi-6]:2, [edi-5]:2, [edi-4]:2, [edi-3]:2, [edi-2]:2, [edi-1]:2
1142
        DEBUGF  1,"%x-%x-%x-%x-%x-%x\n",[edi-6]:2, [edi-5]:2, [edi-4]:2, [edi-3]:2, [edi-2]:2, [edi-1]:2