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| 1 | /* Declarations for Intel 80386 opcode table |
1 | /* Declarations for Intel 80386 opcode table |
| 2 | Copyright 2007, 2008, 2009, 2010, 2012 |
- | |
| 3 | Free Software Foundation, Inc. |
2 | Copyright (C) 2007-2015 Free Software Foundation, Inc. |
| Line 4... | Line 3... | ||
| 4 | 3 | ||
| Line 5... | Line 4... | ||
| 5 | This file is part of the GNU opcodes library. |
4 | This file is part of the GNU opcodes library. |
| 6 | 5 | ||
| Line 101... | Line 100... | ||
| 101 | /* Intel AVX-512 Exponential and Reciprocal Instructions support |
100 | /* Intel AVX-512 Exponential and Reciprocal Instructions support |
| 102 | required */ |
101 | required */ |
| 103 | CpuAVX512ER, |
102 | CpuAVX512ER, |
| 104 | /* Intel AVX-512 Prefetch Instructions support required */ |
103 | /* Intel AVX-512 Prefetch Instructions support required */ |
| 105 | CpuAVX512PF, |
104 | CpuAVX512PF, |
| - | 105 | /* Intel AVX-512 VL Instructions support required. */ |
|
| - | 106 | CpuAVX512VL, |
|
| - | 107 | /* Intel AVX-512 DQ Instructions support required. */ |
|
| - | 108 | CpuAVX512DQ, |
|
| - | 109 | /* Intel AVX-512 BW Instructions support required. */ |
|
| - | 110 | CpuAVX512BW, |
|
| 106 | /* Intel L1OM support required */ |
111 | /* Intel L1OM support required */ |
| 107 | CpuL1OM, |
112 | CpuL1OM, |
| 108 | /* Intel K1OM support required */ |
113 | /* Intel K1OM support required */ |
| 109 | CpuK1OM, |
114 | CpuK1OM, |
| - | 115 | /* Intel IAMCU support required */ |
|
| - | 116 | CpuIAMCU, |
|
| 110 | /* Xsave/xrstor New Instructions support required */ |
117 | /* Xsave/xrstor New Instructions support required */ |
| 111 | CpuXsave, |
118 | CpuXsave, |
| 112 | /* Xsaveopt New Instructions support required */ |
119 | /* Xsaveopt New Instructions support required */ |
| 113 | CpuXsaveopt, |
120 | CpuXsaveopt, |
| 114 | /* AES support required */ |
121 | /* AES support required */ |
| Line 167... | Line 174... | ||
| 167 | CpuSMAP, |
174 | CpuSMAP, |
| 168 | /* SHA instructions required. */ |
175 | /* SHA instructions required. */ |
| 169 | CpuSHA, |
176 | CpuSHA, |
| 170 | /* VREX support required */ |
177 | /* VREX support required */ |
| 171 | CpuVREX, |
178 | CpuVREX, |
| - | 179 | /* CLFLUSHOPT instruction required */ |
|
| - | 180 | CpuClflushOpt, |
|
| - | 181 | /* XSAVES/XRSTORS instruction required */ |
|
| - | 182 | CpuXSAVES, |
|
| - | 183 | /* XSAVEC instruction required */ |
|
| - | 184 | CpuXSAVEC, |
|
| - | 185 | /* PREFETCHWT1 instruction required */ |
|
| - | 186 | CpuPREFETCHWT1, |
|
| - | 187 | /* SE1 instruction required */ |
|
| - | 188 | CpuSE1, |
|
| - | 189 | /* CLWB instruction required */ |
|
| - | 190 | CpuCLWB, |
|
| - | 191 | /* PCOMMIT instruction required */ |
|
| - | 192 | CpuPCOMMIT, |
|
| - | 193 | /* Intel AVX-512 IFMA Instructions support required. */ |
|
| - | 194 | CpuAVX512IFMA, |
|
| - | 195 | /* Intel AVX-512 VBMI Instructions support required. */ |
|
| - | 196 | CpuAVX512VBMI, |
|
| - | 197 | /* mwaitx instruction required */ |
|
| - | 198 | CpuMWAITX, |
|
| - | 199 | /* Clzero instruction required */ |
|
| - | 200 | CpuCLZERO, |
|
| - | 201 | /* OSPKE instruction required */ |
|
| - | 202 | CpuOSPKE, |
|
| 172 | /* 64bit support required */ |
203 | /* 64bit support required */ |
| 173 | Cpu64, |
204 | Cpu64, |
| 174 | /* Not supported in the 64bit mode */ |
205 | /* Not supported in the 64bit mode */ |
| 175 | CpuNo64, |
206 | CpuNo64, |
| - | 207 | /* AMD64 support required */ |
|
| - | 208 | CpuAMD64, |
|
| - | 209 | /* Intel64 support required */ |
|
| - | 210 | CpuIntel64, |
|
| 176 | /* The last bitfield in i386_cpu_flags. */ |
211 | /* The last bitfield in i386_cpu_flags. */ |
| 177 | CpuMax = CpuNo64 |
212 | CpuMax = CpuNo64 |
| 178 | }; |
213 | }; |
| Line 179... | Line 214... | ||
| 179 | 214 | ||
| Line 225... | Line 260... | ||
| 225 | unsigned int cpuavx2:1; |
260 | unsigned int cpuavx2:1; |
| 226 | unsigned int cpuavx512f:1; |
261 | unsigned int cpuavx512f:1; |
| 227 | unsigned int cpuavx512cd:1; |
262 | unsigned int cpuavx512cd:1; |
| 228 | unsigned int cpuavx512er:1; |
263 | unsigned int cpuavx512er:1; |
| 229 | unsigned int cpuavx512pf:1; |
264 | unsigned int cpuavx512pf:1; |
| - | 265 | unsigned int cpuavx512vl:1; |
|
| - | 266 | unsigned int cpuavx512dq:1; |
|
| - | 267 | unsigned int cpuavx512bw:1; |
|
| 230 | unsigned int cpul1om:1; |
268 | unsigned int cpul1om:1; |
| 231 | unsigned int cpuk1om:1; |
269 | unsigned int cpuk1om:1; |
| - | 270 | unsigned int cpuiamcu:1; |
|
| 232 | unsigned int cpuxsave:1; |
271 | unsigned int cpuxsave:1; |
| 233 | unsigned int cpuxsaveopt:1; |
272 | unsigned int cpuxsaveopt:1; |
| 234 | unsigned int cpuaes:1; |
273 | unsigned int cpuaes:1; |
| 235 | unsigned int cpupclmul:1; |
274 | unsigned int cpupclmul:1; |
| 236 | unsigned int cpufma:1; |
275 | unsigned int cpufma:1; |
| Line 258... | Line 297... | ||
| 258 | unsigned int cpuadx:1; |
297 | unsigned int cpuadx:1; |
| 259 | unsigned int cpuprfchw:1; |
298 | unsigned int cpuprfchw:1; |
| 260 | unsigned int cpusmap:1; |
299 | unsigned int cpusmap:1; |
| 261 | unsigned int cpusha:1; |
300 | unsigned int cpusha:1; |
| 262 | unsigned int cpuvrex:1; |
301 | unsigned int cpuvrex:1; |
| - | 302 | unsigned int cpuclflushopt:1; |
|
| - | 303 | unsigned int cpuxsaves:1; |
|
| - | 304 | unsigned int cpuxsavec:1; |
|
| - | 305 | unsigned int cpuprefetchwt1:1; |
|
| - | 306 | unsigned int cpuse1:1; |
|
| - | 307 | unsigned int cpuclwb:1; |
|
| - | 308 | unsigned int cpupcommit:1; |
|
| - | 309 | unsigned int cpuavx512ifma:1; |
|
| - | 310 | unsigned int cpuavx512vbmi:1; |
|
| - | 311 | unsigned int cpumwaitx:1; |
|
| - | 312 | unsigned int cpuclzero:1; |
|
| - | 313 | unsigned int cpuospke:1; |
|
| 263 | unsigned int cpu64:1; |
314 | unsigned int cpu64:1; |
| 264 | unsigned int cpuno64:1; |
315 | unsigned int cpuno64:1; |
| - | 316 | unsigned int cpuamd64:1; |
|
| - | 317 | unsigned int cpuintel64:1; |
|
| 265 | #ifdef CpuUnused |
318 | #ifdef CpuUnused |
| 266 | unsigned int unused:(CpuNumOfBits - CpuUnused); |
319 | unsigned int unused:(CpuNumOfBits - CpuUnused); |
| 267 | #endif |
320 | #endif |
| 268 | } bitfield; |
321 | } bitfield; |
| 269 | unsigned int array[CpuNumOfUints]; |
322 | unsigned int array[CpuNumOfUints]; |
| Line 476... | Line 529... | ||
| 476 | 2: 1to8 broadcast. |
529 | 2: 1to8 broadcast. |
| 477 | */ |
530 | */ |
| 478 | #define NO_BROADCAST 0 |
531 | #define NO_BROADCAST 0 |
| 479 | #define BROADCAST_1TO16 1 |
532 | #define BROADCAST_1TO16 1 |
| 480 | #define BROADCAST_1TO8 2 |
533 | #define BROADCAST_1TO8 2 |
| - | 534 | #define BROADCAST_1TO4 3 |
|
| - | 535 | #define BROADCAST_1TO2 4 |
|
| 481 | Broadcast, |
536 | Broadcast, |
| Line 482... | Line 537... | ||
| 482 | 537 | ||
| 483 | /* Static rounding control is supported. */ |
538 | /* Static rounding control is supported. */ |