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/* Opcode decoder for the Renesas RL78
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/* Opcode decoder for the Renesas RL78
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   Copyright 2011
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   Free Software Foundation, Inc.
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   Copyright (C) 2011-2015 Free Software Foundation, Inc.
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   Written by DJ Delorie
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   Written by DJ Delorie
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   This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
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   This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
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   decodes the next opcode into the following structures.  */
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   decodes the next opcode into the following structures.  */
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#ifndef RL78_OPCODES_H_INCLUDED
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#ifndef RL78_OPCODES_H_INCLUDED
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#define RL78_OPCODES_H_INCLUDED
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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  RL78_ISA_DEFAULT,
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  RL78_ISA_G10,
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  RL78_ISA_G13,
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  RL78_ISA_G14,
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#define RL78_OPCODES_H_INCLUDED
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} RL78_Dis_Isa;
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/* For the purposes of these structures, the RL78 registers are as
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/* For the purposes of these structures, the RL78 registers are as
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   follows, despite most of these being memory-mapped and
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   follows, despite most of these being memory-mapped and
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   bank-switched:  */
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   bank-switched:  */
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  RL78_Size		size;
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  RL78_Size		size;
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  /* By convention, these are destination, source.  */
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  /* By convention, these are destination, source.  */
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  RL78_Opcode_Operand	op[2];
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  RL78_Opcode_Operand	op[2];
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} RL78_Opcode_Decoded;
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} RL78_Opcode_Decoded;
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int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa);
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#ifdef __cplusplus
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}
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int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
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#endif