WebSVN – Kolibri OS – Diff – /programs/system/drivers/ati2d/ati2d.h

 typedef void *pointer;
 typedef unsigned int   Bool;
-typedef unsigned int memType;
-typedef struct { float hi, lo; } range;
-#include "pci.h"
-#include "rhd_regs.h"
+typedef unsigned int memType;
+typedef struct { float hi, lo; } range;
-#define IS_R300_3D   0
-#define IS_R500_3D   1
+#define R300_PIO     1
-#define R300_PIO     1
+#define PCI_CMD_STAT_REG        0x04
+typedef enum
-enum RHD_CHIPSETS {
+{
-    RHD_UNKNOWN = 0,
+    CHIP_FAMILY_UNKNOW,
-    RHD_R300,
+    CHIP_FAMILY_LEGACY,
-    RHD_R350,
+    CHIP_FAMILY_RADEON,
-    RHD_RV350,
+    CHIP_FAMILY_RV100,
-    RHD_RV370,
+    CHIP_FAMILY_RS100,    /* U1 (IGP320M) or A3 (IGP320)*/
-    RHD_RV380,
+    CHIP_FAMILY_RV200,
-    /* R500 */
+    CHIP_FAMILY_RS200,    /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
-    RHD_RV505,
+    CHIP_FAMILY_R200,
-    RHD_RV515,
+    CHIP_FAMILY_RV250,
-    RHD_RV516,
+    CHIP_FAMILY_RS300,    /* RS300/RS350 */
-    RHD_R520,
+    CHIP_FAMILY_RV280,
-    RHD_RV530,
+    CHIP_FAMILY_R300,
+    CHIP_FAMILY_R350,
-    RHD_RV535,
+    CHIP_FAMILY_RV350,
-    RHD_RV550,
+    CHIP_FAMILY_RV380,    /* RV370/RV380/M22/M24 */
-    RHD_RV560,
+    CHIP_FAMILY_R420,     /* R420/R423/M18 */
-    RHD_RV570,
+    CHIP_FAMILY_RV410,    /* RV410, M26 */
-    RHD_R580,
+    CHIP_FAMILY_RS400,    /* xpress 200, 200m (RS400) Intel */
-    /* R500 Mobility */
+    CHIP_FAMILY_RS480,    /* xpress 200, 200m (RS410/480/482/485) AMD */
-    RHD_M52,
+    CHIP_FAMILY_RV515,    /* rv515 */
-    RHD_M54,
+    CHIP_FAMILY_R520,     /* r520 */
-    RHD_M56,
+    CHIP_FAMILY_RV530,    /* rv530 */
-    RHD_M58,
+    CHIP_FAMILY_R580,     /* r580 */
-    RHD_M62,
+    CHIP_FAMILY_RV560,    /* rv560 */
-    RHD_M64,
+    CHIP_FAMILY_RV570,    /* rv570 */
-    RHD_M66,
+    CHIP_FAMILY_RS600,
-    RHD_M68,
-    RHD_M71,
+    CHIP_FAMILY_RS690,
-    /* R500 integrated */
+    CHIP_FAMILY_RS740,
-    RHD_RS600,
+    CHIP_FAMILY_R600,     /* r600 */
-    RHD_RS690,
+    CHIP_FAMILY_R630,
-    RHD_RS740,
+    CHIP_FAMILY_RV610,
-    /* R600 */
+    CHIP_FAMILY_RV630,
-    RHD_R600,
+    CHIP_FAMILY_RV670,
+    CHIP_FAMILY_RV620,
+    CHIP_FAMILY_RV635,
+    CHIP_FAMILY_RS780,
+    CHIP_FAMILY_RV770,
+    CHIP_FAMILY_LAST
+} RADEONChipFamily;
-    RHD_RV610,
+#define IS_RV100_VARIANT ((rhdPtr->ChipFamily == CHIP_FAMILY_RV100)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RV200)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RS100)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RS200)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RV250)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RV280)  ||  \
+        (rhdPtr->ChipFamily == CHIP_FAMILY_RS300))
+#define IS_R300_VARIANT ((info->ChipFamily == CHIP_FAMILY_R300)  ||  \
+        (info->ChipFamily == CHIP_FAMILY_RV350) ||  \
+        (info->ChipFamily == CHIP_FAMILY_R350)  ||  \
+        (info->ChipFamily == CHIP_FAMILY_RV380) ||  \
+        (info->ChipFamily == CHIP_FAMILY_R420)  ||  \
+        (info->ChipFamily == CHIP_FAMILY_RV410) ||  \
+        (info->ChipFamily == CHIP_FAMILY_RS400) ||  \
+        (info->ChipFamily == CHIP_FAMILY_RS480))
+#define IS_AVIVO_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV515))
+#define IS_DCE3_VARIANT ((info->ChipFamily >= CHIP_FAMILY_RV620))
-    RHD_RV630,
+#define IS_R500_3D ((info->ChipFamily == CHIP_FAMILY_RV515)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_R520)   ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV530)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_R580)   ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV560)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV570))
+#define IS_R300_3D ((info->ChipFamily == CHIP_FAMILY_R300)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV350) ||  \
+	(info->ChipFamily == CHIP_FAMILY_R350)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV380) ||  \
-    /* R600 Mobility */
+	(info->ChipFamily == CHIP_FAMILY_R420)  ||  \
+	(info->ChipFamily == CHIP_FAMILY_RV410) ||  \
+	(info->ChipFamily == CHIP_FAMILY_RS690) ||  \
+	(info->ChipFamily == CHIP_FAMILY_RS600) ||  \
-    RHD_M72,
+	(info->ChipFamily == CHIP_FAMILY_RS740) ||  \
-    RHD_M74,
+	(info->ChipFamily == CHIP_FAMILY_RS400) ||  \
-    RHD_M76,
+	(info->ChipFamily == CHIP_FAMILY_RS480))
-    /* RV670 came into existence after RV6x0 and M7x */
-    RHD_RV670,
+typedef enum {
-    RHD_R680,
+	CARD_PCI,
-    RHD_RV620,
+	CARD_AGP,
+	CARD_PCIE
+} RADEONCardType;
+/*
+ * Errata workarounds
+ */
+typedef enum {
-    RHD_M82,
+       CHIP_ERRATA_R300_CG             = 0x00000001,
-    RHD_RV635,
+       CHIP_ERRATA_PLL_DUMMYREADS      = 0x00000002,
+       CHIP_ERRATA_PLL_DELAY           = 0x00000004
+} RADEONErrata;
+typedef struct
+{
+    u32_t pci_device_id;
-    RHD_M86,
-    RHD_RS780,
-    RHD_CHIP_END
-};
-enum RHD_FAMILIES {
-    RHD_FAMILY_UNKNOWN = 0,
-    RHD_FAMILY_RADEON,
-    RHD_FAMILY_RV100,
-    RHD_FAMILY_RS100,    /* U1 (IGP320M) or A3 (IGP320)*/
-    RHD_FAMILY_RV200,
-    RHD_FAMILY_RS200,    /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
-    RHD_FAMILY_R200,
-    RHD_FAMILY_RV250,
-    RHD_FAMILY_RS300,    /* RS300/RS350 */
-    RHD_FAMILY_RV280,
-    RHD_FAMILY_R300,
-    RHD_FAMILY_R350,
-    RHD_FAMILY_RV350,
-    RHD_FAMILY_RV380,    /* RV370/RV380/M22/M24 */
-    RHD_FAMILY_R420,     /* R420/R423/M18 */
-    RHD_FAMILY_RV410,    /* RV410, M26 */
-    RHD_FAMILY_RS400,    /* xpress 200, 200m (RS400) Intel */
-    RHD_FAMILY_RS480,    /* xpress 200, 200m (RS410/480/482/485) AMD */
-    RHD_FAMILY_RV515,
-    RHD_FAMILY_R520,
-    RHD_FAMILY_RV530,
-    RHD_FAMILY_RV560,
-    RHD_FAMILY_RV570,
-    RHD_FAMILY_R580,
-    RHD_FAMILY_RS690,
+    RADEONChipFamily chip_family;
-    RHD_FAMILY_R600,
+    int mobility;
-    RHD_FAMILY_RV610,
+    int igp;
 typedef struct RHDRec
+{
   u32_t            MMIOBase;
   u32_t            MMIOMapSize;
-  u32_t            videoRam;
 //  CARD32            FbBase;            /* map base of fb   */
-  u32_t            PhisBase;
+ // u32_t            PhisBase;
-  u32_t            FbIntAddress;      /* card internal address of FB */
+ // u32_t            FbIntAddress;       /* card internal address of FB */
-  u32_t            FbMapSize;
+ // u32_t            FbMapSize;
   u32_t            FbFreeStart;
   u32_t            FbFreeSize;
-  /* visible part of the framebuffer */
-  unsigned int      FbScanoutStart;
+  /* visible part of the framebuffer */
+//  unsigned int      FbScanoutStart;
+//  unsigned int      FbScanoutSize;
+  u32_t            LinearAddr;           /* Frame buffer physical address     */
-  unsigned int      FbScanoutSize;
+  u32_t            fbLocation;
+  u32_t            mc_fb_location;
+  u32_t            mc_agp_location;
+  u32_t            mc_agp_location_hi;
+  u32_t            videoRam;
+  u32_t            MemCntl;
+  u32_t            BusCntl;
+  unsigned long    FbMapSize;            /* Size of frame buffer, in bytes    */
+  unsigned long    FbSecureSize;         /* Size of secured fb area at end of
+                                            framebuffer */
+  RADEONChipFamily ChipFamily;
-  enum RHD_CHIPSETS ChipSet;
+  RADEONErrata     ChipErrata;
   enum RHD_FAMILIES ChipFamily;
   char             *chipset;
   char              *ChipName;
   int              IsIGP;
-  Bool              IsIGP;
+  int              IsMobility;
+  u32_t            bus;
   u32_t            devfn;
   u32_t            bus;
-  u32_t            devfn;
+  PCITAG           PciTag;
   u16_t            PciDeviceID;
-  u32_t             *ring_base;
+  u32_t            *ring_base;
-  u32_t             ring_rp;
+  u32_t            ring_rp;
-  u32_t             ring_wp;
+  u32_t            ring_wp;
+  int              RamWidth;
+  Bool             IsDDR;
-  int               num_gb_pipes;
+  int              num_gb_pipes;
-  Bool              has_tcl;
+  int              has_tcl;
 }RHD_t, *RHDPtr;
+{
   return *(volatile u32_t *)((u8_t*)(rhd.MMIOBase + offset));
+}
-//#define INREG(offset) *(volatile CARD32 *)((CARD8*)(rhd.MMIOBase + (offset)))
-extern inline void
-OUTREG(u16_t offset, u32_t value)
+extern inline void OUTREG(u16_t offset, u32_t value)
+{
   *(volatile u32_t *)((u8_t *)(rhd.MMIOBase + offset)) = value;
+}
 extern inline u32_t _RHDRegRead(RHDPtr rhdPtr, u16_t offset)
+{
   tmp |= (value & mask);
   _RHDRegWrite(rhdPtr, offset, tmp);
 };
-enum RHD_FAMILIES RHDFamily(enum RHD_CHIPSETS chipset);
 #define RHDRegRead(ptr, offset) _RHDRegRead((ptr)->rhdPtr, (offset))
 #define RHDRegWrite(ptr, offset, value) _RHDRegWrite((ptr)->rhdPtr, (offset), (value))
 #define RHDRegMask(ptr, offset, value, mask) _RHDRegMask((ptr)->rhdPtr, (offset), (value), (mask))

Subversion Repositories Kolibri OS

(root)/programs/system/drivers/ati2d/ati2d.h – Rev 877 → 881