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Rev 1529 Rev 1553
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macro make_bus_master bus, dev {
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macro make_bus_master bus, dev {
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	movzx	ecx, bus
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	movzx	ecx, bus
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	movzx	edx, dev
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	movzx	edx, dev
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	stdcall PciRead32, ecx ,edx, PCI_REG_COMMAND
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	stdcall PciRead16, ecx ,edx, PCI_REG_COMMAND
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	or	al, PCI_BIT_MASTER ;or PCI_BIT_PIO
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	or	al, PCI_BIT_MASTER or PCI_BIT_PIO
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	and	al, not PCI_BIT_MMIO
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;        and     al, not PCI_BIT_MMIO
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;        or      al, PCI_BIT_MASTER or PCI_BIT_MMIO
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;        and     al, not PCI_BIT_PIO
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	stdcall PciWrite16, ecx, edx, PCI_REG_COMMAND, eax
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}
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; .Latency:
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   ;*******Get current latency setting************************
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;   mov     al, 1                                       ;read a byte
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;   mov     bh, [pci_dev]
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;   mov     ah, [pci_bus]
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;   mov     bl, 0x0D                                ;from Lantency Timer Register
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;   call    pci_read_reg
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   ;******see if its aat least 64 clocks********
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;   cmp      ax,64
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;   jge      PCNET_adjust_pci_device_Done
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   ;******Set latency to 32 clocks*******
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;   mov     cx, 64                              ;value to write
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;   mov     bh, [pci_dev]
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;   mov     al, 1                               ;write a byte
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	stdcall PciWrite32, ecx, edx, PCI_REG_COMMAND, eax
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;   mov     ah, [pci_bus]
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;   mov     bl, 0x0D                            ;to Lantency Timer Register
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;; TODO: try to switch to PIO, and check if PIO works or not..
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;   call    pci_write_reg
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   ;******Check latency setting***********
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}
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;  .Done:
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	.bytes_tx	dq ?	; Statistics, updated by the driver
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	.bytes_tx	dq ?	; Statistics, updated by the driver
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	.bytes_rx	dq ?	;
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	.bytes_rx	dq ?	;
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	.packets_tx	dd ?	;
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	.packets_tx	dd ?	;
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	.packets_rx	dd ?	;
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	.packets_rx	dd ?	;
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;        .hwcksum        dd ?
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	.end:
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	.end:
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}
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}