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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2018. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;; GNU GENERAL PUBLIC LICENSE ;; |
6 | ;; GNU GENERAL PUBLIC LICENSE ;; |
7 | ;; Version 2, June 1991 ;; |
7 | ;; Version 2, June 1991 ;; |
8 | ;; ;; |
8 | ;; ;; |
Line 103... | Line 103... | ||
103 | 103 | ||
104 | ; Base address bits |
104 | ; Base address bits |
105 | PCI_BASE_ADDRESS_SPACE_IO = 0x01 |
105 | PCI_BASE_ADDRESS_SPACE_IO = 0x01 |
106 | PCI_BASE_ADDRESS_IO_MASK = 0xFFFFFFFC |
106 | PCI_BASE_ADDRESS_IO_MASK = 0xFFFFFFFC |
- | 107 | PCI_BASE_ADDRESS_MEM_MASK = 0xFFFFFFF0 |
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- | 108 | PCI_BASE_ADDRESS_MEM_TYPE_MASK = 0x00000006 |
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- | 109 | PCI_BASE_ADDRESS_MEM_TYPE_32 = 0x0 |
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- | 110 | PCI_BASE_ADDRESS_MEM_TYPE_RESERVED = 0x02 |
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- | 111 | PCI_BASE_ADDRESS_MEM_TYPE_64 = 0x4 |
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Line 107... | Line 112... | ||
107 | PCI_BASE_ADDRESS_MEM_MASK = 0xFFFFFFF0 |
112 | |
108 | 113 | ||
109 | ; command bits |
114 | ; command bits |
110 | PCI_CMD_PIO = 0x01 ; bit0: io space control |
115 | PCI_CMD_PIO = 0x01 ; bit0: io space control |
- | 116 | PCI_CMD_MMIO = 0x02 ; bit1: memory space control |
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Line 111... | Line 117... | ||
111 | PCI_CMD_MMIO = 0x02 ; bit1: memory space control |
117 | PCI_CMD_MASTER = 0x04 ; bit2: device acts as a PCI master |
112 | PCI_CMD_MASTER = 0x04 ; bit2: device acts as a PCI master |
118 | PCI_CMD_INTX_DISABLE = 0x400 ; INTx emulation disable |
Line 141... | Line 147... | ||
141 | 147 | ||
142 | endp |
148 | endp |
Line 143... | Line 149... | ||
143 | end if |
149 | end if |
144 | 150 | ||
Line 145... | Line 151... | ||
145 | 151 | ||
146 | if used PCI_find_mmio32 |
152 | if used PCI_find_mmio |
147 | proc PCI_find_mmio32 stdcall bus, dev |
153 | proc PCI_find_mmio stdcall bus, dev |
148 | 154 | ||
- | 155 | push esi ebx |
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- | 156 | mov esi, PCI_header00.base_addr_0 |
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149 | push esi |
157 | .check: |
150 | mov esi, PCI_header00.base_addr_0 |
158 | invoke PciRead32, [bus], [dev], esi |
151 | .check: |
159 | DEBUGF 1, "BAR: 0x%x\n", eax |
- | 160 | mov ebx, eax |
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152 | invoke PciRead32, [bus], [dev], esi |
161 | test eax, PCI_BASE_ADDRESS_SPACE_IO ; MMIO address? |
- | 162 | jnz .next |
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153 | test eax, PCI_BASE_ADDRESS_SPACE_IO ; mmio address? |
163 | and ebx, PCI_BASE_ADDRESS_MEM_TYPE_MASK |
- | 164 | cmp bl, PCI_BASE_ADDRESS_MEM_TYPE_64 |
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- | 165 | je .is64 |
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154 | jnz .inc |
166 | cmp bl, PCI_BASE_ADDRESS_MEM_TYPE_32 |
- | 167 | jne .next |
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155 | test eax, 100b ; 64 bit? |
168 | ; Ok, we have a 32-bit BAR. |
Line 156... | Line 169... | ||
156 | jnz .inc |
169 | and eax, PCI_BASE_ADDRESS_MEM_MASK |
- | 170 | pop ebx esi |
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- | 171 | DEBUGF 1, "32-bit MMIO address found: 0x%x\n", eax |
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- | 172 | ret |
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- | 173 | ||
- | 174 | .is64: |
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- | 175 | ; Ok, we have a 64-bit BAR, check if the upper 32-bits are 0, then we can use it.. |
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- | 176 | push eax |
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- | 177 | add esi, 4 |
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- | 178 | cmp esi, PCI_header00.base_addr_5 |
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- | 179 | ja .fail |
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- | 180 | invoke PciRead32, [bus], [dev], esi |
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- | 181 | test eax, eax |
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- | 182 | pop eax |
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- | 183 | jnz .next |
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- | 184 | and eax, PCI_BASE_ADDRESS_MEM_MASK |
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157 | and eax, not 1111b |
185 | pop ebx esi |
158 | pop esi |
186 | DEBUGF 1, "64-bit MMIO address found: 0x00000000%x\n", eax |
159 | ret |
187 | ret |
- | 188 | ||
160 | 189 | .next: |
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161 | .inc: |
190 | add esi, 4 |
- | 191 | cmp esi, PCI_header00.base_addr_5 |
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162 | add esi, 4 |
192 | jbe .check |
Line 163... | Line 193... | ||
163 | cmp esi, PCI_header00.base_addr_5 |
193 | .fail: |
164 | jbe .check |
194 | xor eax, eax |
165 | xor eax, eax |
195 | pop ebx esi |