Rev 5271 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 5271 | Rev 6104 | ||
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Line 65... | Line 65... | ||
65 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
65 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
66 | bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
66 | bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
67 | int r100_asic_reset(struct radeon_device *rdev); |
67 | int r100_asic_reset(struct radeon_device *rdev); |
68 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
68 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
69 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
69 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
- | 70 | uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags); |
|
70 | void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, |
71 | void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, |
71 | uint64_t addr, uint32_t flags); |
72 | uint64_t entry); |
72 | void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
73 | void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
73 | int r100_irq_set(struct radeon_device *rdev); |
74 | int r100_irq_set(struct radeon_device *rdev); |
74 | int r100_irq_process(struct radeon_device *rdev); |
75 | int r100_irq_process(struct radeon_device *rdev); |
75 | void r100_fence_ring_emit(struct radeon_device *rdev, |
76 | void r100_fence_ring_emit(struct radeon_device *rdev, |
76 | struct radeon_fence *fence); |
77 | struct radeon_fence *fence); |
Line 80... | Line 81... | ||
80 | bool emit_wait); |
81 | bool emit_wait); |
81 | int r100_cs_parse(struct radeon_cs_parser *p); |
82 | int r100_cs_parse(struct radeon_cs_parser *p); |
82 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
83 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
83 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
84 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
84 | struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, |
85 | struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, |
85 | uint64_t src_offset, |
86 | uint64_t src_offset, |
86 | uint64_t dst_offset, |
87 | uint64_t dst_offset, |
87 | unsigned num_gpu_pages, |
88 | unsigned num_gpu_pages, |
88 | struct reservation_object *resv); |
89 | struct reservation_object *resv); |
89 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
90 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
90 | uint32_t tiling_flags, uint32_t pitch, |
91 | uint32_t tiling_flags, uint32_t pitch, |
91 | uint32_t offset, uint32_t obj_size); |
92 | uint32_t offset, uint32_t obj_size); |
92 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
93 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
Line 151... | Line 152... | ||
151 | 152 | ||
152 | /* |
153 | /* |
153 | * r200,rv250,rs300,rv280 |
154 | * r200,rv250,rs300,rv280 |
154 | */ |
155 | */ |
155 | struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, |
156 | struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, |
156 | uint64_t src_offset, |
157 | uint64_t src_offset, |
157 | uint64_t dst_offset, |
158 | uint64_t dst_offset, |
158 | unsigned num_gpu_pages, |
159 | unsigned num_gpu_pages, |
159 | struct reservation_object *resv); |
160 | struct reservation_object *resv); |
Line 160... | Line 161... | ||
160 | void r200_set_safe_registers(struct radeon_device *rdev); |
161 | void r200_set_safe_registers(struct radeon_device *rdev); |
161 | 162 | ||
Line 167... | Line 168... | ||
167 | extern int r300_suspend(struct radeon_device *rdev); |
168 | extern int r300_suspend(struct radeon_device *rdev); |
168 | extern int r300_resume(struct radeon_device *rdev); |
169 | extern int r300_resume(struct radeon_device *rdev); |
169 | extern int r300_asic_reset(struct radeon_device *rdev); |
170 | extern int r300_asic_reset(struct radeon_device *rdev); |
170 | extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
171 | extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
171 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
172 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
172 | struct radeon_fence *fence); |
173 | struct radeon_fence *fence); |
173 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
174 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
174 | extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); |
175 | extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); |
- | 176 | extern uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags); |
|
175 | extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, |
177 | extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, |
176 | uint64_t addr, uint32_t flags); |
178 | uint64_t entry); |
177 | extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
179 | extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
178 | extern int rv370_get_pcie_lanes(struct radeon_device *rdev); |
180 | extern int rv370_get_pcie_lanes(struct radeon_device *rdev); |
179 | extern void r300_set_reg_safe(struct radeon_device *rdev); |
181 | extern void r300_set_reg_safe(struct radeon_device *rdev); |
180 | extern void r300_mc_program(struct radeon_device *rdev); |
182 | extern void r300_mc_program(struct radeon_device *rdev); |
181 | extern void r300_mc_init(struct radeon_device *rdev); |
183 | extern void r300_mc_init(struct radeon_device *rdev); |
Line 206... | Line 208... | ||
206 | extern int rs400_init(struct radeon_device *rdev); |
208 | extern int rs400_init(struct radeon_device *rdev); |
207 | extern void rs400_fini(struct radeon_device *rdev); |
209 | extern void rs400_fini(struct radeon_device *rdev); |
208 | extern int rs400_suspend(struct radeon_device *rdev); |
210 | extern int rs400_suspend(struct radeon_device *rdev); |
209 | extern int rs400_resume(struct radeon_device *rdev); |
211 | extern int rs400_resume(struct radeon_device *rdev); |
210 | void rs400_gart_tlb_flush(struct radeon_device *rdev); |
212 | void rs400_gart_tlb_flush(struct radeon_device *rdev); |
- | 213 | uint64_t rs400_gart_get_page_entry(uint64_t addr, uint32_t flags); |
|
211 | void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, |
214 | void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, |
212 | uint64_t addr, uint32_t flags); |
215 | uint64_t entry); |
213 | uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
216 | uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
214 | void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
217 | void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
215 | int rs400_gart_init(struct radeon_device *rdev); |
218 | int rs400_gart_init(struct radeon_device *rdev); |
216 | int rs400_gart_enable(struct radeon_device *rdev); |
219 | int rs400_gart_enable(struct radeon_device *rdev); |
217 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
220 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
Line 230... | Line 233... | ||
230 | int rs600_irq_set(struct radeon_device *rdev); |
233 | int rs600_irq_set(struct radeon_device *rdev); |
231 | int rs600_irq_process(struct radeon_device *rdev); |
234 | int rs600_irq_process(struct radeon_device *rdev); |
232 | void rs600_irq_disable(struct radeon_device *rdev); |
235 | void rs600_irq_disable(struct radeon_device *rdev); |
233 | u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); |
236 | u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); |
234 | void rs600_gart_tlb_flush(struct radeon_device *rdev); |
237 | void rs600_gart_tlb_flush(struct radeon_device *rdev); |
- | 238 | uint64_t rs600_gart_get_page_entry(uint64_t addr, uint32_t flags); |
|
235 | void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, |
239 | void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, |
236 | uint64_t addr, uint32_t flags); |
240 | uint64_t entry); |
237 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
241 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
238 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
242 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
239 | void rs600_bandwidth_update(struct radeon_device *rdev); |
243 | void rs600_bandwidth_update(struct radeon_device *rdev); |
240 | void rs600_hpd_init(struct radeon_device *rdev); |
244 | void rs600_hpd_init(struct radeon_device *rdev); |
241 | void rs600_hpd_fini(struct radeon_device *rdev); |
245 | void rs600_hpd_fini(struct radeon_device *rdev); |
Line 339... | Line 343... | ||
339 | int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
343 | int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
340 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
344 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
341 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
345 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
342 | int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
346 | int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
343 | struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, |
347 | struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, |
344 | uint64_t src_offset, uint64_t dst_offset, |
348 | uint64_t src_offset, uint64_t dst_offset, |
345 | unsigned num_gpu_pages, |
349 | unsigned num_gpu_pages, |
346 | struct reservation_object *resv); |
350 | struct reservation_object *resv); |
347 | struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, |
351 | struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, |
348 | uint64_t src_offset, uint64_t dst_offset, |
352 | uint64_t src_offset, uint64_t dst_offset, |
349 | unsigned num_gpu_pages, |
353 | unsigned num_gpu_pages, |
350 | struct reservation_object *resv); |
354 | struct reservation_object *resv); |
351 | void r600_hpd_init(struct radeon_device *rdev); |
355 | void r600_hpd_init(struct radeon_device *rdev); |
352 | void r600_hpd_fini(struct radeon_device *rdev); |
356 | void r600_hpd_fini(struct radeon_device *rdev); |
353 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
357 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
Line 378... | Line 382... | ||
378 | struct radeon_ring *ring); |
382 | struct radeon_ring *ring); |
379 | u32 r600_gfx_get_wptr(struct radeon_device *rdev, |
383 | u32 r600_gfx_get_wptr(struct radeon_device *rdev, |
380 | struct radeon_ring *ring); |
384 | struct radeon_ring *ring); |
381 | void r600_gfx_set_wptr(struct radeon_device *rdev, |
385 | void r600_gfx_set_wptr(struct radeon_device *rdev, |
382 | struct radeon_ring *ring); |
386 | struct radeon_ring *ring); |
- | 387 | int r600_get_allowed_info_register(struct radeon_device *rdev, |
|
- | 388 | u32 reg, u32 *val); |
|
383 | /* r600 irq */ |
389 | /* r600 irq */ |
384 | int r600_irq_process(struct radeon_device *rdev); |
390 | int r600_irq_process(struct radeon_device *rdev); |
385 | int r600_irq_init(struct radeon_device *rdev); |
391 | int r600_irq_init(struct radeon_device *rdev); |
386 | void r600_irq_fini(struct radeon_device *rdev); |
392 | void r600_irq_fini(struct radeon_device *rdev); |
387 | void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); |
393 | void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); |
388 | int r600_irq_set(struct radeon_device *rdev); |
394 | int r600_irq_set(struct radeon_device *rdev); |
389 | void r600_irq_suspend(struct radeon_device *rdev); |
395 | void r600_irq_suspend(struct radeon_device *rdev); |
390 | void r600_disable_interrupts(struct radeon_device *rdev); |
396 | void r600_disable_interrupts(struct radeon_device *rdev); |
391 | void r600_rlc_stop(struct radeon_device *rdev); |
397 | void r600_rlc_stop(struct radeon_device *rdev); |
392 | /* r600 audio */ |
398 | /* r600 audio */ |
393 | int r600_audio_init(struct radeon_device *rdev); |
- | |
394 | void r600_audio_fini(struct radeon_device *rdev); |
399 | void r600_audio_fini(struct radeon_device *rdev); |
395 | void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
400 | void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
396 | void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
401 | void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
397 | size_t size); |
402 | size_t size); |
398 | void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
403 | void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
399 | void r600_hdmi_audio_workaround(struct drm_encoder *encoder); |
404 | void r600_hdmi_audio_workaround(struct drm_encoder *encoder); |
400 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
405 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
401 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
406 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
402 | void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); |
- | |
403 | void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
- | |
404 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
407 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
405 | u32 r600_get_xclk(struct radeon_device *rdev); |
408 | u32 r600_get_xclk(struct radeon_device *rdev); |
406 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
409 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
407 | int rv6xx_get_temp(struct radeon_device *rdev); |
410 | int rv6xx_get_temp(struct radeon_device *rdev); |
408 | int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
411 | int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Line 430... | Line 433... | ||
430 | struct radeon_ps *ps); |
433 | struct radeon_ps *ps); |
431 | void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
434 | void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
432 | struct seq_file *m); |
435 | struct seq_file *m); |
433 | int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, |
436 | int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, |
434 | enum radeon_dpm_forced_level level); |
437 | enum radeon_dpm_forced_level level); |
- | 438 | u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 439 | u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev); |
|
435 | /* rs780 dpm */ |
440 | /* rs780 dpm */ |
436 | int rs780_dpm_init(struct radeon_device *rdev); |
441 | int rs780_dpm_init(struct radeon_device *rdev); |
437 | int rs780_dpm_enable(struct radeon_device *rdev); |
442 | int rs780_dpm_enable(struct radeon_device *rdev); |
438 | void rs780_dpm_disable(struct radeon_device *rdev); |
443 | void rs780_dpm_disable(struct radeon_device *rdev); |
439 | int rs780_dpm_set_power_state(struct radeon_device *rdev); |
444 | int rs780_dpm_set_power_state(struct radeon_device *rdev); |
Line 446... | Line 451... | ||
446 | struct radeon_ps *ps); |
451 | struct radeon_ps *ps); |
447 | void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
452 | void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
448 | struct seq_file *m); |
453 | struct seq_file *m); |
449 | int rs780_dpm_force_performance_level(struct radeon_device *rdev, |
454 | int rs780_dpm_force_performance_level(struct radeon_device *rdev, |
450 | enum radeon_dpm_forced_level level); |
455 | enum radeon_dpm_forced_level level); |
- | 456 | u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 457 | u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev); |
|
Line 451... | Line 458... | ||
451 | 458 | ||
452 | /* |
459 | /* |
453 | * rv770,rv730,rv710,rv740 |
460 | * rv770,rv730,rv710,rv740 |
454 | */ |
461 | */ |
Line 461... | Line 468... | ||
461 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
468 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
462 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
469 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
463 | void r700_cp_stop(struct radeon_device *rdev); |
470 | void r700_cp_stop(struct radeon_device *rdev); |
464 | void r700_cp_fini(struct radeon_device *rdev); |
471 | void r700_cp_fini(struct radeon_device *rdev); |
465 | struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, |
472 | struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, |
466 | uint64_t src_offset, uint64_t dst_offset, |
473 | uint64_t src_offset, uint64_t dst_offset, |
467 | unsigned num_gpu_pages, |
474 | unsigned num_gpu_pages, |
468 | struct reservation_object *resv); |
475 | struct reservation_object *resv); |
469 | u32 rv770_get_xclk(struct radeon_device *rdev); |
476 | u32 rv770_get_xclk(struct radeon_device *rdev); |
470 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
477 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
471 | int rv770_get_temp(struct radeon_device *rdev); |
478 | int rv770_get_temp(struct radeon_device *rdev); |
472 | /* hdmi */ |
- | |
473 | void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
- | |
474 | /* rv7xx pm */ |
479 | /* rv7xx pm */ |
475 | int rv770_dpm_init(struct radeon_device *rdev); |
480 | int rv770_dpm_init(struct radeon_device *rdev); |
476 | int rv770_dpm_enable(struct radeon_device *rdev); |
481 | int rv770_dpm_enable(struct radeon_device *rdev); |
477 | int rv770_dpm_late_enable(struct radeon_device *rdev); |
482 | int rv770_dpm_late_enable(struct radeon_device *rdev); |
478 | void rv770_dpm_disable(struct radeon_device *rdev); |
483 | void rv770_dpm_disable(struct radeon_device *rdev); |
Line 487... | Line 492... | ||
487 | void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
492 | void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
488 | struct seq_file *m); |
493 | struct seq_file *m); |
489 | int rv770_dpm_force_performance_level(struct radeon_device *rdev, |
494 | int rv770_dpm_force_performance_level(struct radeon_device *rdev, |
490 | enum radeon_dpm_forced_level level); |
495 | enum radeon_dpm_forced_level level); |
491 | bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); |
496 | bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); |
- | 497 | u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 498 | u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev); |
|
Line 492... | Line 499... | ||
492 | 499 | ||
493 | /* |
500 | /* |
494 | * evergreen |
501 | * evergreen |
495 | */ |
502 | */ |
Line 535... | Line 542... | ||
535 | void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
542 | void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
536 | struct radeon_fence *fence); |
543 | struct radeon_fence *fence); |
537 | void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, |
544 | void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, |
538 | struct radeon_ib *ib); |
545 | struct radeon_ib *ib); |
539 | struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, |
546 | struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, |
540 | uint64_t src_offset, uint64_t dst_offset, |
547 | uint64_t src_offset, uint64_t dst_offset, |
541 | unsigned num_gpu_pages, |
548 | unsigned num_gpu_pages, |
542 | struct reservation_object *resv); |
549 | struct reservation_object *resv); |
543 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
- | |
544 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
- | |
545 | int evergreen_get_temp(struct radeon_device *rdev); |
550 | int evergreen_get_temp(struct radeon_device *rdev); |
- | 551 | int evergreen_get_allowed_info_register(struct radeon_device *rdev, |
|
- | 552 | u32 reg, u32 *val); |
|
546 | int sumo_get_temp(struct radeon_device *rdev); |
553 | int sumo_get_temp(struct radeon_device *rdev); |
547 | int tn_get_temp(struct radeon_device *rdev); |
554 | int tn_get_temp(struct radeon_device *rdev); |
548 | int cypress_dpm_init(struct radeon_device *rdev); |
555 | int cypress_dpm_init(struct radeon_device *rdev); |
549 | void cypress_dpm_setup_asic(struct radeon_device *rdev); |
556 | void cypress_dpm_setup_asic(struct radeon_device *rdev); |
550 | int cypress_dpm_enable(struct radeon_device *rdev); |
557 | int cypress_dpm_enable(struct radeon_device *rdev); |
Line 564... | Line 571... | ||
564 | u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); |
571 | u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); |
565 | u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); |
572 | u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); |
566 | bool btc_dpm_vblank_too_short(struct radeon_device *rdev); |
573 | bool btc_dpm_vblank_too_short(struct radeon_device *rdev); |
567 | void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
574 | void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
568 | struct seq_file *m); |
575 | struct seq_file *m); |
- | 576 | u32 btc_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 577 | u32 btc_dpm_get_current_mclk(struct radeon_device *rdev); |
|
569 | int sumo_dpm_init(struct radeon_device *rdev); |
578 | int sumo_dpm_init(struct radeon_device *rdev); |
570 | int sumo_dpm_enable(struct radeon_device *rdev); |
579 | int sumo_dpm_enable(struct radeon_device *rdev); |
571 | int sumo_dpm_late_enable(struct radeon_device *rdev); |
580 | int sumo_dpm_late_enable(struct radeon_device *rdev); |
572 | void sumo_dpm_disable(struct radeon_device *rdev); |
581 | void sumo_dpm_disable(struct radeon_device *rdev); |
573 | int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); |
582 | int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); |
Line 582... | Line 591... | ||
582 | struct radeon_ps *ps); |
591 | struct radeon_ps *ps); |
583 | void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
592 | void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
584 | struct seq_file *m); |
593 | struct seq_file *m); |
585 | int sumo_dpm_force_performance_level(struct radeon_device *rdev, |
594 | int sumo_dpm_force_performance_level(struct radeon_device *rdev, |
586 | enum radeon_dpm_forced_level level); |
595 | enum radeon_dpm_forced_level level); |
- | 596 | u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 597 | u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev); |
|
Line 587... | Line 598... | ||
587 | 598 | ||
588 | /* |
599 | /* |
589 | * cayman |
600 | * cayman |
590 | */ |
601 | */ |
Line 617... | Line 628... | ||
617 | struct radeon_ib *ib, |
628 | struct radeon_ib *ib, |
618 | uint64_t pe, |
629 | uint64_t pe, |
619 | uint64_t addr, unsigned count, |
630 | uint64_t addr, unsigned count, |
620 | uint32_t incr, uint32_t flags); |
631 | uint32_t incr, uint32_t flags); |
621 | void cayman_dma_vm_set_pages(struct radeon_device *rdev, |
632 | void cayman_dma_vm_set_pages(struct radeon_device *rdev, |
622 | struct radeon_ib *ib, |
633 | struct radeon_ib *ib, |
623 | uint64_t pe, |
634 | uint64_t pe, |
624 | uint64_t addr, unsigned count, |
635 | uint64_t addr, unsigned count, |
625 | uint32_t incr, uint32_t flags); |
636 | uint32_t incr, uint32_t flags); |
626 | void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
637 | void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
Line 627... | Line 638... | ||
627 | 638 | ||
628 | void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
639 | void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
Line 638... | Line 649... | ||
638 | struct radeon_ring *ring); |
649 | struct radeon_ring *ring); |
639 | uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, |
650 | uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, |
640 | struct radeon_ring *ring); |
651 | struct radeon_ring *ring); |
641 | void cayman_dma_set_wptr(struct radeon_device *rdev, |
652 | void cayman_dma_set_wptr(struct radeon_device *rdev, |
642 | struct radeon_ring *ring); |
653 | struct radeon_ring *ring); |
- | 654 | int cayman_get_allowed_info_register(struct radeon_device *rdev, |
|
- | 655 | u32 reg, u32 *val); |
|
Line 643... | Line 656... | ||
643 | 656 | ||
644 | int ni_dpm_init(struct radeon_device *rdev); |
657 | int ni_dpm_init(struct radeon_device *rdev); |
645 | void ni_dpm_setup_asic(struct radeon_device *rdev); |
658 | void ni_dpm_setup_asic(struct radeon_device *rdev); |
646 | int ni_dpm_enable(struct radeon_device *rdev); |
659 | int ni_dpm_enable(struct radeon_device *rdev); |
Line 656... | Line 669... | ||
656 | void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
669 | void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
657 | struct seq_file *m); |
670 | struct seq_file *m); |
658 | int ni_dpm_force_performance_level(struct radeon_device *rdev, |
671 | int ni_dpm_force_performance_level(struct radeon_device *rdev, |
659 | enum radeon_dpm_forced_level level); |
672 | enum radeon_dpm_forced_level level); |
660 | bool ni_dpm_vblank_too_short(struct radeon_device *rdev); |
673 | bool ni_dpm_vblank_too_short(struct radeon_device *rdev); |
- | 674 | u32 ni_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 675 | u32 ni_dpm_get_current_mclk(struct radeon_device *rdev); |
|
661 | int trinity_dpm_init(struct radeon_device *rdev); |
676 | int trinity_dpm_init(struct radeon_device *rdev); |
662 | int trinity_dpm_enable(struct radeon_device *rdev); |
677 | int trinity_dpm_enable(struct radeon_device *rdev); |
663 | int trinity_dpm_late_enable(struct radeon_device *rdev); |
678 | int trinity_dpm_late_enable(struct radeon_device *rdev); |
664 | void trinity_dpm_disable(struct radeon_device *rdev); |
679 | void trinity_dpm_disable(struct radeon_device *rdev); |
665 | int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); |
680 | int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); |
Line 675... | Line 690... | ||
675 | void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
690 | void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
676 | struct seq_file *m); |
691 | struct seq_file *m); |
677 | int trinity_dpm_force_performance_level(struct radeon_device *rdev, |
692 | int trinity_dpm_force_performance_level(struct radeon_device *rdev, |
678 | enum radeon_dpm_forced_level level); |
693 | enum radeon_dpm_forced_level level); |
679 | void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
694 | void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
- | 695 | u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 696 | u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev); |
|
- | 697 | int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); |
|
Line 680... | Line 698... | ||
680 | 698 | ||
681 | /* DCE6 - SI */ |
699 | /* DCE6 - SI */ |
682 | void dce6_bandwidth_update(struct radeon_device *rdev); |
- | |
683 | int dce6_audio_init(struct radeon_device *rdev); |
700 | void dce6_bandwidth_update(struct radeon_device *rdev); |
Line 684... | Line 701... | ||
684 | void dce6_audio_fini(struct radeon_device *rdev); |
701 | void dce6_audio_fini(struct radeon_device *rdev); |
685 | 702 | ||
686 | /* |
703 | /* |
Line 703... | Line 720... | ||
703 | void si_vm_fini(struct radeon_device *rdev); |
720 | void si_vm_fini(struct radeon_device *rdev); |
704 | void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
721 | void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
705 | unsigned vm_id, uint64_t pd_addr); |
722 | unsigned vm_id, uint64_t pd_addr); |
706 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
723 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
707 | struct radeon_fence *si_copy_dma(struct radeon_device *rdev, |
724 | struct radeon_fence *si_copy_dma(struct radeon_device *rdev, |
708 | uint64_t src_offset, uint64_t dst_offset, |
725 | uint64_t src_offset, uint64_t dst_offset, |
709 | unsigned num_gpu_pages, |
726 | unsigned num_gpu_pages, |
710 | struct reservation_object *resv); |
727 | struct reservation_object *resv); |
Line 711... | Line 728... | ||
711 | 728 | ||
712 | void si_dma_vm_copy_pages(struct radeon_device *rdev, |
729 | void si_dma_vm_copy_pages(struct radeon_device *rdev, |
713 | struct radeon_ib *ib, |
730 | struct radeon_ib *ib, |
714 | uint64_t pe, uint64_t src, |
731 | uint64_t pe, uint64_t src, |
715 | unsigned count); |
732 | unsigned count); |
716 | void si_dma_vm_write_pages(struct radeon_device *rdev, |
733 | void si_dma_vm_write_pages(struct radeon_device *rdev, |
717 | struct radeon_ib *ib, |
734 | struct radeon_ib *ib, |
718 | uint64_t pe, |
735 | uint64_t pe, |
719 | uint64_t addr, unsigned count, |
736 | uint64_t addr, unsigned count, |
720 | uint32_t incr, uint32_t flags); |
737 | uint32_t incr, uint32_t flags); |
721 | void si_dma_vm_set_pages(struct radeon_device *rdev, |
738 | void si_dma_vm_set_pages(struct radeon_device *rdev, |
722 | struct radeon_ib *ib, |
739 | struct radeon_ib *ib, |
723 | uint64_t pe, |
740 | uint64_t pe, |
724 | uint64_t addr, unsigned count, |
741 | uint64_t addr, unsigned count, |
Line 727... | Line 744... | ||
727 | void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
744 | void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
728 | unsigned vm_id, uint64_t pd_addr); |
745 | unsigned vm_id, uint64_t pd_addr); |
729 | u32 si_get_xclk(struct radeon_device *rdev); |
746 | u32 si_get_xclk(struct radeon_device *rdev); |
730 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
747 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
731 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
748 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
- | 749 | int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); |
|
732 | int si_get_temp(struct radeon_device *rdev); |
750 | int si_get_temp(struct radeon_device *rdev); |
- | 751 | int si_get_allowed_info_register(struct radeon_device *rdev, |
|
- | 752 | u32 reg, u32 *val); |
|
733 | int si_dpm_init(struct radeon_device *rdev); |
753 | int si_dpm_init(struct radeon_device *rdev); |
734 | void si_dpm_setup_asic(struct radeon_device *rdev); |
754 | void si_dpm_setup_asic(struct radeon_device *rdev); |
735 | int si_dpm_enable(struct radeon_device *rdev); |
755 | int si_dpm_enable(struct radeon_device *rdev); |
736 | int si_dpm_late_enable(struct radeon_device *rdev); |
756 | int si_dpm_late_enable(struct radeon_device *rdev); |
737 | void si_dpm_disable(struct radeon_device *rdev); |
757 | void si_dpm_disable(struct radeon_device *rdev); |
Line 742... | Line 762... | ||
742 | void si_dpm_display_configuration_changed(struct radeon_device *rdev); |
762 | void si_dpm_display_configuration_changed(struct radeon_device *rdev); |
743 | void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
763 | void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
744 | struct seq_file *m); |
764 | struct seq_file *m); |
745 | int si_dpm_force_performance_level(struct radeon_device *rdev, |
765 | int si_dpm_force_performance_level(struct radeon_device *rdev, |
746 | enum radeon_dpm_forced_level level); |
766 | enum radeon_dpm_forced_level level); |
- | 767 | int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, |
|
- | 768 | u32 *speed); |
|
- | 769 | int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, |
|
- | 770 | u32 speed); |
|
- | 771 | u32 si_fan_ctrl_get_mode(struct radeon_device *rdev); |
|
- | 772 | void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); |
|
- | 773 | u32 si_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 774 | u32 si_dpm_get_current_mclk(struct radeon_device *rdev); |
|
Line 747... | Line 775... | ||
747 | 775 | ||
748 | /* DCE8 - CIK */ |
776 | /* DCE8 - CIK */ |
Line 749... | Line 777... | ||
749 | void dce8_bandwidth_update(struct radeon_device *rdev); |
777 | void dce8_bandwidth_update(struct radeon_device *rdev); |
Line 763... | Line 791... | ||
763 | struct radeon_ring *ring, |
791 | struct radeon_ring *ring, |
764 | struct radeon_semaphore *semaphore, |
792 | struct radeon_semaphore *semaphore, |
765 | bool emit_wait); |
793 | bool emit_wait); |
766 | void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
794 | void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
767 | struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, |
795 | struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, |
768 | uint64_t src_offset, uint64_t dst_offset, |
796 | uint64_t src_offset, uint64_t dst_offset, |
769 | unsigned num_gpu_pages, |
797 | unsigned num_gpu_pages, |
770 | struct reservation_object *resv); |
798 | struct reservation_object *resv); |
771 | struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, |
799 | struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, |
772 | uint64_t src_offset, uint64_t dst_offset, |
800 | uint64_t src_offset, uint64_t dst_offset, |
773 | unsigned num_gpu_pages, |
801 | unsigned num_gpu_pages, |
774 | struct reservation_object *resv); |
802 | struct reservation_object *resv); |
775 | int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
803 | int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
776 | int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
804 | int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
777 | bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
805 | bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
778 | void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
806 | void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
Line 803... | Line 831... | ||
803 | void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
831 | void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
804 | struct radeon_ib *ib, |
832 | struct radeon_ib *ib, |
805 | uint64_t pe, uint64_t src, |
833 | uint64_t pe, uint64_t src, |
806 | unsigned count); |
834 | unsigned count); |
807 | void cik_sdma_vm_write_pages(struct radeon_device *rdev, |
835 | void cik_sdma_vm_write_pages(struct radeon_device *rdev, |
808 | struct radeon_ib *ib, |
836 | struct radeon_ib *ib, |
809 | uint64_t pe, |
837 | uint64_t pe, |
810 | uint64_t addr, unsigned count, |
838 | uint64_t addr, unsigned count, |
811 | uint32_t incr, uint32_t flags); |
839 | uint32_t incr, uint32_t flags); |
812 | void cik_sdma_vm_set_pages(struct radeon_device *rdev, |
840 | void cik_sdma_vm_set_pages(struct radeon_device *rdev, |
813 | struct radeon_ib *ib, |
841 | struct radeon_ib *ib, |
814 | uint64_t pe, |
842 | uint64_t pe, |
815 | uint64_t addr, unsigned count, |
843 | uint64_t addr, unsigned count, |
816 | uint32_t incr, uint32_t flags); |
844 | uint32_t incr, uint32_t flags); |
Line 818... | Line 846... | ||
818 | 846 | ||
819 | void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
847 | void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
820 | unsigned vm_id, uint64_t pd_addr); |
848 | unsigned vm_id, uint64_t pd_addr); |
821 | int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
849 | int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
822 | u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
850 | u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
823 | struct radeon_ring *ring); |
851 | struct radeon_ring *ring); |
824 | u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
852 | u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
825 | struct radeon_ring *ring); |
853 | struct radeon_ring *ring); |
826 | void cik_gfx_set_wptr(struct radeon_device *rdev, |
854 | void cik_gfx_set_wptr(struct radeon_device *rdev, |
827 | struct radeon_ring *ring); |
855 | struct radeon_ring *ring); |
828 | u32 cik_compute_get_rptr(struct radeon_device *rdev, |
856 | u32 cik_compute_get_rptr(struct radeon_device *rdev, |
829 | struct radeon_ring *ring); |
857 | struct radeon_ring *ring); |
Line 834... | Line 862... | ||
834 | u32 cik_sdma_get_rptr(struct radeon_device *rdev, |
862 | u32 cik_sdma_get_rptr(struct radeon_device *rdev, |
835 | struct radeon_ring *ring); |
863 | struct radeon_ring *ring); |
836 | u32 cik_sdma_get_wptr(struct radeon_device *rdev, |
864 | u32 cik_sdma_get_wptr(struct radeon_device *rdev, |
837 | struct radeon_ring *ring); |
865 | struct radeon_ring *ring); |
838 | void cik_sdma_set_wptr(struct radeon_device *rdev, |
866 | void cik_sdma_set_wptr(struct radeon_device *rdev, |
839 | struct radeon_ring *ring); |
867 | struct radeon_ring *ring); |
840 | int ci_get_temp(struct radeon_device *rdev); |
868 | int ci_get_temp(struct radeon_device *rdev); |
841 | int kv_get_temp(struct radeon_device *rdev); |
869 | int kv_get_temp(struct radeon_device *rdev); |
- | 870 | int cik_get_allowed_info_register(struct radeon_device *rdev, |
|
- | 871 | u32 reg, u32 *val); |
|
Line 842... | Line 872... | ||
842 | 872 | ||
843 | int ci_dpm_init(struct radeon_device *rdev); |
873 | int ci_dpm_init(struct radeon_device *rdev); |
844 | int ci_dpm_enable(struct radeon_device *rdev); |
874 | int ci_dpm_enable(struct radeon_device *rdev); |
845 | int ci_dpm_late_enable(struct radeon_device *rdev); |
875 | int ci_dpm_late_enable(struct radeon_device *rdev); |
Line 858... | Line 888... | ||
858 | struct seq_file *m); |
888 | struct seq_file *m); |
859 | int ci_dpm_force_performance_level(struct radeon_device *rdev, |
889 | int ci_dpm_force_performance_level(struct radeon_device *rdev, |
860 | enum radeon_dpm_forced_level level); |
890 | enum radeon_dpm_forced_level level); |
861 | bool ci_dpm_vblank_too_short(struct radeon_device *rdev); |
891 | bool ci_dpm_vblank_too_short(struct radeon_device *rdev); |
862 | void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
892 | void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
- | 893 | u32 ci_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 894 | u32 ci_dpm_get_current_mclk(struct radeon_device *rdev); |
|
- | 895 | ||
- | 896 | int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, |
|
- | 897 | u32 *speed); |
|
- | 898 | int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, |
|
- | 899 | u32 speed); |
|
- | 900 | u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev); |
|
- | 901 | void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); |
|
Line 863... | Line 902... | ||
863 | 902 | ||
864 | int kv_dpm_init(struct radeon_device *rdev); |
903 | int kv_dpm_init(struct radeon_device *rdev); |
865 | int kv_dpm_enable(struct radeon_device *rdev); |
904 | int kv_dpm_enable(struct radeon_device *rdev); |
866 | int kv_dpm_late_enable(struct radeon_device *rdev); |
905 | int kv_dpm_late_enable(struct radeon_device *rdev); |
Line 879... | Line 918... | ||
879 | struct seq_file *m); |
918 | struct seq_file *m); |
880 | int kv_dpm_force_performance_level(struct radeon_device *rdev, |
919 | int kv_dpm_force_performance_level(struct radeon_device *rdev, |
881 | enum radeon_dpm_forced_level level); |
920 | enum radeon_dpm_forced_level level); |
882 | void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
921 | void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
883 | void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
922 | void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
- | 923 | u32 kv_dpm_get_current_sclk(struct radeon_device *rdev); |
|
- | 924 | u32 kv_dpm_get_current_mclk(struct radeon_device *rdev); |
|
Line 884... | Line 925... | ||
884 | 925 | ||
885 | /* uvd v1.0 */ |
926 | /* uvd v1.0 */ |
886 | uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, |
927 | uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, |
887 | struct radeon_ring *ring); |
928 | struct radeon_ring *ring); |
Line 908... | Line 949... | ||
908 | 949 | ||
909 | /* uvd v2.2 */ |
950 | /* uvd v2.2 */ |
910 | int uvd_v2_2_resume(struct radeon_device *rdev); |
951 | int uvd_v2_2_resume(struct radeon_device *rdev); |
911 | void uvd_v2_2_fence_emit(struct radeon_device *rdev, |
952 | void uvd_v2_2_fence_emit(struct radeon_device *rdev, |
- | 953 | struct radeon_fence *fence); |
|
- | 954 | bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, |
|
- | 955 | struct radeon_ring *ring, |
|
- | 956 | struct radeon_semaphore *semaphore, |
|
Line 912... | Line 957... | ||
912 | struct radeon_fence *fence); |
957 | bool emit_wait); |
913 | 958 | ||
914 | /* uvd v3.1 */ |
959 | /* uvd v3.1 */ |
915 | bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
960 | bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
Line 925... | Line 970... | ||
925 | struct radeon_ring *ring); |
970 | struct radeon_ring *ring); |
926 | uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, |
971 | uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, |
927 | struct radeon_ring *ring); |
972 | struct radeon_ring *ring); |
928 | void vce_v1_0_set_wptr(struct radeon_device *rdev, |
973 | void vce_v1_0_set_wptr(struct radeon_device *rdev, |
929 | struct radeon_ring *ring); |
974 | struct radeon_ring *ring); |
- | 975 | int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data); |
|
- | 976 | unsigned vce_v1_0_bo_size(struct radeon_device *rdev); |
|
- | 977 | int vce_v1_0_resume(struct radeon_device *rdev); |
|
930 | int vce_v1_0_init(struct radeon_device *rdev); |
978 | int vce_v1_0_init(struct radeon_device *rdev); |
931 | int vce_v1_0_start(struct radeon_device *rdev); |
979 | int vce_v1_0_start(struct radeon_device *rdev); |
Line 932... | Line 980... | ||
932 | 980 | ||
- | 981 | /* vce v2.0 */ |
|
933 | /* vce v2.0 */ |
982 | unsigned vce_v2_0_bo_size(struct radeon_device *rdev); |
Line 934... | Line 983... | ||
934 | int vce_v2_0_resume(struct radeon_device *rdev); |
983 | int vce_v2_0_resume(struct radeon_device *rdev); |