Rev 1066 | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1066 | Rev 2971 | ||
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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
7 | 7 | ||
8 | $Revision: 1066 $ |
8 | $Revision: 2971 $ |
9 | 9 | ||
10 | 10 | ||
11 | dpl0 equ 10010000b ; data read dpl0 |
11 | dpl0 equ 10010000b ; data read dpl0 |
12 | drw0 equ 10010010b ; data read/write dpl0 |
12 | drw0 equ 10010010b ; data read/write dpl0 |
13 | drw1 equ 10110010b ; data read/write dpl1 |
13 | drw1 equ 10110010b ; data read/write dpl1 |
14 | drw3 equ 11110010b ; data read/write dpl3 |
14 | drw3 equ 11110010b ; data read/write dpl3 |
15 | 15 | ||
16 | cpl0 equ 10011010b ; code read dpl0 |
16 | cpl0 equ 10011010b ; code read dpl0 |
17 | cpl1 equ 10111010b ; code read dpl1 |
17 | cpl1 equ 10111010b ; code read dpl1 |
18 | cpl3 equ 11111010b ; code read dpl3 |
18 | cpl3 equ 11111010b ; code read dpl3 |
19 | 19 | ||
20 | D32 equ 01000000b ; 32bit segment |
20 | D32 equ 01000000b ; 32bit segment |
21 | G32 equ 10000000b ; page gran |
21 | G32 equ 10000000b ; page gran |
22 | 22 | ||
23 | 23 | ||
24 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
24 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
25 | 25 | ||
26 | CPU_386 equ 3 |
26 | CPU_386 equ 3 |
27 | CPU_486 equ 4 |
27 | CPU_486 equ 4 |
28 | CPU_PENTIUM equ 5 |
28 | CPU_PENTIUM equ 5 |
29 | CPU_P6 equ 6 |
29 | CPU_P6 equ 6 |
30 | CPU_PENTIUM4 equ 0x0F |
30 | CPU_PENTIUM4 equ 0x0F |
31 | 31 | ||
32 | CAPS_FPU equ 00 ;on-chip x87 floating point unit |
32 | CAPS_FPU equ 00 ;on-chip x87 floating point unit |
33 | CAPS_VME equ 01 ;virtual-mode enhancements |
33 | CAPS_VME equ 01 ;virtual-mode enhancements |
34 | CAPS_DE equ 02 ;debugging extensions |
34 | CAPS_DE equ 02 ;debugging extensions |
35 | CAPS_PSE equ 03 ;page-size extensions |
35 | CAPS_PSE equ 03 ;page-size extensions |
36 | CAPS_TSC equ 04 ;time stamp counter |
36 | CAPS_TSC equ 04 ;time stamp counter |
37 | CAPS_MSR equ 05 ;model-specific registers |
37 | CAPS_MSR equ 05 ;model-specific registers |
38 | CAPS_PAE equ 06 ;physical-address extensions |
38 | CAPS_PAE equ 06 ;physical-address extensions |
39 | CAPS_MCE equ 07 ;machine check exception |
39 | CAPS_MCE equ 07 ;machine check exception |
40 | CAPS_CX8 equ 08 ;CMPXCHG8B instruction |
40 | CAPS_CX8 equ 08 ;CMPXCHG8B instruction |
41 | CAPS_APIC equ 09 ;on-chip advanced programmable |
41 | CAPS_APIC equ 09 ;on-chip advanced programmable |
42 | ; interrupt controller |
42 | ; interrupt controller |
43 | ; 10 ;unused |
43 | ; 10 ;unused |
44 | CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions |
44 | CAPS_SEP equ 11 ;SYSENTER and SYSEXIT instructions |
45 | CAPS_MTRR equ 12 ;memory-type range registers |
45 | CAPS_MTRR equ 12 ;memory-type range registers |
46 | CAPS_PGE equ 13 ;page global extension |
46 | CAPS_PGE equ 13 ;page global extension |
47 | CAPS_MCA equ 14 ;machine check architecture |
47 | CAPS_MCA equ 14 ;machine check architecture |
48 | CAPS_CMOV equ 15 ;conditional move instructions |
48 | CAPS_CMOV equ 15 ;conditional move instructions |
49 | CAPS_PAT equ 16 ;page attribute table |
49 | CAPS_PAT equ 16 ;page attribute table |
50 | 50 | ||
51 | CAPS_PSE36 equ 17 ;page-size extensions |
51 | CAPS_PSE36 equ 17 ;page-size extensions |
52 | CAPS_PSN equ 18 ;processor serial number |
52 | CAPS_PSN equ 18 ;processor serial number |
53 | CAPS_CLFLUSH equ 19 ;CLFUSH instruction |
53 | CAPS_CLFLUSH equ 19 ;CLFUSH instruction |
54 | 54 | ||
55 | CAPS_DS equ 21 ;debug store |
55 | CAPS_DS equ 21 ;debug store |
56 | CAPS_ACPI equ 22 ;thermal monitor and software |
56 | CAPS_ACPI equ 22 ;thermal monitor and software |
57 | ;controlled clock supported |
57 | ;controlled clock supported |
58 | CAPS_MMX equ 23 ;MMX instructions |
58 | CAPS_MMX equ 23 ;MMX instructions |
59 | CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions |
59 | CAPS_FXSR equ 24 ;FXSAVE and FXRSTOR instructions |
60 | CAPS_SSE equ 25 ;SSE instructions |
60 | CAPS_SSE equ 25 ;SSE instructions |
61 | CAPS_SSE2 equ 26 ;SSE2 instructions |
61 | CAPS_SSE2 equ 26 ;SSE2 instructions |
62 | CAPS_SS equ 27 ;self-snoop |
62 | CAPS_SS equ 27 ;self-snoop |
63 | CAPS_HTT equ 28 ;hyper-threading technology |
63 | CAPS_HTT equ 28 ;hyper-threading technology |
64 | CAPS_TM equ 29 ;thermal monitor supported |
64 | CAPS_TM equ 29 ;thermal monitor supported |
65 | CAPS_IA64 equ 30 ;IA64 capabilities |
65 | CAPS_IA64 equ 30 ;IA64 capabilities |
66 | CAPS_PBE equ 31 ;pending break enable |
66 | CAPS_PBE equ 31 ;pending break enable |
67 | 67 | ||
68 | ;ecx |
68 | ;ecx |
69 | CAPS_SSE3 equ 32 ;SSE3 instructions |
69 | CAPS_SSE3 equ 32 ;SSE3 instructions |
70 | ; 33 |
70 | ; 33 |
71 | ; 34 |
71 | ; 34 |
72 | CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions |
72 | CAPS_MONITOR equ 35 ;MONITOR/MWAIT instructions |
73 | CAPS_DS_CPL equ 36 ; |
73 | CAPS_DS_CPL equ 36 ; |
74 | CAPS_VMX equ 37 ;virtual mode extensions |
74 | CAPS_VMX equ 37 ;virtual mode extensions |
75 | ; 38 ; |
75 | ; 38 ; |
76 | CAPS_EST equ 39 ;enhansed speed step |
76 | CAPS_EST equ 39 ;enhansed speed step |
77 | CAPS_TM2 equ 40 ;thermal monitor2 supported |
77 | CAPS_TM2 equ 40 ;thermal monitor2 supported |
78 | ; 41 |
78 | ; 41 |
79 | CAPS_CID equ 42 ; |
79 | CAPS_CID equ 42 ; |
80 | ; 43 |
80 | ; 43 |
81 | ; 44 |
81 | ; 44 |
82 | CAPS_CX16 equ 45 ;CMPXCHG16B instruction |
82 | CAPS_CX16 equ 45 ;CMPXCHG16B instruction |
83 | CAPS_xTPR equ 46 ; |
83 | CAPS_xTPR equ 46 ; |
84 | ; |
84 | ; |
85 | ;reserved |
85 | ;reserved |
86 | ; |
86 | ; |
87 | ;ext edx /ecx |
87 | ;ext edx /ecx |
88 | CAPS_SYSCAL equ 64 ; |
88 | CAPS_SYSCAL equ 64 ; |
89 | CAPS_XD equ 65 ;execution disable |
89 | CAPS_XD equ 65 ;execution disable |
90 | CAPS_FFXSR equ 66 ; |
90 | CAPS_FFXSR equ 66 ; |
91 | CAPS_RDTSCP equ 67 ; |
91 | CAPS_RDTSCP equ 67 ; |
92 | CAPS_X64 equ 68 ; |
92 | CAPS_X64 equ 68 ; |
93 | CAPS_3DNOW equ 69 ; |
93 | CAPS_3DNOW equ 69 ; |
94 | CAPS_3DNOWEXT equ 70 ; |
94 | CAPS_3DNOWEXT equ 70 ; |
95 | CAPS_LAHF equ 71 ; |
95 | CAPS_LAHF equ 71 ; |
96 | CAPS_CMP_LEG equ 72 ; |
96 | CAPS_CMP_LEG equ 72 ; |
97 | CAPS_SVM equ 73 ;secure virual machine |
97 | CAPS_SVM equ 73 ;secure virual machine |
98 | CAPS_ALTMOVCR8 equ 74 ; |
98 | CAPS_ALTMOVCR8 equ 74 ; |
99 | 99 | ||
100 | ; CPU MSR names |
100 | ; CPU MSR names |
101 | MSR_SYSENTER_CS equ 0x174 |
101 | MSR_SYSENTER_CS equ 0x174 |
102 | MSR_SYSENTER_ESP equ 0x175 |
102 | MSR_SYSENTER_ESP equ 0x175 |
103 | MSR_SYSENTER_EIP equ 0x176 |
103 | MSR_SYSENTER_EIP equ 0x176 |
104 | MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register |
104 | MSR_AMD_EFER equ 0xC0000080 ; Extended Feature Enable Register |
105 | MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
105 | MSR_AMD_STAR equ 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
106 | 106 | ||
107 | CR0_PE equ 0x00000001 ;protected mode |
107 | CR0_PE equ 0x00000001 ;protected mode |
108 | CR0_MP equ 0x00000002 ;monitor fpu |
108 | CR0_MP equ 0x00000002 ;monitor fpu |
109 | CR0_EM equ 0x00000004 ;fpu emulation |
109 | CR0_EM equ 0x00000004 ;fpu emulation |
110 | CR0_TS equ 0x00000008 ;task switch |
110 | CR0_TS equ 0x00000008 ;task switch |
111 | CR0_ET equ 0x00000010 ;extension type hardcoded to 1 |
111 | CR0_ET equ 0x00000010 ;extension type hardcoded to 1 |
112 | CR0_NE equ 0x00000020 ;numeric error |
112 | CR0_NE equ 0x00000020 ;numeric error |
113 | CR0_WP equ 0x00010000 ;write protect |
113 | CR0_WP equ 0x00010000 ;write protect |
114 | CR0_AM equ 0x00040000 ;alignment check |
114 | CR0_AM equ 0x00040000 ;alignment check |
115 | CR0_NW equ 0x20000000 ;not write-through |
115 | CR0_NW equ 0x20000000 ;not write-through |
116 | CR0_CD equ 0x40000000 ;cache disable |
116 | CR0_CD equ 0x40000000 ;cache disable |
117 | CR0_PG equ 0x80000000 ;paging |
117 | CR0_PG equ 0x80000000 ;paging |
118 | 118 | ||
119 | 119 | ||
120 | CR4_VME equ 0x0001 |
120 | CR4_VME equ 0x0001 |
121 | CR4_PVI equ 0x0002 |
121 | CR4_PVI equ 0x0002 |
122 | CR4_TSD equ 0x0004 |
122 | CR4_TSD equ 0x0004 |
123 | CR4_DE equ 0x0008 |
123 | CR4_DE equ 0x0008 |
124 | CR4_PSE equ 0x0010 |
124 | CR4_PSE equ 0x0010 |
125 | CR4_PAE equ 0x0020 |
125 | CR4_PAE equ 0x0020 |
126 | CR4_MCE equ 0x0040 |
126 | CR4_MCE equ 0x0040 |
127 | CR4_PGE equ 0x0080 |
127 | CR4_PGE equ 0x0080 |
128 | CR4_PCE equ 0x0100 |
128 | CR4_PCE equ 0x0100 |
129 | CR4_OSFXSR equ 0x0200 |
129 | CR4_OSFXSR equ 0x0200 |
130 | CR4_OSXMMEXPT equ 0x0400 |
130 | CR4_OSXMMEXPT equ 0x0400 |
131 | 131 | ||
132 | SSE_IE equ 0x0001 |
132 | SSE_IE equ 0x0001 |
133 | SSE_DE equ 0x0002 |
133 | SSE_DE equ 0x0002 |
134 | SSE_ZE equ 0x0004 |
134 | SSE_ZE equ 0x0004 |
135 | SSE_OE equ 0x0008 |
135 | SSE_OE equ 0x0008 |
136 | SSE_UE equ 0x0010 |
136 | SSE_UE equ 0x0010 |
137 | SSE_PE equ 0x0020 |
137 | SSE_PE equ 0x0020 |
138 | SSE_DAZ equ 0x0040 |
138 | SSE_DAZ equ 0x0040 |
139 | SSE_IM equ 0x0080 |
139 | SSE_IM equ 0x0080 |
140 | SSE_DM equ 0x0100 |
140 | SSE_DM equ 0x0100 |
141 | SSE_ZM equ 0x0200 |
141 | SSE_ZM equ 0x0200 |
142 | SSE_OM equ 0x0400 |
142 | SSE_OM equ 0x0400 |
143 | SSE_UM equ 0x0800 |
143 | SSE_UM equ 0x0800 |
144 | SSE_PM equ 0x1000 |
144 | SSE_PM equ 0x1000 |
145 | SSE_FZ equ 0x8000 |
145 | SSE_FZ equ 0x8000 |
146 | 146 | ||
147 | SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM) |
147 | SSE_INIT equ (SSE_IM+SSE_DM+SSE_ZM+SSE_OM+SSE_UM+SSE_PM) |
148 | 148 | ||
149 | 149 | ||
150 | struc TSS |
150 | struc TSS |
151 | { |
151 | { |
152 | ._back rw 2 |
152 | ._back rw 2 |
153 | ._esp0 rd 1 |
153 | ._esp0 rd 1 |
154 | ._ss0 rw 2 |
154 | ._ss0 rw 2 |
155 | ._esp1 rd 1 |
155 | ._esp1 rd 1 |
156 | ._ss1 rw 2 |
156 | ._ss1 rw 2 |
157 | ._esp2 rd 1 |
157 | ._esp2 rd 1 |
158 | ._ss2 rw 2 |
158 | ._ss2 rw 2 |
159 | ._cr3 rd 1 |
159 | ._cr3 rd 1 |
160 | ._eip rd 1 |
160 | ._eip rd 1 |
161 | ._eflags rd 1 |
161 | ._eflags rd 1 |
162 | ._eax rd 1 |
162 | ._eax rd 1 |
163 | ._ecx rd 1 |
163 | ._ecx rd 1 |
164 | ._edx rd 1 |
164 | ._edx rd 1 |
165 | ._ebx rd 1 |
165 | ._ebx rd 1 |
166 | ._esp rd 1 |
166 | ._esp rd 1 |
167 | ._ebp rd 1 |
167 | ._ebp rd 1 |
168 | ._esi rd 1 |
168 | ._esi rd 1 |
169 | ._edi rd 1 |
169 | ._edi rd 1 |
170 | ._es rw 2 |
170 | ._es rw 2 |
171 | ._cs rw 2 |
171 | ._cs rw 2 |
172 | ._ss rw 2 |
172 | ._ss rw 2 |
173 | ._ds rw 2 |
173 | ._ds rw 2 |
174 | ._fs rw 2 |
174 | ._fs rw 2 |
175 | ._gs rw 2 |
175 | ._gs rw 2 |
176 | ._ldt rw 2 |
176 | ._ldt rw 2 |
177 | ._trap rw 1 |
177 | ._trap rw 1 |
178 | ._io rw 1 |
178 | ._io rw 1 |
179 | rb 24 |
179 | rb 24 |
180 | ._io_map_0 rb 4096 |
180 | ._io_map_0 rb 4096 |
181 | ._io_map_1 rb 4096 |
181 | ._io_map_1 rb 4096 |
182 | } |
182 | } |
183 | 183 | ||
184 | virtual at 0 |
184 | virtual at 0 |
185 | TSS TSS |
185 | TSS TSS |
186 | end virtual |
186 | end virtual |
187 | 187 | ||
188 | TSS_SIZE equ (128+8192) |
188 | TSS_SIZE equ (128+8192) |
189 | 189 | ||
- | 190 | page_tabs equ 0xFF800000 |
|
190 | HEAP_BASE equ 0x80000000 |
191 | ;app_page_tabs equ 0xDD800000 |
191 | - | ||
192 | HEAP_MIN_SIZE equ 0x01000000 |
- | |
193 | - | ||
194 | page_tabs equ 0xDD800000 |
- | |
195 | app_page_tabs equ 0xDD800000 |
- | |
196 | 192 | ||
197 | shared_tabs equ 0xDDC00000 |
193 | ;shared_tabs equ 0xDDC00000 |
198 | 194 | ||
199 | heap_tabs equ (page_tabs+ (HEAP_BASE shr 10)) |
- | |
200 | kernel_tabs equ (page_tabs+ (OS_BASE shr 10)) |
- | |
201 | master_tab equ (page_tabs+ (page_tabs shr 10)) |
- | |
202 | - | ||
203 | LFB_BASE equ 0xDE000000 |
- | |
204 | SHADOWFB equ 0 ;0xDE800000 |
195 | ;heap_tabs equ (page_tabs+ (HEAP_BASE shr 9)) |
205 | 196 | kernel_tabs equ page_tabs) |
|
206 | TEXT_BASE equ 0xDFC00000 |
197 | master_tab equ (page_tabs+ (page_tabs shr 9)) |
207 | 198 | ||
208 | _16BIT_BASE equ 0x00010000 |
199 | _16BIT_BASE equ 0x00010000 |
209 | LOAD_BASE equ 0x00100000 |
200 | LOAD_BASE equ 0x00100000 |
210 | OS_BASE equ 0xE0000000 |
- | |
211 | IMAGE_BASE equ (OS_BASE+LOAD_BASE) |
201 | IMAGE_BASE equ LOAD_BASE |
212 | - | ||
213 | BOOT_VAR equ OS_BASE |
- | |
214 | - | ||
215 | SB16Buffer equ (OS_BASE+0x10000) |
- | |
216 | - | ||
217 | TASK_COUNT equ (CURRENT_TASK+0x04) |
- | |
218 | TASK_BASE equ (CURRENT_TASK+0x10) |
- | |
219 | TASK_DATA equ (CURRENT_TASK+0x20) |
- | |
220 | TASK_EVENT equ (CURRENT_TASK+0x20) |
- | |
221 | - | ||
222 | FDD_BUFF equ (OS_BASE+0x000D000) |
- | |
223 | - | ||
224 | VGABasePtr equ (OS_BASE+0x00A0000) |
- | |
225 | - | ||
226 | IRQ_SAVE equ (OS_BASE+0x0190000) |
- | |
227 | - | ||
228 | stack_data_start equ (OS_BASE+0x01A0000) |
- | |
229 | eth_data_start equ (OS_BASE+0x01A0000) |
- | |
230 | stack_data equ (OS_BASE+0x01A4000) |
- | |
231 | stack_data_end equ (OS_BASE+0x01Bffff) |
- | |
232 | resendQ equ (OS_BASE+0x01C0000) |
- | |
233 | - | ||
234 | virtual at (OS_BASE+0x01C8F80) |
- | |
235 | tss TSS |
- | |
236 | end virtual |
- | |
237 | 202 | ||
238 | LAST_PAGE equ 0x01CB000 |
203 | LAST_PAGE equ 0x01CB000 |
239 | 204 | ||
240 | twdw equ (CURRENT_TASK-window_data) |
205 | NCPU equ 8 |
241 | 206 | ||
242 | RING0_STACK_SIZE equ (0x2000 - 512) ;512 áàéò äëÿ êîíòåêñòà FPU |
207 | RING0_STACK_SIZE equ (0x2000 - 512) ;512 áàéò äëÿ êîíòåêñòà FPU |
243 | 208 | ||
244 | REG_SS equ (RING0_STACK_SIZE-4) |
209 | REG_SS equ (RING0_STACK_SIZE-4) |
245 | REG_APP_ESP equ (RING0_STACK_SIZE-8) |
210 | REG_APP_ESP equ (RING0_STACK_SIZE-8) |
246 | REG_EFLAGS equ (RING0_STACK_SIZE-12) |
211 | REG_EFLAGS equ (RING0_STACK_SIZE-12) |
247 | REG_CS equ (RING0_STACK_SIZE-16) |
212 | REG_CS equ (RING0_STACK_SIZE-16) |
248 | REG_EIP equ (RING0_STACK_SIZE-20) |
213 | REG_EIP equ (RING0_STACK_SIZE-20) |
249 | REG_EAX equ (RING0_STACK_SIZE-24) |
214 | REG_EAX equ (RING0_STACK_SIZE-24) |
250 | REG_ECX equ (RING0_STACK_SIZE-28) |
215 | REG_ECX equ (RING0_STACK_SIZE-28) |
251 | REG_EDX equ (RING0_STACK_SIZE-32) |
216 | REG_EDX equ (RING0_STACK_SIZE-32) |
252 | REG_EBX equ (RING0_STACK_SIZE-36) |
217 | REG_EBX equ (RING0_STACK_SIZE-36) |
253 | REG_ESP equ (RING0_STACK_SIZE-40) ;RING0_STACK_SIZE-20 |
218 | REG_ESP equ (RING0_STACK_SIZE-40) ;RING0_STACK_SIZE-20 |
254 | REG_EBP equ (RING0_STACK_SIZE-44) |
219 | REG_EBP equ (RING0_STACK_SIZE-44) |
255 | REG_ESI equ (RING0_STACK_SIZE-48) |
220 | REG_ESI equ (RING0_STACK_SIZE-48) |
256 | REG_EDI equ (RING0_STACK_SIZE-52) |
221 | REG_EDI equ (RING0_STACK_SIZE-52) |
257 | REG_RET equ (RING0_STACK_SIZE-56) ;irq0.return |
222 | REG_RET equ (RING0_STACK_SIZE-56) ;irq0.return |
258 | 223 | ||
259 | REG_USTACK equ (RING0_STACK_SIZE-56) |
224 | REG_USTACK equ (RING0_STACK_SIZE-56) |
260 | REG_CSTACK equ (RING0_STACK_SIZE-60) |
225 | REG_CSTACK equ (RING0_STACK_SIZE-60) |
261 | REG_RAW equ (RING0_STACK_SIZE-64) |
226 | REG_RAW equ (RING0_STACK_SIZE-64) |
262 | REG_RESTART equ (RING0_STACK_SIZE-68) |
227 | REG_RESTART equ (RING0_STACK_SIZE-68) |
263 | REG_ENTRY equ (RING0_STACK_SIZE-72) |
228 | REG_ENTRY equ (RING0_STACK_SIZE-72) |
264 | 229 | ||
265 | PG_UNMAP equ 0x000 |
230 | PG_UNMAP equ 0x000 |
266 | PG_MAP equ 0x001 |
231 | PG_MAP equ 0x001 |
267 | PG_WRITE equ 0x002 |
232 | PG_WRITE equ 0x002 |
268 | PG_SW equ 0x003 |
233 | PG_SW equ 0x003 |
269 | PG_USER equ 0x005 |
234 | PG_USER equ 0x005 |
270 | PG_UW equ 0x007 |
235 | PG_UW equ 0x007 |
271 | PG_NOCACHE equ 0x018 |
236 | PG_NOCACHE equ 0x018 |
272 | PG_LARGE equ 0x080 |
237 | PG_LARGE equ 0x080 |
273 | PG_GLOBAL equ 0x100 |
238 | PG_GLOBAL equ 0x100 |
274 | 239 | ||
275 | PG_SHARED equ 0x200 |
240 | PG_SHARED equ 0x200 |
276 | 241 | ||
277 | ;;;;;;;;;;;boot time variables |
242 | ;;;;;;;;;;;boot time variables |
278 | 243 | ||
279 | ;BOOT_BPP equ 0x9000 ;byte bits per pixel |
244 | ;BOOT_BPP equ 0x9000 ;byte bits per pixel |
280 | BOOT_SCANLINE equ 0x9001 ;word scanline length |
245 | BOOT_SCANLINE equ 0x9001 ;word scanline length |
281 | BOOT_VESA_MODE equ 0x9008 ;word vesa video mode |
246 | BOOT_VESA_MODE equ 0x9008 ;word vesa video mode |
282 | ;;BOOT_X_RES equ 0x900A ;word X res |
247 | ;;BOOT_X_RES equ 0x900A ;word X res |
283 | ;;BOOT_Y_RES equ 0x900C ;word Y res |
248 | ;;BOOT_Y_RES equ 0x900C ;word Y res |
284 | BOOT_BANK_SW equ 0x9014 ;dword Vesa 1.2 pm bank switch |
249 | BOOT_BANK_SW equ 0x9014 ;dword Vesa 1.2 pm bank switch |
285 | BOOT_LFB equ 0x9018 ;dword Vesa 2.0 LFB address |
250 | BOOT_LFB equ 0x9018 ;dword Vesa 2.0 LFB address |
286 | BOOT_MTRR equ 0x901C ;byte 0 or 1 : enable MTRR graphics acceleration |
251 | BOOT_MTRR equ 0x901C ;byte 0 or 1 : enable MTRR graphics acceleration |
287 | BOOT_LOG equ 0x901D ;byte not used anymore (0 or 1 : enable system log display) |
252 | BOOT_LOG equ 0x901D ;byte not used anymore (0 or 1 : enable system log display) |
288 | BOOT_DIRECT_LFB equ 0x901E ;byte 0 or 1 : enable direct lfb write, paging disabled |
253 | BOOT_DIRECT_LFB equ 0x901E ;byte 0 or 1 : enable direct lfb write, paging disabled |
289 | BOOT_PCI_DATA equ 0x9020 ;8bytes pci data |
254 | BOOT_PCI_DATA equ 0x9020 ;8bytes pci data |
290 | BOOT_VRR equ 0x9030 ;byte VRR start enabled 1, 2-no |
255 | BOOT_VRR equ 0x9030 ;byte VRR start enabled 1, 2-no |
291 | BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr |
256 | BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr |
292 | BOOT_MEM_AMOUNT equ 0x9034 ;dword memory amount |
257 | BOOT_MEM_AMOUNT equ 0x9034 ;dword memory amount |
293 | 258 | ||
294 | TMP_FILE_NAME equ 0 |
259 | TMP_FILE_NAME equ 0 |
295 | TMP_CMD_LINE equ 1024 |
260 | TMP_CMD_LINE equ 1024 |
296 | TMP_ICON_OFFS equ 1280 |
261 | TMP_ICON_OFFS equ 1280 |
297 | 262 | ||
298 | 263 | ||
299 | EVENT_REDRAW equ 0x00000001 |
264 | EVENT_REDRAW equ 0x00000001 |
300 | EVENT_KEY equ 0x00000002 |
265 | EVENT_KEY equ 0x00000002 |
301 | EVENT_BUTTON equ 0x00000004 |
266 | EVENT_BUTTON equ 0x00000004 |
302 | EVENT_BACKGROUND equ 0x00000010 |
267 | EVENT_BACKGROUND equ 0x00000010 |
303 | EVENT_MOUSE equ 0x00000020 |
268 | EVENT_MOUSE equ 0x00000020 |
304 | EVENT_IPC equ 0x00000040 |
269 | EVENT_IPC equ 0x00000040 |
305 | EVENT_NETWORK equ 0x00000080 |
270 | EVENT_NETWORK equ 0x00000080 |
306 | EVENT_DEBUG equ 0x00000100 |
271 | EVENT_DEBUG equ 0x00000100 |
307 | EVENT_EXTENDED equ 0x00000200 |
272 | EVENT_EXTENDED equ 0x00000200 |
308 | 273 | ||
309 | EV_INTR equ 1 |
274 | EV_INTR equ 1 |
310 | 275 | ||
311 | struc THR_DATA |
276 | struc THR_DATA |
312 | { |
277 | { |
313 | rb (8192-512) |
278 | rb (8192-512) |
314 | .pl0_stack: |
279 | .pl0_stack: |
315 | .fpu_state rb 512 |
280 | .fpu_state rb 512 |
316 | .tls_page rb 4096 |
281 | .tls_page rb 4096 |
317 | .pdbr rb 4096 |
282 | .pdbr rb 4096 |
318 | } |
283 | } |
319 | 284 | ||
320 | THR_DATA_SIZE equ 4096*4 |
285 | THR_DATA_SIZE equ 4096*4 |
321 | 286 | ||
322 | virtual at (OS_BASE-THR_DATA_SIZE) |
287 | virtual at (OS_BASE-THR_DATA_SIZE) |
323 | thr_data THR_DATA |
288 | thr_data THR_DATA |
324 | end virtual |
289 | end virtual |
325 | 290 | ||
326 | struc SYS_VARS |
291 | struc SYS_VARS |
327 | { .bpp dd ? |
292 | { .bpp dd ? |
328 | .scanline dd ? |
293 | .scanline dd ? |
329 | .vesa_mode dd ? |
294 | .vesa_mode dd ? |
330 | .x_res dd ? |
295 | .x_res dd ? |
331 | .y_res dd ? |
296 | .y_res dd ? |
332 | } |
297 | } |
333 | 298 | ||
334 | struc APPOBJ ;common object header |
299 | struc APPOBJ ;common object header |
335 | { |
300 | { |
336 | .magic dd ? ; |
301 | .magic dd ? ; |
337 | .destroy dd ? ;internal destructor |
302 | .destroy dd ? ;internal destructor |
338 | .fd dd ? ;next object in list |
303 | .fd dd ? ;next object in list |
339 | .bk dd ? ;prev object in list |
304 | .bk dd ? ;prev object in list |
340 | .pid dd ? ;owner id |
305 | .pid dd ? ;owner id |
341 | }; |
306 | }; |
342 | 307 | ||
343 | virtual at 0 |
308 | virtual at 0 |
344 | APPOBJ APPOBJ |
309 | APPOBJ APPOBJ |
345 | end virtual |
310 | end virtual |
346 | 311 | ||
347 | APP_OBJ_OFFSET equ 48 |
312 | APP_OBJ_OFFSET equ 48 |
348 | APP_EV_OFFSET equ 40 |
313 | APP_EV_OFFSET equ 40 |
349 | 314 | ||
350 | struc CURSOR |
315 | struc CURSOR |
351 | {;common object header |
316 | {;common object header |
352 | .magic dd ? ;'CURS' |
317 | .magic dd ? ;'CURS' |
353 | .destroy dd ? ;internal destructor |
318 | .destroy dd ? ;internal destructor |
354 | .fd dd ? ;next object in list |
319 | .fd dd ? ;next object in list |
355 | .bk dd ? ;prev object in list |
320 | .bk dd ? ;prev object in list |
356 | .pid dd ? ;owner id |
321 | .pid dd ? ;owner id |
357 | 322 | ||
358 | ;cursor data |
323 | ;cursor data |
359 | .base dd ? ;allocated memory |
324 | .base dd ? ;allocated memory |
360 | .hot_x dd ? ;hotspot coords |
325 | .hot_x dd ? ;hotspot coords |
361 | .hot_y dd ? |
326 | .hot_y dd ? |
362 | } |
327 | } |
363 | virtual at 0 |
328 | virtual at 0 |
364 | CURSOR CURSOR |
329 | CURSOR CURSOR |
365 | end virtual |
330 | end virtual |
366 | 331 | ||
367 | CURSOR_SIZE equ 32 |
332 | CURSOR_SIZE equ 32 |
368 | 333 | ||
369 | struc EVENT |
334 | struc EVENT |
370 | { |
335 | { |
371 | .magic dd ? ;'EVNT' |
336 | .magic dd ? ;'EVNT' |
372 | .destroy dd ? ;internal destructor |
337 | .destroy dd ? ;internal destructor |
373 | .fd dd ? ;next object in list |
338 | .fd dd ? ;next object in list |
374 | .bk dd ? ;prev object in list |
339 | .bk dd ? ;prev object in list |
375 | .pid dd ? ;owner id |
340 | .pid dd ? ;owner id |
376 | 341 | ||
377 | .id dd ? ;event uid |
342 | .id dd ? ;event uid |
378 | .state dd ? ;internal flags |
343 | .state dd ? ;internal flags |
379 | .code dd ? |
344 | .code dd ? |
380 | rd 5 |
345 | rd 5 |
381 | } |
346 | } |
382 | EVENT_SIZE equ 52 |
347 | EVENT_SIZE equ 52 |
383 | 348 | ||
384 | virtual at 0 |
349 | virtual at 0 |
385 | EVENT EVENT |
350 | EVENT EVENT |
386 | end virtual |
351 | end virtual |
387 | 352 | ||
- | 353 | ||
- | 354 | struc SMEM |
|
- | 355 | { |
|
- | 356 | .bk dd ? |
|
- | 357 | .fd dd ? ;+4 |
|
- | 358 | .base dd ? ;+8 |
|
- | 359 | .size dd ? ;+12 |
|
- | 360 | .access dd ? ;+16 |
|
- | 361 | .refcount dd ? ;+20 |
|
- | 362 | .name rb 32 ;+24 |
|
- | 363 | .sizeof: |
|
- | 364 | } |
|
- | 365 | ||
- | 366 | struc SMAP |
|
- | 367 | { |
|
- | 368 | .magic dd ? ; SMAP |
|
- | 369 | .destroy dd ? ;internal destructor |
|
- | 370 | .fd dd ? ;next object in list |
|
- | 371 | .bk dd ? ;prev object in list |
|
- | 372 | .pid dd ? ;owner id |
|
- | 373 | ||
- | 374 | .base dd ? ;mapped base |
|
- | 375 | .parent dd ? ;SMEM |
|
- | 376 | .sizeof: |
|
- | 377 | } |
|
- | 378 | ||
- | 379 | virtual at 0 |
|
- | 380 | SMEM SMEM |
|
- | 381 | end virtual |
|
- | 382 | ||
- | 383 | virtual at 0 |
|
- | 384 | SMAP SMAP |
|
- | 385 | end virtual |
|
- | 386 | ||
388 | 387 | ||
389 | struc HEAP_DATA |
388 | struc HEAP_DATA |
390 | { |
389 | { |
391 | .mutex rd 1 |
390 | .mutex rd 1 |
392 | .refcount rd 1 |
391 | .refcount rd 1 |
393 | .heap_base rd 1 |
392 | .heap_base rd 1 |
394 | .heap_top rd 1 |
393 | .heap_top rd 1 |
395 | .app_mem rd 1 |
394 | .app_mem rd 1 |
396 | } |
395 | } |
397 | 396 | ||
398 | HEAP_DATA_SIZE equ 20 |
397 | HEAP_DATA_SIZE equ 20 |
399 | virtual at 0 |
398 | virtual at 0 |
400 | HEAP_DATA HEAP_DATA |
399 | HEAP_DATA HEAP_DATA |
401 | end virtual |
400 | end virtual |
402 | 401 | ||
403 | struc BOOT_DATA |
402 | struc BOOT_DATA |
404 | { .bpp dd ? |
403 | { .bpp dd ? |
405 | .scanline dd ? |
404 | .scanline dd ? |
406 | .vesa_mode dd ? |
405 | .vesa_mode dd ? |
407 | .x_res dd ? |
406 | .x_res dd ? |
408 | .y_res dd ? |
407 | .y_res dd ? |
409 | .mouse_port dd ? |
408 | .mouse_port dd ? |
410 | .bank_switch dd ? |
409 | .bank_switch dd ? |
411 | .lfb dd ? |
410 | .lfb dd ? |
412 | .vesa_mem dd ? |
411 | .vesa_mem dd ? |
413 | .log dd ? |
412 | .log dd ? |
414 | .direct_lfb dd ? |
413 | .direct_lfb dd ? |
415 | .pci_data dd ? |
414 | .pci_data dd ? |
416 | ; dd ? |
415 | ; dd ? |
417 | .vrr dd ? |
416 | .vrr dd ? |
418 | .ide_base dd ? |
417 | .ide_base dd ? |
419 | .mem_amount dd ? |
418 | .mem_amount dd ? |
420 | .pages_count dd ? |
419 | .pages_count dd ? |
421 | .pagemap_size dd ? |
420 | .pagemap_size dd ? |
422 | .kernel_max dd ? |
421 | .kernel_max dd ? |
423 | .kernel_pages dd ? |
422 | .kernel_pages dd ? |
424 | .kernel_tables dd ? |
423 | .kernel_tables dd ? |
425 | 424 | ||
426 | .cpu_vendor dd ? |
425 | .cpu_vendor dd ? |
427 | dd ? |
426 | dd ? |
428 | dd ? |
427 | dd ? |
429 | .cpu_sign dd ? |
428 | .cpu_sign dd ? |
430 | .cpu_info dd ? |
429 | .cpu_info dd ? |
431 | .cpu_caps dd ? |
430 | .cpu_caps dd ? |
432 | dd ? |
431 | dd ? |
433 | dd ? |
432 | dd ? |
434 | } |
433 | } |
435 | 434 | ||
436 | virtual at 0 |
435 | virtual at 0 |
437 | BOOT_DATA BOOT_DATA |
436 | BOOT_DATA BOOT_DATA |
438 | end virtual |
437 | end virtual |
439 | 438 | ||
440 | struc MEM_STATE |
439 | struc MEM_STATE |
441 | { .mutex rd 1 |
440 | { .mutex rd 1 |
442 | .smallmap rd 1 |
441 | .smallmap rd 1 |
443 | .treemap rd 1 |
442 | .treemap rd 1 |
444 | .topsize rd 1 |
443 | .topsize rd 1 |
445 | .top rd 1 |
444 | .top rd 1 |
446 | .smallbins rd 4*32 |
445 | .smallbins rd 4*32 |
447 | .treebins rd 32 |
446 | .treebins rd 32 |
448 | } |
447 | } |
449 | 448 | ||
450 | struc PG_DATA |
449 | struc PG_DATA |
451 | { .mem_amount dd ? |
450 | { .mem_amount dd ? |
452 | .vesa_mem dd ? |
451 | .vesa_mem dd ? |
453 | .pages_faults dd ? |
452 | .pages_faults dd ? |
454 | .pagemap_size dd ? |
453 | .pagemap_size dd ? |
455 | .kernel_pages dd ? |
454 | .kernel_pages dd ? |
456 | .kernel_tables dd ? |
455 | .kernel_tables dd ? |
457 | .sys_page_dir dd ? |
456 | .sys_page_dir dd ? |
458 | .pg_mutex dd ? |
457 | .pg_mutex dd ? |
459 | } |
458 | } |
460 | 459 | ||
461 | struc SRV |
460 | struc SRV |
462 | { .srv_name rb 16 ;ASCIIZ string |
461 | { .srv_name rb 16 ;ASCIIZ string |
463 | .magic dd ? ;+0x10 ;'SRV ' |
462 | .magic dd ? ;+0x10 ;'SRV ' |
464 | .size dd ? ;+0x14 ;size of structure SRV |
463 | .size dd ? ;+0x14 ;size of structure SRV |
465 | .fd dd ? ;+0x18 ;next SRV descriptor |
464 | .fd dd ? ;+0x18 ;next SRV descriptor |
466 | .bk dd ? ;+0x1C ;prev SRV descriptor |
465 | .bk dd ? ;+0x1C ;prev SRV descriptor |
467 | .base dd ? ;+0x20 ;service base address |
466 | .base dd ? ;+0x20 ;service base address |
468 | .entry dd ? ;+0x24 ;service START function |
467 | .entry dd ? ;+0x24 ;service START function |
469 | .srv_proc dd ? ;+0x28 ;main service handler |
468 | .srv_proc dd ? ;+0x28 ;main service handler |
470 | } |
469 | } |
471 | 470 | ||
472 | SRV_FD_OFFSET equ 0x18 |
471 | SRV_FD_OFFSET equ 0x18 |
473 | SRV_SIZE equ 44 |
472 | SRV_SIZE equ 44 |
474 | 473 | ||
475 | DRV_ENTRY equ 1 |
474 | DRV_ENTRY equ 1 |
476 | DRV_EXIT equ -1 |
475 | DRV_EXIT equ -1 |
477 | 476 | ||
478 | struc COFF_HEADER |
477 | struc COFF_HEADER |
479 | { .machine dw ? |
478 | { .machine dw ? |
480 | .nSections dw ? |
479 | .nSections dw ? |
481 | .DataTime dd ? |
480 | .DataTime dd ? |
482 | .pSymTable dd ? |
481 | .pSymTable dd ? |
483 | .nSymbols dd ? |
482 | .nSymbols dd ? |
484 | .optHeader dw ? |
483 | .optHeader dw ? |
485 | .flags dw ? |
484 | .flags dw ? |
486 | }; |
485 | }; |
487 | 486 | ||
488 | 487 | ||
489 | struc COFF_SECTION |
488 | struc COFF_SECTION |
490 | { .Name rb 8 |
489 | { .Name rb 8 |
491 | .VirtualSize dd ? |
490 | .VirtualSize dd ? |
492 | .VirtualAddress dd ? |
491 | .VirtualAddress dd ? |
493 | .SizeOfRawData dd ? |
492 | .SizeOfRawData dd ? |
494 | .PtrRawData dd ? |
493 | .PtrRawData dd ? |
495 | .PtrReloc dd ? |
494 | .PtrReloc dd ? |
496 | .PtrLinenumbers dd ? |
495 | .PtrLinenumbers dd ? |
497 | .NumReloc dw ? |
496 | .NumReloc dw ? |
498 | .NumLinenum dw ? |
497 | .NumLinenum dw ? |
499 | .Characteristics dd ? |
498 | .Characteristics dd ? |
500 | } |
499 | } |
501 | COFF_SECTION_SIZE equ 40 |
500 | COFF_SECTION_SIZE equ 40 |
502 | 501 | ||
503 | struc COFF_RELOC |
502 | struc COFF_RELOC |
504 | { .VirtualAddress dd ? |
503 | { .VirtualAddress dd ? |
505 | .SymIndex dd ? |
504 | .SymIndex dd ? |
506 | .Type dw ? |
505 | .Type dw ? |
507 | } |
506 | } |
508 | 507 | ||
509 | struc COFF_SYM |
508 | struc COFF_SYM |
510 | { .Name rb 8 |
509 | { .Name rb 8 |
511 | .Value dd ? |
510 | .Value dd ? |
512 | .SectionNumber dw ? |
511 | .SectionNumber dw ? |
513 | .Type dw ? |
512 | .Type dw ? |
514 | .StorageClass db ? |
513 | .StorageClass db ? |
515 | .NumAuxSymbols db ? |
514 | .NumAuxSymbols db ? |
516 | } |
515 | } |
517 | CSYM_SIZE equ 18 |
516 | CSYM_SIZE equ 18 |
518 | 517 | ||
519 | struc IOCTL |
518 | struc IOCTL |
520 | { .handle dd ? |
519 | { .handle dd ? |
521 | .io_code dd ? |
520 | .io_code dd ? |
522 | .input dd ? |
521 | .input dd ? |
523 | .inp_size dd ? |
522 | .inp_size dd ? |
524 | .output dd ? |
523 | .output dd ? |
525 | .out_size dd ? |
524 | .out_size dd ? |
526 | } |
525 | } |
527 | 526 | ||
528 | virtual at 0 |
527 | virtual at 0 |
529 | IOCTL IOCTL |
528 | IOCTL IOCTL |
530 | end virtual |
529 | end virtual |
531 | 530 | ||
532 | ;virtual at 0 |
531 | ;virtual at 0 |
533 | ; LIB LIB |
532 | ; LIB LIB |
534 | ;end virtual |
533 | ;end virtual |
535 | 534 | ||
536 | virtual at 0 |
535 | virtual at 0 |
537 | SRV SRV |
536 | SRV SRV |
538 | end virtual |
537 | end virtual |
539 | 538 | ||
540 | virtual at 0 |
539 | virtual at 0 |
541 | CFH COFF_HEADER |
540 | CFH COFF_HEADER |
542 | end virtual |
541 | end virtual |
543 | 542 | ||
544 | virtual at 0 |
543 | virtual at 0 |
545 | CFS COFF_SECTION |
544 | CFS COFF_SECTION |
546 | end virtual |
545 | end virtual |
547 | 546 | ||
548 | virtual at 0 |
547 | virtual at 0 |
549 | CRELOC COFF_RELOC |
548 | CRELOC COFF_RELOC |
550 | end virtual |
549 | end virtual |
551 | 550 | ||
552 | virtual at 0 |
551 | virtual at 0 |
553 | CSYM COFF_SYM |
552 | CSYM COFF_SYM |
554 | end virtual |
553 | end virtual |
555 | 554 | ||
556 | struc THR |
555 | struc THR |
557 | { |
556 | { |
558 | .edi rd 1 ; 0x00 |
557 | .edi rd 1 ; 0x00 |
559 | .esi rd 1 ; 0x04 |
558 | .esi rd 1 ; 0x04 |
560 | .ebp rd 1 ; 0x08 |
559 | .ebp rd 1 ; 0x08 |
561 | rd 1 ; 0x0C ;esp |
560 | rd 1 ; 0x0C ;esp |
562 | .ebx rd 1 ; 0x10 |
561 | .ebx rd 1 ; 0x10 |
563 | .edx rd 1 ; 0x14 |
562 | .edx rd 1 ; 0x14 |
564 | .ecx rd 1 ; 0x18 |
563 | .ecx rd 1 ; 0x18 |
565 | .eax rd 1 ; 0x1C |
564 | .eax rd 1 ; 0x1C |
566 | .retaddr rd 1 ; 0x20 ;èëè êîä îøèáêè |
565 | .retaddr rd 1 ; 0x20 ;èëè êîä îøèáêè |
567 | .eip rd 1 ; 0x24 |
566 | .eip rd 1 ; 0x24 |
568 | .cs rd 1 ; 0x28 |
567 | .cs rd 1 ; 0x28 |
569 | .eflags rd 1 ; 0x2C |
568 | .eflags rd 1 ; 0x2C |
570 | .esp rd 1 ; 0x30 |
569 | .esp rd 1 ; 0x30 |
571 | .ss rd 1 ; 0x34 |
570 | .ss rd 1 ; 0x34 |
572 | 571 | ||
573 | .pl0_stack: |
572 | .pl0_stack: |
574 | 573 | ||
575 | .tid rd 1 ; ; number of this process (for fast access) |
574 | .tid rd 1 ; ; number of this process (for fast access) |
576 | .slot rd 1 ; ; number of this process (for fast access) |
575 | .slot rd 1 ; ; number of this process (for fast access) |
577 | .pdir rd 1 ; ; |
576 | .pdir rd 1 ; ; |
578 | .thr_flags rd 1 ; ; process is runnable only if zero |
577 | .thr_flags rd 1 ; ; process is runnable only if zero |
579 | .ticks_left rd 1 ; ; number of scheduling ticks left |
578 | .ticks_left rd 1 ; ; number of scheduling ticks left |
580 | .quantum_size rd 1 ; ; quantum size in ticks |
579 | .quantum_size rd 1 ; ; quantum size in ticks |
581 | .user_time rd 1 ; ; user time in ticks |
580 | .user_time rd 1 ; ; user time in ticks |
582 | .sys_time rd 1 ; ; sys time in ticks |
581 | .sys_time rd 1 ; ; sys time in ticks |
583 | } |
582 | } |
584 | 583 | ||
585 | virtual at 0 |
584 | virtual at 0 |
586 | THR THR |
585 | THR THR |
587 | end virtual |
586 | end virtual |