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1 | /* |
1 | /* |
2 | * Copyright © 2007 David Airlie |
2 | * Copyright © 2007 David Airlie |
3 | * |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
10 | * |
11 | * The above copyright notice and this permission notice (including the next |
11 | * The above copyright notice and this permission notice (including the next |
12 | * paragraph) shall be included in all copies or substantial portions of the |
12 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * Software. |
13 | * Software. |
14 | * |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
21 | * DEALINGS IN THE SOFTWARE. |
21 | * DEALINGS IN THE SOFTWARE. |
22 | * |
22 | * |
23 | * Authors: |
23 | * Authors: |
24 | * David Airlie |
24 | * David Airlie |
25 | */ |
25 | */ |
26 | /* |
- | |
27 | * Modularization |
- | |
28 | */ |
- | |
29 | - | ||
30 | #include |
26 | #include |
31 | #include |
27 | #include |
32 | 28 | ||
33 | #include "drmP.h" |
29 | #include "drmP.h" |
34 | #include "drm.h" |
30 | #include "drm.h" |
35 | #include "drm_crtc.h" |
31 | #include "drm_crtc.h" |
36 | #include "drm_crtc_helper.h" |
32 | #include "drm_crtc_helper.h" |
37 | #include "radeon_drm.h" |
33 | #include "radeon_drm.h" |
38 | #include "radeon.h" |
34 | #include "radeon.h" |
39 | 35 | ||
40 | #include "drm_fb_helper.h" |
36 | #include "drm_fb_helper.h" |
41 | 37 | ||
42 | #include |
38 | #include |
43 | #include "radeon_object.h" |
39 | #include "radeon_object.h" |
44 | - | ||
- | 40 | ||
- | 41 | /* object hierarchy - |
|
45 | 42 | this contains a helper + a radeon fb |
|
46 | struct fb_info *framebuffer_alloc(size_t size, void *dev); |
43 | the helper contains a pointer to radeon framebuffer baseclass. |
47 | 44 | */ |
|
48 | struct radeon_fb_device { |
45 | struct radeon_fbdev { |
49 | struct drm_fb_helper helper; |
46 | struct drm_fb_helper helper; |
- | 47 | struct radeon_framebuffer rfb; |
|
50 | struct radeon_framebuffer *rfb; |
48 | struct list_head fbdev_list; |
51 | struct radeon_device *rdev; |
49 | struct radeon_device *rdev; |
52 | }; |
50 | }; |
53 | 51 | ||
54 | static struct fb_ops radeonfb_ops = { |
52 | static struct fb_ops radeonfb_ops = { |
55 | // .owner = THIS_MODULE, |
53 | // .owner = THIS_MODULE, |
56 | .fb_check_var = drm_fb_helper_check_var, |
54 | .fb_check_var = drm_fb_helper_check_var, |
57 | .fb_set_par = drm_fb_helper_set_par, |
55 | .fb_set_par = drm_fb_helper_set_par, |
58 | .fb_setcolreg = drm_fb_helper_setcolreg, |
- | |
59 | // .fb_fillrect = cfb_fillrect, |
56 | // .fb_fillrect = cfb_fillrect, |
60 | // .fb_copyarea = cfb_copyarea, |
57 | // .fb_copyarea = cfb_copyarea, |
61 | // .fb_imageblit = cfb_imageblit, |
58 | // .fb_imageblit = cfb_imageblit, |
62 | // .fb_pan_display = drm_fb_helper_pan_display, |
59 | // .fb_pan_display = drm_fb_helper_pan_display, |
63 | .fb_blank = drm_fb_helper_blank, |
60 | .fb_blank = drm_fb_helper_blank, |
64 | .fb_setcmap = drm_fb_helper_setcmap, |
61 | .fb_setcmap = drm_fb_helper_setcmap, |
65 | }; |
62 | }; |
66 | - | ||
67 | /** |
- | |
68 | * Currently it is assumed that the old framebuffer is reused. |
- | |
69 | * |
- | |
70 | * LOCKING |
- | |
71 | * caller should hold the mode config lock. |
- | |
72 | * |
- | |
73 | */ |
- | |
74 | int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc) |
- | |
75 | { |
- | |
76 | struct fb_info *info; |
- | |
77 | struct drm_framebuffer *fb; |
- | |
78 | struct drm_display_mode *mode = crtc->desired_mode; |
- | |
79 | - | ||
80 | fb = crtc->fb; |
- | |
81 | if (fb == NULL) { |
- | |
82 | return 1; |
- | |
83 | } |
- | |
84 | info = fb->fbdev; |
- | |
85 | if (info == NULL) { |
- | |
86 | return 1; |
- | |
87 | } |
- | |
88 | if (mode == NULL) { |
- | |
89 | return 1; |
- | |
90 | } |
- | |
91 | info->var.xres = mode->hdisplay; |
- | |
92 | info->var.right_margin = mode->hsync_start - mode->hdisplay; |
- | |
93 | info->var.hsync_len = mode->hsync_end - mode->hsync_start; |
- | |
94 | info->var.left_margin = mode->htotal - mode->hsync_end; |
- | |
95 | info->var.yres = mode->vdisplay; |
- | |
96 | info->var.lower_margin = mode->vsync_start - mode->vdisplay; |
- | |
97 | info->var.vsync_len = mode->vsync_end - mode->vsync_start; |
- | |
98 | info->var.upper_margin = mode->vtotal - mode->vsync_end; |
- | |
99 | info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100; |
- | |
100 | /* avoid overflow */ |
- | |
101 | info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh; |
- | |
102 | - | ||
103 | return 0; |
- | |
104 | } |
- | |
105 | EXPORT_SYMBOL(radeonfb_resize); |
63 | |
106 | 64 | ||
107 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) |
65 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) |
108 | { |
66 | { |
109 | int aligned = width; |
67 | int aligned = width; |
110 | int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; |
68 | int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; |
111 | int pitch_mask = 0; |
69 | int pitch_mask = 0; |
112 | 70 | ||
113 | switch (bpp / 8) { |
71 | switch (bpp / 8) { |
114 | case 1: |
72 | case 1: |
115 | pitch_mask = align_large ? 255 : 127; |
73 | pitch_mask = align_large ? 255 : 127; |
116 | break; |
74 | break; |
117 | case 2: |
75 | case 2: |
118 | pitch_mask = align_large ? 127 : 31; |
76 | pitch_mask = align_large ? 127 : 31; |
119 | break; |
77 | break; |
120 | case 3: |
78 | case 3: |
121 | case 4: |
79 | case 4: |
122 | pitch_mask = align_large ? 63 : 15; |
80 | pitch_mask = align_large ? 63 : 15; |
123 | break; |
81 | break; |
124 | } |
82 | } |
125 | 83 | ||
126 | aligned += pitch_mask; |
84 | aligned += pitch_mask; |
127 | aligned &= ~pitch_mask; |
85 | aligned &= ~pitch_mask; |
128 | return aligned; |
86 | return aligned; |
129 | } |
87 | } |
130 | 88 | ||
- | 89 | static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) |
|
- | 90 | { |
|
- | 91 | struct radeon_bo *rbo = gobj->driver_private; |
|
- | 92 | int ret; |
|
131 | static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { |
93 | |
- | 94 | ret = radeon_bo_reserve(rbo, false); |
|
132 | .gamma_set = radeon_crtc_fb_gamma_set, |
95 | if (likely(ret == 0)) { |
- | 96 | radeon_bo_kunmap(rbo); |
|
- | 97 | radeon_bo_unpin(rbo); |
|
- | 98 | radeon_bo_unreserve(rbo); |
|
- | 99 | } |
|
133 | .gamma_get = radeon_crtc_fb_gamma_get, |
100 | // drm_gem_object_unreference_unlocked(gobj); |
134 | }; |
101 | } |
135 | 102 | ||
136 | int radeonfb_create(struct drm_device *dev, |
- | |
137 | uint32_t fb_width, uint32_t fb_height, |
- | |
138 | uint32_t surface_width, uint32_t surface_height, |
103 | static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, |
139 | uint32_t surface_depth, uint32_t surface_bpp, |
104 | struct drm_mode_fb_cmd *mode_cmd, |
140 | struct drm_framebuffer **fb_p) |
105 | struct drm_gem_object **gobj_p) |
141 | { |
- | |
142 | struct radeon_device *rdev = dev->dev_private; |
- | |
143 | struct fb_info *info; |
- | |
144 | struct radeon_fb_device *rfbdev; |
- | |
145 | struct drm_framebuffer *fb = NULL; |
- | |
146 | struct radeon_framebuffer *rfb; |
106 | { |
147 | struct drm_mode_fb_cmd mode_cmd; |
107 | struct radeon_device *rdev = rfbdev->rdev; |
148 | struct drm_gem_object *gobj = NULL; |
- | |
149 | struct radeon_bo *rbo = NULL; |
- | |
150 | struct device *device = &rdev->pdev->dev; |
- | |
151 | int size, aligned_size, ret; |
- | |
152 | u64 fb_gpuaddr; |
- | |
153 | void *fbptr = NULL; |
108 | struct drm_gem_object *gobj = NULL; |
154 | unsigned long tmp; |
109 | struct radeon_bo *rbo = NULL; |
- | 110 | bool fb_tiled = false; /* useful for testing */ |
|
- | 111 | u32 tiling_flags = 0; |
|
155 | bool fb_tiled = false; /* useful for testing */ |
- | |
156 | u32 tiling_flags = 0; |
- | |
157 | - | ||
158 | mode_cmd.width = surface_width; |
- | |
159 | mode_cmd.height = surface_height; |
- | |
160 | - | ||
161 | /* avivo can't scanout real 24bpp */ |
- | |
162 | if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
- | |
163 | surface_bpp = 32; |
112 | int ret; |
164 | 113 | int aligned_size, size; |
|
165 | mode_cmd.bpp = surface_bpp; |
- | |
166 | /* need to align pitch with crtc limits */ |
114 | |
167 | mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8); |
115 | /* need to align pitch with crtc limits */ |
168 | mode_cmd.depth = surface_depth; |
- | |
169 | 116 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); |
|
170 | size = mode_cmd.pitch * mode_cmd.height; |
117 | |
171 | aligned_size = ALIGN(size, PAGE_SIZE); |
118 | size = mode_cmd->pitch * mode_cmd->height; |
172 | 119 | aligned_size = ALIGN(size, PAGE_SIZE); |
|
173 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
120 | // ret = radeon_gem_object_create(rdev, aligned_size, 0, |
174 | RADEON_GEM_DOMAIN_VRAM, |
121 | // RADEON_GEM_DOMAIN_VRAM, |
175 | false, ttm_bo_type_kernel, |
122 | // false, true, |
176 | &gobj); |
123 | // &gobj); |
177 | if (ret) { |
- | |
178 | printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n", |
124 | if (ret) { |
179 | surface_width, surface_height); |
125 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", |
180 | ret = -ENOMEM; |
126 | aligned_size); |
181 | goto out; |
127 | return -ENOMEM; |
182 | } |
128 | } |
183 | rbo = gobj->driver_private; |
129 | rbo = gobj->driver_private; |
184 | 130 | ||
185 | if (fb_tiled) |
131 | if (fb_tiled) |
186 | tiling_flags = RADEON_TILING_MACRO; |
132 | tiling_flags = RADEON_TILING_MACRO; |
187 | 133 | ||
188 | #ifdef __BIG_ENDIAN |
134 | #ifdef __BIG_ENDIAN |
189 | switch (mode_cmd.bpp) { |
135 | switch (mode_cmd->bpp) { |
190 | case 32: |
136 | case 32: |
191 | tiling_flags |= RADEON_TILING_SWAP_32BIT; |
137 | tiling_flags |= RADEON_TILING_SWAP_32BIT; |
192 | break; |
138 | break; |
193 | case 16: |
139 | case 16: |
194 | tiling_flags |= RADEON_TILING_SWAP_16BIT; |
140 | tiling_flags |= RADEON_TILING_SWAP_16BIT; |
195 | default: |
141 | default: |
196 | break; |
142 | break; |
197 | } |
143 | } |
198 | #endif |
144 | #endif |
199 | 145 | ||
200 | if (tiling_flags) { |
146 | if (tiling_flags) { |
201 | ret = radeon_bo_set_tiling_flags(rbo, |
147 | ret = radeon_bo_set_tiling_flags(rbo, |
202 | tiling_flags | RADEON_TILING_SURFACE, |
148 | tiling_flags | RADEON_TILING_SURFACE, |
203 | mode_cmd.pitch); |
149 | mode_cmd->pitch); |
204 | if (ret) |
150 | if (ret) |
205 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); |
151 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); |
206 | } |
152 | } |
207 | mutex_lock(&rdev->ddev->struct_mutex); |
- | |
208 | fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj); |
- | |
209 | if (fb == NULL) { |
- | |
210 | DRM_ERROR("failed to allocate fb.\n"); |
- | |
211 | ret = -ENOMEM; |
- | |
212 | goto out_unref; |
- | |
213 | } |
153 | |
- | 154 | ||
214 | ret = radeon_bo_reserve(rbo, false); |
155 | ret = radeon_bo_reserve(rbo, false); |
215 | if (unlikely(ret != 0)) |
156 | if (unlikely(ret != 0)) |
216 | goto out_unref; |
157 | goto out_unref; |
217 | ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr); |
158 | ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL); |
218 | if (ret) { |
159 | if (ret) { |
219 | radeon_bo_unreserve(rbo); |
160 | radeon_bo_unreserve(rbo); |
220 | goto out_unref; |
161 | goto out_unref; |
221 | } |
162 | } |
222 | if (fb_tiled) |
163 | if (fb_tiled) |
223 | radeon_bo_check_tiling(rbo, 0, 0); |
164 | radeon_bo_check_tiling(rbo, 0, 0); |
224 | ret = radeon_bo_kmap(rbo, &fbptr); |
165 | ret = radeon_bo_kmap(rbo, NULL); |
225 | radeon_bo_unreserve(rbo); |
166 | radeon_bo_unreserve(rbo); |
226 | if (ret) { |
167 | if (ret) { |
227 | goto out_unref; |
168 | goto out_unref; |
228 | } |
169 | } |
- | 170 | ||
- | 171 | *gobj_p = gobj; |
|
- | 172 | return 0; |
|
- | 173 | out_unref: |
|
- | 174 | radeonfb_destroy_pinned_object(gobj); |
|
- | 175 | *gobj_p = NULL; |
|
- | 176 | return ret; |
|
- | 177 | } |
|
- | 178 | ||
- | 179 | static int radeonfb_create(struct radeon_fbdev *rfbdev, |
|
- | 180 | struct drm_fb_helper_surface_size *sizes) |
|
- | 181 | { |
|
- | 182 | struct radeon_device *rdev = rfbdev->rdev; |
|
- | 183 | struct fb_info *info; |
|
- | 184 | struct drm_framebuffer *fb = NULL; |
|
- | 185 | struct drm_mode_fb_cmd mode_cmd; |
|
- | 186 | struct drm_gem_object *gobj = NULL; |
|
229 | 187 | struct radeon_bo *rbo = NULL; |
|
- | 188 | struct device *device = &rdev->pdev->dev; |
|
- | 189 | int ret; |
|
230 | list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list); |
190 | unsigned long tmp; |
231 | - | ||
232 | *fb_p = fb; |
- | |
233 | rfb = to_radeon_framebuffer(fb); |
- | |
- | 191 | ||
- | 192 | ENTER(); |
|
- | 193 | ||
- | 194 | mode_cmd.width = sizes->surface_width; |
|
- | 195 | mode_cmd.height = sizes->surface_height; |
|
- | 196 | ||
- | 197 | /* avivo can't scanout real 24bpp */ |
|
- | 198 | if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
|
- | 199 | sizes->surface_bpp = 32; |
|
- | 200 | ||
- | 201 | mode_cmd.bpp = sizes->surface_bpp; |
|
- | 202 | mode_cmd.depth = sizes->surface_depth; |
|
- | 203 | ||
- | 204 | // ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
|
234 | rdev->fbdev_rfb = rfb; |
205 | // rbo = gobj->driver_private; |
235 | rdev->fbdev_rbo = rbo; |
206 | |
236 | 207 | /* okay we have an object now allocate the framebuffer */ |
|
237 | info = framebuffer_alloc(sizeof(struct radeon_fb_device), device); |
208 | info = framebuffer_alloc(0, device); |
238 | if (info == NULL) { |
209 | if (info == NULL) { |
239 | ret = -ENOMEM; |
210 | ret = -ENOMEM; |
240 | goto out_unref; |
211 | goto out_unref; |
241 | } |
212 | } |
242 | 213 | ||
- | 214 | info->par = rfbdev; |
|
243 | rdev->fbdev_info = info; |
215 | |
244 | rfbdev = info->par; |
- | |
245 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
- | |
246 | rfbdev->helper.dev = dev; |
216 | #if 0 |
247 | ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, rdev->num_crtc, |
- | |
248 | RADEONFB_CONN_LIMIT); |
217 | radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); |
249 | if (ret) |
218 | |
- | 219 | fb = &rfbdev->rfb.base; |
|
- | 220 | ||
- | 221 | /* setup helper */ |
|
- | 222 | rfbdev->helper.fb = fb; |
|
- | 223 | rfbdev->helper.fbdev = info; |
|
250 | goto out_unref; |
224 | |
251 | 225 | // memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo)); |
|
252 | 226 | ||
253 | strcpy(info->fix.id, "radeondrmfb"); |
227 | strcpy(info->fix.id, "radeondrmfb"); |
254 | 228 | ||
255 | drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); |
229 | drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); |
256 | 230 | ||
257 | info->flags = FBINFO_DEFAULT; |
231 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; |
258 | info->fbops = &radeonfb_ops; |
232 | info->fbops = &radeonfb_ops; |
259 | 233 | ||
260 | tmp = fb_gpuaddr - rdev->mc.vram_start; |
234 | tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; |
261 | info->fix.smem_start = rdev->mc.aper_base + tmp; |
235 | info->fix.smem_start = rdev->mc.aper_base + tmp; |
262 | info->fix.smem_len = size; |
236 | info->fix.smem_len = radeon_bo_size(rbo); |
263 | info->screen_base = fbptr; |
237 | info->screen_base = rbo->kptr; |
264 | info->screen_size = size; |
238 | info->screen_size = radeon_bo_size(rbo); |
- | 239 | ||
- | 240 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
|
- | 241 | ||
- | 242 | /* setup aperture base/size for vesafb takeover */ |
|
- | 243 | info->apertures = alloc_apertures(1); |
|
265 | 244 | if (!info->apertures) { |
|
266 | drm_fb_helper_fill_var(info, fb, fb_width, fb_height); |
245 | ret = -ENOMEM; |
267 | - | ||
268 | /* setup aperture base/size for vesafb takeover */ |
- | |
269 | info->aperture_base = rdev->ddev->mode_config.fb_base; |
246 | goto out_unref; |
270 | info->aperture_size = rdev->mc.real_vram_size; |
247 | } |
271 | 248 | info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; |
|
272 | info->fix.mmio_start = 0; |
249 | info->apertures->ranges[0].size = rdev->mc.aper_size; |
273 | info->fix.mmio_len = 0; |
250 | |
274 | // info->pixmap.size = 64*1024; |
251 | // info->pixmap.size = 64*1024; |
275 | // info->pixmap.buf_align = 8; |
252 | // info->pixmap.buf_align = 8; |
276 | // info->pixmap.access_align = 32; |
253 | // info->pixmap.access_align = 32; |
277 | // info->pixmap.flags = FB_PIXMAP_SYSTEM; |
254 | // info->pixmap.flags = FB_PIXMAP_SYSTEM; |
278 | // info->pixmap.scan_align = 1; |
255 | // info->pixmap.scan_align = 1; |
- | 256 | ||
279 | if (info->screen_base == NULL) { |
257 | if (info->screen_base == NULL) { |
280 | ret = -ENOSPC; |
258 | ret = -ENOSPC; |
281 | goto out_unref; |
259 | goto out_unref; |
282 | } |
260 | } |
283 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
261 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
284 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); |
262 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); |
285 | DRM_INFO("size %lu\n", (unsigned long)size); |
263 | DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); |
286 | DRM_INFO("fb depth is %d\n", fb->depth); |
264 | DRM_INFO("fb depth is %d\n", fb->depth); |
287 | DRM_INFO(" pitch is %d\n", fb->pitch); |
265 | DRM_INFO(" pitch is %d\n", fb->pitch); |
- | 266 | #endif |
|
288 | 267 | ||
289 | fb->fbdev = info; |
- | |
290 | rfbdev->rfb = rfb; |
- | |
291 | rfbdev->rdev = rdev; |
- | |
292 | 268 | LEAVE(); |
|
293 | mutex_unlock(&rdev->ddev->struct_mutex); |
269 | |
294 | return 0; |
270 | return 0; |
295 | 271 | ||
296 | out_unref: |
272 | out_unref: |
297 | if (rbo) { |
273 | if (rbo) { |
298 | ret = radeon_bo_reserve(rbo, false); |
- | |
299 | if (likely(ret == 0)) { |
- | |
300 | radeon_bo_kunmap(rbo); |
- | |
301 | radeon_bo_unreserve(rbo); |
- | |
302 | } |
274 | |
303 | } |
275 | } |
304 | if (fb && ret) { |
276 | if (fb && ret) { |
305 | list_del(&fb->filp_head); |
- | |
306 | // drm_gem_object_unreference(gobj); |
- | |
307 | // drm_framebuffer_cleanup(fb); |
- | |
308 | kfree(fb); |
277 | kfree(fb); |
309 | } |
278 | } |
310 | // drm_gem_object_unreference(gobj); |
- | |
311 | mutex_unlock(&rdev->ddev->struct_mutex); |
- | |
312 | out: |
- | |
313 | return ret; |
279 | return ret; |
314 | } |
280 | } |
315 | 281 | ||
- | 282 | static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper, |
|
316 | int radeonfb_probe(struct drm_device *dev) |
283 | struct drm_fb_helper_surface_size *sizes) |
- | 284 | { |
|
- | 285 | struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper; |
|
- | 286 | int new_fb = 0; |
|
- | 287 | int ret; |
|
- | 288 | ||
- | 289 | if (!helper->fb) { |
|
- | 290 | ret = radeonfb_create(rfbdev, sizes); |
|
- | 291 | if (ret) |
|
- | 292 | return ret; |
|
- | 293 | new_fb = 1; |
|
- | 294 | } |
|
- | 295 | return new_fb; |
|
- | 296 | } |
|
- | 297 | static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev) |
|
- | 298 | { |
|
317 | { |
299 | struct fb_info *info; |
- | 300 | struct radeon_framebuffer *rfb = &rfbdev->rfb; |
|
- | 301 | ||
- | 302 | if (rfbdev->helper.fbdev) { |
|
- | 303 | info = rfbdev->helper.fbdev; |
|
- | 304 | ||
- | 305 | // unregister_framebuffer(info); |
|
- | 306 | // framebuffer_release(info); |
|
- | 307 | } |
|
- | 308 | ||
- | 309 | if (rfb->obj) { |
|
- | 310 | radeonfb_destroy_pinned_object(rfb->obj); |
|
- | 311 | rfb->obj = NULL; |
|
- | 312 | } |
|
- | 313 | // drm_fb_helper_fini(&rfbdev->helper); |
|
- | 314 | drm_framebuffer_cleanup(&rfb->base); |
|
- | 315 | ||
- | 316 | return 0; |
|
- | 317 | } |
|
- | 318 | ||
- | 319 | static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { |
|
- | 320 | .gamma_set = radeon_crtc_fb_gamma_set, |
|
- | 321 | .gamma_get = radeon_crtc_fb_gamma_get, |
|
- | 322 | .fb_probe = radeon_fb_find_or_create_single, |
|
- | 323 | }; |
|
- | 324 | ||
- | 325 | int radeon_fbdev_init(struct radeon_device *rdev) |
|
- | 326 | { |
|
318 | struct radeon_device *rdev = dev->dev_private; |
327 | struct radeon_fbdev *rfbdev; |
- | 328 | int bpp_sel = 32; |
|
- | 329 | int ret; |
|
- | 330 | ||
319 | int bpp_sel = 32; |
331 | ENTER(); |
320 | 332 | ||
321 | /* select 8 bpp console on RN50 or 16MB cards */ |
333 | /* select 8 bpp console on RN50 or 16MB cards */ |
322 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) |
334 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) |
323 | bpp_sel = 8; |
335 | bpp_sel = 8; |
- | 336 | ||
- | 337 | rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL); |
|
- | 338 | if (!rfbdev) |
|
- | 339 | return -ENOMEM; |
|
- | 340 | ||
- | 341 | rfbdev->rdev = rdev; |
|
- | 342 | rdev->mode_info.rfbdev = rfbdev; |
|
- | 343 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
|
324 | 344 | ||
- | 345 | ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, |
|
- | 346 | rdev->num_crtc, |
|
- | 347 | RADEONFB_CONN_LIMIT); |
|
- | 348 | if (ret) { |
|
- | 349 | kfree(rfbdev); |
|
325 | return drm_fb_helper_single_fb_probe(dev, 32, &radeonfb_create); |
350 | return ret; |
326 | } |
351 | } |
327 | - | ||
328 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb) |
- | |
329 | { |
352 | |
330 | struct fb_info *info; |
- | |
331 | struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb); |
- | |
332 | struct radeon_bo *rbo; |
353 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
333 | int r; |
354 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
334 | - | ||
335 | if (!fb) { |
355 | |
336 | return -EINVAL; |
- | |
337 | } |
356 | LEAVE(); |
338 | info = fb->fbdev; |
- | |
339 | if (info) { |
- | |
340 | struct radeon_fb_device *rfbdev = info->par; |
- | |
341 | rbo = rfb->obj->driver_private; |
- | |
342 | // unregister_framebuffer(info); |
- | |
343 | r = radeon_bo_reserve(rbo, false); |
- | |
344 | if (likely(r == 0)) { |
- | |
345 | radeon_bo_kunmap(rbo); |
- | |
346 | radeon_bo_unpin(rbo); |
357 | |
- | 358 | return 0; |
|
- | 359 | } |
|
- | 360 | ||
- | 361 | void radeon_fbdev_fini(struct radeon_device *rdev) |
|
- | 362 | { |
|
- | 363 | if (!rdev->mode_info.rfbdev) |
|
347 | radeon_bo_unreserve(rbo); |
364 | return; |
348 | } |
365 | |
- | 366 | radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); |
|
349 | drm_fb_helper_free(&rfbdev->helper); |
367 | kfree(rdev->mode_info.rfbdev); |
350 | framebuffer_release(info); |
- | |
- | 368 | rdev->mode_info.rfbdev = NULL; |
|
- | 369 | } |
|
- | 370 | ||
- | 371 | ||
- | 372 | int radeon_fbdev_total_size(struct radeon_device *rdev) |
|
- | 373 | { |
|
- | 374 | struct radeon_bo *robj; |
|
351 | } |
375 | int size = 0; |
- | 376 | ||
- | 377 | robj = rdev->mode_info.rfbdev->rfb.obj->driver_private; |
|
- | 378 | size += radeon_bo_size(robj); |
|
- | 379 | return size; |
|
- | 380 | } |
|
- | 381 | ||
- | 382 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) |
|
352 | 383 | { |
|
353 | printk(KERN_INFO "unregistered panic notifier\n"); |
- | |
354 | - | ||
355 | return 0; |
384 | if (robj == rdev->mode_info.rfbdev->rfb.obj->driver_private) |
356 | } |
385 | return true; |
357 | EXPORT_SYMBOL(radeonfb_remove); |
386 | return false; |
358 | MODULE_LICENSE("GPL");=> |
387 | }=> |