Rev 5367 | Rev 6103 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 5367 | Rev 6084 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright 2006 Dave Airlie |
2 | * Copyright 2006 Dave Airlie |
3 | * Copyright © 2006-2007 Intel Corporation |
3 | * Copyright © 2006-2007 Intel Corporation |
4 | * Jesse Barnes |
4 | * Jesse Barnes |
5 | * |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
12 | * |
13 | * The above copyright notice and this permission notice (including the next |
13 | * The above copyright notice and this permission notice (including the next |
14 | * paragraph) shall be included in all copies or substantial portions of the |
14 | * paragraph) shall be included in all copies or substantial portions of the |
15 | * Software. |
15 | * Software. |
16 | * |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
23 | * DEALINGS IN THE SOFTWARE. |
23 | * DEALINGS IN THE SOFTWARE. |
24 | * |
24 | * |
25 | * Authors: |
25 | * Authors: |
26 | * Eric Anholt |
26 | * Eric Anholt |
27 | */ |
27 | */ |
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
- | 33 | #include |
|
33 | #include |
34 | #include |
34 | #include |
35 | #include |
35 | #include "intel_drv.h" |
36 | #include "intel_drv.h" |
36 | #include |
37 | #include |
37 | #include "i915_drv.h" |
38 | #include "i915_drv.h" |
38 | #include "intel_sdvo_regs.h" |
39 | #include "intel_sdvo_regs.h" |
39 | 40 | ||
40 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
41 | #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) |
41 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
42 | #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) |
42 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
43 | #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) |
43 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
44 | #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) |
44 | 45 | ||
45 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
46 | #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ |
46 | SDVO_TV_MASK) |
47 | SDVO_TV_MASK) |
47 | 48 | ||
48 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
49 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
49 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
50 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) |
50 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
51 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
51 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
52 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
52 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
53 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
53 | 54 | ||
54 | 55 | ||
55 | static const char *tv_format_names[] = { |
56 | static const char * const tv_format_names[] = { |
56 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
57 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
57 | "PAL_B" , "PAL_D" , "PAL_G" , |
58 | "PAL_B" , "PAL_D" , "PAL_G" , |
58 | "PAL_H" , "PAL_I" , "PAL_M" , |
59 | "PAL_H" , "PAL_I" , "PAL_M" , |
59 | "PAL_N" , "PAL_NC" , "PAL_60" , |
60 | "PAL_N" , "PAL_NC" , "PAL_60" , |
60 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
61 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
61 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
62 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
62 | "SECAM_60" |
63 | "SECAM_60" |
63 | }; |
64 | }; |
64 | 65 | ||
65 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
66 | #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) |
66 | 67 | ||
67 | struct intel_sdvo { |
68 | struct intel_sdvo { |
68 | struct intel_encoder base; |
69 | struct intel_encoder base; |
69 | 70 | ||
70 | struct i2c_adapter *i2c; |
71 | struct i2c_adapter *i2c; |
71 | u8 slave_addr; |
72 | u8 slave_addr; |
72 | 73 | ||
73 | struct i2c_adapter ddc; |
74 | struct i2c_adapter ddc; |
74 | 75 | ||
75 | /* Register for the SDVO device: SDVOB or SDVOC */ |
76 | /* Register for the SDVO device: SDVOB or SDVOC */ |
76 | uint32_t sdvo_reg; |
77 | uint32_t sdvo_reg; |
77 | 78 | ||
78 | /* Active outputs controlled by this SDVO output */ |
79 | /* Active outputs controlled by this SDVO output */ |
79 | uint16_t controlled_output; |
80 | uint16_t controlled_output; |
80 | 81 | ||
81 | /* |
82 | /* |
82 | * Capabilities of the SDVO device returned by |
83 | * Capabilities of the SDVO device returned by |
83 | * intel_sdvo_get_capabilities() |
84 | * intel_sdvo_get_capabilities() |
84 | */ |
85 | */ |
85 | struct intel_sdvo_caps caps; |
86 | struct intel_sdvo_caps caps; |
86 | 87 | ||
87 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
88 | /* Pixel clock limitations reported by the SDVO device, in kHz */ |
88 | int pixel_clock_min, pixel_clock_max; |
89 | int pixel_clock_min, pixel_clock_max; |
89 | 90 | ||
90 | /* |
91 | /* |
91 | * For multiple function SDVO device, |
92 | * For multiple function SDVO device, |
92 | * this is for current attached outputs. |
93 | * this is for current attached outputs. |
93 | */ |
94 | */ |
94 | uint16_t attached_output; |
95 | uint16_t attached_output; |
95 | 96 | ||
96 | /* |
97 | /* |
97 | * Hotplug activation bits for this device |
98 | * Hotplug activation bits for this device |
98 | */ |
99 | */ |
99 | uint16_t hotplug_active; |
100 | uint16_t hotplug_active; |
100 | 101 | ||
101 | /** |
102 | /** |
102 | * This is used to select the color range of RBG outputs in HDMI mode. |
103 | * This is used to select the color range of RBG outputs in HDMI mode. |
103 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
104 | * It is only valid when using TMDS encoding and 8 bit per color mode. |
104 | */ |
105 | */ |
105 | uint32_t color_range; |
106 | uint32_t color_range; |
106 | bool color_range_auto; |
107 | bool color_range_auto; |
107 | 108 | ||
108 | /** |
109 | /** |
- | 110 | * HDMI user specified aspect ratio |
|
- | 111 | */ |
|
- | 112 | enum hdmi_picture_aspect aspect_ratio; |
|
- | 113 | ||
- | 114 | /** |
|
109 | * This is set if we're going to treat the device as TV-out. |
115 | * This is set if we're going to treat the device as TV-out. |
110 | * |
116 | * |
111 | * While we have these nice friendly flags for output types that ought |
117 | * While we have these nice friendly flags for output types that ought |
112 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
118 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
113 | * shows up as RGB1 (VGA). |
119 | * shows up as RGB1 (VGA). |
114 | */ |
120 | */ |
115 | bool is_tv; |
121 | bool is_tv; |
116 | 122 | ||
117 | /* On different gens SDVOB is at different places. */ |
123 | /* On different gens SDVOB is at different places. */ |
118 | bool is_sdvob; |
124 | bool is_sdvob; |
119 | 125 | ||
120 | /* This is for current tv format name */ |
126 | /* This is for current tv format name */ |
121 | int tv_format_index; |
127 | int tv_format_index; |
122 | 128 | ||
123 | /** |
129 | /** |
124 | * This is set if we treat the device as HDMI, instead of DVI. |
130 | * This is set if we treat the device as HDMI, instead of DVI. |
125 | */ |
131 | */ |
126 | bool is_hdmi; |
132 | bool is_hdmi; |
127 | bool has_hdmi_monitor; |
133 | bool has_hdmi_monitor; |
128 | bool has_hdmi_audio; |
134 | bool has_hdmi_audio; |
129 | bool rgb_quant_range_selectable; |
135 | bool rgb_quant_range_selectable; |
130 | 136 | ||
131 | /** |
137 | /** |
132 | * This is set if we detect output of sdvo device as LVDS and |
138 | * This is set if we detect output of sdvo device as LVDS and |
133 | * have a valid fixed mode to use with the panel. |
139 | * have a valid fixed mode to use with the panel. |
134 | */ |
140 | */ |
135 | bool is_lvds; |
141 | bool is_lvds; |
136 | 142 | ||
137 | /** |
143 | /** |
138 | * This is sdvo fixed pannel mode pointer |
144 | * This is sdvo fixed pannel mode pointer |
139 | */ |
145 | */ |
140 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
146 | struct drm_display_mode *sdvo_lvds_fixed_mode; |
141 | 147 | ||
142 | /* DDC bus used by this SDVO encoder */ |
148 | /* DDC bus used by this SDVO encoder */ |
143 | uint8_t ddc_bus; |
149 | uint8_t ddc_bus; |
144 | 150 | ||
145 | /* |
151 | /* |
146 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
152 | * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd |
147 | */ |
153 | */ |
148 | uint8_t dtd_sdvo_flags; |
154 | uint8_t dtd_sdvo_flags; |
149 | }; |
155 | }; |
150 | 156 | ||
151 | struct intel_sdvo_connector { |
157 | struct intel_sdvo_connector { |
152 | struct intel_connector base; |
158 | struct intel_connector base; |
153 | 159 | ||
154 | /* Mark the type of connector */ |
160 | /* Mark the type of connector */ |
155 | uint16_t output_flag; |
161 | uint16_t output_flag; |
156 | 162 | ||
157 | enum hdmi_force_audio force_audio; |
163 | enum hdmi_force_audio force_audio; |
158 | 164 | ||
159 | /* This contains all current supported TV format */ |
165 | /* This contains all current supported TV format */ |
160 | u8 tv_format_supported[TV_FORMAT_NUM]; |
166 | u8 tv_format_supported[TV_FORMAT_NUM]; |
161 | int format_supported_num; |
167 | int format_supported_num; |
162 | struct drm_property *tv_format; |
168 | struct drm_property *tv_format; |
163 | 169 | ||
164 | /* add the property for the SDVO-TV */ |
170 | /* add the property for the SDVO-TV */ |
165 | struct drm_property *left; |
171 | struct drm_property *left; |
166 | struct drm_property *right; |
172 | struct drm_property *right; |
167 | struct drm_property *top; |
173 | struct drm_property *top; |
168 | struct drm_property *bottom; |
174 | struct drm_property *bottom; |
169 | struct drm_property *hpos; |
175 | struct drm_property *hpos; |
170 | struct drm_property *vpos; |
176 | struct drm_property *vpos; |
171 | struct drm_property *contrast; |
177 | struct drm_property *contrast; |
172 | struct drm_property *saturation; |
178 | struct drm_property *saturation; |
173 | struct drm_property *hue; |
179 | struct drm_property *hue; |
174 | struct drm_property *sharpness; |
180 | struct drm_property *sharpness; |
175 | struct drm_property *flicker_filter; |
181 | struct drm_property *flicker_filter; |
176 | struct drm_property *flicker_filter_adaptive; |
182 | struct drm_property *flicker_filter_adaptive; |
177 | struct drm_property *flicker_filter_2d; |
183 | struct drm_property *flicker_filter_2d; |
178 | struct drm_property *tv_chroma_filter; |
184 | struct drm_property *tv_chroma_filter; |
179 | struct drm_property *tv_luma_filter; |
185 | struct drm_property *tv_luma_filter; |
180 | struct drm_property *dot_crawl; |
186 | struct drm_property *dot_crawl; |
181 | 187 | ||
182 | /* add the property for the SDVO-TV/LVDS */ |
188 | /* add the property for the SDVO-TV/LVDS */ |
183 | struct drm_property *brightness; |
189 | struct drm_property *brightness; |
184 | 190 | ||
185 | /* Add variable to record current setting for the above property */ |
191 | /* Add variable to record current setting for the above property */ |
186 | u32 left_margin, right_margin, top_margin, bottom_margin; |
192 | u32 left_margin, right_margin, top_margin, bottom_margin; |
187 | 193 | ||
188 | /* this is to get the range of margin.*/ |
194 | /* this is to get the range of margin.*/ |
189 | u32 max_hscan, max_vscan; |
195 | u32 max_hscan, max_vscan; |
190 | u32 max_hpos, cur_hpos; |
196 | u32 max_hpos, cur_hpos; |
191 | u32 max_vpos, cur_vpos; |
197 | u32 max_vpos, cur_vpos; |
192 | u32 cur_brightness, max_brightness; |
198 | u32 cur_brightness, max_brightness; |
193 | u32 cur_contrast, max_contrast; |
199 | u32 cur_contrast, max_contrast; |
194 | u32 cur_saturation, max_saturation; |
200 | u32 cur_saturation, max_saturation; |
195 | u32 cur_hue, max_hue; |
201 | u32 cur_hue, max_hue; |
196 | u32 cur_sharpness, max_sharpness; |
202 | u32 cur_sharpness, max_sharpness; |
197 | u32 cur_flicker_filter, max_flicker_filter; |
203 | u32 cur_flicker_filter, max_flicker_filter; |
198 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
204 | u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; |
199 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
205 | u32 cur_flicker_filter_2d, max_flicker_filter_2d; |
200 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
206 | u32 cur_tv_chroma_filter, max_tv_chroma_filter; |
201 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
207 | u32 cur_tv_luma_filter, max_tv_luma_filter; |
202 | u32 cur_dot_crawl, max_dot_crawl; |
208 | u32 cur_dot_crawl, max_dot_crawl; |
203 | }; |
209 | }; |
204 | 210 | ||
205 | static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) |
211 | static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) |
206 | { |
212 | { |
207 | return container_of(encoder, struct intel_sdvo, base); |
213 | return container_of(encoder, struct intel_sdvo, base); |
208 | } |
214 | } |
209 | 215 | ||
210 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
216 | static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) |
211 | { |
217 | { |
212 | return to_sdvo(intel_attached_encoder(connector)); |
218 | return to_sdvo(intel_attached_encoder(connector)); |
213 | } |
219 | } |
214 | 220 | ||
215 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
221 | static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) |
216 | { |
222 | { |
217 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
223 | return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); |
218 | } |
224 | } |
219 | 225 | ||
220 | static bool |
226 | static bool |
221 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
227 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); |
222 | static bool |
228 | static bool |
223 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
229 | intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
224 | struct intel_sdvo_connector *intel_sdvo_connector, |
230 | struct intel_sdvo_connector *intel_sdvo_connector, |
225 | int type); |
231 | int type); |
226 | static bool |
232 | static bool |
227 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
233 | intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
228 | struct intel_sdvo_connector *intel_sdvo_connector); |
234 | struct intel_sdvo_connector *intel_sdvo_connector); |
229 | 235 | ||
230 | /** |
236 | /** |
231 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
237 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
232 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
238 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
233 | * comments in the BIOS). |
239 | * comments in the BIOS). |
234 | */ |
240 | */ |
235 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
241 | static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) |
236 | { |
242 | { |
237 | struct drm_device *dev = intel_sdvo->base.base.dev; |
243 | struct drm_device *dev = intel_sdvo->base.base.dev; |
238 | struct drm_i915_private *dev_priv = dev->dev_private; |
244 | struct drm_i915_private *dev_priv = dev->dev_private; |
239 | u32 bval = val, cval = val; |
245 | u32 bval = val, cval = val; |
240 | int i; |
246 | int i; |
241 | 247 | ||
242 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
248 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
243 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
249 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
244 | I915_READ(intel_sdvo->sdvo_reg); |
250 | POSTING_READ(intel_sdvo->sdvo_reg); |
- | 251 | /* |
|
- | 252 | * HW workaround, need to write this twice for issue |
|
- | 253 | * that may result in first write getting masked. |
|
- | 254 | */ |
|
- | 255 | if (HAS_PCH_IBX(dev)) { |
|
- | 256 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
|
- | 257 | POSTING_READ(intel_sdvo->sdvo_reg); |
|
- | 258 | } |
|
245 | return; |
259 | return; |
246 | } |
260 | } |
247 | 261 | ||
248 | if (intel_sdvo->sdvo_reg == GEN3_SDVOB) |
262 | if (intel_sdvo->sdvo_reg == GEN3_SDVOB) |
249 | cval = I915_READ(GEN3_SDVOC); |
263 | cval = I915_READ(GEN3_SDVOC); |
250 | else |
264 | else |
251 | bval = I915_READ(GEN3_SDVOB); |
265 | bval = I915_READ(GEN3_SDVOB); |
252 | 266 | ||
253 | /* |
267 | /* |
254 | * Write the registers twice for luck. Sometimes, |
268 | * Write the registers twice for luck. Sometimes, |
255 | * writing them only once doesn't appear to 'stick'. |
269 | * writing them only once doesn't appear to 'stick'. |
256 | * The BIOS does this too. Yay, magic |
270 | * The BIOS does this too. Yay, magic |
257 | */ |
271 | */ |
258 | for (i = 0; i < 2; i++) |
272 | for (i = 0; i < 2; i++) |
259 | { |
273 | { |
260 | I915_WRITE(GEN3_SDVOB, bval); |
274 | I915_WRITE(GEN3_SDVOB, bval); |
261 | I915_READ(GEN3_SDVOB); |
275 | POSTING_READ(GEN3_SDVOB); |
262 | I915_WRITE(GEN3_SDVOC, cval); |
276 | I915_WRITE(GEN3_SDVOC, cval); |
263 | I915_READ(GEN3_SDVOC); |
277 | POSTING_READ(GEN3_SDVOC); |
264 | } |
278 | } |
265 | } |
279 | } |
266 | 280 | ||
267 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
281 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
268 | { |
282 | { |
269 | struct i2c_msg msgs[] = { |
283 | struct i2c_msg msgs[] = { |
270 | { |
284 | { |
271 | .addr = intel_sdvo->slave_addr, |
285 | .addr = intel_sdvo->slave_addr, |
272 | .flags = 0, |
286 | .flags = 0, |
273 | .len = 1, |
287 | .len = 1, |
274 | .buf = &addr, |
288 | .buf = &addr, |
275 | }, |
289 | }, |
276 | { |
290 | { |
277 | .addr = intel_sdvo->slave_addr, |
291 | .addr = intel_sdvo->slave_addr, |
278 | .flags = I2C_M_RD, |
292 | .flags = I2C_M_RD, |
279 | .len = 1, |
293 | .len = 1, |
280 | .buf = ch, |
294 | .buf = ch, |
281 | } |
295 | } |
282 | }; |
296 | }; |
283 | int ret; |
297 | int ret; |
284 | 298 | ||
285 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
299 | if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) |
286 | return true; |
300 | return true; |
287 | 301 | ||
288 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
302 | DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); |
289 | return false; |
303 | return false; |
290 | } |
304 | } |
291 | 305 | ||
292 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
306 | #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} |
293 | /** Mapping of command numbers to names, for debug output */ |
307 | /** Mapping of command numbers to names, for debug output */ |
294 | static const struct _sdvo_cmd_name { |
308 | static const struct _sdvo_cmd_name { |
295 | u8 cmd; |
309 | u8 cmd; |
296 | const char *name; |
310 | const char *name; |
297 | } sdvo_cmd_names[] = { |
311 | } sdvo_cmd_names[] = { |
298 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), |
299 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), |
300 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), |
301 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), |
302 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), |
303 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), |
304 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), |
305 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), |
306 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), |
307 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), |
308 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), |
309 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), |
310 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), |
311 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), |
312 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), |
313 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), |
314 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), |
315 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
316 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), |
317 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), |
318 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), |
319 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), |
320 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), |
321 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), |
322 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), |
323 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), |
324 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), |
325 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), |
326 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), |
327 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
341 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), |
328 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
342 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), |
329 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), |
330 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), |
331 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), |
332 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), |
333 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), |
334 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), |
335 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
349 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), |
336 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
350 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), |
337 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), |
338 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), |
339 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), |
340 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), |
341 | 355 | ||
342 | /* Add the op code for SDVO enhancements */ |
356 | /* Add the op code for SDVO enhancements */ |
343 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), |
344 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), |
345 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), |
346 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), |
347 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), |
348 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), |
349 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), |
350 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), |
351 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), |
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), |
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), |
354 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), |
355 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), |
356 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), |
357 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), |
358 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), |
359 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), |
360 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), |
361 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), |
362 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), |
363 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), |
364 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), |
365 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), |
366 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), |
367 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), |
368 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), |
369 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), |
370 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), |
371 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), |
372 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), |
373 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
387 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), |
374 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
388 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), |
375 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), |
376 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), |
377 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), |
378 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), |
379 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), |
380 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), |
381 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
395 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), |
382 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
396 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), |
383 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
397 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), |
384 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
398 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), |
385 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), |
386 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), |
387 | 401 | ||
388 | /* HDMI op code */ |
402 | /* HDMI op code */ |
389 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), |
390 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), |
391 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), |
392 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), |
393 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), |
394 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), |
395 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
409 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), |
396 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
410 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), |
397 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
411 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), |
398 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
412 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), |
399 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
413 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), |
400 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
414 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), |
401 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
415 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), |
402 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
416 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), |
403 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
417 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), |
404 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
418 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), |
405 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
419 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), |
406 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
420 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), |
407 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
421 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), |
408 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
422 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
409 | }; |
423 | }; |
410 | 424 | ||
411 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
425 | #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") |
412 | 426 | ||
413 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
427 | static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, |
414 | const void *args, int args_len) |
428 | const void *args, int args_len) |
415 | { |
429 | { |
416 | int i, pos = 0; |
430 | int i, pos = 0; |
417 | #define BUF_LEN 256 |
431 | #define BUF_LEN 256 |
418 | char buffer[BUF_LEN]; |
432 | char buffer[BUF_LEN]; |
419 | 433 | ||
420 | #define BUF_PRINT(args...) \ |
434 | #define BUF_PRINT(args...) \ |
421 | pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) |
435 | pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) |
422 | 436 | ||
423 | 437 | ||
424 | for (i = 0; i < args_len; i++) { |
438 | for (i = 0; i < args_len; i++) { |
425 | BUF_PRINT("%02X ", ((u8 *)args)[i]); |
439 | BUF_PRINT("%02X ", ((u8 *)args)[i]); |
426 | } |
440 | } |
427 | for (; i < 8; i++) { |
441 | for (; i < 8; i++) { |
428 | BUF_PRINT(" "); |
442 | BUF_PRINT(" "); |
429 | } |
443 | } |
430 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
444 | for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { |
431 | if (cmd == sdvo_cmd_names[i].cmd) { |
445 | if (cmd == sdvo_cmd_names[i].cmd) { |
432 | BUF_PRINT("(%s)", sdvo_cmd_names[i].name); |
446 | BUF_PRINT("(%s)", sdvo_cmd_names[i].name); |
433 | break; |
447 | break; |
434 | } |
448 | } |
435 | } |
449 | } |
436 | if (i == ARRAY_SIZE(sdvo_cmd_names)) { |
450 | if (i == ARRAY_SIZE(sdvo_cmd_names)) { |
437 | BUF_PRINT("(%02X)", cmd); |
451 | BUF_PRINT("(%02X)", cmd); |
438 | } |
452 | } |
439 | BUG_ON(pos >= BUF_LEN - 1); |
453 | BUG_ON(pos >= BUF_LEN - 1); |
440 | #undef BUF_PRINT |
454 | #undef BUF_PRINT |
441 | #undef BUF_LEN |
455 | #undef BUF_LEN |
442 | 456 | ||
443 | DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); |
457 | DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); |
444 | } |
458 | } |
445 | 459 | ||
446 | static const char *cmd_status_names[] = { |
460 | static const char * const cmd_status_names[] = { |
447 | "Power on", |
461 | "Power on", |
448 | "Success", |
462 | "Success", |
449 | "Not supported", |
463 | "Not supported", |
450 | "Invalid arg", |
464 | "Invalid arg", |
451 | "Pending", |
465 | "Pending", |
452 | "Target not specified", |
466 | "Target not specified", |
453 | "Scaling not supported" |
467 | "Scaling not supported" |
454 | }; |
468 | }; |
455 | 469 | ||
456 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
470 | static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, |
457 | const void *args, int args_len) |
471 | const void *args, int args_len) |
458 | { |
472 | { |
459 | u8 *buf, status; |
473 | u8 *buf, status; |
460 | struct i2c_msg *msgs; |
474 | struct i2c_msg *msgs; |
461 | int i, ret = true; |
475 | int i, ret = true; |
462 | 476 | ||
463 | /* Would be simpler to allocate both in one go ? */ |
477 | /* Would be simpler to allocate both in one go ? */ |
464 | buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); |
478 | buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); |
465 | if (!buf) |
479 | if (!buf) |
466 | return false; |
480 | return false; |
467 | 481 | ||
468 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
482 | msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); |
469 | if (!msgs) { |
483 | if (!msgs) { |
470 | kfree(buf); |
484 | kfree(buf); |
471 | return false; |
485 | return false; |
472 | } |
486 | } |
473 | 487 | ||
474 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
488 | intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); |
475 | 489 | ||
476 | for (i = 0; i < args_len; i++) { |
490 | for (i = 0; i < args_len; i++) { |
477 | msgs[i].addr = intel_sdvo->slave_addr; |
491 | msgs[i].addr = intel_sdvo->slave_addr; |
478 | msgs[i].flags = 0; |
492 | msgs[i].flags = 0; |
479 | msgs[i].len = 2; |
493 | msgs[i].len = 2; |
480 | msgs[i].buf = buf + 2 *i; |
494 | msgs[i].buf = buf + 2 *i; |
481 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
495 | buf[2*i + 0] = SDVO_I2C_ARG_0 - i; |
482 | buf[2*i + 1] = ((u8*)args)[i]; |
496 | buf[2*i + 1] = ((u8*)args)[i]; |
483 | } |
497 | } |
484 | msgs[i].addr = intel_sdvo->slave_addr; |
498 | msgs[i].addr = intel_sdvo->slave_addr; |
485 | msgs[i].flags = 0; |
499 | msgs[i].flags = 0; |
486 | msgs[i].len = 2; |
500 | msgs[i].len = 2; |
487 | msgs[i].buf = buf + 2*i; |
501 | msgs[i].buf = buf + 2*i; |
488 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
502 | buf[2*i + 0] = SDVO_I2C_OPCODE; |
489 | buf[2*i + 1] = cmd; |
503 | buf[2*i + 1] = cmd; |
490 | 504 | ||
491 | /* the following two are to read the response */ |
505 | /* the following two are to read the response */ |
492 | status = SDVO_I2C_CMD_STATUS; |
506 | status = SDVO_I2C_CMD_STATUS; |
493 | msgs[i+1].addr = intel_sdvo->slave_addr; |
507 | msgs[i+1].addr = intel_sdvo->slave_addr; |
494 | msgs[i+1].flags = 0; |
508 | msgs[i+1].flags = 0; |
495 | msgs[i+1].len = 1; |
509 | msgs[i+1].len = 1; |
496 | msgs[i+1].buf = &status; |
510 | msgs[i+1].buf = &status; |
497 | 511 | ||
498 | msgs[i+2].addr = intel_sdvo->slave_addr; |
512 | msgs[i+2].addr = intel_sdvo->slave_addr; |
499 | msgs[i+2].flags = I2C_M_RD; |
513 | msgs[i+2].flags = I2C_M_RD; |
500 | msgs[i+2].len = 1; |
514 | msgs[i+2].len = 1; |
501 | msgs[i+2].buf = &status; |
515 | msgs[i+2].buf = &status; |
502 | 516 | ||
503 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
517 | ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); |
504 | if (ret < 0) { |
518 | if (ret < 0) { |
505 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
519 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
506 | ret = false; |
520 | ret = false; |
507 | goto out; |
521 | goto out; |
508 | } |
522 | } |
509 | if (ret != i+3) { |
523 | if (ret != i+3) { |
510 | /* failure in I2C transfer */ |
524 | /* failure in I2C transfer */ |
511 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
525 | DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); |
512 | ret = false; |
526 | ret = false; |
513 | } |
527 | } |
514 | 528 | ||
515 | out: |
529 | out: |
516 | kfree(msgs); |
530 | kfree(msgs); |
517 | kfree(buf); |
531 | kfree(buf); |
518 | return ret; |
532 | return ret; |
519 | } |
533 | } |
520 | 534 | ||
521 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
535 | static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, |
522 | void *response, int response_len) |
536 | void *response, int response_len) |
523 | { |
537 | { |
524 | u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ |
538 | u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ |
525 | u8 status; |
539 | u8 status; |
526 | int i, pos = 0; |
540 | int i, pos = 0; |
527 | #define BUF_LEN 256 |
541 | #define BUF_LEN 256 |
528 | char buffer[BUF_LEN]; |
542 | char buffer[BUF_LEN]; |
529 | 543 | ||
530 | 544 | ||
531 | /* |
545 | /* |
532 | * The documentation states that all commands will be |
546 | * The documentation states that all commands will be |
533 | * processed within 15µs, and that we need only poll |
547 | * processed within 15µs, and that we need only poll |
534 | * the status byte a maximum of 3 times in order for the |
548 | * the status byte a maximum of 3 times in order for the |
535 | * command to be complete. |
549 | * command to be complete. |
536 | * |
550 | * |
537 | * Check 5 times in case the hardware failed to read the docs. |
551 | * Check 5 times in case the hardware failed to read the docs. |
538 | * |
552 | * |
539 | * Also beware that the first response by many devices is to |
553 | * Also beware that the first response by many devices is to |
540 | * reply PENDING and stall for time. TVs are notorious for |
554 | * reply PENDING and stall for time. TVs are notorious for |
541 | * requiring longer than specified to complete their replies. |
555 | * requiring longer than specified to complete their replies. |
542 | * Originally (in the DDX long ago), the delay was only ever 15ms |
556 | * Originally (in the DDX long ago), the delay was only ever 15ms |
543 | * with an additional delay of 30ms applied for TVs added later after |
557 | * with an additional delay of 30ms applied for TVs added later after |
544 | * many experiments. To accommodate both sets of delays, we do a |
558 | * many experiments. To accommodate both sets of delays, we do a |
545 | * sequence of slow checks if the device is falling behind and fails |
559 | * sequence of slow checks if the device is falling behind and fails |
546 | * to reply within 5*15µs. |
560 | * to reply within 5*15µs. |
547 | */ |
561 | */ |
548 | if (!intel_sdvo_read_byte(intel_sdvo, |
562 | if (!intel_sdvo_read_byte(intel_sdvo, |
549 | SDVO_I2C_CMD_STATUS, |
563 | SDVO_I2C_CMD_STATUS, |
550 | &status)) |
564 | &status)) |
551 | goto log_fail; |
565 | goto log_fail; |
552 | 566 | ||
553 | while ((status == SDVO_CMD_STATUS_PENDING || |
567 | while ((status == SDVO_CMD_STATUS_PENDING || |
554 | status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { |
568 | status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { |
555 | if (retry < 10) |
569 | if (retry < 10) |
556 | msleep(15); |
570 | msleep(15); |
557 | else |
571 | else |
558 | udelay(15); |
572 | udelay(15); |
559 | 573 | ||
560 | if (!intel_sdvo_read_byte(intel_sdvo, |
574 | if (!intel_sdvo_read_byte(intel_sdvo, |
561 | SDVO_I2C_CMD_STATUS, |
575 | SDVO_I2C_CMD_STATUS, |
562 | &status)) |
576 | &status)) |
563 | goto log_fail; |
577 | goto log_fail; |
564 | } |
578 | } |
565 | 579 | ||
566 | #define BUF_PRINT(args...) \ |
580 | #define BUF_PRINT(args...) \ |
567 | pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) |
581 | pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) |
568 | 582 | ||
569 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
583 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
570 | BUF_PRINT("(%s)", cmd_status_names[status]); |
584 | BUF_PRINT("(%s)", cmd_status_names[status]); |
571 | else |
585 | else |
572 | BUF_PRINT("(??? %d)", status); |
586 | BUF_PRINT("(??? %d)", status); |
573 | 587 | ||
574 | if (status != SDVO_CMD_STATUS_SUCCESS) |
588 | if (status != SDVO_CMD_STATUS_SUCCESS) |
575 | goto log_fail; |
589 | goto log_fail; |
576 | 590 | ||
577 | /* Read the command response */ |
591 | /* Read the command response */ |
578 | for (i = 0; i < response_len; i++) { |
592 | for (i = 0; i < response_len; i++) { |
579 | if (!intel_sdvo_read_byte(intel_sdvo, |
593 | if (!intel_sdvo_read_byte(intel_sdvo, |
580 | SDVO_I2C_RETURN_0 + i, |
594 | SDVO_I2C_RETURN_0 + i, |
581 | &((u8 *)response)[i])) |
595 | &((u8 *)response)[i])) |
582 | goto log_fail; |
596 | goto log_fail; |
583 | BUF_PRINT(" %02X", ((u8 *)response)[i]); |
597 | BUF_PRINT(" %02X", ((u8 *)response)[i]); |
584 | } |
598 | } |
585 | BUG_ON(pos >= BUF_LEN - 1); |
599 | BUG_ON(pos >= BUF_LEN - 1); |
586 | #undef BUF_PRINT |
600 | #undef BUF_PRINT |
587 | #undef BUF_LEN |
601 | #undef BUF_LEN |
588 | 602 | ||
589 | DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); |
603 | DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); |
590 | return true; |
604 | return true; |
591 | 605 | ||
592 | log_fail: |
606 | log_fail: |
593 | DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); |
607 | DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); |
594 | return false; |
608 | return false; |
595 | } |
609 | } |
596 | 610 | ||
597 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
611 | static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) |
598 | { |
612 | { |
599 | if (mode->clock >= 100000) |
613 | if (adjusted_mode->crtc_clock >= 100000) |
600 | return 1; |
614 | return 1; |
601 | else if (mode->clock >= 50000) |
615 | else if (adjusted_mode->crtc_clock >= 50000) |
602 | return 2; |
616 | return 2; |
603 | else |
617 | else |
604 | return 4; |
618 | return 4; |
605 | } |
619 | } |
606 | 620 | ||
607 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
621 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
608 | u8 ddc_bus) |
622 | u8 ddc_bus) |
609 | { |
623 | { |
610 | /* This must be the immediately preceding write before the i2c xfer */ |
624 | /* This must be the immediately preceding write before the i2c xfer */ |
611 | return intel_sdvo_write_cmd(intel_sdvo, |
625 | return intel_sdvo_write_cmd(intel_sdvo, |
612 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
626 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
613 | &ddc_bus, 1); |
627 | &ddc_bus, 1); |
614 | } |
628 | } |
615 | 629 | ||
616 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
630 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
617 | { |
631 | { |
618 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
632 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
619 | return false; |
633 | return false; |
620 | 634 | ||
621 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
635 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); |
622 | } |
636 | } |
623 | 637 | ||
624 | static bool |
638 | static bool |
625 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
639 | intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) |
626 | { |
640 | { |
627 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
641 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) |
628 | return false; |
642 | return false; |
629 | 643 | ||
630 | return intel_sdvo_read_response(intel_sdvo, value, len); |
644 | return intel_sdvo_read_response(intel_sdvo, value, len); |
631 | } |
645 | } |
632 | 646 | ||
633 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
647 | static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) |
634 | { |
648 | { |
635 | struct intel_sdvo_set_target_input_args targets = {0}; |
649 | struct intel_sdvo_set_target_input_args targets = {0}; |
636 | return intel_sdvo_set_value(intel_sdvo, |
650 | return intel_sdvo_set_value(intel_sdvo, |
637 | SDVO_CMD_SET_TARGET_INPUT, |
651 | SDVO_CMD_SET_TARGET_INPUT, |
638 | &targets, sizeof(targets)); |
652 | &targets, sizeof(targets)); |
639 | } |
653 | } |
640 | 654 | ||
641 | /** |
655 | /** |
642 | * Return whether each input is trained. |
656 | * Return whether each input is trained. |
643 | * |
657 | * |
644 | * This function is making an assumption about the layout of the response, |
658 | * This function is making an assumption about the layout of the response, |
645 | * which should be checked against the docs. |
659 | * which should be checked against the docs. |
646 | */ |
660 | */ |
647 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
661 | static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) |
648 | { |
662 | { |
649 | struct intel_sdvo_get_trained_inputs_response response; |
663 | struct intel_sdvo_get_trained_inputs_response response; |
650 | 664 | ||
651 | BUILD_BUG_ON(sizeof(response) != 1); |
665 | BUILD_BUG_ON(sizeof(response) != 1); |
652 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
666 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, |
653 | &response, sizeof(response))) |
667 | &response, sizeof(response))) |
654 | return false; |
668 | return false; |
655 | 669 | ||
656 | *input_1 = response.input0_trained; |
670 | *input_1 = response.input0_trained; |
657 | *input_2 = response.input1_trained; |
671 | *input_2 = response.input1_trained; |
658 | return true; |
672 | return true; |
659 | } |
673 | } |
660 | 674 | ||
661 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
675 | static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, |
662 | u16 outputs) |
676 | u16 outputs) |
663 | { |
677 | { |
664 | return intel_sdvo_set_value(intel_sdvo, |
678 | return intel_sdvo_set_value(intel_sdvo, |
665 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
679 | SDVO_CMD_SET_ACTIVE_OUTPUTS, |
666 | &outputs, sizeof(outputs)); |
680 | &outputs, sizeof(outputs)); |
667 | } |
681 | } |
668 | 682 | ||
669 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
683 | static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, |
670 | u16 *outputs) |
684 | u16 *outputs) |
671 | { |
685 | { |
672 | return intel_sdvo_get_value(intel_sdvo, |
686 | return intel_sdvo_get_value(intel_sdvo, |
673 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
687 | SDVO_CMD_GET_ACTIVE_OUTPUTS, |
674 | outputs, sizeof(*outputs)); |
688 | outputs, sizeof(*outputs)); |
675 | } |
689 | } |
676 | 690 | ||
677 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
691 | static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, |
678 | int mode) |
692 | int mode) |
679 | { |
693 | { |
680 | u8 state = SDVO_ENCODER_STATE_ON; |
694 | u8 state = SDVO_ENCODER_STATE_ON; |
681 | 695 | ||
682 | switch (mode) { |
696 | switch (mode) { |
683 | case DRM_MODE_DPMS_ON: |
697 | case DRM_MODE_DPMS_ON: |
684 | state = SDVO_ENCODER_STATE_ON; |
698 | state = SDVO_ENCODER_STATE_ON; |
685 | break; |
699 | break; |
686 | case DRM_MODE_DPMS_STANDBY: |
700 | case DRM_MODE_DPMS_STANDBY: |
687 | state = SDVO_ENCODER_STATE_STANDBY; |
701 | state = SDVO_ENCODER_STATE_STANDBY; |
688 | break; |
702 | break; |
689 | case DRM_MODE_DPMS_SUSPEND: |
703 | case DRM_MODE_DPMS_SUSPEND: |
690 | state = SDVO_ENCODER_STATE_SUSPEND; |
704 | state = SDVO_ENCODER_STATE_SUSPEND; |
691 | break; |
705 | break; |
692 | case DRM_MODE_DPMS_OFF: |
706 | case DRM_MODE_DPMS_OFF: |
693 | state = SDVO_ENCODER_STATE_OFF; |
707 | state = SDVO_ENCODER_STATE_OFF; |
694 | break; |
708 | break; |
695 | } |
709 | } |
696 | 710 | ||
697 | return intel_sdvo_set_value(intel_sdvo, |
711 | return intel_sdvo_set_value(intel_sdvo, |
698 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
712 | SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); |
699 | } |
713 | } |
700 | 714 | ||
701 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
715 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, |
702 | int *clock_min, |
716 | int *clock_min, |
703 | int *clock_max) |
717 | int *clock_max) |
704 | { |
718 | { |
705 | struct intel_sdvo_pixel_clock_range clocks; |
719 | struct intel_sdvo_pixel_clock_range clocks; |
706 | 720 | ||
707 | BUILD_BUG_ON(sizeof(clocks) != 4); |
721 | BUILD_BUG_ON(sizeof(clocks) != 4); |
708 | if (!intel_sdvo_get_value(intel_sdvo, |
722 | if (!intel_sdvo_get_value(intel_sdvo, |
709 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
723 | SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
710 | &clocks, sizeof(clocks))) |
724 | &clocks, sizeof(clocks))) |
711 | return false; |
725 | return false; |
712 | 726 | ||
713 | /* Convert the values from units of 10 kHz to kHz. */ |
727 | /* Convert the values from units of 10 kHz to kHz. */ |
714 | *clock_min = clocks.min * 10; |
728 | *clock_min = clocks.min * 10; |
715 | *clock_max = clocks.max * 10; |
729 | *clock_max = clocks.max * 10; |
716 | return true; |
730 | return true; |
717 | } |
731 | } |
718 | 732 | ||
719 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
733 | static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, |
720 | u16 outputs) |
734 | u16 outputs) |
721 | { |
735 | { |
722 | return intel_sdvo_set_value(intel_sdvo, |
736 | return intel_sdvo_set_value(intel_sdvo, |
723 | SDVO_CMD_SET_TARGET_OUTPUT, |
737 | SDVO_CMD_SET_TARGET_OUTPUT, |
724 | &outputs, sizeof(outputs)); |
738 | &outputs, sizeof(outputs)); |
725 | } |
739 | } |
726 | 740 | ||
727 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
741 | static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
728 | struct intel_sdvo_dtd *dtd) |
742 | struct intel_sdvo_dtd *dtd) |
729 | { |
743 | { |
730 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
744 | return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
731 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
745 | intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
732 | } |
746 | } |
733 | 747 | ||
734 | static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
748 | static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, |
735 | struct intel_sdvo_dtd *dtd) |
749 | struct intel_sdvo_dtd *dtd) |
736 | { |
750 | { |
737 | return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
751 | return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && |
738 | intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
752 | intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
739 | } |
753 | } |
740 | 754 | ||
741 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
755 | static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, |
742 | struct intel_sdvo_dtd *dtd) |
756 | struct intel_sdvo_dtd *dtd) |
743 | { |
757 | { |
744 | return intel_sdvo_set_timing(intel_sdvo, |
758 | return intel_sdvo_set_timing(intel_sdvo, |
745 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
759 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
746 | } |
760 | } |
747 | 761 | ||
748 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
762 | static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, |
749 | struct intel_sdvo_dtd *dtd) |
763 | struct intel_sdvo_dtd *dtd) |
750 | { |
764 | { |
751 | return intel_sdvo_set_timing(intel_sdvo, |
765 | return intel_sdvo_set_timing(intel_sdvo, |
752 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
766 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
753 | } |
767 | } |
754 | 768 | ||
755 | static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, |
769 | static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, |
756 | struct intel_sdvo_dtd *dtd) |
770 | struct intel_sdvo_dtd *dtd) |
757 | { |
771 | { |
758 | return intel_sdvo_get_timing(intel_sdvo, |
772 | return intel_sdvo_get_timing(intel_sdvo, |
759 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); |
773 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); |
760 | } |
774 | } |
761 | 775 | ||
762 | static bool |
776 | static bool |
763 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
777 | intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
764 | uint16_t clock, |
778 | uint16_t clock, |
765 | uint16_t width, |
779 | uint16_t width, |
766 | uint16_t height) |
780 | uint16_t height) |
767 | { |
781 | { |
768 | struct intel_sdvo_preferred_input_timing_args args; |
782 | struct intel_sdvo_preferred_input_timing_args args; |
769 | 783 | ||
770 | memset(&args, 0, sizeof(args)); |
784 | memset(&args, 0, sizeof(args)); |
771 | args.clock = clock; |
785 | args.clock = clock; |
772 | args.width = width; |
786 | args.width = width; |
773 | args.height = height; |
787 | args.height = height; |
774 | args.interlace = 0; |
788 | args.interlace = 0; |
775 | 789 | ||
776 | if (intel_sdvo->is_lvds && |
790 | if (intel_sdvo->is_lvds && |
777 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
791 | (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || |
778 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
792 | intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) |
779 | args.scaled = 1; |
793 | args.scaled = 1; |
780 | 794 | ||
781 | return intel_sdvo_set_value(intel_sdvo, |
795 | return intel_sdvo_set_value(intel_sdvo, |
782 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
796 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, |
783 | &args, sizeof(args)); |
797 | &args, sizeof(args)); |
784 | } |
798 | } |
785 | 799 | ||
786 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
800 | static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, |
787 | struct intel_sdvo_dtd *dtd) |
801 | struct intel_sdvo_dtd *dtd) |
788 | { |
802 | { |
789 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
803 | BUILD_BUG_ON(sizeof(dtd->part1) != 8); |
790 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
804 | BUILD_BUG_ON(sizeof(dtd->part2) != 8); |
791 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
805 | return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
792 | &dtd->part1, sizeof(dtd->part1)) && |
806 | &dtd->part1, sizeof(dtd->part1)) && |
793 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
807 | intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
794 | &dtd->part2, sizeof(dtd->part2)); |
808 | &dtd->part2, sizeof(dtd->part2)); |
795 | } |
809 | } |
796 | 810 | ||
797 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
811 | static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) |
798 | { |
812 | { |
799 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
813 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
800 | } |
814 | } |
801 | 815 | ||
802 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
816 | static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, |
803 | const struct drm_display_mode *mode) |
817 | const struct drm_display_mode *mode) |
804 | { |
818 | { |
805 | uint16_t width, height; |
819 | uint16_t width, height; |
806 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
820 | uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; |
807 | uint16_t h_sync_offset, v_sync_offset; |
821 | uint16_t h_sync_offset, v_sync_offset; |
808 | int mode_clock; |
822 | int mode_clock; |
809 | 823 | ||
810 | memset(dtd, 0, sizeof(*dtd)); |
824 | memset(dtd, 0, sizeof(*dtd)); |
811 | 825 | ||
812 | width = mode->hdisplay; |
826 | width = mode->hdisplay; |
813 | height = mode->vdisplay; |
827 | height = mode->vdisplay; |
814 | 828 | ||
815 | /* do some mode translations */ |
829 | /* do some mode translations */ |
816 | h_blank_len = mode->htotal - mode->hdisplay; |
830 | h_blank_len = mode->htotal - mode->hdisplay; |
817 | h_sync_len = mode->hsync_end - mode->hsync_start; |
831 | h_sync_len = mode->hsync_end - mode->hsync_start; |
818 | 832 | ||
819 | v_blank_len = mode->vtotal - mode->vdisplay; |
833 | v_blank_len = mode->vtotal - mode->vdisplay; |
820 | v_sync_len = mode->vsync_end - mode->vsync_start; |
834 | v_sync_len = mode->vsync_end - mode->vsync_start; |
821 | 835 | ||
822 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
836 | h_sync_offset = mode->hsync_start - mode->hdisplay; |
823 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
837 | v_sync_offset = mode->vsync_start - mode->vdisplay; |
824 | 838 | ||
825 | mode_clock = mode->clock; |
839 | mode_clock = mode->clock; |
826 | mode_clock /= 10; |
840 | mode_clock /= 10; |
827 | dtd->part1.clock = mode_clock; |
841 | dtd->part1.clock = mode_clock; |
828 | 842 | ||
829 | dtd->part1.h_active = width & 0xff; |
843 | dtd->part1.h_active = width & 0xff; |
830 | dtd->part1.h_blank = h_blank_len & 0xff; |
844 | dtd->part1.h_blank = h_blank_len & 0xff; |
831 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
845 | dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | |
832 | ((h_blank_len >> 8) & 0xf); |
846 | ((h_blank_len >> 8) & 0xf); |
833 | dtd->part1.v_active = height & 0xff; |
847 | dtd->part1.v_active = height & 0xff; |
834 | dtd->part1.v_blank = v_blank_len & 0xff; |
848 | dtd->part1.v_blank = v_blank_len & 0xff; |
835 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
849 | dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | |
836 | ((v_blank_len >> 8) & 0xf); |
850 | ((v_blank_len >> 8) & 0xf); |
837 | 851 | ||
838 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
852 | dtd->part2.h_sync_off = h_sync_offset & 0xff; |
839 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
853 | dtd->part2.h_sync_width = h_sync_len & 0xff; |
840 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
854 | dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | |
841 | (v_sync_len & 0xf); |
855 | (v_sync_len & 0xf); |
842 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
856 | dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | |
843 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
857 | ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | |
844 | ((v_sync_len & 0x30) >> 4); |
858 | ((v_sync_len & 0x30) >> 4); |
845 | 859 | ||
846 | dtd->part2.dtd_flags = 0x18; |
860 | dtd->part2.dtd_flags = 0x18; |
847 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
861 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
848 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
862 | dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; |
849 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
863 | if (mode->flags & DRM_MODE_FLAG_PHSYNC) |
850 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
864 | dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; |
851 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
865 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
852 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
866 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
853 | 867 | ||
854 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
868 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
855 | } |
869 | } |
856 | 870 | ||
857 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, |
871 | static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, |
858 | const struct intel_sdvo_dtd *dtd) |
872 | const struct intel_sdvo_dtd *dtd) |
859 | { |
873 | { |
860 | struct drm_display_mode mode = {}; |
874 | struct drm_display_mode mode = {}; |
861 | 875 | ||
862 | mode.hdisplay = dtd->part1.h_active; |
876 | mode.hdisplay = dtd->part1.h_active; |
863 | mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
877 | mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; |
864 | mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; |
878 | mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; |
865 | mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
879 | mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; |
866 | mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; |
880 | mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; |
867 | mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
881 | mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; |
868 | mode.htotal = mode.hdisplay + dtd->part1.h_blank; |
882 | mode.htotal = mode.hdisplay + dtd->part1.h_blank; |
869 | mode.htotal += (dtd->part1.h_high & 0xf) << 8; |
883 | mode.htotal += (dtd->part1.h_high & 0xf) << 8; |
870 | 884 | ||
871 | mode.vdisplay = dtd->part1.v_active; |
885 | mode.vdisplay = dtd->part1.v_active; |
872 | mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
886 | mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; |
873 | mode.vsync_start = mode.vdisplay; |
887 | mode.vsync_start = mode.vdisplay; |
874 | mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
888 | mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; |
875 | mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
889 | mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; |
876 | mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
890 | mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; |
877 | mode.vsync_end = mode.vsync_start + |
891 | mode.vsync_end = mode.vsync_start + |
878 | (dtd->part2.v_sync_off_width & 0xf); |
892 | (dtd->part2.v_sync_off_width & 0xf); |
879 | mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
893 | mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; |
880 | mode.vtotal = mode.vdisplay + dtd->part1.v_blank; |
894 | mode.vtotal = mode.vdisplay + dtd->part1.v_blank; |
881 | mode.vtotal += (dtd->part1.v_high & 0xf) << 8; |
895 | mode.vtotal += (dtd->part1.v_high & 0xf) << 8; |
882 | 896 | ||
883 | mode.clock = dtd->part1.clock * 10; |
897 | mode.clock = dtd->part1.clock * 10; |
884 | 898 | ||
885 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
899 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
886 | mode.flags |= DRM_MODE_FLAG_INTERLACE; |
900 | mode.flags |= DRM_MODE_FLAG_INTERLACE; |
887 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
901 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
888 | mode.flags |= DRM_MODE_FLAG_PHSYNC; |
902 | mode.flags |= DRM_MODE_FLAG_PHSYNC; |
889 | else |
903 | else |
890 | mode.flags |= DRM_MODE_FLAG_NHSYNC; |
904 | mode.flags |= DRM_MODE_FLAG_NHSYNC; |
891 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
905 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
892 | mode.flags |= DRM_MODE_FLAG_PVSYNC; |
906 | mode.flags |= DRM_MODE_FLAG_PVSYNC; |
893 | else |
907 | else |
894 | mode.flags |= DRM_MODE_FLAG_NVSYNC; |
908 | mode.flags |= DRM_MODE_FLAG_NVSYNC; |
895 | 909 | ||
896 | drm_mode_set_crtcinfo(&mode, 0); |
910 | drm_mode_set_crtcinfo(&mode, 0); |
897 | 911 | ||
898 | drm_mode_copy(pmode, &mode); |
912 | drm_mode_copy(pmode, &mode); |
899 | } |
913 | } |
900 | 914 | ||
901 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
915 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
902 | { |
916 | { |
903 | struct intel_sdvo_encode encode; |
917 | struct intel_sdvo_encode encode; |
904 | 918 | ||
905 | BUILD_BUG_ON(sizeof(encode) != 2); |
919 | BUILD_BUG_ON(sizeof(encode) != 2); |
906 | return intel_sdvo_get_value(intel_sdvo, |
920 | return intel_sdvo_get_value(intel_sdvo, |
907 | SDVO_CMD_GET_SUPP_ENCODE, |
921 | SDVO_CMD_GET_SUPP_ENCODE, |
908 | &encode, sizeof(encode)); |
922 | &encode, sizeof(encode)); |
909 | } |
923 | } |
910 | 924 | ||
911 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
925 | static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, |
912 | uint8_t mode) |
926 | uint8_t mode) |
913 | { |
927 | { |
914 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
928 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); |
915 | } |
929 | } |
916 | 930 | ||
917 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
931 | static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, |
918 | uint8_t mode) |
932 | uint8_t mode) |
919 | { |
933 | { |
920 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
934 | return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
921 | } |
935 | } |
922 | 936 | ||
923 | #if 0 |
937 | #if 0 |
924 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
938 | static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) |
925 | { |
939 | { |
926 | int i, j; |
940 | int i, j; |
927 | uint8_t set_buf_index[2]; |
941 | uint8_t set_buf_index[2]; |
928 | uint8_t av_split; |
942 | uint8_t av_split; |
929 | uint8_t buf_size; |
943 | uint8_t buf_size; |
930 | uint8_t buf[48]; |
944 | uint8_t buf[48]; |
931 | uint8_t *pos; |
945 | uint8_t *pos; |
932 | 946 | ||
933 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
947 | intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); |
934 | 948 | ||
935 | for (i = 0; i <= av_split; i++) { |
949 | for (i = 0; i <= av_split; i++) { |
936 | set_buf_index[0] = i; set_buf_index[1] = 0; |
950 | set_buf_index[0] = i; set_buf_index[1] = 0; |
937 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
951 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
938 | set_buf_index, 2); |
952 | set_buf_index, 2); |
939 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
953 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
940 | intel_sdvo_read_response(encoder, &buf_size, 1); |
954 | intel_sdvo_read_response(encoder, &buf_size, 1); |
941 | 955 | ||
942 | pos = buf; |
956 | pos = buf; |
943 | for (j = 0; j <= buf_size; j += 8) { |
957 | for (j = 0; j <= buf_size; j += 8) { |
944 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
958 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
945 | NULL, 0); |
959 | NULL, 0); |
946 | intel_sdvo_read_response(encoder, pos, 8); |
960 | intel_sdvo_read_response(encoder, pos, 8); |
947 | pos += 8; |
961 | pos += 8; |
948 | } |
962 | } |
949 | } |
963 | } |
950 | } |
964 | } |
951 | #endif |
965 | #endif |
952 | 966 | ||
953 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
967 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, |
954 | unsigned if_index, uint8_t tx_rate, |
968 | unsigned if_index, uint8_t tx_rate, |
955 | const uint8_t *data, unsigned length) |
969 | const uint8_t *data, unsigned length) |
956 | { |
970 | { |
957 | uint8_t set_buf_index[2] = { if_index, 0 }; |
971 | uint8_t set_buf_index[2] = { if_index, 0 }; |
958 | uint8_t hbuf_size, tmp[8]; |
972 | uint8_t hbuf_size, tmp[8]; |
959 | int i; |
973 | int i; |
960 | 974 | ||
961 | if (!intel_sdvo_set_value(intel_sdvo, |
975 | if (!intel_sdvo_set_value(intel_sdvo, |
962 | SDVO_CMD_SET_HBUF_INDEX, |
976 | SDVO_CMD_SET_HBUF_INDEX, |
963 | set_buf_index, 2)) |
977 | set_buf_index, 2)) |
964 | return false; |
978 | return false; |
965 | 979 | ||
966 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
980 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, |
967 | &hbuf_size, 1)) |
981 | &hbuf_size, 1)) |
968 | return false; |
982 | return false; |
969 | 983 | ||
970 | /* Buffer size is 0 based, hooray! */ |
984 | /* Buffer size is 0 based, hooray! */ |
971 | hbuf_size++; |
985 | hbuf_size++; |
972 | 986 | ||
973 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
987 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", |
974 | if_index, length, hbuf_size); |
988 | if_index, length, hbuf_size); |
975 | 989 | ||
976 | for (i = 0; i < hbuf_size; i += 8) { |
990 | for (i = 0; i < hbuf_size; i += 8) { |
977 | memset(tmp, 0, 8); |
991 | memset(tmp, 0, 8); |
978 | if (i < length) |
992 | if (i < length) |
979 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
993 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); |
980 | 994 | ||
981 | if (!intel_sdvo_set_value(intel_sdvo, |
995 | if (!intel_sdvo_set_value(intel_sdvo, |
982 | SDVO_CMD_SET_HBUF_DATA, |
996 | SDVO_CMD_SET_HBUF_DATA, |
983 | tmp, 8)) |
997 | tmp, 8)) |
984 | return false; |
998 | return false; |
985 | } |
999 | } |
986 | 1000 | ||
987 | return intel_sdvo_set_value(intel_sdvo, |
1001 | return intel_sdvo_set_value(intel_sdvo, |
988 | SDVO_CMD_SET_HBUF_TXRATE, |
1002 | SDVO_CMD_SET_HBUF_TXRATE, |
989 | &tx_rate, 1); |
1003 | &tx_rate, 1); |
990 | } |
1004 | } |
991 | 1005 | ||
992 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, |
1006 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, |
993 | const struct drm_display_mode *adjusted_mode) |
1007 | const struct drm_display_mode *adjusted_mode) |
994 | { |
1008 | { |
995 | uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; |
1009 | uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; |
996 | struct drm_crtc *crtc = intel_sdvo->base.base.crtc; |
1010 | struct drm_crtc *crtc = intel_sdvo->base.base.crtc; |
997 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1011 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
998 | union hdmi_infoframe frame; |
1012 | union hdmi_infoframe frame; |
999 | int ret; |
1013 | int ret; |
1000 | ssize_t len; |
1014 | ssize_t len; |
1001 | 1015 | ||
1002 | ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, |
1016 | ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, |
1003 | adjusted_mode); |
1017 | adjusted_mode); |
1004 | if (ret < 0) { |
1018 | if (ret < 0) { |
1005 | DRM_ERROR("couldn't fill AVI infoframe\n"); |
1019 | DRM_ERROR("couldn't fill AVI infoframe\n"); |
1006 | return false; |
1020 | return false; |
1007 | } |
1021 | } |
1008 | 1022 | ||
1009 | if (intel_sdvo->rgb_quant_range_selectable) { |
1023 | if (intel_sdvo->rgb_quant_range_selectable) { |
1010 | if (intel_crtc->config.limited_color_range) |
1024 | if (intel_crtc->config->limited_color_range) |
1011 | frame.avi.quantization_range = |
1025 | frame.avi.quantization_range = |
1012 | HDMI_QUANTIZATION_RANGE_LIMITED; |
1026 | HDMI_QUANTIZATION_RANGE_LIMITED; |
1013 | else |
1027 | else |
1014 | frame.avi.quantization_range = |
1028 | frame.avi.quantization_range = |
1015 | HDMI_QUANTIZATION_RANGE_FULL; |
1029 | HDMI_QUANTIZATION_RANGE_FULL; |
1016 | } |
1030 | } |
1017 | 1031 | ||
1018 | len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data)); |
1032 | len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data)); |
1019 | if (len < 0) |
1033 | if (len < 0) |
1020 | return false; |
1034 | return false; |
1021 | 1035 | ||
1022 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
1036 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
1023 | SDVO_HBUF_TX_VSYNC, |
1037 | SDVO_HBUF_TX_VSYNC, |
1024 | sdvo_data, sizeof(sdvo_data)); |
1038 | sdvo_data, sizeof(sdvo_data)); |
1025 | } |
1039 | } |
1026 | 1040 | ||
1027 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
1041 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
1028 | { |
1042 | { |
1029 | struct intel_sdvo_tv_format format; |
1043 | struct intel_sdvo_tv_format format; |
1030 | uint32_t format_map; |
1044 | uint32_t format_map; |
1031 | 1045 | ||
1032 | format_map = 1 << intel_sdvo->tv_format_index; |
1046 | format_map = 1 << intel_sdvo->tv_format_index; |
1033 | memset(&format, 0, sizeof(format)); |
1047 | memset(&format, 0, sizeof(format)); |
1034 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
1048 | memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); |
1035 | 1049 | ||
1036 | BUILD_BUG_ON(sizeof(format) != 6); |
1050 | BUILD_BUG_ON(sizeof(format) != 6); |
1037 | return intel_sdvo_set_value(intel_sdvo, |
1051 | return intel_sdvo_set_value(intel_sdvo, |
1038 | SDVO_CMD_SET_TV_FORMAT, |
1052 | SDVO_CMD_SET_TV_FORMAT, |
1039 | &format, sizeof(format)); |
1053 | &format, sizeof(format)); |
1040 | } |
1054 | } |
1041 | 1055 | ||
1042 | static bool |
1056 | static bool |
1043 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
1057 | intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, |
1044 | const struct drm_display_mode *mode) |
1058 | const struct drm_display_mode *mode) |
1045 | { |
1059 | { |
1046 | struct intel_sdvo_dtd output_dtd; |
1060 | struct intel_sdvo_dtd output_dtd; |
1047 | 1061 | ||
1048 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1062 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1049 | intel_sdvo->attached_output)) |
1063 | intel_sdvo->attached_output)) |
1050 | return false; |
1064 | return false; |
1051 | 1065 | ||
1052 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1066 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1053 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1067 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1054 | return false; |
1068 | return false; |
1055 | 1069 | ||
1056 | return true; |
1070 | return true; |
1057 | } |
1071 | } |
1058 | 1072 | ||
1059 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
1073 | /* Asks the sdvo controller for the preferred input mode given the output mode. |
1060 | * Unfortunately we have to set up the full output mode to do that. */ |
1074 | * Unfortunately we have to set up the full output mode to do that. */ |
1061 | static bool |
1075 | static bool |
1062 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1076 | intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, |
1063 | const struct drm_display_mode *mode, |
1077 | const struct drm_display_mode *mode, |
1064 | struct drm_display_mode *adjusted_mode) |
1078 | struct drm_display_mode *adjusted_mode) |
1065 | { |
1079 | { |
1066 | struct intel_sdvo_dtd input_dtd; |
1080 | struct intel_sdvo_dtd input_dtd; |
1067 | 1081 | ||
1068 | /* Reset the input timing to the screen. Assume always input 0. */ |
1082 | /* Reset the input timing to the screen. Assume always input 0. */ |
1069 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1083 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1070 | return false; |
1084 | return false; |
1071 | 1085 | ||
1072 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1086 | if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, |
1073 | mode->clock / 10, |
1087 | mode->clock / 10, |
1074 | mode->hdisplay, |
1088 | mode->hdisplay, |
1075 | mode->vdisplay)) |
1089 | mode->vdisplay)) |
1076 | return false; |
1090 | return false; |
1077 | 1091 | ||
1078 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1092 | if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, |
1079 | &input_dtd)) |
1093 | &input_dtd)) |
1080 | return false; |
1094 | return false; |
1081 | 1095 | ||
1082 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1096 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1083 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1097 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1084 | 1098 | ||
1085 | return true; |
1099 | return true; |
1086 | } |
1100 | } |
1087 | 1101 | ||
1088 | static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config) |
1102 | static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) |
1089 | { |
1103 | { |
1090 | unsigned dotclock = pipe_config->port_clock; |
1104 | unsigned dotclock = pipe_config->port_clock; |
1091 | struct dpll *clock = &pipe_config->dpll; |
1105 | struct dpll *clock = &pipe_config->dpll; |
1092 | 1106 | ||
1093 | /* SDVO TV has fixed PLL values depend on its clock range, |
1107 | /* SDVO TV has fixed PLL values depend on its clock range, |
1094 | this mirrors vbios setting. */ |
1108 | this mirrors vbios setting. */ |
1095 | if (dotclock >= 100000 && dotclock < 140500) { |
1109 | if (dotclock >= 100000 && dotclock < 140500) { |
1096 | clock->p1 = 2; |
1110 | clock->p1 = 2; |
1097 | clock->p2 = 10; |
1111 | clock->p2 = 10; |
1098 | clock->n = 3; |
1112 | clock->n = 3; |
1099 | clock->m1 = 16; |
1113 | clock->m1 = 16; |
1100 | clock->m2 = 8; |
1114 | clock->m2 = 8; |
1101 | } else if (dotclock >= 140500 && dotclock <= 200000) { |
1115 | } else if (dotclock >= 140500 && dotclock <= 200000) { |
1102 | clock->p1 = 1; |
1116 | clock->p1 = 1; |
1103 | clock->p2 = 10; |
1117 | clock->p2 = 10; |
1104 | clock->n = 6; |
1118 | clock->n = 6; |
1105 | clock->m1 = 12; |
1119 | clock->m1 = 12; |
1106 | clock->m2 = 8; |
1120 | clock->m2 = 8; |
1107 | } else { |
1121 | } else { |
1108 | WARN(1, "SDVO TV clock out of range: %i\n", dotclock); |
1122 | WARN(1, "SDVO TV clock out of range: %i\n", dotclock); |
1109 | } |
1123 | } |
1110 | 1124 | ||
1111 | pipe_config->clock_set = true; |
1125 | pipe_config->clock_set = true; |
1112 | } |
1126 | } |
1113 | 1127 | ||
1114 | static bool intel_sdvo_compute_config(struct intel_encoder *encoder, |
1128 | static bool intel_sdvo_compute_config(struct intel_encoder *encoder, |
1115 | struct intel_crtc_config *pipe_config) |
1129 | struct intel_crtc_state *pipe_config) |
1116 | { |
1130 | { |
1117 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1131 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1118 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; |
1132 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
1119 | struct drm_display_mode *mode = &pipe_config->requested_mode; |
1133 | struct drm_display_mode *mode = &pipe_config->base.mode; |
1120 | 1134 | ||
1121 | DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); |
1135 | DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); |
1122 | pipe_config->pipe_bpp = 8*3; |
1136 | pipe_config->pipe_bpp = 8*3; |
1123 | 1137 | ||
1124 | if (HAS_PCH_SPLIT(encoder->base.dev)) |
1138 | if (HAS_PCH_SPLIT(encoder->base.dev)) |
1125 | pipe_config->has_pch_encoder = true; |
1139 | pipe_config->has_pch_encoder = true; |
1126 | 1140 | ||
1127 | /* We need to construct preferred input timings based on our |
1141 | /* We need to construct preferred input timings based on our |
1128 | * output timings. To do that, we have to set the output |
1142 | * output timings. To do that, we have to set the output |
1129 | * timings, even though this isn't really the right place in |
1143 | * timings, even though this isn't really the right place in |
1130 | * the sequence to do it. Oh well. |
1144 | * the sequence to do it. Oh well. |
1131 | */ |
1145 | */ |
1132 | if (intel_sdvo->is_tv) { |
1146 | if (intel_sdvo->is_tv) { |
1133 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1147 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) |
1134 | return false; |
1148 | return false; |
1135 | 1149 | ||
1136 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1150 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1137 | mode, |
1151 | mode, |
1138 | adjusted_mode); |
1152 | adjusted_mode); |
1139 | pipe_config->sdvo_tv_clock = true; |
1153 | pipe_config->sdvo_tv_clock = true; |
1140 | } else if (intel_sdvo->is_lvds) { |
1154 | } else if (intel_sdvo->is_lvds) { |
1141 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1155 | if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, |
1142 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1156 | intel_sdvo->sdvo_lvds_fixed_mode)) |
1143 | return false; |
1157 | return false; |
1144 | 1158 | ||
1145 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1159 | (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, |
1146 | mode, |
1160 | mode, |
1147 | adjusted_mode); |
1161 | adjusted_mode); |
1148 | } |
1162 | } |
1149 | 1163 | ||
1150 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1164 | /* Make the CRTC code factor in the SDVO pixel multiplier. The |
1151 | * SDVO device will factor out the multiplier during mode_set. |
1165 | * SDVO device will factor out the multiplier during mode_set. |
1152 | */ |
1166 | */ |
1153 | pipe_config->pixel_multiplier = |
1167 | pipe_config->pixel_multiplier = |
1154 | intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1168 | intel_sdvo_get_pixel_multiplier(adjusted_mode); |
1155 | 1169 | ||
1156 | pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor; |
1170 | pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor; |
1157 | 1171 | ||
1158 | if (intel_sdvo->color_range_auto) { |
1172 | if (intel_sdvo->color_range_auto) { |
1159 | /* See CEA-861-E - 5.1 Default Encoding Parameters */ |
1173 | /* See CEA-861-E - 5.1 Default Encoding Parameters */ |
1160 | /* FIXME: This bit is only valid when using TMDS encoding and 8 |
1174 | /* FIXME: This bit is only valid when using TMDS encoding and 8 |
1161 | * bit per color mode. */ |
1175 | * bit per color mode. */ |
1162 | if (pipe_config->has_hdmi_sink && |
1176 | if (pipe_config->has_hdmi_sink && |
1163 | drm_match_cea_mode(adjusted_mode) > 1) |
1177 | drm_match_cea_mode(adjusted_mode) > 1) |
1164 | pipe_config->limited_color_range = true; |
1178 | pipe_config->limited_color_range = true; |
1165 | } else { |
1179 | } else { |
1166 | if (pipe_config->has_hdmi_sink && |
1180 | if (pipe_config->has_hdmi_sink && |
1167 | intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235) |
1181 | intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235) |
1168 | pipe_config->limited_color_range = true; |
1182 | pipe_config->limited_color_range = true; |
1169 | } |
1183 | } |
1170 | 1184 | ||
1171 | /* Clock computation needs to happen after pixel multiplier. */ |
1185 | /* Clock computation needs to happen after pixel multiplier. */ |
1172 | if (intel_sdvo->is_tv) |
1186 | if (intel_sdvo->is_tv) |
1173 | i9xx_adjust_sdvo_tv_clock(pipe_config); |
1187 | i9xx_adjust_sdvo_tv_clock(pipe_config); |
- | 1188 | ||
- | 1189 | /* Set user selected PAR to incoming mode's member */ |
|
- | 1190 | if (intel_sdvo->is_hdmi) |
|
- | 1191 | adjusted_mode->picture_aspect_ratio = intel_sdvo->aspect_ratio; |
|
1174 | 1192 | ||
1175 | return true; |
1193 | return true; |
1176 | } |
1194 | } |
1177 | 1195 | ||
1178 | static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder) |
1196 | static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder) |
1179 | { |
1197 | { |
1180 | struct drm_device *dev = intel_encoder->base.dev; |
1198 | struct drm_device *dev = intel_encoder->base.dev; |
1181 | struct drm_i915_private *dev_priv = dev->dev_private; |
1199 | struct drm_i915_private *dev_priv = dev->dev_private; |
1182 | struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); |
1200 | struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); |
1183 | struct drm_display_mode *adjusted_mode = |
1201 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
1184 | &crtc->config.adjusted_mode; |
- | |
1185 | struct drm_display_mode *mode = &crtc->config.requested_mode; |
1202 | struct drm_display_mode *mode = &crtc->config->base.mode; |
1186 | struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); |
1203 | struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); |
1187 | u32 sdvox; |
1204 | u32 sdvox; |
1188 | struct intel_sdvo_in_out_map in_out; |
1205 | struct intel_sdvo_in_out_map in_out; |
1189 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1206 | struct intel_sdvo_dtd input_dtd, output_dtd; |
1190 | int rate; |
1207 | int rate; |
1191 | 1208 | ||
1192 | if (!mode) |
1209 | if (!mode) |
1193 | return; |
1210 | return; |
1194 | 1211 | ||
1195 | /* First, set the input mapping for the first input to our controlled |
1212 | /* First, set the input mapping for the first input to our controlled |
1196 | * output. This is only correct if we're a single-input device, in |
1213 | * output. This is only correct if we're a single-input device, in |
1197 | * which case the first input is the output from the appropriate SDVO |
1214 | * which case the first input is the output from the appropriate SDVO |
1198 | * channel on the motherboard. In a two-input device, the first input |
1215 | * channel on the motherboard. In a two-input device, the first input |
1199 | * will be SDVOB and the second SDVOC. |
1216 | * will be SDVOB and the second SDVOC. |
1200 | */ |
1217 | */ |
1201 | in_out.in0 = intel_sdvo->attached_output; |
1218 | in_out.in0 = intel_sdvo->attached_output; |
1202 | in_out.in1 = 0; |
1219 | in_out.in1 = 0; |
1203 | 1220 | ||
1204 | intel_sdvo_set_value(intel_sdvo, |
1221 | intel_sdvo_set_value(intel_sdvo, |
1205 | SDVO_CMD_SET_IN_OUT_MAP, |
1222 | SDVO_CMD_SET_IN_OUT_MAP, |
1206 | &in_out, sizeof(in_out)); |
1223 | &in_out, sizeof(in_out)); |
1207 | 1224 | ||
1208 | /* Set the output timings to the screen */ |
1225 | /* Set the output timings to the screen */ |
1209 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1226 | if (!intel_sdvo_set_target_output(intel_sdvo, |
1210 | intel_sdvo->attached_output)) |
1227 | intel_sdvo->attached_output)) |
1211 | return; |
1228 | return; |
1212 | 1229 | ||
1213 | /* lvds has a special fixed output timing. */ |
1230 | /* lvds has a special fixed output timing. */ |
1214 | if (intel_sdvo->is_lvds) |
1231 | if (intel_sdvo->is_lvds) |
1215 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1232 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1216 | intel_sdvo->sdvo_lvds_fixed_mode); |
1233 | intel_sdvo->sdvo_lvds_fixed_mode); |
1217 | else |
1234 | else |
1218 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1235 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1219 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1236 | if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) |
1220 | DRM_INFO("Setting output timings on %s failed\n", |
1237 | DRM_INFO("Setting output timings on %s failed\n", |
1221 | SDVO_NAME(intel_sdvo)); |
1238 | SDVO_NAME(intel_sdvo)); |
1222 | 1239 | ||
1223 | /* Set the input timing to the screen. Assume always input 0. */ |
1240 | /* Set the input timing to the screen. Assume always input 0. */ |
1224 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1241 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1225 | return; |
1242 | return; |
1226 | 1243 | ||
1227 | if (crtc->config.has_hdmi_sink) { |
1244 | if (crtc->config->has_hdmi_sink) { |
1228 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1245 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1229 | intel_sdvo_set_colorimetry(intel_sdvo, |
1246 | intel_sdvo_set_colorimetry(intel_sdvo, |
1230 | SDVO_COLORIMETRY_RGB256); |
1247 | SDVO_COLORIMETRY_RGB256); |
1231 | intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode); |
1248 | intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode); |
1232 | } else |
1249 | } else |
1233 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1250 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1234 | 1251 | ||
1235 | if (intel_sdvo->is_tv && |
1252 | if (intel_sdvo->is_tv && |
1236 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1253 | !intel_sdvo_set_tv_format(intel_sdvo)) |
1237 | return; |
1254 | return; |
1238 | 1255 | ||
1239 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1256 | intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); |
1240 | 1257 | ||
1241 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1258 | if (intel_sdvo->is_tv || intel_sdvo->is_lvds) |
1242 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1259 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1243 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1260 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1244 | DRM_INFO("Setting input timings on %s failed\n", |
1261 | DRM_INFO("Setting input timings on %s failed\n", |
1245 | SDVO_NAME(intel_sdvo)); |
1262 | SDVO_NAME(intel_sdvo)); |
1246 | 1263 | ||
1247 | switch (crtc->config.pixel_multiplier) { |
1264 | switch (crtc->config->pixel_multiplier) { |
1248 | default: |
1265 | default: |
1249 | WARN(1, "unknown pixel mutlipler specified\n"); |
1266 | WARN(1, "unknown pixel multiplier specified\n"); |
1250 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1267 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1251 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1268 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1252 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1269 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1253 | } |
1270 | } |
1254 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1271 | if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) |
1255 | return; |
1272 | return; |
1256 | 1273 | ||
1257 | /* Set the SDVO control regs. */ |
1274 | /* Set the SDVO control regs. */ |
1258 | if (INTEL_INFO(dev)->gen >= 4) { |
1275 | if (INTEL_INFO(dev)->gen >= 4) { |
1259 | /* The real mode polarity is set by the SDVO commands, using |
1276 | /* The real mode polarity is set by the SDVO commands, using |
1260 | * struct intel_sdvo_dtd. */ |
1277 | * struct intel_sdvo_dtd. */ |
1261 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1278 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1262 | if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range) |
1279 | if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range) |
1263 | sdvox |= HDMI_COLOR_RANGE_16_235; |
1280 | sdvox |= HDMI_COLOR_RANGE_16_235; |
1264 | if (INTEL_INFO(dev)->gen < 5) |
1281 | if (INTEL_INFO(dev)->gen < 5) |
1265 | sdvox |= SDVO_BORDER_ENABLE; |
1282 | sdvox |= SDVO_BORDER_ENABLE; |
1266 | } else { |
1283 | } else { |
1267 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1284 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1268 | switch (intel_sdvo->sdvo_reg) { |
1285 | switch (intel_sdvo->sdvo_reg) { |
1269 | case GEN3_SDVOB: |
1286 | case GEN3_SDVOB: |
1270 | sdvox &= SDVOB_PRESERVE_MASK; |
1287 | sdvox &= SDVOB_PRESERVE_MASK; |
1271 | break; |
1288 | break; |
1272 | case GEN3_SDVOC: |
1289 | case GEN3_SDVOC: |
1273 | sdvox &= SDVOC_PRESERVE_MASK; |
1290 | sdvox &= SDVOC_PRESERVE_MASK; |
1274 | break; |
1291 | break; |
1275 | } |
1292 | } |
1276 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1293 | sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; |
1277 | } |
1294 | } |
1278 | 1295 | ||
1279 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1296 | if (INTEL_PCH_TYPE(dev) >= PCH_CPT) |
1280 | sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); |
1297 | sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); |
1281 | else |
1298 | else |
1282 | sdvox |= SDVO_PIPE_SEL(crtc->pipe); |
1299 | sdvox |= SDVO_PIPE_SEL(crtc->pipe); |
1283 | 1300 | ||
1284 | if (intel_sdvo->has_hdmi_audio) |
1301 | if (intel_sdvo->has_hdmi_audio) |
1285 | sdvox |= SDVO_AUDIO_ENABLE; |
1302 | sdvox |= SDVO_AUDIO_ENABLE; |
1286 | 1303 | ||
1287 | if (INTEL_INFO(dev)->gen >= 4) { |
1304 | if (INTEL_INFO(dev)->gen >= 4) { |
1288 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1305 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1289 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1306 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1290 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1307 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1291 | } else { |
1308 | } else { |
1292 | sdvox |= (crtc->config.pixel_multiplier - 1) |
1309 | sdvox |= (crtc->config->pixel_multiplier - 1) |
1293 | << SDVO_PORT_MULTIPLY_SHIFT; |
1310 | << SDVO_PORT_MULTIPLY_SHIFT; |
1294 | } |
1311 | } |
1295 | 1312 | ||
1296 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1313 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1297 | INTEL_INFO(dev)->gen < 5) |
1314 | INTEL_INFO(dev)->gen < 5) |
1298 | sdvox |= SDVO_STALL_SELECT; |
1315 | sdvox |= SDVO_STALL_SELECT; |
1299 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1316 | intel_sdvo_write_sdvox(intel_sdvo, sdvox); |
1300 | } |
1317 | } |
1301 | 1318 | ||
1302 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1319 | static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) |
1303 | { |
1320 | { |
1304 | struct intel_sdvo_connector *intel_sdvo_connector = |
1321 | struct intel_sdvo_connector *intel_sdvo_connector = |
1305 | to_intel_sdvo_connector(&connector->base); |
1322 | to_intel_sdvo_connector(&connector->base); |
1306 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1323 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); |
1307 | u16 active_outputs = 0; |
1324 | u16 active_outputs = 0; |
1308 | 1325 | ||
1309 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1326 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1310 | 1327 | ||
1311 | if (active_outputs & intel_sdvo_connector->output_flag) |
1328 | if (active_outputs & intel_sdvo_connector->output_flag) |
1312 | return true; |
1329 | return true; |
1313 | else |
1330 | else |
1314 | return false; |
1331 | return false; |
1315 | } |
1332 | } |
1316 | 1333 | ||
1317 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1334 | static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, |
1318 | enum pipe *pipe) |
1335 | enum pipe *pipe) |
1319 | { |
1336 | { |
1320 | struct drm_device *dev = encoder->base.dev; |
1337 | struct drm_device *dev = encoder->base.dev; |
1321 | struct drm_i915_private *dev_priv = dev->dev_private; |
1338 | struct drm_i915_private *dev_priv = dev->dev_private; |
1322 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1339 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1323 | u16 active_outputs = 0; |
1340 | u16 active_outputs = 0; |
1324 | u32 tmp; |
1341 | u32 tmp; |
1325 | 1342 | ||
1326 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1343 | tmp = I915_READ(intel_sdvo->sdvo_reg); |
1327 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1344 | intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); |
1328 | 1345 | ||
1329 | if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) |
1346 | if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) |
1330 | return false; |
1347 | return false; |
1331 | 1348 | ||
1332 | if (HAS_PCH_CPT(dev)) |
1349 | if (HAS_PCH_CPT(dev)) |
1333 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1350 | *pipe = PORT_TO_PIPE_CPT(tmp); |
1334 | else |
1351 | else |
1335 | *pipe = PORT_TO_PIPE(tmp); |
1352 | *pipe = PORT_TO_PIPE(tmp); |
1336 | 1353 | ||
1337 | return true; |
1354 | return true; |
1338 | } |
1355 | } |
1339 | 1356 | ||
1340 | static void intel_sdvo_get_config(struct intel_encoder *encoder, |
1357 | static void intel_sdvo_get_config(struct intel_encoder *encoder, |
1341 | struct intel_crtc_config *pipe_config) |
1358 | struct intel_crtc_state *pipe_config) |
1342 | { |
1359 | { |
1343 | struct drm_device *dev = encoder->base.dev; |
1360 | struct drm_device *dev = encoder->base.dev; |
1344 | struct drm_i915_private *dev_priv = dev->dev_private; |
1361 | struct drm_i915_private *dev_priv = dev->dev_private; |
1345 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1362 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1346 | struct intel_sdvo_dtd dtd; |
1363 | struct intel_sdvo_dtd dtd; |
1347 | int encoder_pixel_multiplier = 0; |
1364 | int encoder_pixel_multiplier = 0; |
1348 | int dotclock; |
1365 | int dotclock; |
1349 | u32 flags = 0, sdvox; |
1366 | u32 flags = 0, sdvox; |
1350 | u8 val; |
1367 | u8 val; |
1351 | bool ret; |
1368 | bool ret; |
1352 | 1369 | ||
1353 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1370 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1354 | 1371 | ||
1355 | ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); |
1372 | ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); |
1356 | if (!ret) { |
1373 | if (!ret) { |
1357 | /* Some sdvo encoders are not spec compliant and don't |
1374 | /* Some sdvo encoders are not spec compliant and don't |
1358 | * implement the mandatory get_timings function. */ |
1375 | * implement the mandatory get_timings function. */ |
1359 | DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); |
1376 | DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); |
1360 | pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; |
1377 | pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; |
1361 | } else { |
1378 | } else { |
1362 | if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
1379 | if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
1363 | flags |= DRM_MODE_FLAG_PHSYNC; |
1380 | flags |= DRM_MODE_FLAG_PHSYNC; |
1364 | else |
1381 | else |
1365 | flags |= DRM_MODE_FLAG_NHSYNC; |
1382 | flags |= DRM_MODE_FLAG_NHSYNC; |
1366 | 1383 | ||
1367 | if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
1384 | if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
1368 | flags |= DRM_MODE_FLAG_PVSYNC; |
1385 | flags |= DRM_MODE_FLAG_PVSYNC; |
1369 | else |
1386 | else |
1370 | flags |= DRM_MODE_FLAG_NVSYNC; |
1387 | flags |= DRM_MODE_FLAG_NVSYNC; |
1371 | } |
1388 | } |
1372 | 1389 | ||
1373 | pipe_config->adjusted_mode.flags |= flags; |
1390 | pipe_config->base.adjusted_mode.flags |= flags; |
1374 | 1391 | ||
1375 | /* |
1392 | /* |
1376 | * pixel multiplier readout is tricky: Only on i915g/gm it is stored in |
1393 | * pixel multiplier readout is tricky: Only on i915g/gm it is stored in |
1377 | * the sdvo port register, on all other platforms it is part of the dpll |
1394 | * the sdvo port register, on all other platforms it is part of the dpll |
1378 | * state. Since the general pipe state readout happens before the |
1395 | * state. Since the general pipe state readout happens before the |
1379 | * encoder->get_config we so already have a valid pixel multplier on all |
1396 | * encoder->get_config we so already have a valid pixel multplier on all |
1380 | * other platfroms. |
1397 | * other platfroms. |
1381 | */ |
1398 | */ |
1382 | if (IS_I915G(dev) || IS_I915GM(dev)) { |
1399 | if (IS_I915G(dev) || IS_I915GM(dev)) { |
1383 | pipe_config->pixel_multiplier = |
1400 | pipe_config->pixel_multiplier = |
1384 | ((sdvox & SDVO_PORT_MULTIPLY_MASK) |
1401 | ((sdvox & SDVO_PORT_MULTIPLY_MASK) |
1385 | >> SDVO_PORT_MULTIPLY_SHIFT) + 1; |
1402 | >> SDVO_PORT_MULTIPLY_SHIFT) + 1; |
1386 | } |
1403 | } |
1387 | 1404 | ||
1388 | dotclock = pipe_config->port_clock; |
1405 | dotclock = pipe_config->port_clock; |
1389 | if (pipe_config->pixel_multiplier) |
1406 | if (pipe_config->pixel_multiplier) |
1390 | dotclock /= pipe_config->pixel_multiplier; |
1407 | dotclock /= pipe_config->pixel_multiplier; |
1391 | 1408 | ||
1392 | if (HAS_PCH_SPLIT(dev)) |
1409 | if (HAS_PCH_SPLIT(dev)) |
1393 | ironlake_check_encoder_dotclock(pipe_config, dotclock); |
1410 | ironlake_check_encoder_dotclock(pipe_config, dotclock); |
1394 | 1411 | ||
1395 | pipe_config->adjusted_mode.crtc_clock = dotclock; |
1412 | pipe_config->base.adjusted_mode.crtc_clock = dotclock; |
1396 | 1413 | ||
1397 | /* Cross check the port pixel multiplier with the sdvo encoder state. */ |
1414 | /* Cross check the port pixel multiplier with the sdvo encoder state. */ |
1398 | if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, |
1415 | if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, |
1399 | &val, 1)) { |
1416 | &val, 1)) { |
1400 | switch (val) { |
1417 | switch (val) { |
1401 | case SDVO_CLOCK_RATE_MULT_1X: |
1418 | case SDVO_CLOCK_RATE_MULT_1X: |
1402 | encoder_pixel_multiplier = 1; |
1419 | encoder_pixel_multiplier = 1; |
1403 | break; |
1420 | break; |
1404 | case SDVO_CLOCK_RATE_MULT_2X: |
1421 | case SDVO_CLOCK_RATE_MULT_2X: |
1405 | encoder_pixel_multiplier = 2; |
1422 | encoder_pixel_multiplier = 2; |
1406 | break; |
1423 | break; |
1407 | case SDVO_CLOCK_RATE_MULT_4X: |
1424 | case SDVO_CLOCK_RATE_MULT_4X: |
1408 | encoder_pixel_multiplier = 4; |
1425 | encoder_pixel_multiplier = 4; |
1409 | break; |
1426 | break; |
1410 | } |
1427 | } |
1411 | } |
1428 | } |
1412 | 1429 | ||
1413 | if (sdvox & HDMI_COLOR_RANGE_16_235) |
1430 | if (sdvox & HDMI_COLOR_RANGE_16_235) |
1414 | pipe_config->limited_color_range = true; |
1431 | pipe_config->limited_color_range = true; |
1415 | 1432 | ||
1416 | if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, |
1433 | if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, |
1417 | &val, 1)) { |
1434 | &val, 1)) { |
1418 | if (val == SDVO_ENCODE_HDMI) |
1435 | if (val == SDVO_ENCODE_HDMI) |
1419 | pipe_config->has_hdmi_sink = true; |
1436 | pipe_config->has_hdmi_sink = true; |
1420 | } |
1437 | } |
1421 | 1438 | ||
1422 | WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, |
1439 | WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, |
1423 | "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", |
1440 | "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", |
1424 | pipe_config->pixel_multiplier, encoder_pixel_multiplier); |
1441 | pipe_config->pixel_multiplier, encoder_pixel_multiplier); |
1425 | } |
1442 | } |
1426 | 1443 | ||
1427 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1444 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1428 | { |
1445 | { |
1429 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1446 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1430 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1447 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
- | 1448 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
|
1431 | u32 temp; |
1449 | u32 temp; |
1432 | 1450 | ||
1433 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1451 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1434 | if (0) |
1452 | if (0) |
1435 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1453 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1436 | DRM_MODE_DPMS_OFF); |
1454 | DRM_MODE_DPMS_OFF); |
1437 | 1455 | ||
1438 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1456 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1439 | if ((temp & SDVO_ENABLE) != 0) { |
- | |
1440 | /* HW workaround for IBX, we need to move the port to |
- | |
1441 | * transcoder A before disabling it. */ |
- | |
1442 | if (HAS_PCH_IBX(encoder->base.dev)) { |
- | |
1443 | struct drm_crtc *crtc = encoder->base.crtc; |
- | |
1444 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
- | |
1445 | - | ||
1446 | if (temp & SDVO_PIPE_B_SELECT) { |
1457 | |
1447 | temp &= ~SDVO_PIPE_B_SELECT; |
1458 | temp &= ~SDVO_ENABLE; |
1448 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
- | |
- | 1459 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
|
1449 | POSTING_READ(intel_sdvo->sdvo_reg); |
1460 | |
- | 1461 | /* |
|
- | 1462 | * HW workaround for IBX, we need to move the port |
|
- | 1463 | * to transcoder A after disabling it to allow the |
|
1450 | 1464 | * matching DP port to be enabled on transcoder A. |
|
- | 1465 | */ |
|
- | 1466 | if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { |
|
1451 | /* Again we need to write this twice. */ |
1467 | temp &= ~SDVO_PIPE_B_SELECT; |
1452 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
- | |
1453 | POSTING_READ(intel_sdvo->sdvo_reg); |
1468 | temp |= SDVO_ENABLE; |
1454 | - | ||
1455 | /* Transcoder selection bits only update |
1469 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
1456 | * effectively on vblank. */ |
- | |
1457 | if (crtc) |
- | |
1458 | intel_wait_for_vblank(encoder->base.dev, pipe); |
1470 | |
1459 | else |
1471 | temp &= ~SDVO_ENABLE; |
1460 | msleep(50); |
1472 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
1461 | } |
1473 | } |
1462 | } |
1474 | } |
1463 | 1475 | ||
- | 1476 | static void pch_disable_sdvo(struct intel_encoder *encoder) |
|
1464 | intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); |
1477 | { |
- | 1478 | } |
|
- | 1479 | ||
- | 1480 | static void pch_post_disable_sdvo(struct intel_encoder *encoder) |
|
- | 1481 | { |
|
1465 | } |
1482 | intel_disable_sdvo(encoder); |
1466 | } |
1483 | } |
1467 | 1484 | ||
1468 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1485 | static void intel_enable_sdvo(struct intel_encoder *encoder) |
1469 | { |
1486 | { |
1470 | struct drm_device *dev = encoder->base.dev; |
1487 | struct drm_device *dev = encoder->base.dev; |
1471 | struct drm_i915_private *dev_priv = dev->dev_private; |
1488 | struct drm_i915_private *dev_priv = dev->dev_private; |
1472 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1489 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1473 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1490 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
1474 | u32 temp; |
1491 | u32 temp; |
1475 | bool input1, input2; |
1492 | bool input1, input2; |
1476 | int i; |
1493 | int i; |
1477 | bool success; |
1494 | bool success; |
1478 | 1495 | ||
1479 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1496 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1480 | if ((temp & SDVO_ENABLE) == 0) { |
1497 | temp |= SDVO_ENABLE; |
1481 | /* HW workaround for IBX, we need to move the port |
- | |
1482 | * to transcoder A before disabling it, so restore it here. */ |
- | |
1483 | if (HAS_PCH_IBX(dev)) |
- | |
1484 | temp |= SDVO_PIPE_SEL(intel_crtc->pipe); |
1498 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
1485 | - | ||
1486 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
- | |
1487 | } |
1499 | |
1488 | for (i = 0; i < 2; i++) |
1500 | for (i = 0; i < 2; i++) |
1489 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1501 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1490 | 1502 | ||
1491 | success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1503 | success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); |
1492 | /* Warn if the device reported failure to sync. |
1504 | /* Warn if the device reported failure to sync. |
1493 | * A lot of SDVO devices fail to notify of sync, but it's |
1505 | * A lot of SDVO devices fail to notify of sync, but it's |
1494 | * a given it the status is a success, we succeeded. |
1506 | * a given it the status is a success, we succeeded. |
1495 | */ |
1507 | */ |
1496 | if (success && !input1) { |
1508 | if (success && !input1) { |
1497 | DRM_DEBUG_KMS("First %s output reported failure to " |
1509 | DRM_DEBUG_KMS("First %s output reported failure to " |
1498 | "sync\n", SDVO_NAME(intel_sdvo)); |
1510 | "sync\n", SDVO_NAME(intel_sdvo)); |
1499 | } |
1511 | } |
1500 | 1512 | ||
1501 | if (0) |
1513 | if (0) |
1502 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1514 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1503 | DRM_MODE_DPMS_ON); |
1515 | DRM_MODE_DPMS_ON); |
1504 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1516 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1505 | } |
1517 | } |
1506 | - | ||
1507 | /* Special dpms function to support cloning between dvo/sdvo/crt. */ |
- | |
1508 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
- | |
1509 | { |
- | |
1510 | struct drm_crtc *crtc; |
- | |
1511 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
- | |
1512 | - | ||
1513 | /* dvo supports only 2 dpms states. */ |
- | |
1514 | if (mode != DRM_MODE_DPMS_ON) |
- | |
1515 | mode = DRM_MODE_DPMS_OFF; |
- | |
1516 | - | ||
1517 | if (mode == connector->dpms) |
- | |
1518 | return; |
- | |
1519 | - | ||
1520 | connector->dpms = mode; |
- | |
1521 | - | ||
1522 | /* Only need to change hw state when actually enabled */ |
- | |
1523 | crtc = intel_sdvo->base.base.crtc; |
- | |
1524 | if (!crtc) { |
- | |
1525 | intel_sdvo->base.connectors_active = false; |
- | |
1526 | return; |
- | |
1527 | } |
- | |
1528 | - | ||
1529 | /* We set active outputs manually below in case pipe dpms doesn't change |
- | |
1530 | * due to cloning. */ |
- | |
1531 | if (mode != DRM_MODE_DPMS_ON) { |
- | |
1532 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
- | |
1533 | if (0) |
- | |
1534 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
- | |
1535 | - | ||
1536 | intel_sdvo->base.connectors_active = false; |
- | |
1537 | - | ||
1538 | intel_crtc_update_dpms(crtc); |
- | |
1539 | } else { |
- | |
1540 | intel_sdvo->base.connectors_active = true; |
- | |
1541 | - | ||
1542 | intel_crtc_update_dpms(crtc); |
- | |
1543 | - | ||
1544 | if (0) |
- | |
1545 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
- | |
1546 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
- | |
1547 | } |
- | |
1548 | - | ||
1549 | intel_modeset_check_state(connector->dev); |
- | |
1550 | } |
- | |
1551 | 1518 | ||
1552 | static enum drm_mode_status |
1519 | static enum drm_mode_status |
1553 | intel_sdvo_mode_valid(struct drm_connector *connector, |
1520 | intel_sdvo_mode_valid(struct drm_connector *connector, |
1554 | struct drm_display_mode *mode) |
1521 | struct drm_display_mode *mode) |
1555 | { |
1522 | { |
1556 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1523 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1557 | 1524 | ||
1558 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1525 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1559 | return MODE_NO_DBLESCAN; |
1526 | return MODE_NO_DBLESCAN; |
1560 | 1527 | ||
1561 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1528 | if (intel_sdvo->pixel_clock_min > mode->clock) |
1562 | return MODE_CLOCK_LOW; |
1529 | return MODE_CLOCK_LOW; |
1563 | 1530 | ||
1564 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1531 | if (intel_sdvo->pixel_clock_max < mode->clock) |
1565 | return MODE_CLOCK_HIGH; |
1532 | return MODE_CLOCK_HIGH; |
1566 | 1533 | ||
1567 | if (intel_sdvo->is_lvds) { |
1534 | if (intel_sdvo->is_lvds) { |
1568 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1535 | if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) |
1569 | return MODE_PANEL; |
1536 | return MODE_PANEL; |
1570 | 1537 | ||
1571 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1538 | if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) |
1572 | return MODE_PANEL; |
1539 | return MODE_PANEL; |
1573 | } |
1540 | } |
1574 | 1541 | ||
1575 | return MODE_OK; |
1542 | return MODE_OK; |
1576 | } |
1543 | } |
1577 | 1544 | ||
1578 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1545 | static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) |
1579 | { |
1546 | { |
1580 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1547 | BUILD_BUG_ON(sizeof(*caps) != 8); |
1581 | if (!intel_sdvo_get_value(intel_sdvo, |
1548 | if (!intel_sdvo_get_value(intel_sdvo, |
1582 | SDVO_CMD_GET_DEVICE_CAPS, |
1549 | SDVO_CMD_GET_DEVICE_CAPS, |
1583 | caps, sizeof(*caps))) |
1550 | caps, sizeof(*caps))) |
1584 | return false; |
1551 | return false; |
1585 | 1552 | ||
1586 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1553 | DRM_DEBUG_KMS("SDVO capabilities:\n" |
1587 | " vendor_id: %d\n" |
1554 | " vendor_id: %d\n" |
1588 | " device_id: %d\n" |
1555 | " device_id: %d\n" |
1589 | " device_rev_id: %d\n" |
1556 | " device_rev_id: %d\n" |
1590 | " sdvo_version_major: %d\n" |
1557 | " sdvo_version_major: %d\n" |
1591 | " sdvo_version_minor: %d\n" |
1558 | " sdvo_version_minor: %d\n" |
1592 | " sdvo_inputs_mask: %d\n" |
1559 | " sdvo_inputs_mask: %d\n" |
1593 | " smooth_scaling: %d\n" |
1560 | " smooth_scaling: %d\n" |
1594 | " sharp_scaling: %d\n" |
1561 | " sharp_scaling: %d\n" |
1595 | " up_scaling: %d\n" |
1562 | " up_scaling: %d\n" |
1596 | " down_scaling: %d\n" |
1563 | " down_scaling: %d\n" |
1597 | " stall_support: %d\n" |
1564 | " stall_support: %d\n" |
1598 | " output_flags: %d\n", |
1565 | " output_flags: %d\n", |
1599 | caps->vendor_id, |
1566 | caps->vendor_id, |
1600 | caps->device_id, |
1567 | caps->device_id, |
1601 | caps->device_rev_id, |
1568 | caps->device_rev_id, |
1602 | caps->sdvo_version_major, |
1569 | caps->sdvo_version_major, |
1603 | caps->sdvo_version_minor, |
1570 | caps->sdvo_version_minor, |
1604 | caps->sdvo_inputs_mask, |
1571 | caps->sdvo_inputs_mask, |
1605 | caps->smooth_scaling, |
1572 | caps->smooth_scaling, |
1606 | caps->sharp_scaling, |
1573 | caps->sharp_scaling, |
1607 | caps->up_scaling, |
1574 | caps->up_scaling, |
1608 | caps->down_scaling, |
1575 | caps->down_scaling, |
1609 | caps->stall_support, |
1576 | caps->stall_support, |
1610 | caps->output_flags); |
1577 | caps->output_flags); |
1611 | 1578 | ||
1612 | return true; |
1579 | return true; |
1613 | } |
1580 | } |
1614 | 1581 | ||
1615 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1582 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1616 | { |
1583 | { |
1617 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1584 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1618 | uint16_t hotplug; |
1585 | uint16_t hotplug; |
- | 1586 | ||
- | 1587 | if (!I915_HAS_HOTPLUG(dev)) |
|
- | 1588 | return 0; |
|
1619 | 1589 | ||
1620 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1590 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1621 | * on the line. */ |
1591 | * on the line. */ |
1622 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1592 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1623 | return 0; |
1593 | return 0; |
1624 | 1594 | ||
1625 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1595 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, |
1626 | &hotplug, sizeof(hotplug))) |
1596 | &hotplug, sizeof(hotplug))) |
1627 | return 0; |
1597 | return 0; |
1628 | 1598 | ||
1629 | return hotplug; |
1599 | return hotplug; |
1630 | } |
1600 | } |
1631 | 1601 | ||
1632 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1602 | static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) |
1633 | { |
1603 | { |
1634 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1604 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1635 | 1605 | ||
1636 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1606 | intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, |
1637 | &intel_sdvo->hotplug_active, 2); |
1607 | &intel_sdvo->hotplug_active, 2); |
1638 | } |
1608 | } |
1639 | 1609 | ||
1640 | static bool |
1610 | static bool |
1641 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1611 | intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) |
1642 | { |
1612 | { |
1643 | /* Is there more than one type of output? */ |
1613 | /* Is there more than one type of output? */ |
1644 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1614 | return hweight16(intel_sdvo->caps.output_flags) > 1; |
1645 | } |
1615 | } |
1646 | 1616 | ||
1647 | static struct edid * |
1617 | static struct edid * |
1648 | intel_sdvo_get_edid(struct drm_connector *connector) |
1618 | intel_sdvo_get_edid(struct drm_connector *connector) |
1649 | { |
1619 | { |
1650 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1620 | struct intel_sdvo *sdvo = intel_attached_sdvo(connector); |
1651 | return drm_get_edid(connector, &sdvo->ddc); |
1621 | return drm_get_edid(connector, &sdvo->ddc); |
1652 | } |
1622 | } |
1653 | 1623 | ||
1654 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1624 | /* Mac mini hack -- use the same DDC as the analog connector */ |
1655 | static struct edid * |
1625 | static struct edid * |
1656 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1626 | intel_sdvo_get_analog_edid(struct drm_connector *connector) |
1657 | { |
1627 | { |
1658 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1628 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1659 | 1629 | ||
1660 | return drm_get_edid(connector, |
1630 | return drm_get_edid(connector, |
1661 | intel_gmbus_get_adapter(dev_priv, |
1631 | intel_gmbus_get_adapter(dev_priv, |
1662 | dev_priv->vbt.crt_ddc_pin)); |
1632 | dev_priv->vbt.crt_ddc_pin)); |
1663 | } |
1633 | } |
1664 | 1634 | ||
1665 | static enum drm_connector_status |
1635 | static enum drm_connector_status |
1666 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1636 | intel_sdvo_tmds_sink_detect(struct drm_connector *connector) |
1667 | { |
1637 | { |
1668 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1638 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1669 | enum drm_connector_status status; |
1639 | enum drm_connector_status status; |
1670 | struct edid *edid; |
1640 | struct edid *edid; |
1671 | 1641 | ||
1672 | edid = intel_sdvo_get_edid(connector); |
1642 | edid = intel_sdvo_get_edid(connector); |
1673 | 1643 | ||
1674 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1644 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { |
1675 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1645 | u8 ddc, saved_ddc = intel_sdvo->ddc_bus; |
1676 | 1646 | ||
1677 | /* |
1647 | /* |
1678 | * Don't use the 1 as the argument of DDC bus switch to get |
1648 | * Don't use the 1 as the argument of DDC bus switch to get |
1679 | * the EDID. It is used for SDVO SPD ROM. |
1649 | * the EDID. It is used for SDVO SPD ROM. |
1680 | */ |
1650 | */ |
1681 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1651 | for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { |
1682 | intel_sdvo->ddc_bus = ddc; |
1652 | intel_sdvo->ddc_bus = ddc; |
1683 | edid = intel_sdvo_get_edid(connector); |
1653 | edid = intel_sdvo_get_edid(connector); |
1684 | if (edid) |
1654 | if (edid) |
1685 | break; |
1655 | break; |
1686 | } |
1656 | } |
1687 | /* |
1657 | /* |
1688 | * If we found the EDID on the other bus, |
1658 | * If we found the EDID on the other bus, |
1689 | * assume that is the correct DDC bus. |
1659 | * assume that is the correct DDC bus. |
1690 | */ |
1660 | */ |
1691 | if (edid == NULL) |
1661 | if (edid == NULL) |
1692 | intel_sdvo->ddc_bus = saved_ddc; |
1662 | intel_sdvo->ddc_bus = saved_ddc; |
1693 | } |
1663 | } |
1694 | 1664 | ||
1695 | /* |
1665 | /* |
1696 | * When there is no edid and no monitor is connected with VGA |
1666 | * When there is no edid and no monitor is connected with VGA |
1697 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1667 | * port, try to use the CRT ddc to read the EDID for DVI-connector. |
1698 | */ |
1668 | */ |
1699 | if (edid == NULL) |
1669 | if (edid == NULL) |
1700 | edid = intel_sdvo_get_analog_edid(connector); |
1670 | edid = intel_sdvo_get_analog_edid(connector); |
1701 | 1671 | ||
1702 | status = connector_status_unknown; |
1672 | status = connector_status_unknown; |
1703 | if (edid != NULL) { |
1673 | if (edid != NULL) { |
1704 | /* DDC bus is shared, match EDID to connector type */ |
1674 | /* DDC bus is shared, match EDID to connector type */ |
1705 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1675 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
1706 | status = connector_status_connected; |
1676 | status = connector_status_connected; |
1707 | if (intel_sdvo->is_hdmi) { |
1677 | if (intel_sdvo->is_hdmi) { |
1708 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1678 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1709 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1679 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1710 | intel_sdvo->rgb_quant_range_selectable = |
1680 | intel_sdvo->rgb_quant_range_selectable = |
1711 | drm_rgb_quant_range_selectable(edid); |
1681 | drm_rgb_quant_range_selectable(edid); |
1712 | } |
1682 | } |
1713 | } else |
1683 | } else |
1714 | status = connector_status_disconnected; |
1684 | status = connector_status_disconnected; |
1715 | kfree(edid); |
1685 | kfree(edid); |
1716 | } |
1686 | } |
1717 | 1687 | ||
1718 | if (status == connector_status_connected) { |
1688 | if (status == connector_status_connected) { |
1719 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1689 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1720 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1690 | if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) |
1721 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1691 | intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); |
1722 | } |
1692 | } |
1723 | 1693 | ||
1724 | return status; |
1694 | return status; |
1725 | } |
1695 | } |
1726 | 1696 | ||
1727 | static bool |
1697 | static bool |
1728 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1698 | intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, |
1729 | struct edid *edid) |
1699 | struct edid *edid) |
1730 | { |
1700 | { |
1731 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1701 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); |
1732 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1702 | bool connector_is_digital = !!IS_DIGITAL(sdvo); |
1733 | 1703 | ||
1734 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1704 | DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", |
1735 | connector_is_digital, monitor_is_digital); |
1705 | connector_is_digital, monitor_is_digital); |
1736 | return connector_is_digital == monitor_is_digital; |
1706 | return connector_is_digital == monitor_is_digital; |
1737 | } |
1707 | } |
1738 | 1708 | ||
1739 | static enum drm_connector_status |
1709 | static enum drm_connector_status |
1740 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1710 | intel_sdvo_detect(struct drm_connector *connector, bool force) |
1741 | { |
1711 | { |
1742 | uint16_t response; |
1712 | uint16_t response; |
1743 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1713 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1744 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1714 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1745 | enum drm_connector_status ret; |
1715 | enum drm_connector_status ret; |
1746 | 1716 | ||
1747 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1717 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1748 | connector->base.id, connector->name); |
1718 | connector->base.id, connector->name); |
1749 | 1719 | ||
1750 | if (!intel_sdvo_get_value(intel_sdvo, |
1720 | if (!intel_sdvo_get_value(intel_sdvo, |
1751 | SDVO_CMD_GET_ATTACHED_DISPLAYS, |
1721 | SDVO_CMD_GET_ATTACHED_DISPLAYS, |
1752 | &response, 2)) |
1722 | &response, 2)) |
1753 | return connector_status_unknown; |
1723 | return connector_status_unknown; |
1754 | 1724 | ||
1755 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1725 | DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", |
1756 | response & 0xff, response >> 8, |
1726 | response & 0xff, response >> 8, |
1757 | intel_sdvo_connector->output_flag); |
1727 | intel_sdvo_connector->output_flag); |
1758 | 1728 | ||
1759 | if (response == 0) |
1729 | if (response == 0) |
1760 | return connector_status_disconnected; |
1730 | return connector_status_disconnected; |
1761 | 1731 | ||
1762 | intel_sdvo->attached_output = response; |
1732 | intel_sdvo->attached_output = response; |
1763 | 1733 | ||
1764 | intel_sdvo->has_hdmi_monitor = false; |
1734 | intel_sdvo->has_hdmi_monitor = false; |
1765 | intel_sdvo->has_hdmi_audio = false; |
1735 | intel_sdvo->has_hdmi_audio = false; |
1766 | intel_sdvo->rgb_quant_range_selectable = false; |
1736 | intel_sdvo->rgb_quant_range_selectable = false; |
1767 | 1737 | ||
1768 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1738 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1769 | ret = connector_status_disconnected; |
1739 | ret = connector_status_disconnected; |
1770 | else if (IS_TMDS(intel_sdvo_connector)) |
1740 | else if (IS_TMDS(intel_sdvo_connector)) |
1771 | ret = intel_sdvo_tmds_sink_detect(connector); |
1741 | ret = intel_sdvo_tmds_sink_detect(connector); |
1772 | else { |
1742 | else { |
1773 | struct edid *edid; |
1743 | struct edid *edid; |
1774 | 1744 | ||
1775 | /* if we have an edid check it matches the connection */ |
1745 | /* if we have an edid check it matches the connection */ |
1776 | edid = intel_sdvo_get_edid(connector); |
1746 | edid = intel_sdvo_get_edid(connector); |
1777 | if (edid == NULL) |
1747 | if (edid == NULL) |
1778 | edid = intel_sdvo_get_analog_edid(connector); |
1748 | edid = intel_sdvo_get_analog_edid(connector); |
1779 | if (edid != NULL) { |
1749 | if (edid != NULL) { |
1780 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1750 | if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, |
1781 | edid)) |
1751 | edid)) |
1782 | ret = connector_status_connected; |
1752 | ret = connector_status_connected; |
1783 | else |
1753 | else |
1784 | ret = connector_status_disconnected; |
1754 | ret = connector_status_disconnected; |
1785 | 1755 | ||
1786 | kfree(edid); |
1756 | kfree(edid); |
1787 | } else |
1757 | } else |
1788 | ret = connector_status_connected; |
1758 | ret = connector_status_connected; |
1789 | } |
1759 | } |
1790 | 1760 | ||
1791 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1761 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1792 | if (ret == connector_status_connected) { |
1762 | if (ret == connector_status_connected) { |
1793 | intel_sdvo->is_tv = false; |
1763 | intel_sdvo->is_tv = false; |
1794 | intel_sdvo->is_lvds = false; |
1764 | intel_sdvo->is_lvds = false; |
1795 | 1765 | ||
1796 | if (response & SDVO_TV_MASK) |
1766 | if (response & SDVO_TV_MASK) |
1797 | intel_sdvo->is_tv = true; |
1767 | intel_sdvo->is_tv = true; |
1798 | if (response & SDVO_LVDS_MASK) |
1768 | if (response & SDVO_LVDS_MASK) |
1799 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1769 | intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; |
1800 | } |
1770 | } |
1801 | 1771 | ||
1802 | return ret; |
1772 | return ret; |
1803 | } |
1773 | } |
1804 | 1774 | ||
1805 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1775 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1806 | { |
1776 | { |
1807 | struct edid *edid; |
1777 | struct edid *edid; |
1808 | 1778 | ||
1809 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1779 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1810 | connector->base.id, connector->name); |
1780 | connector->base.id, connector->name); |
1811 | 1781 | ||
1812 | /* set the bus switch and get the modes */ |
1782 | /* set the bus switch and get the modes */ |
1813 | edid = intel_sdvo_get_edid(connector); |
1783 | edid = intel_sdvo_get_edid(connector); |
1814 | 1784 | ||
1815 | /* |
1785 | /* |
1816 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1786 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
1817 | * link between analog and digital outputs. So, if the regular SDVO |
1787 | * link between analog and digital outputs. So, if the regular SDVO |
1818 | * DDC fails, check to see if the analog output is disconnected, in |
1788 | * DDC fails, check to see if the analog output is disconnected, in |
1819 | * which case we'll look there for the digital DDC data. |
1789 | * which case we'll look there for the digital DDC data. |
1820 | */ |
1790 | */ |
1821 | if (edid == NULL) |
1791 | if (edid == NULL) |
1822 | edid = intel_sdvo_get_analog_edid(connector); |
1792 | edid = intel_sdvo_get_analog_edid(connector); |
1823 | 1793 | ||
1824 | if (edid != NULL) { |
1794 | if (edid != NULL) { |
1825 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1795 | if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), |
1826 | edid)) { |
1796 | edid)) { |
1827 | drm_mode_connector_update_edid_property(connector, edid); |
1797 | drm_mode_connector_update_edid_property(connector, edid); |
1828 | drm_add_edid_modes(connector, edid); |
1798 | drm_add_edid_modes(connector, edid); |
1829 | } |
1799 | } |
1830 | 1800 | ||
1831 | kfree(edid); |
1801 | kfree(edid); |
1832 | } |
1802 | } |
1833 | } |
1803 | } |
1834 | 1804 | ||
1835 | /* |
1805 | /* |
1836 | * Set of SDVO TV modes. |
1806 | * Set of SDVO TV modes. |
1837 | * Note! This is in reply order (see loop in get_tv_modes). |
1807 | * Note! This is in reply order (see loop in get_tv_modes). |
1838 | * XXX: all 60Hz refresh? |
1808 | * XXX: all 60Hz refresh? |
1839 | */ |
1809 | */ |
1840 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1810 | static const struct drm_display_mode sdvo_tv_modes[] = { |
1841 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1811 | { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, |
1842 | 416, 0, 200, 201, 232, 233, 0, |
1812 | 416, 0, 200, 201, 232, 233, 0, |
1843 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1813 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1844 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1814 | { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, |
1845 | 416, 0, 240, 241, 272, 273, 0, |
1815 | 416, 0, 240, 241, 272, 273, 0, |
1846 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1816 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1847 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1817 | { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, |
1848 | 496, 0, 300, 301, 332, 333, 0, |
1818 | 496, 0, 300, 301, 332, 333, 0, |
1849 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1819 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1850 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1820 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, |
1851 | 736, 0, 350, 351, 382, 383, 0, |
1821 | 736, 0, 350, 351, 382, 383, 0, |
1852 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1822 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1853 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1823 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, |
1854 | 736, 0, 400, 401, 432, 433, 0, |
1824 | 736, 0, 400, 401, 432, 433, 0, |
1855 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1825 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1856 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1826 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, |
1857 | 736, 0, 480, 481, 512, 513, 0, |
1827 | 736, 0, 480, 481, 512, 513, 0, |
1858 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1828 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1859 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1829 | { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, |
1860 | 800, 0, 480, 481, 512, 513, 0, |
1830 | 800, 0, 480, 481, 512, 513, 0, |
1861 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1831 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1862 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1832 | { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, |
1863 | 800, 0, 576, 577, 608, 609, 0, |
1833 | 800, 0, 576, 577, 608, 609, 0, |
1864 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1834 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1865 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1835 | { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, |
1866 | 816, 0, 350, 351, 382, 383, 0, |
1836 | 816, 0, 350, 351, 382, 383, 0, |
1867 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1837 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1868 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1838 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, |
1869 | 816, 0, 400, 401, 432, 433, 0, |
1839 | 816, 0, 400, 401, 432, 433, 0, |
1870 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1840 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1871 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1841 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, |
1872 | 816, 0, 480, 481, 512, 513, 0, |
1842 | 816, 0, 480, 481, 512, 513, 0, |
1873 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1843 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1874 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1844 | { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, |
1875 | 816, 0, 540, 541, 572, 573, 0, |
1845 | 816, 0, 540, 541, 572, 573, 0, |
1876 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1846 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1877 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1847 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, |
1878 | 816, 0, 576, 577, 608, 609, 0, |
1848 | 816, 0, 576, 577, 608, 609, 0, |
1879 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1849 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1880 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1850 | { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, |
1881 | 864, 0, 576, 577, 608, 609, 0, |
1851 | 864, 0, 576, 577, 608, 609, 0, |
1882 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1852 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1883 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1853 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, |
1884 | 896, 0, 600, 601, 632, 633, 0, |
1854 | 896, 0, 600, 601, 632, 633, 0, |
1885 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1855 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1886 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1856 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, |
1887 | 928, 0, 624, 625, 656, 657, 0, |
1857 | 928, 0, 624, 625, 656, 657, 0, |
1888 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1858 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1889 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1859 | { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, |
1890 | 1016, 0, 766, 767, 798, 799, 0, |
1860 | 1016, 0, 766, 767, 798, 799, 0, |
1891 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1861 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1892 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1862 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, |
1893 | 1120, 0, 768, 769, 800, 801, 0, |
1863 | 1120, 0, 768, 769, 800, 801, 0, |
1894 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1864 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1895 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1865 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, |
1896 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1866 | 1376, 0, 1024, 1025, 1056, 1057, 0, |
1897 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1867 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
1898 | }; |
1868 | }; |
1899 | 1869 | ||
1900 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1870 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1901 | { |
1871 | { |
1902 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1872 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1903 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1873 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1904 | uint32_t reply = 0, format_map = 0; |
1874 | uint32_t reply = 0, format_map = 0; |
1905 | int i; |
1875 | int i; |
1906 | 1876 | ||
1907 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1877 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1908 | connector->base.id, connector->name); |
1878 | connector->base.id, connector->name); |
1909 | 1879 | ||
1910 | /* Read the list of supported input resolutions for the selected TV |
1880 | /* Read the list of supported input resolutions for the selected TV |
1911 | * format. |
1881 | * format. |
1912 | */ |
1882 | */ |
1913 | format_map = 1 << intel_sdvo->tv_format_index; |
1883 | format_map = 1 << intel_sdvo->tv_format_index; |
1914 | memcpy(&tv_res, &format_map, |
1884 | memcpy(&tv_res, &format_map, |
1915 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1885 | min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); |
1916 | 1886 | ||
1917 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1887 | if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) |
1918 | return; |
1888 | return; |
1919 | 1889 | ||
1920 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1890 | BUILD_BUG_ON(sizeof(tv_res) != 3); |
1921 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1891 | if (!intel_sdvo_write_cmd(intel_sdvo, |
1922 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1892 | SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, |
1923 | &tv_res, sizeof(tv_res))) |
1893 | &tv_res, sizeof(tv_res))) |
1924 | return; |
1894 | return; |
1925 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1895 | if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) |
1926 | return; |
1896 | return; |
1927 | 1897 | ||
1928 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1898 | for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) |
1929 | if (reply & (1 << i)) { |
1899 | if (reply & (1 << i)) { |
1930 | struct drm_display_mode *nmode; |
1900 | struct drm_display_mode *nmode; |
1931 | nmode = drm_mode_duplicate(connector->dev, |
1901 | nmode = drm_mode_duplicate(connector->dev, |
1932 | &sdvo_tv_modes[i]); |
1902 | &sdvo_tv_modes[i]); |
1933 | if (nmode) |
1903 | if (nmode) |
1934 | drm_mode_probed_add(connector, nmode); |
1904 | drm_mode_probed_add(connector, nmode); |
1935 | } |
1905 | } |
1936 | } |
1906 | } |
1937 | 1907 | ||
1938 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1908 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1939 | { |
1909 | { |
1940 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1910 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1941 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1911 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1942 | struct drm_display_mode *newmode; |
1912 | struct drm_display_mode *newmode; |
1943 | 1913 | ||
1944 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1914 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
1945 | connector->base.id, connector->name); |
1915 | connector->base.id, connector->name); |
1946 | 1916 | ||
1947 | /* |
1917 | /* |
1948 | * Fetch modes from VBT. For SDVO prefer the VBT mode since some |
1918 | * Fetch modes from VBT. For SDVO prefer the VBT mode since some |
1949 | * SDVO->LVDS transcoders can't cope with the EDID mode. |
1919 | * SDVO->LVDS transcoders can't cope with the EDID mode. |
1950 | */ |
1920 | */ |
1951 | if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { |
1921 | if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { |
1952 | newmode = drm_mode_duplicate(connector->dev, |
1922 | newmode = drm_mode_duplicate(connector->dev, |
1953 | dev_priv->vbt.sdvo_lvds_vbt_mode); |
1923 | dev_priv->vbt.sdvo_lvds_vbt_mode); |
1954 | if (newmode != NULL) { |
1924 | if (newmode != NULL) { |
1955 | /* Guarantee the mode is preferred */ |
1925 | /* Guarantee the mode is preferred */ |
1956 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1926 | newmode->type = (DRM_MODE_TYPE_PREFERRED | |
1957 | DRM_MODE_TYPE_DRIVER); |
1927 | DRM_MODE_TYPE_DRIVER); |
1958 | drm_mode_probed_add(connector, newmode); |
1928 | drm_mode_probed_add(connector, newmode); |
1959 | } |
1929 | } |
1960 | } |
1930 | } |
1961 | 1931 | ||
1962 | /* |
1932 | /* |
1963 | * Attempt to get the mode list from DDC. |
1933 | * Attempt to get the mode list from DDC. |
1964 | * Assume that the preferred modes are |
1934 | * Assume that the preferred modes are |
1965 | * arranged in priority order. |
1935 | * arranged in priority order. |
1966 | */ |
1936 | */ |
1967 | intel_ddc_get_modes(connector, &intel_sdvo->ddc); |
1937 | intel_ddc_get_modes(connector, &intel_sdvo->ddc); |
1968 | 1938 | ||
1969 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1939 | list_for_each_entry(newmode, &connector->probed_modes, head) { |
1970 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1940 | if (newmode->type & DRM_MODE_TYPE_PREFERRED) { |
1971 | intel_sdvo->sdvo_lvds_fixed_mode = |
1941 | intel_sdvo->sdvo_lvds_fixed_mode = |
1972 | drm_mode_duplicate(connector->dev, newmode); |
1942 | drm_mode_duplicate(connector->dev, newmode); |
1973 | 1943 | ||
1974 | intel_sdvo->is_lvds = true; |
1944 | intel_sdvo->is_lvds = true; |
1975 | break; |
1945 | break; |
1976 | } |
1946 | } |
1977 | } |
1947 | } |
1978 | } |
1948 | } |
1979 | 1949 | ||
1980 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1950 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1981 | { |
1951 | { |
1982 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1952 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1983 | 1953 | ||
1984 | if (IS_TV(intel_sdvo_connector)) |
1954 | if (IS_TV(intel_sdvo_connector)) |
1985 | intel_sdvo_get_tv_modes(connector); |
1955 | intel_sdvo_get_tv_modes(connector); |
1986 | else if (IS_LVDS(intel_sdvo_connector)) |
1956 | else if (IS_LVDS(intel_sdvo_connector)) |
1987 | intel_sdvo_get_lvds_modes(connector); |
1957 | intel_sdvo_get_lvds_modes(connector); |
1988 | else |
1958 | else |
1989 | intel_sdvo_get_ddc_modes(connector); |
1959 | intel_sdvo_get_ddc_modes(connector); |
1990 | 1960 | ||
1991 | return !list_empty(&connector->probed_modes); |
1961 | return !list_empty(&connector->probed_modes); |
1992 | } |
1962 | } |
1993 | 1963 | ||
1994 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1964 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1995 | { |
1965 | { |
1996 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1966 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1997 | 1967 | ||
1998 | drm_connector_cleanup(connector); |
1968 | drm_connector_cleanup(connector); |
1999 | kfree(intel_sdvo_connector); |
1969 | kfree(intel_sdvo_connector); |
2000 | } |
1970 | } |
2001 | 1971 | ||
2002 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
1972 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) |
2003 | { |
1973 | { |
2004 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1974 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
2005 | struct edid *edid; |
1975 | struct edid *edid; |
2006 | bool has_audio = false; |
1976 | bool has_audio = false; |
2007 | 1977 | ||
2008 | if (!intel_sdvo->is_hdmi) |
1978 | if (!intel_sdvo->is_hdmi) |
2009 | return false; |
1979 | return false; |
2010 | 1980 | ||
2011 | edid = intel_sdvo_get_edid(connector); |
1981 | edid = intel_sdvo_get_edid(connector); |
2012 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
1982 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) |
2013 | has_audio = drm_detect_monitor_audio(edid); |
1983 | has_audio = drm_detect_monitor_audio(edid); |
2014 | kfree(edid); |
1984 | kfree(edid); |
2015 | 1985 | ||
2016 | return has_audio; |
1986 | return has_audio; |
2017 | } |
1987 | } |
2018 | 1988 | ||
2019 | static int |
1989 | static int |
2020 | intel_sdvo_set_property(struct drm_connector *connector, |
1990 | intel_sdvo_set_property(struct drm_connector *connector, |
2021 | struct drm_property *property, |
1991 | struct drm_property *property, |
2022 | uint64_t val) |
1992 | uint64_t val) |
2023 | { |
1993 | { |
2024 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
1994 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
2025 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1995 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
2026 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1996 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
2027 | uint16_t temp_value; |
1997 | uint16_t temp_value; |
2028 | uint8_t cmd; |
1998 | uint8_t cmd; |
2029 | int ret; |
1999 | int ret; |
2030 | 2000 | ||
2031 | ret = drm_object_property_set_value(&connector->base, property, val); |
2001 | ret = drm_object_property_set_value(&connector->base, property, val); |
2032 | if (ret) |
2002 | if (ret) |
2033 | return ret; |
2003 | return ret; |
2034 | 2004 | ||
2035 | if (property == dev_priv->force_audio_property) { |
2005 | if (property == dev_priv->force_audio_property) { |
2036 | int i = val; |
2006 | int i = val; |
2037 | bool has_audio; |
2007 | bool has_audio; |
2038 | 2008 | ||
2039 | if (i == intel_sdvo_connector->force_audio) |
2009 | if (i == intel_sdvo_connector->force_audio) |
2040 | return 0; |
2010 | return 0; |
2041 | 2011 | ||
2042 | intel_sdvo_connector->force_audio = i; |
2012 | intel_sdvo_connector->force_audio = i; |
2043 | 2013 | ||
2044 | if (i == HDMI_AUDIO_AUTO) |
2014 | if (i == HDMI_AUDIO_AUTO) |
2045 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
2015 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
2046 | else |
2016 | else |
2047 | has_audio = (i == HDMI_AUDIO_ON); |
2017 | has_audio = (i == HDMI_AUDIO_ON); |
2048 | 2018 | ||
2049 | if (has_audio == intel_sdvo->has_hdmi_audio) |
2019 | if (has_audio == intel_sdvo->has_hdmi_audio) |
2050 | return 0; |
2020 | return 0; |
2051 | 2021 | ||
2052 | intel_sdvo->has_hdmi_audio = has_audio; |
2022 | intel_sdvo->has_hdmi_audio = has_audio; |
2053 | goto done; |
2023 | goto done; |
2054 | } |
2024 | } |
2055 | 2025 | ||
2056 | if (property == dev_priv->broadcast_rgb_property) { |
2026 | if (property == dev_priv->broadcast_rgb_property) { |
2057 | bool old_auto = intel_sdvo->color_range_auto; |
2027 | bool old_auto = intel_sdvo->color_range_auto; |
2058 | uint32_t old_range = intel_sdvo->color_range; |
2028 | uint32_t old_range = intel_sdvo->color_range; |
2059 | 2029 | ||
2060 | switch (val) { |
2030 | switch (val) { |
2061 | case INTEL_BROADCAST_RGB_AUTO: |
2031 | case INTEL_BROADCAST_RGB_AUTO: |
2062 | intel_sdvo->color_range_auto = true; |
2032 | intel_sdvo->color_range_auto = true; |
2063 | break; |
2033 | break; |
2064 | case INTEL_BROADCAST_RGB_FULL: |
2034 | case INTEL_BROADCAST_RGB_FULL: |
2065 | intel_sdvo->color_range_auto = false; |
2035 | intel_sdvo->color_range_auto = false; |
2066 | intel_sdvo->color_range = 0; |
2036 | intel_sdvo->color_range = 0; |
2067 | break; |
2037 | break; |
2068 | case INTEL_BROADCAST_RGB_LIMITED: |
2038 | case INTEL_BROADCAST_RGB_LIMITED: |
2069 | intel_sdvo->color_range_auto = false; |
2039 | intel_sdvo->color_range_auto = false; |
2070 | /* FIXME: this bit is only valid when using TMDS |
2040 | /* FIXME: this bit is only valid when using TMDS |
2071 | * encoding and 8 bit per color mode. */ |
2041 | * encoding and 8 bit per color mode. */ |
2072 | intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; |
2042 | intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; |
2073 | break; |
2043 | break; |
2074 | default: |
2044 | default: |
2075 | return -EINVAL; |
2045 | return -EINVAL; |
2076 | } |
2046 | } |
2077 | 2047 | ||
2078 | if (old_auto == intel_sdvo->color_range_auto && |
2048 | if (old_auto == intel_sdvo->color_range_auto && |
2079 | old_range == intel_sdvo->color_range) |
2049 | old_range == intel_sdvo->color_range) |
2080 | return 0; |
2050 | return 0; |
2081 | 2051 | ||
2082 | goto done; |
2052 | goto done; |
2083 | } |
2053 | } |
- | 2054 | ||
- | 2055 | if (property == connector->dev->mode_config.aspect_ratio_property) { |
|
- | 2056 | switch (val) { |
|
- | 2057 | case DRM_MODE_PICTURE_ASPECT_NONE: |
|
- | 2058 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE; |
|
- | 2059 | break; |
|
- | 2060 | case DRM_MODE_PICTURE_ASPECT_4_3: |
|
- | 2061 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_4_3; |
|
- | 2062 | break; |
|
- | 2063 | case DRM_MODE_PICTURE_ASPECT_16_9: |
|
- | 2064 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_16_9; |
|
- | 2065 | break; |
|
- | 2066 | default: |
|
- | 2067 | return -EINVAL; |
|
- | 2068 | } |
|
- | 2069 | goto done; |
|
- | 2070 | } |
|
2084 | 2071 | ||
2085 | #define CHECK_PROPERTY(name, NAME) \ |
2072 | #define CHECK_PROPERTY(name, NAME) \ |
2086 | if (intel_sdvo_connector->name == property) { \ |
2073 | if (intel_sdvo_connector->name == property) { \ |
2087 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
2074 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
2088 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
2075 | if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ |
2089 | cmd = SDVO_CMD_SET_##NAME; \ |
2076 | cmd = SDVO_CMD_SET_##NAME; \ |
2090 | intel_sdvo_connector->cur_##name = temp_value; \ |
2077 | intel_sdvo_connector->cur_##name = temp_value; \ |
2091 | goto set_value; \ |
2078 | goto set_value; \ |
2092 | } |
2079 | } |
2093 | 2080 | ||
2094 | if (property == intel_sdvo_connector->tv_format) { |
2081 | if (property == intel_sdvo_connector->tv_format) { |
2095 | if (val >= TV_FORMAT_NUM) |
2082 | if (val >= TV_FORMAT_NUM) |
2096 | return -EINVAL; |
2083 | return -EINVAL; |
2097 | 2084 | ||
2098 | if (intel_sdvo->tv_format_index == |
2085 | if (intel_sdvo->tv_format_index == |
2099 | intel_sdvo_connector->tv_format_supported[val]) |
2086 | intel_sdvo_connector->tv_format_supported[val]) |
2100 | return 0; |
2087 | return 0; |
2101 | 2088 | ||
2102 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
2089 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; |
2103 | goto done; |
2090 | goto done; |
2104 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
2091 | } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { |
2105 | temp_value = val; |
2092 | temp_value = val; |
2106 | if (intel_sdvo_connector->left == property) { |
2093 | if (intel_sdvo_connector->left == property) { |
2107 | drm_object_property_set_value(&connector->base, |
2094 | drm_object_property_set_value(&connector->base, |
2108 | intel_sdvo_connector->right, val); |
2095 | intel_sdvo_connector->right, val); |
2109 | if (intel_sdvo_connector->left_margin == temp_value) |
2096 | if (intel_sdvo_connector->left_margin == temp_value) |
2110 | return 0; |
2097 | return 0; |
2111 | 2098 | ||
2112 | intel_sdvo_connector->left_margin = temp_value; |
2099 | intel_sdvo_connector->left_margin = temp_value; |
2113 | intel_sdvo_connector->right_margin = temp_value; |
2100 | intel_sdvo_connector->right_margin = temp_value; |
2114 | temp_value = intel_sdvo_connector->max_hscan - |
2101 | temp_value = intel_sdvo_connector->max_hscan - |
2115 | intel_sdvo_connector->left_margin; |
2102 | intel_sdvo_connector->left_margin; |
2116 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
2103 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
2117 | goto set_value; |
2104 | goto set_value; |
2118 | } else if (intel_sdvo_connector->right == property) { |
2105 | } else if (intel_sdvo_connector->right == property) { |
2119 | drm_object_property_set_value(&connector->base, |
2106 | drm_object_property_set_value(&connector->base, |
2120 | intel_sdvo_connector->left, val); |
2107 | intel_sdvo_connector->left, val); |
2121 | if (intel_sdvo_connector->right_margin == temp_value) |
2108 | if (intel_sdvo_connector->right_margin == temp_value) |
2122 | return 0; |
2109 | return 0; |
2123 | 2110 | ||
2124 | intel_sdvo_connector->left_margin = temp_value; |
2111 | intel_sdvo_connector->left_margin = temp_value; |
2125 | intel_sdvo_connector->right_margin = temp_value; |
2112 | intel_sdvo_connector->right_margin = temp_value; |
2126 | temp_value = intel_sdvo_connector->max_hscan - |
2113 | temp_value = intel_sdvo_connector->max_hscan - |
2127 | intel_sdvo_connector->left_margin; |
2114 | intel_sdvo_connector->left_margin; |
2128 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
2115 | cmd = SDVO_CMD_SET_OVERSCAN_H; |
2129 | goto set_value; |
2116 | goto set_value; |
2130 | } else if (intel_sdvo_connector->top == property) { |
2117 | } else if (intel_sdvo_connector->top == property) { |
2131 | drm_object_property_set_value(&connector->base, |
2118 | drm_object_property_set_value(&connector->base, |
2132 | intel_sdvo_connector->bottom, val); |
2119 | intel_sdvo_connector->bottom, val); |
2133 | if (intel_sdvo_connector->top_margin == temp_value) |
2120 | if (intel_sdvo_connector->top_margin == temp_value) |
2134 | return 0; |
2121 | return 0; |
2135 | 2122 | ||
2136 | intel_sdvo_connector->top_margin = temp_value; |
2123 | intel_sdvo_connector->top_margin = temp_value; |
2137 | intel_sdvo_connector->bottom_margin = temp_value; |
2124 | intel_sdvo_connector->bottom_margin = temp_value; |
2138 | temp_value = intel_sdvo_connector->max_vscan - |
2125 | temp_value = intel_sdvo_connector->max_vscan - |
2139 | intel_sdvo_connector->top_margin; |
2126 | intel_sdvo_connector->top_margin; |
2140 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2127 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2141 | goto set_value; |
2128 | goto set_value; |
2142 | } else if (intel_sdvo_connector->bottom == property) { |
2129 | } else if (intel_sdvo_connector->bottom == property) { |
2143 | drm_object_property_set_value(&connector->base, |
2130 | drm_object_property_set_value(&connector->base, |
2144 | intel_sdvo_connector->top, val); |
2131 | intel_sdvo_connector->top, val); |
2145 | if (intel_sdvo_connector->bottom_margin == temp_value) |
2132 | if (intel_sdvo_connector->bottom_margin == temp_value) |
2146 | return 0; |
2133 | return 0; |
2147 | 2134 | ||
2148 | intel_sdvo_connector->top_margin = temp_value; |
2135 | intel_sdvo_connector->top_margin = temp_value; |
2149 | intel_sdvo_connector->bottom_margin = temp_value; |
2136 | intel_sdvo_connector->bottom_margin = temp_value; |
2150 | temp_value = intel_sdvo_connector->max_vscan - |
2137 | temp_value = intel_sdvo_connector->max_vscan - |
2151 | intel_sdvo_connector->top_margin; |
2138 | intel_sdvo_connector->top_margin; |
2152 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2139 | cmd = SDVO_CMD_SET_OVERSCAN_V; |
2153 | goto set_value; |
2140 | goto set_value; |
2154 | } |
2141 | } |
2155 | CHECK_PROPERTY(hpos, HPOS) |
2142 | CHECK_PROPERTY(hpos, HPOS) |
2156 | CHECK_PROPERTY(vpos, VPOS) |
2143 | CHECK_PROPERTY(vpos, VPOS) |
2157 | CHECK_PROPERTY(saturation, SATURATION) |
2144 | CHECK_PROPERTY(saturation, SATURATION) |
2158 | CHECK_PROPERTY(contrast, CONTRAST) |
2145 | CHECK_PROPERTY(contrast, CONTRAST) |
2159 | CHECK_PROPERTY(hue, HUE) |
2146 | CHECK_PROPERTY(hue, HUE) |
2160 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
2147 | CHECK_PROPERTY(brightness, BRIGHTNESS) |
2161 | CHECK_PROPERTY(sharpness, SHARPNESS) |
2148 | CHECK_PROPERTY(sharpness, SHARPNESS) |
2162 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
2149 | CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) |
2163 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
2150 | CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) |
2164 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
2151 | CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) |
2165 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
2152 | CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) |
2166 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
2153 | CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) |
2167 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
2154 | CHECK_PROPERTY(dot_crawl, DOT_CRAWL) |
2168 | } |
2155 | } |
2169 | 2156 | ||
2170 | return -EINVAL; /* unknown property */ |
2157 | return -EINVAL; /* unknown property */ |
2171 | 2158 | ||
2172 | set_value: |
2159 | set_value: |
2173 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
2160 | if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) |
2174 | return -EIO; |
2161 | return -EIO; |
2175 | 2162 | ||
2176 | 2163 | ||
2177 | done: |
2164 | done: |
2178 | if (intel_sdvo->base.base.crtc) |
2165 | if (intel_sdvo->base.base.crtc) |
2179 | intel_crtc_restore_mode(intel_sdvo->base.base.crtc); |
2166 | intel_crtc_restore_mode(intel_sdvo->base.base.crtc); |
2180 | 2167 | ||
2181 | return 0; |
2168 | return 0; |
2182 | #undef CHECK_PROPERTY |
2169 | #undef CHECK_PROPERTY |
2183 | } |
2170 | } |
2184 | 2171 | ||
2185 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2172 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2186 | .dpms = intel_sdvo_dpms, |
2173 | .dpms = drm_atomic_helper_connector_dpms, |
2187 | .detect = intel_sdvo_detect, |
2174 | .detect = intel_sdvo_detect, |
2188 | .fill_modes = drm_helper_probe_single_connector_modes, |
2175 | .fill_modes = drm_helper_probe_single_connector_modes, |
2189 | .set_property = intel_sdvo_set_property, |
2176 | .set_property = intel_sdvo_set_property, |
- | 2177 | .atomic_get_property = intel_connector_atomic_get_property, |
|
2190 | .destroy = intel_sdvo_destroy, |
2178 | .destroy = intel_sdvo_destroy, |
- | 2179 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
|
- | 2180 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
|
2191 | }; |
2181 | }; |
2192 | 2182 | ||
2193 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
2183 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
2194 | .get_modes = intel_sdvo_get_modes, |
2184 | .get_modes = intel_sdvo_get_modes, |
2195 | .mode_valid = intel_sdvo_mode_valid, |
2185 | .mode_valid = intel_sdvo_mode_valid, |
2196 | .best_encoder = intel_best_encoder, |
2186 | .best_encoder = intel_best_encoder, |
2197 | }; |
2187 | }; |
2198 | 2188 | ||
2199 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
2189 | static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) |
2200 | { |
2190 | { |
2201 | struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); |
2191 | struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); |
2202 | 2192 | ||
2203 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2193 | if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) |
2204 | drm_mode_destroy(encoder->dev, |
2194 | drm_mode_destroy(encoder->dev, |
2205 | intel_sdvo->sdvo_lvds_fixed_mode); |
2195 | intel_sdvo->sdvo_lvds_fixed_mode); |
2206 | 2196 | ||
2207 | i2c_del_adapter(&intel_sdvo->ddc); |
2197 | i2c_del_adapter(&intel_sdvo->ddc); |
2208 | intel_encoder_destroy(encoder); |
2198 | intel_encoder_destroy(encoder); |
2209 | } |
2199 | } |
2210 | 2200 | ||
2211 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2201 | static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { |
2212 | .destroy = intel_sdvo_enc_destroy, |
2202 | .destroy = intel_sdvo_enc_destroy, |
2213 | }; |
2203 | }; |
2214 | 2204 | ||
2215 | static void |
2205 | static void |
2216 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2206 | intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) |
2217 | { |
2207 | { |
2218 | uint16_t mask = 0; |
2208 | uint16_t mask = 0; |
2219 | unsigned int num_bits; |
2209 | unsigned int num_bits; |
2220 | 2210 | ||
2221 | /* Make a mask of outputs less than or equal to our own priority in the |
2211 | /* Make a mask of outputs less than or equal to our own priority in the |
2222 | * list. |
2212 | * list. |
2223 | */ |
2213 | */ |
2224 | switch (sdvo->controlled_output) { |
2214 | switch (sdvo->controlled_output) { |
2225 | case SDVO_OUTPUT_LVDS1: |
2215 | case SDVO_OUTPUT_LVDS1: |
2226 | mask |= SDVO_OUTPUT_LVDS1; |
2216 | mask |= SDVO_OUTPUT_LVDS1; |
2227 | case SDVO_OUTPUT_LVDS0: |
2217 | case SDVO_OUTPUT_LVDS0: |
2228 | mask |= SDVO_OUTPUT_LVDS0; |
2218 | mask |= SDVO_OUTPUT_LVDS0; |
2229 | case SDVO_OUTPUT_TMDS1: |
2219 | case SDVO_OUTPUT_TMDS1: |
2230 | mask |= SDVO_OUTPUT_TMDS1; |
2220 | mask |= SDVO_OUTPUT_TMDS1; |
2231 | case SDVO_OUTPUT_TMDS0: |
2221 | case SDVO_OUTPUT_TMDS0: |
2232 | mask |= SDVO_OUTPUT_TMDS0; |
2222 | mask |= SDVO_OUTPUT_TMDS0; |
2233 | case SDVO_OUTPUT_RGB1: |
2223 | case SDVO_OUTPUT_RGB1: |
2234 | mask |= SDVO_OUTPUT_RGB1; |
2224 | mask |= SDVO_OUTPUT_RGB1; |
2235 | case SDVO_OUTPUT_RGB0: |
2225 | case SDVO_OUTPUT_RGB0: |
2236 | mask |= SDVO_OUTPUT_RGB0; |
2226 | mask |= SDVO_OUTPUT_RGB0; |
2237 | break; |
2227 | break; |
2238 | } |
2228 | } |
2239 | 2229 | ||
2240 | /* Count bits to find what number we are in the priority list. */ |
2230 | /* Count bits to find what number we are in the priority list. */ |
2241 | mask &= sdvo->caps.output_flags; |
2231 | mask &= sdvo->caps.output_flags; |
2242 | num_bits = hweight16(mask); |
2232 | num_bits = hweight16(mask); |
2243 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2233 | /* If more than 3 outputs, default to DDC bus 3 for now. */ |
2244 | if (num_bits > 3) |
2234 | if (num_bits > 3) |
2245 | num_bits = 3; |
2235 | num_bits = 3; |
2246 | 2236 | ||
2247 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2237 | /* Corresponds to SDVO_CONTROL_BUS_DDCx */ |
2248 | sdvo->ddc_bus = 1 << num_bits; |
2238 | sdvo->ddc_bus = 1 << num_bits; |
2249 | } |
2239 | } |
2250 | 2240 | ||
2251 | /** |
2241 | /** |
2252 | * Choose the appropriate DDC bus for control bus switch command for this |
2242 | * Choose the appropriate DDC bus for control bus switch command for this |
2253 | * SDVO output based on the controlled output. |
2243 | * SDVO output based on the controlled output. |
2254 | * |
2244 | * |
2255 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2245 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2256 | * outputs, then LVDS outputs. |
2246 | * outputs, then LVDS outputs. |
2257 | */ |
2247 | */ |
2258 | static void |
2248 | static void |
2259 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2249 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2260 | struct intel_sdvo *sdvo, u32 reg) |
2250 | struct intel_sdvo *sdvo) |
2261 | { |
2251 | { |
2262 | struct sdvo_device_mapping *mapping; |
2252 | struct sdvo_device_mapping *mapping; |
2263 | 2253 | ||
2264 | if (sdvo->is_sdvob) |
2254 | if (sdvo->is_sdvob) |
2265 | mapping = &(dev_priv->sdvo_mappings[0]); |
2255 | mapping = &(dev_priv->sdvo_mappings[0]); |
2266 | else |
2256 | else |
2267 | mapping = &(dev_priv->sdvo_mappings[1]); |
2257 | mapping = &(dev_priv->sdvo_mappings[1]); |
2268 | 2258 | ||
2269 | if (mapping->initialized) |
2259 | if (mapping->initialized) |
2270 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2260 | sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); |
2271 | else |
2261 | else |
2272 | intel_sdvo_guess_ddc_bus(sdvo); |
2262 | intel_sdvo_guess_ddc_bus(sdvo); |
2273 | } |
2263 | } |
2274 | 2264 | ||
2275 | static void |
2265 | static void |
2276 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2266 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2277 | struct intel_sdvo *sdvo, u32 reg) |
2267 | struct intel_sdvo *sdvo) |
2278 | { |
2268 | { |
2279 | struct sdvo_device_mapping *mapping; |
2269 | struct sdvo_device_mapping *mapping; |
2280 | u8 pin; |
2270 | u8 pin; |
2281 | 2271 | ||
2282 | if (sdvo->is_sdvob) |
2272 | if (sdvo->is_sdvob) |
2283 | mapping = &dev_priv->sdvo_mappings[0]; |
2273 | mapping = &dev_priv->sdvo_mappings[0]; |
2284 | else |
2274 | else |
2285 | mapping = &dev_priv->sdvo_mappings[1]; |
2275 | mapping = &dev_priv->sdvo_mappings[1]; |
- | 2276 | ||
2286 | 2277 | if (mapping->initialized && |
|
2287 | if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) |
2278 | intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) |
2288 | pin = mapping->i2c_pin; |
2279 | pin = mapping->i2c_pin; |
2289 | else |
2280 | else |
2290 | pin = GMBUS_PORT_DPB; |
2281 | pin = GMBUS_PIN_DPB; |
2291 | 2282 | ||
2292 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2283 | sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); |
2293 | 2284 | ||
2294 | /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow |
2285 | /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow |
2295 | * our code totally fails once we start using gmbus. Hence fall back to |
2286 | * our code totally fails once we start using gmbus. Hence fall back to |
2296 | * bit banging for now. */ |
2287 | * bit banging for now. */ |
2297 | intel_gmbus_force_bit(sdvo->i2c, true); |
2288 | intel_gmbus_force_bit(sdvo->i2c, true); |
2298 | } |
2289 | } |
2299 | 2290 | ||
2300 | /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ |
2291 | /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ |
2301 | static void |
2292 | static void |
2302 | intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) |
2293 | intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) |
2303 | { |
2294 | { |
2304 | intel_gmbus_force_bit(sdvo->i2c, false); |
2295 | intel_gmbus_force_bit(sdvo->i2c, false); |
2305 | } |
2296 | } |
2306 | 2297 | ||
2307 | static bool |
2298 | static bool |
2308 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2299 | intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) |
2309 | { |
2300 | { |
2310 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2301 | return intel_sdvo_check_supp_encode(intel_sdvo); |
2311 | } |
2302 | } |
2312 | 2303 | ||
2313 | static u8 |
2304 | static u8 |
2314 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2305 | intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) |
2315 | { |
2306 | { |
2316 | struct drm_i915_private *dev_priv = dev->dev_private; |
2307 | struct drm_i915_private *dev_priv = dev->dev_private; |
2317 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2308 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2318 | 2309 | ||
2319 | if (sdvo->is_sdvob) { |
2310 | if (sdvo->is_sdvob) { |
2320 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2311 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2321 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2312 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2322 | } else { |
2313 | } else { |
2323 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2314 | my_mapping = &dev_priv->sdvo_mappings[1]; |
2324 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2315 | other_mapping = &dev_priv->sdvo_mappings[0]; |
2325 | } |
2316 | } |
2326 | 2317 | ||
2327 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2318 | /* If the BIOS described our SDVO device, take advantage of it. */ |
2328 | if (my_mapping->slave_addr) |
2319 | if (my_mapping->slave_addr) |
2329 | return my_mapping->slave_addr; |
2320 | return my_mapping->slave_addr; |
2330 | 2321 | ||
2331 | /* If the BIOS only described a different SDVO device, use the |
2322 | /* If the BIOS only described a different SDVO device, use the |
2332 | * address that it isn't using. |
2323 | * address that it isn't using. |
2333 | */ |
2324 | */ |
2334 | if (other_mapping->slave_addr) { |
2325 | if (other_mapping->slave_addr) { |
2335 | if (other_mapping->slave_addr == 0x70) |
2326 | if (other_mapping->slave_addr == 0x70) |
2336 | return 0x72; |
2327 | return 0x72; |
2337 | else |
2328 | else |
2338 | return 0x70; |
2329 | return 0x70; |
2339 | } |
2330 | } |
2340 | 2331 | ||
2341 | /* No SDVO device info is found for another DVO port, |
2332 | /* No SDVO device info is found for another DVO port, |
2342 | * so use mapping assumption we had before BIOS parsing. |
2333 | * so use mapping assumption we had before BIOS parsing. |
2343 | */ |
2334 | */ |
2344 | if (sdvo->is_sdvob) |
2335 | if (sdvo->is_sdvob) |
2345 | return 0x70; |
2336 | return 0x70; |
2346 | else |
2337 | else |
2347 | return 0x72; |
2338 | return 0x72; |
2348 | } |
2339 | } |
2349 | 2340 | ||
2350 | static void |
2341 | static void |
2351 | intel_sdvo_connector_unregister(struct intel_connector *intel_connector) |
2342 | intel_sdvo_connector_unregister(struct intel_connector *intel_connector) |
2352 | { |
2343 | { |
2353 | struct drm_connector *drm_connector; |
2344 | struct drm_connector *drm_connector; |
2354 | struct intel_sdvo *sdvo_encoder; |
2345 | struct intel_sdvo *sdvo_encoder; |
2355 | 2346 | ||
2356 | drm_connector = &intel_connector->base; |
2347 | drm_connector = &intel_connector->base; |
2357 | sdvo_encoder = intel_attached_sdvo(&intel_connector->base); |
2348 | sdvo_encoder = intel_attached_sdvo(&intel_connector->base); |
2358 | 2349 | ||
2359 | intel_connector_unregister(intel_connector); |
2350 | intel_connector_unregister(intel_connector); |
2360 | } |
2351 | } |
2361 | 2352 | ||
2362 | static int |
2353 | static int |
2363 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2354 | intel_sdvo_connector_init(struct intel_sdvo_connector *connector, |
2364 | struct intel_sdvo *encoder) |
2355 | struct intel_sdvo *encoder) |
2365 | { |
2356 | { |
2366 | struct drm_connector *drm_connector; |
2357 | struct drm_connector *drm_connector; |
2367 | int ret; |
2358 | int ret; |
2368 | 2359 | ||
2369 | drm_connector = &connector->base.base; |
2360 | drm_connector = &connector->base.base; |
2370 | ret = drm_connector_init(encoder->base.base.dev, |
2361 | ret = drm_connector_init(encoder->base.base.dev, |
2371 | drm_connector, |
2362 | drm_connector, |
2372 | &intel_sdvo_connector_funcs, |
2363 | &intel_sdvo_connector_funcs, |
2373 | connector->base.base.connector_type); |
2364 | connector->base.base.connector_type); |
2374 | if (ret < 0) |
2365 | if (ret < 0) |
2375 | return ret; |
2366 | return ret; |
2376 | 2367 | ||
2377 | drm_connector_helper_add(drm_connector, |
2368 | drm_connector_helper_add(drm_connector, |
2378 | &intel_sdvo_connector_helper_funcs); |
2369 | &intel_sdvo_connector_helper_funcs); |
2379 | 2370 | ||
2380 | connector->base.base.interlace_allowed = 1; |
2371 | connector->base.base.interlace_allowed = 1; |
2381 | connector->base.base.doublescan_allowed = 0; |
2372 | connector->base.base.doublescan_allowed = 0; |
2382 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2373 | connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; |
2383 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2374 | connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; |
2384 | connector->base.unregister = intel_sdvo_connector_unregister; |
2375 | connector->base.unregister = intel_sdvo_connector_unregister; |
2385 | 2376 | ||
2386 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2377 | intel_connector_attach_encoder(&connector->base, &encoder->base); |
2387 | ret = drm_connector_register(drm_connector); |
2378 | ret = drm_connector_register(drm_connector); |
2388 | if (ret < 0) |
2379 | if (ret < 0) |
2389 | goto err1; |
2380 | goto err1; |
2390 | 2381 | ||
2391 | return 0; |
2382 | return 0; |
2392 | 2383 | ||
2393 | err2: |
2384 | err2: |
2394 | drm_connector_unregister(drm_connector); |
2385 | drm_connector_unregister(drm_connector); |
2395 | err1: |
2386 | err1: |
2396 | drm_connector_cleanup(drm_connector); |
2387 | drm_connector_cleanup(drm_connector); |
2397 | 2388 | ||
2398 | return ret; |
2389 | return ret; |
2399 | } |
2390 | } |
2400 | 2391 | ||
2401 | static void |
2392 | static void |
2402 | intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, |
2393 | intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, |
2403 | struct intel_sdvo_connector *connector) |
2394 | struct intel_sdvo_connector *connector) |
2404 | { |
2395 | { |
2405 | struct drm_device *dev = connector->base.base.dev; |
2396 | struct drm_device *dev = connector->base.base.dev; |
2406 | 2397 | ||
2407 | intel_attach_force_audio_property(&connector->base.base); |
2398 | intel_attach_force_audio_property(&connector->base.base); |
2408 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { |
2399 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { |
2409 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2400 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2410 | intel_sdvo->color_range_auto = true; |
2401 | intel_sdvo->color_range_auto = true; |
2411 | } |
2402 | } |
- | 2403 | intel_attach_aspect_ratio_property(&connector->base.base); |
|
- | 2404 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE; |
|
- | 2405 | } |
|
- | 2406 | ||
- | 2407 | static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) |
|
- | 2408 | { |
|
- | 2409 | struct intel_sdvo_connector *sdvo_connector; |
|
- | 2410 | ||
- | 2411 | sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); |
|
- | 2412 | if (!sdvo_connector) |
|
- | 2413 | return NULL; |
|
- | 2414 | ||
- | 2415 | if (intel_connector_init(&sdvo_connector->base) < 0) { |
|
- | 2416 | kfree(sdvo_connector); |
|
- | 2417 | return NULL; |
|
- | 2418 | } |
|
- | 2419 | ||
- | 2420 | return sdvo_connector; |
|
2412 | } |
2421 | } |
2413 | 2422 | ||
2414 | static bool |
2423 | static bool |
2415 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2424 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2416 | { |
2425 | { |
2417 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2426 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2418 | struct drm_connector *connector; |
2427 | struct drm_connector *connector; |
2419 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2428 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); |
2420 | struct intel_connector *intel_connector; |
2429 | struct intel_connector *intel_connector; |
2421 | struct intel_sdvo_connector *intel_sdvo_connector; |
2430 | struct intel_sdvo_connector *intel_sdvo_connector; |
2422 | 2431 | ||
2423 | DRM_DEBUG_KMS("initialising DVI device %d\n", device); |
2432 | DRM_DEBUG_KMS("initialising DVI device %d\n", device); |
2424 | 2433 | ||
2425 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2434 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
2426 | if (!intel_sdvo_connector) |
2435 | if (!intel_sdvo_connector) |
2427 | return false; |
2436 | return false; |
2428 | 2437 | ||
2429 | if (device == 0) { |
2438 | if (device == 0) { |
2430 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2439 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; |
2431 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2440 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; |
2432 | } else if (device == 1) { |
2441 | } else if (device == 1) { |
2433 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2442 | intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; |
2434 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2443 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; |
2435 | } |
2444 | } |
2436 | 2445 | ||
2437 | intel_connector = &intel_sdvo_connector->base; |
2446 | intel_connector = &intel_sdvo_connector->base; |
2438 | connector = &intel_connector->base; |
2447 | connector = &intel_connector->base; |
2439 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2448 | if (intel_sdvo_get_hotplug_support(intel_sdvo) & |
2440 | intel_sdvo_connector->output_flag) { |
2449 | intel_sdvo_connector->output_flag) { |
2441 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2450 | intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; |
2442 | /* Some SDVO devices have one-shot hotplug interrupts. |
2451 | /* Some SDVO devices have one-shot hotplug interrupts. |
2443 | * Ensure that they get re-enabled when an interrupt happens. |
2452 | * Ensure that they get re-enabled when an interrupt happens. |
2444 | */ |
2453 | */ |
2445 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2454 | intel_encoder->hot_plug = intel_sdvo_enable_hotplug; |
2446 | intel_sdvo_enable_hotplug(intel_encoder); |
2455 | intel_sdvo_enable_hotplug(intel_encoder); |
2447 | } else { |
2456 | } else { |
2448 | intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2457 | intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; |
2449 | } |
2458 | } |
2450 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2459 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2451 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2460 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2452 | 2461 | ||
2453 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2462 | if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { |
2454 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2463 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2455 | intel_sdvo->is_hdmi = true; |
2464 | intel_sdvo->is_hdmi = true; |
2456 | } |
2465 | } |
2457 | 2466 | ||
2458 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2467 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2459 | kfree(intel_sdvo_connector); |
2468 | kfree(intel_sdvo_connector); |
2460 | return false; |
2469 | return false; |
2461 | } |
2470 | } |
2462 | 2471 | ||
2463 | if (intel_sdvo->is_hdmi) |
2472 | if (intel_sdvo->is_hdmi) |
2464 | intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); |
2473 | intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); |
2465 | 2474 | ||
2466 | return true; |
2475 | return true; |
2467 | } |
2476 | } |
2468 | 2477 | ||
2469 | static bool |
2478 | static bool |
2470 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2479 | intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) |
2471 | { |
2480 | { |
2472 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2481 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2473 | struct drm_connector *connector; |
2482 | struct drm_connector *connector; |
2474 | struct intel_connector *intel_connector; |
2483 | struct intel_connector *intel_connector; |
2475 | struct intel_sdvo_connector *intel_sdvo_connector; |
2484 | struct intel_sdvo_connector *intel_sdvo_connector; |
2476 | 2485 | ||
2477 | DRM_DEBUG_KMS("initialising TV type %d\n", type); |
2486 | DRM_DEBUG_KMS("initialising TV type %d\n", type); |
2478 | 2487 | ||
2479 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2488 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
2480 | if (!intel_sdvo_connector) |
2489 | if (!intel_sdvo_connector) |
2481 | return false; |
2490 | return false; |
2482 | 2491 | ||
2483 | intel_connector = &intel_sdvo_connector->base; |
2492 | intel_connector = &intel_sdvo_connector->base; |
2484 | connector = &intel_connector->base; |
2493 | connector = &intel_connector->base; |
2485 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2494 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2486 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2495 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2487 | 2496 | ||
2488 | intel_sdvo->controlled_output |= type; |
2497 | intel_sdvo->controlled_output |= type; |
2489 | intel_sdvo_connector->output_flag = type; |
2498 | intel_sdvo_connector->output_flag = type; |
2490 | 2499 | ||
2491 | intel_sdvo->is_tv = true; |
2500 | intel_sdvo->is_tv = true; |
2492 | 2501 | ||
2493 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2502 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2494 | kfree(intel_sdvo_connector); |
2503 | kfree(intel_sdvo_connector); |
2495 | return false; |
2504 | return false; |
2496 | } |
2505 | } |
2497 | 2506 | ||
2498 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2507 | if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) |
2499 | goto err; |
2508 | goto err; |
2500 | 2509 | ||
2501 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2510 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2502 | goto err; |
2511 | goto err; |
2503 | 2512 | ||
2504 | return true; |
2513 | return true; |
2505 | 2514 | ||
2506 | err: |
2515 | err: |
2507 | drm_connector_unregister(connector); |
2516 | drm_connector_unregister(connector); |
2508 | intel_sdvo_destroy(connector); |
2517 | intel_sdvo_destroy(connector); |
2509 | return false; |
2518 | return false; |
2510 | } |
2519 | } |
2511 | 2520 | ||
2512 | static bool |
2521 | static bool |
2513 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2522 | intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) |
2514 | { |
2523 | { |
2515 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2524 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2516 | struct drm_connector *connector; |
2525 | struct drm_connector *connector; |
2517 | struct intel_connector *intel_connector; |
2526 | struct intel_connector *intel_connector; |
2518 | struct intel_sdvo_connector *intel_sdvo_connector; |
2527 | struct intel_sdvo_connector *intel_sdvo_connector; |
2519 | 2528 | ||
2520 | DRM_DEBUG_KMS("initialising analog device %d\n", device); |
2529 | DRM_DEBUG_KMS("initialising analog device %d\n", device); |
2521 | 2530 | ||
2522 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2531 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
2523 | if (!intel_sdvo_connector) |
2532 | if (!intel_sdvo_connector) |
2524 | return false; |
2533 | return false; |
2525 | 2534 | ||
2526 | intel_connector = &intel_sdvo_connector->base; |
2535 | intel_connector = &intel_sdvo_connector->base; |
2527 | connector = &intel_connector->base; |
2536 | connector = &intel_connector->base; |
2528 | intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2537 | intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
2529 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2538 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2530 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2539 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2531 | 2540 | ||
2532 | if (device == 0) { |
2541 | if (device == 0) { |
2533 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2542 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; |
2534 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2543 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; |
2535 | } else if (device == 1) { |
2544 | } else if (device == 1) { |
2536 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2545 | intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; |
2537 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2546 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; |
2538 | } |
2547 | } |
2539 | 2548 | ||
2540 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2549 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2541 | kfree(intel_sdvo_connector); |
2550 | kfree(intel_sdvo_connector); |
2542 | return false; |
2551 | return false; |
2543 | } |
2552 | } |
2544 | 2553 | ||
2545 | return true; |
2554 | return true; |
2546 | } |
2555 | } |
2547 | 2556 | ||
2548 | static bool |
2557 | static bool |
2549 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2558 | intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) |
2550 | { |
2559 | { |
2551 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2560 | struct drm_encoder *encoder = &intel_sdvo->base.base; |
2552 | struct drm_connector *connector; |
2561 | struct drm_connector *connector; |
2553 | struct intel_connector *intel_connector; |
2562 | struct intel_connector *intel_connector; |
2554 | struct intel_sdvo_connector *intel_sdvo_connector; |
2563 | struct intel_sdvo_connector *intel_sdvo_connector; |
2555 | 2564 | ||
2556 | DRM_DEBUG_KMS("initialising LVDS device %d\n", device); |
2565 | DRM_DEBUG_KMS("initialising LVDS device %d\n", device); |
2557 | 2566 | ||
2558 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2567 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
2559 | if (!intel_sdvo_connector) |
2568 | if (!intel_sdvo_connector) |
2560 | return false; |
2569 | return false; |
2561 | 2570 | ||
2562 | intel_connector = &intel_sdvo_connector->base; |
2571 | intel_connector = &intel_sdvo_connector->base; |
2563 | connector = &intel_connector->base; |
2572 | connector = &intel_connector->base; |
2564 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2573 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2565 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2574 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2566 | 2575 | ||
2567 | if (device == 0) { |
2576 | if (device == 0) { |
2568 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2577 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; |
2569 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2578 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; |
2570 | } else if (device == 1) { |
2579 | } else if (device == 1) { |
2571 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2580 | intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; |
2572 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2581 | intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; |
2573 | } |
2582 | } |
2574 | 2583 | ||
2575 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2584 | if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { |
2576 | kfree(intel_sdvo_connector); |
2585 | kfree(intel_sdvo_connector); |
2577 | return false; |
2586 | return false; |
2578 | } |
2587 | } |
2579 | 2588 | ||
2580 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2589 | if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) |
2581 | goto err; |
2590 | goto err; |
2582 | 2591 | ||
2583 | return true; |
2592 | return true; |
2584 | 2593 | ||
2585 | err: |
2594 | err: |
2586 | drm_connector_unregister(connector); |
2595 | drm_connector_unregister(connector); |
2587 | intel_sdvo_destroy(connector); |
2596 | intel_sdvo_destroy(connector); |
2588 | return false; |
2597 | return false; |
2589 | } |
2598 | } |
2590 | 2599 | ||
2591 | static bool |
2600 | static bool |
2592 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2601 | intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) |
2593 | { |
2602 | { |
2594 | intel_sdvo->is_tv = false; |
2603 | intel_sdvo->is_tv = false; |
2595 | intel_sdvo->is_lvds = false; |
2604 | intel_sdvo->is_lvds = false; |
2596 | 2605 | ||
2597 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2606 | /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ |
2598 | 2607 | ||
2599 | if (flags & SDVO_OUTPUT_TMDS0) |
2608 | if (flags & SDVO_OUTPUT_TMDS0) |
2600 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2609 | if (!intel_sdvo_dvi_init(intel_sdvo, 0)) |
2601 | return false; |
2610 | return false; |
2602 | 2611 | ||
2603 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2612 | if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) |
2604 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2613 | if (!intel_sdvo_dvi_init(intel_sdvo, 1)) |
2605 | return false; |
2614 | return false; |
2606 | 2615 | ||
2607 | /* TV has no XXX1 function block */ |
2616 | /* TV has no XXX1 function block */ |
2608 | if (flags & SDVO_OUTPUT_SVID0) |
2617 | if (flags & SDVO_OUTPUT_SVID0) |
2609 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2618 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) |
2610 | return false; |
2619 | return false; |
2611 | 2620 | ||
2612 | if (flags & SDVO_OUTPUT_CVBS0) |
2621 | if (flags & SDVO_OUTPUT_CVBS0) |
2613 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2622 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) |
2614 | return false; |
2623 | return false; |
2615 | 2624 | ||
2616 | if (flags & SDVO_OUTPUT_YPRPB0) |
2625 | if (flags & SDVO_OUTPUT_YPRPB0) |
2617 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2626 | if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) |
2618 | return false; |
2627 | return false; |
2619 | 2628 | ||
2620 | if (flags & SDVO_OUTPUT_RGB0) |
2629 | if (flags & SDVO_OUTPUT_RGB0) |
2621 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2630 | if (!intel_sdvo_analog_init(intel_sdvo, 0)) |
2622 | return false; |
2631 | return false; |
2623 | 2632 | ||
2624 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2633 | if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) |
2625 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2634 | if (!intel_sdvo_analog_init(intel_sdvo, 1)) |
2626 | return false; |
2635 | return false; |
2627 | 2636 | ||
2628 | if (flags & SDVO_OUTPUT_LVDS0) |
2637 | if (flags & SDVO_OUTPUT_LVDS0) |
2629 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2638 | if (!intel_sdvo_lvds_init(intel_sdvo, 0)) |
2630 | return false; |
2639 | return false; |
2631 | 2640 | ||
2632 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2641 | if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) |
2633 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2642 | if (!intel_sdvo_lvds_init(intel_sdvo, 1)) |
2634 | return false; |
2643 | return false; |
2635 | 2644 | ||
2636 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2645 | if ((flags & SDVO_OUTPUT_MASK) == 0) { |
2637 | unsigned char bytes[2]; |
2646 | unsigned char bytes[2]; |
2638 | 2647 | ||
2639 | intel_sdvo->controlled_output = 0; |
2648 | intel_sdvo->controlled_output = 0; |
2640 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2649 | memcpy(bytes, &intel_sdvo->caps.output_flags, 2); |
2641 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2650 | DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", |
2642 | SDVO_NAME(intel_sdvo), |
2651 | SDVO_NAME(intel_sdvo), |
2643 | bytes[0], bytes[1]); |
2652 | bytes[0], bytes[1]); |
2644 | return false; |
2653 | return false; |
2645 | } |
2654 | } |
2646 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2655 | intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
2647 | 2656 | ||
2648 | return true; |
2657 | return true; |
2649 | } |
2658 | } |
2650 | 2659 | ||
2651 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) |
2660 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) |
2652 | { |
2661 | { |
2653 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2662 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2654 | struct drm_connector *connector, *tmp; |
2663 | struct drm_connector *connector, *tmp; |
2655 | 2664 | ||
2656 | list_for_each_entry_safe(connector, tmp, |
2665 | list_for_each_entry_safe(connector, tmp, |
2657 | &dev->mode_config.connector_list, head) { |
2666 | &dev->mode_config.connector_list, head) { |
2658 | if (intel_attached_encoder(connector) == &intel_sdvo->base) { |
2667 | if (intel_attached_encoder(connector) == &intel_sdvo->base) { |
2659 | drm_connector_unregister(connector); |
2668 | drm_connector_unregister(connector); |
2660 | intel_sdvo_destroy(connector); |
2669 | intel_sdvo_destroy(connector); |
2661 | } |
2670 | } |
2662 | } |
2671 | } |
2663 | } |
2672 | } |
2664 | 2673 | ||
2665 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2674 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2666 | struct intel_sdvo_connector *intel_sdvo_connector, |
2675 | struct intel_sdvo_connector *intel_sdvo_connector, |
2667 | int type) |
2676 | int type) |
2668 | { |
2677 | { |
2669 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2678 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2670 | struct intel_sdvo_tv_format format; |
2679 | struct intel_sdvo_tv_format format; |
2671 | uint32_t format_map, i; |
2680 | uint32_t format_map, i; |
2672 | 2681 | ||
2673 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2682 | if (!intel_sdvo_set_target_output(intel_sdvo, type)) |
2674 | return false; |
2683 | return false; |
2675 | 2684 | ||
2676 | BUILD_BUG_ON(sizeof(format) != 6); |
2685 | BUILD_BUG_ON(sizeof(format) != 6); |
2677 | if (!intel_sdvo_get_value(intel_sdvo, |
2686 | if (!intel_sdvo_get_value(intel_sdvo, |
2678 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2687 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, |
2679 | &format, sizeof(format))) |
2688 | &format, sizeof(format))) |
2680 | return false; |
2689 | return false; |
2681 | 2690 | ||
2682 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2691 | memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); |
2683 | 2692 | ||
2684 | if (format_map == 0) |
2693 | if (format_map == 0) |
2685 | return false; |
2694 | return false; |
2686 | 2695 | ||
2687 | intel_sdvo_connector->format_supported_num = 0; |
2696 | intel_sdvo_connector->format_supported_num = 0; |
2688 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2697 | for (i = 0 ; i < TV_FORMAT_NUM; i++) |
2689 | if (format_map & (1 << i)) |
2698 | if (format_map & (1 << i)) |
2690 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2699 | intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; |
2691 | 2700 | ||
2692 | 2701 | ||
2693 | intel_sdvo_connector->tv_format = |
2702 | intel_sdvo_connector->tv_format = |
2694 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2703 | drm_property_create(dev, DRM_MODE_PROP_ENUM, |
2695 | "mode", intel_sdvo_connector->format_supported_num); |
2704 | "mode", intel_sdvo_connector->format_supported_num); |
2696 | if (!intel_sdvo_connector->tv_format) |
2705 | if (!intel_sdvo_connector->tv_format) |
2697 | return false; |
2706 | return false; |
2698 | 2707 | ||
2699 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2708 | for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) |
2700 | drm_property_add_enum( |
2709 | drm_property_add_enum( |
2701 | intel_sdvo_connector->tv_format, i, |
2710 | intel_sdvo_connector->tv_format, i, |
2702 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2711 | i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); |
2703 | 2712 | ||
2704 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2713 | intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; |
2705 | drm_object_attach_property(&intel_sdvo_connector->base.base.base, |
2714 | drm_object_attach_property(&intel_sdvo_connector->base.base.base, |
2706 | intel_sdvo_connector->tv_format, 0); |
2715 | intel_sdvo_connector->tv_format, 0); |
2707 | return true; |
2716 | return true; |
2708 | 2717 | ||
2709 | } |
2718 | } |
2710 | 2719 | ||
2711 | #define ENHANCEMENT(name, NAME) do { \ |
2720 | #define ENHANCEMENT(name, NAME) do { \ |
2712 | if (enhancements.name) { \ |
2721 | if (enhancements.name) { \ |
2713 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2722 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ |
2714 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2723 | !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ |
2715 | return false; \ |
2724 | return false; \ |
2716 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2725 | intel_sdvo_connector->max_##name = data_value[0]; \ |
2717 | intel_sdvo_connector->cur_##name = response; \ |
2726 | intel_sdvo_connector->cur_##name = response; \ |
2718 | intel_sdvo_connector->name = \ |
2727 | intel_sdvo_connector->name = \ |
2719 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2728 | drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ |
2720 | if (!intel_sdvo_connector->name) return false; \ |
2729 | if (!intel_sdvo_connector->name) return false; \ |
2721 | drm_object_attach_property(&connector->base, \ |
2730 | drm_object_attach_property(&connector->base, \ |
2722 | intel_sdvo_connector->name, \ |
2731 | intel_sdvo_connector->name, \ |
2723 | intel_sdvo_connector->cur_##name); \ |
2732 | intel_sdvo_connector->cur_##name); \ |
2724 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2733 | DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ |
2725 | data_value[0], data_value[1], response); \ |
2734 | data_value[0], data_value[1], response); \ |
2726 | } \ |
2735 | } \ |
2727 | } while (0) |
2736 | } while (0) |
2728 | 2737 | ||
2729 | static bool |
2738 | static bool |
2730 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2739 | intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, |
2731 | struct intel_sdvo_connector *intel_sdvo_connector, |
2740 | struct intel_sdvo_connector *intel_sdvo_connector, |
2732 | struct intel_sdvo_enhancements_reply enhancements) |
2741 | struct intel_sdvo_enhancements_reply enhancements) |
2733 | { |
2742 | { |
2734 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2743 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2735 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2744 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2736 | uint16_t response, data_value[2]; |
2745 | uint16_t response, data_value[2]; |
2737 | 2746 | ||
2738 | /* when horizontal overscan is supported, Add the left/right property */ |
2747 | /* when horizontal overscan is supported, Add the left/right property */ |
2739 | if (enhancements.overscan_h) { |
2748 | if (enhancements.overscan_h) { |
2740 | if (!intel_sdvo_get_value(intel_sdvo, |
2749 | if (!intel_sdvo_get_value(intel_sdvo, |
2741 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2750 | SDVO_CMD_GET_MAX_OVERSCAN_H, |
2742 | &data_value, 4)) |
2751 | &data_value, 4)) |
2743 | return false; |
2752 | return false; |
2744 | 2753 | ||
2745 | if (!intel_sdvo_get_value(intel_sdvo, |
2754 | if (!intel_sdvo_get_value(intel_sdvo, |
2746 | SDVO_CMD_GET_OVERSCAN_H, |
2755 | SDVO_CMD_GET_OVERSCAN_H, |
2747 | &response, 2)) |
2756 | &response, 2)) |
2748 | return false; |
2757 | return false; |
2749 | 2758 | ||
2750 | intel_sdvo_connector->max_hscan = data_value[0]; |
2759 | intel_sdvo_connector->max_hscan = data_value[0]; |
2751 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2760 | intel_sdvo_connector->left_margin = data_value[0] - response; |
2752 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2761 | intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; |
2753 | intel_sdvo_connector->left = |
2762 | intel_sdvo_connector->left = |
2754 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2763 | drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); |
2755 | if (!intel_sdvo_connector->left) |
2764 | if (!intel_sdvo_connector->left) |
2756 | return false; |
2765 | return false; |
2757 | 2766 | ||
2758 | drm_object_attach_property(&connector->base, |
2767 | drm_object_attach_property(&connector->base, |
2759 | intel_sdvo_connector->left, |
2768 | intel_sdvo_connector->left, |
2760 | intel_sdvo_connector->left_margin); |
2769 | intel_sdvo_connector->left_margin); |
2761 | 2770 | ||
2762 | intel_sdvo_connector->right = |
2771 | intel_sdvo_connector->right = |
2763 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2772 | drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); |
2764 | if (!intel_sdvo_connector->right) |
2773 | if (!intel_sdvo_connector->right) |
2765 | return false; |
2774 | return false; |
2766 | 2775 | ||
2767 | drm_object_attach_property(&connector->base, |
2776 | drm_object_attach_property(&connector->base, |
2768 | intel_sdvo_connector->right, |
2777 | intel_sdvo_connector->right, |
2769 | intel_sdvo_connector->right_margin); |
2778 | intel_sdvo_connector->right_margin); |
2770 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2779 | DRM_DEBUG_KMS("h_overscan: max %d, " |
2771 | "default %d, current %d\n", |
2780 | "default %d, current %d\n", |
2772 | data_value[0], data_value[1], response); |
2781 | data_value[0], data_value[1], response); |
2773 | } |
2782 | } |
2774 | 2783 | ||
2775 | if (enhancements.overscan_v) { |
2784 | if (enhancements.overscan_v) { |
2776 | if (!intel_sdvo_get_value(intel_sdvo, |
2785 | if (!intel_sdvo_get_value(intel_sdvo, |
2777 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2786 | SDVO_CMD_GET_MAX_OVERSCAN_V, |
2778 | &data_value, 4)) |
2787 | &data_value, 4)) |
2779 | return false; |
2788 | return false; |
2780 | 2789 | ||
2781 | if (!intel_sdvo_get_value(intel_sdvo, |
2790 | if (!intel_sdvo_get_value(intel_sdvo, |
2782 | SDVO_CMD_GET_OVERSCAN_V, |
2791 | SDVO_CMD_GET_OVERSCAN_V, |
2783 | &response, 2)) |
2792 | &response, 2)) |
2784 | return false; |
2793 | return false; |
2785 | 2794 | ||
2786 | intel_sdvo_connector->max_vscan = data_value[0]; |
2795 | intel_sdvo_connector->max_vscan = data_value[0]; |
2787 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2796 | intel_sdvo_connector->top_margin = data_value[0] - response; |
2788 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2797 | intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; |
2789 | intel_sdvo_connector->top = |
2798 | intel_sdvo_connector->top = |
2790 | drm_property_create_range(dev, 0, |
2799 | drm_property_create_range(dev, 0, |
2791 | "top_margin", 0, data_value[0]); |
2800 | "top_margin", 0, data_value[0]); |
2792 | if (!intel_sdvo_connector->top) |
2801 | if (!intel_sdvo_connector->top) |
2793 | return false; |
2802 | return false; |
2794 | 2803 | ||
2795 | drm_object_attach_property(&connector->base, |
2804 | drm_object_attach_property(&connector->base, |
2796 | intel_sdvo_connector->top, |
2805 | intel_sdvo_connector->top, |
2797 | intel_sdvo_connector->top_margin); |
2806 | intel_sdvo_connector->top_margin); |
2798 | 2807 | ||
2799 | intel_sdvo_connector->bottom = |
2808 | intel_sdvo_connector->bottom = |
2800 | drm_property_create_range(dev, 0, |
2809 | drm_property_create_range(dev, 0, |
2801 | "bottom_margin", 0, data_value[0]); |
2810 | "bottom_margin", 0, data_value[0]); |
2802 | if (!intel_sdvo_connector->bottom) |
2811 | if (!intel_sdvo_connector->bottom) |
2803 | return false; |
2812 | return false; |
2804 | 2813 | ||
2805 | drm_object_attach_property(&connector->base, |
2814 | drm_object_attach_property(&connector->base, |
2806 | intel_sdvo_connector->bottom, |
2815 | intel_sdvo_connector->bottom, |
2807 | intel_sdvo_connector->bottom_margin); |
2816 | intel_sdvo_connector->bottom_margin); |
2808 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2817 | DRM_DEBUG_KMS("v_overscan: max %d, " |
2809 | "default %d, current %d\n", |
2818 | "default %d, current %d\n", |
2810 | data_value[0], data_value[1], response); |
2819 | data_value[0], data_value[1], response); |
2811 | } |
2820 | } |
2812 | 2821 | ||
2813 | ENHANCEMENT(hpos, HPOS); |
2822 | ENHANCEMENT(hpos, HPOS); |
2814 | ENHANCEMENT(vpos, VPOS); |
2823 | ENHANCEMENT(vpos, VPOS); |
2815 | ENHANCEMENT(saturation, SATURATION); |
2824 | ENHANCEMENT(saturation, SATURATION); |
2816 | ENHANCEMENT(contrast, CONTRAST); |
2825 | ENHANCEMENT(contrast, CONTRAST); |
2817 | ENHANCEMENT(hue, HUE); |
2826 | ENHANCEMENT(hue, HUE); |
2818 | ENHANCEMENT(sharpness, SHARPNESS); |
2827 | ENHANCEMENT(sharpness, SHARPNESS); |
2819 | ENHANCEMENT(brightness, BRIGHTNESS); |
2828 | ENHANCEMENT(brightness, BRIGHTNESS); |
2820 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2829 | ENHANCEMENT(flicker_filter, FLICKER_FILTER); |
2821 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2830 | ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); |
2822 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2831 | ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); |
2823 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2832 | ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); |
2824 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2833 | ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); |
2825 | 2834 | ||
2826 | if (enhancements.dot_crawl) { |
2835 | if (enhancements.dot_crawl) { |
2827 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2836 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) |
2828 | return false; |
2837 | return false; |
2829 | 2838 | ||
2830 | intel_sdvo_connector->max_dot_crawl = 1; |
2839 | intel_sdvo_connector->max_dot_crawl = 1; |
2831 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2840 | intel_sdvo_connector->cur_dot_crawl = response & 0x1; |
2832 | intel_sdvo_connector->dot_crawl = |
2841 | intel_sdvo_connector->dot_crawl = |
2833 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2842 | drm_property_create_range(dev, 0, "dot_crawl", 0, 1); |
2834 | if (!intel_sdvo_connector->dot_crawl) |
2843 | if (!intel_sdvo_connector->dot_crawl) |
2835 | return false; |
2844 | return false; |
2836 | 2845 | ||
2837 | drm_object_attach_property(&connector->base, |
2846 | drm_object_attach_property(&connector->base, |
2838 | intel_sdvo_connector->dot_crawl, |
2847 | intel_sdvo_connector->dot_crawl, |
2839 | intel_sdvo_connector->cur_dot_crawl); |
2848 | intel_sdvo_connector->cur_dot_crawl); |
2840 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2849 | DRM_DEBUG_KMS("dot crawl: current %d\n", response); |
2841 | } |
2850 | } |
2842 | 2851 | ||
2843 | return true; |
2852 | return true; |
2844 | } |
2853 | } |
2845 | 2854 | ||
2846 | static bool |
2855 | static bool |
2847 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2856 | intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, |
2848 | struct intel_sdvo_connector *intel_sdvo_connector, |
2857 | struct intel_sdvo_connector *intel_sdvo_connector, |
2849 | struct intel_sdvo_enhancements_reply enhancements) |
2858 | struct intel_sdvo_enhancements_reply enhancements) |
2850 | { |
2859 | { |
2851 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2860 | struct drm_device *dev = intel_sdvo->base.base.dev; |
2852 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2861 | struct drm_connector *connector = &intel_sdvo_connector->base.base; |
2853 | uint16_t response, data_value[2]; |
2862 | uint16_t response, data_value[2]; |
2854 | 2863 | ||
2855 | ENHANCEMENT(brightness, BRIGHTNESS); |
2864 | ENHANCEMENT(brightness, BRIGHTNESS); |
2856 | 2865 | ||
2857 | return true; |
2866 | return true; |
2858 | } |
2867 | } |
2859 | #undef ENHANCEMENT |
2868 | #undef ENHANCEMENT |
2860 | 2869 | ||
2861 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2870 | static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, |
2862 | struct intel_sdvo_connector *intel_sdvo_connector) |
2871 | struct intel_sdvo_connector *intel_sdvo_connector) |
2863 | { |
2872 | { |
2864 | union { |
2873 | union { |
2865 | struct intel_sdvo_enhancements_reply reply; |
2874 | struct intel_sdvo_enhancements_reply reply; |
2866 | uint16_t response; |
2875 | uint16_t response; |
2867 | } enhancements; |
2876 | } enhancements; |
2868 | 2877 | ||
2869 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2878 | BUILD_BUG_ON(sizeof(enhancements) != 2); |
2870 | 2879 | ||
2871 | enhancements.response = 0; |
2880 | enhancements.response = 0; |
2872 | intel_sdvo_get_value(intel_sdvo, |
2881 | intel_sdvo_get_value(intel_sdvo, |
2873 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2882 | SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2874 | &enhancements, sizeof(enhancements)); |
2883 | &enhancements, sizeof(enhancements)); |
2875 | if (enhancements.response == 0) { |
2884 | if (enhancements.response == 0) { |
2876 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2885 | DRM_DEBUG_KMS("No enhancement is supported\n"); |
2877 | return true; |
2886 | return true; |
2878 | } |
2887 | } |
2879 | 2888 | ||
2880 | if (IS_TV(intel_sdvo_connector)) |
2889 | if (IS_TV(intel_sdvo_connector)) |
2881 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2890 | return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2882 | else if (IS_LVDS(intel_sdvo_connector)) |
2891 | else if (IS_LVDS(intel_sdvo_connector)) |
2883 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2892 | return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); |
2884 | else |
2893 | else |
2885 | return true; |
2894 | return true; |
2886 | } |
2895 | } |
2887 | 2896 | ||
2888 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2897 | static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, |
2889 | struct i2c_msg *msgs, |
2898 | struct i2c_msg *msgs, |
2890 | int num) |
2899 | int num) |
2891 | { |
2900 | { |
2892 | struct intel_sdvo *sdvo = adapter->algo_data; |
2901 | struct intel_sdvo *sdvo = adapter->algo_data; |
2893 | 2902 | ||
2894 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2903 | if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) |
2895 | return -EIO; |
2904 | return -EIO; |
2896 | 2905 | ||
2897 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2906 | return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); |
2898 | } |
2907 | } |
2899 | 2908 | ||
2900 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2909 | static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) |
2901 | { |
2910 | { |
2902 | struct intel_sdvo *sdvo = adapter->algo_data; |
2911 | struct intel_sdvo *sdvo = adapter->algo_data; |
2903 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2912 | return sdvo->i2c->algo->functionality(sdvo->i2c); |
2904 | } |
2913 | } |
2905 | 2914 | ||
2906 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2915 | static const struct i2c_algorithm intel_sdvo_ddc_proxy = { |
2907 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2916 | .master_xfer = intel_sdvo_ddc_proxy_xfer, |
2908 | .functionality = intel_sdvo_ddc_proxy_func |
2917 | .functionality = intel_sdvo_ddc_proxy_func |
2909 | }; |
2918 | }; |
2910 | 2919 | ||
2911 | static bool |
2920 | static bool |
2912 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2921 | intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, |
2913 | struct drm_device *dev) |
2922 | struct drm_device *dev) |
2914 | { |
2923 | { |
2915 | sdvo->ddc.owner = THIS_MODULE; |
2924 | sdvo->ddc.owner = THIS_MODULE; |
2916 | sdvo->ddc.class = I2C_CLASS_DDC; |
2925 | sdvo->ddc.class = I2C_CLASS_DDC; |
2917 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2926 | snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); |
2918 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2927 | sdvo->ddc.dev.parent = &dev->pdev->dev; |
2919 | sdvo->ddc.algo_data = sdvo; |
2928 | sdvo->ddc.algo_data = sdvo; |
2920 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2929 | sdvo->ddc.algo = &intel_sdvo_ddc_proxy; |
2921 | 2930 | ||
2922 | return i2c_add_adapter(&sdvo->ddc) == 0; |
2931 | return i2c_add_adapter(&sdvo->ddc) == 0; |
2923 | } |
2932 | } |
2924 | 2933 | ||
2925 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2934 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) |
2926 | { |
2935 | { |
2927 | struct drm_i915_private *dev_priv = dev->dev_private; |
2936 | struct drm_i915_private *dev_priv = dev->dev_private; |
2928 | struct intel_encoder *intel_encoder; |
2937 | struct intel_encoder *intel_encoder; |
2929 | struct intel_sdvo *intel_sdvo; |
2938 | struct intel_sdvo *intel_sdvo; |
2930 | int i; |
2939 | int i; |
2931 | intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); |
2940 | intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); |
2932 | if (!intel_sdvo) |
2941 | if (!intel_sdvo) |
2933 | return false; |
2942 | return false; |
2934 | 2943 | ||
2935 | intel_sdvo->sdvo_reg = sdvo_reg; |
2944 | intel_sdvo->sdvo_reg = sdvo_reg; |
2936 | intel_sdvo->is_sdvob = is_sdvob; |
2945 | intel_sdvo->is_sdvob = is_sdvob; |
2937 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2946 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2938 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2947 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); |
2939 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
2948 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
2940 | goto err_i2c_bus; |
2949 | goto err_i2c_bus; |
2941 | 2950 | ||
2942 | /* encoder type will be decided later */ |
2951 | /* encoder type will be decided later */ |
2943 | intel_encoder = &intel_sdvo->base; |
2952 | intel_encoder = &intel_sdvo->base; |
2944 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2953 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2945 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2954 | drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); |
2946 | 2955 | ||
2947 | /* Read the regs to test if we can talk to the device */ |
2956 | /* Read the regs to test if we can talk to the device */ |
2948 | for (i = 0; i < 0x40; i++) { |
2957 | for (i = 0; i < 0x40; i++) { |
2949 | u8 byte; |
2958 | u8 byte; |
2950 | 2959 | ||
2951 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2960 | if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { |
2952 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2961 | DRM_DEBUG_KMS("No SDVO device found on %s\n", |
2953 | SDVO_NAME(intel_sdvo)); |
2962 | SDVO_NAME(intel_sdvo)); |
2954 | goto err; |
2963 | goto err; |
2955 | } |
2964 | } |
2956 | } |
2965 | } |
2957 | 2966 | ||
2958 | intel_encoder->compute_config = intel_sdvo_compute_config; |
2967 | intel_encoder->compute_config = intel_sdvo_compute_config; |
- | 2968 | if (HAS_PCH_SPLIT(dev)) { |
|
- | 2969 | intel_encoder->disable = pch_disable_sdvo; |
|
- | 2970 | intel_encoder->post_disable = pch_post_disable_sdvo; |
|
- | 2971 | } else { |
|
2959 | intel_encoder->disable = intel_disable_sdvo; |
2972 | intel_encoder->disable = intel_disable_sdvo; |
- | 2973 | } |
|
2960 | intel_encoder->pre_enable = intel_sdvo_pre_enable; |
2974 | intel_encoder->pre_enable = intel_sdvo_pre_enable; |
2961 | intel_encoder->enable = intel_enable_sdvo; |
2975 | intel_encoder->enable = intel_enable_sdvo; |
2962 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2976 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2963 | intel_encoder->get_config = intel_sdvo_get_config; |
2977 | intel_encoder->get_config = intel_sdvo_get_config; |
2964 | 2978 | ||
2965 | /* In default case sdvo lvds is false */ |
2979 | /* In default case sdvo lvds is false */ |
2966 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2980 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2967 | goto err; |
2981 | goto err; |
2968 | 2982 | ||
2969 | if (intel_sdvo_output_setup(intel_sdvo, |
2983 | if (intel_sdvo_output_setup(intel_sdvo, |
2970 | intel_sdvo->caps.output_flags) != true) { |
2984 | intel_sdvo->caps.output_flags) != true) { |
2971 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2985 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2972 | SDVO_NAME(intel_sdvo)); |
2986 | SDVO_NAME(intel_sdvo)); |
2973 | /* Output_setup can leave behind connectors! */ |
2987 | /* Output_setup can leave behind connectors! */ |
2974 | goto err_output; |
2988 | goto err_output; |
2975 | } |
2989 | } |
2976 | 2990 | ||
2977 | /* Only enable the hotplug irq if we need it, to work around noisy |
2991 | /* Only enable the hotplug irq if we need it, to work around noisy |
2978 | * hotplug lines. |
2992 | * hotplug lines. |
2979 | */ |
2993 | */ |
2980 | if (intel_sdvo->hotplug_active) { |
2994 | if (intel_sdvo->hotplug_active) { |
2981 | intel_encoder->hpd_pin = |
2995 | intel_encoder->hpd_pin = |
2982 | intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C; |
2996 | intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C; |
2983 | } |
2997 | } |
2984 | 2998 | ||
2985 | /* |
2999 | /* |
2986 | * Cloning SDVO with anything is often impossible, since the SDVO |
3000 | * Cloning SDVO with anything is often impossible, since the SDVO |
2987 | * encoder can request a special input timing mode. And even if that's |
3001 | * encoder can request a special input timing mode. And even if that's |
2988 | * not the case we have evidence that cloning a plain unscaled mode with |
3002 | * not the case we have evidence that cloning a plain unscaled mode with |
2989 | * VGA doesn't really work. Furthermore the cloning flags are way too |
3003 | * VGA doesn't really work. Furthermore the cloning flags are way too |
2990 | * simplistic anyway to express such constraints, so just give up on |
3004 | * simplistic anyway to express such constraints, so just give up on |
2991 | * cloning for SDVO encoders. |
3005 | * cloning for SDVO encoders. |
2992 | */ |
3006 | */ |
2993 | intel_sdvo->base.cloneable = 0; |
3007 | intel_sdvo->base.cloneable = 0; |
2994 | 3008 | ||
2995 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
3009 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); |
2996 | 3010 | ||
2997 | /* Set the input timing to the screen. Assume always input 0. */ |
3011 | /* Set the input timing to the screen. Assume always input 0. */ |
2998 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
3012 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2999 | goto err_output; |
3013 | goto err_output; |
3000 | 3014 | ||
3001 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
3015 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
3002 | &intel_sdvo->pixel_clock_min, |
3016 | &intel_sdvo->pixel_clock_min, |
3003 | &intel_sdvo->pixel_clock_max)) |
3017 | &intel_sdvo->pixel_clock_max)) |
3004 | goto err_output; |
3018 | goto err_output; |
3005 | 3019 | ||
3006 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
3020 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
3007 | "clock range %dMHz - %dMHz, " |
3021 | "clock range %dMHz - %dMHz, " |
3008 | "input 1: %c, input 2: %c, " |
3022 | "input 1: %c, input 2: %c, " |
3009 | "output 1: %c, output 2: %c\n", |
3023 | "output 1: %c, output 2: %c\n", |
3010 | SDVO_NAME(intel_sdvo), |
3024 | SDVO_NAME(intel_sdvo), |
3011 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
3025 | intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, |
3012 | intel_sdvo->caps.device_rev_id, |
3026 | intel_sdvo->caps.device_rev_id, |
3013 | intel_sdvo->pixel_clock_min / 1000, |
3027 | intel_sdvo->pixel_clock_min / 1000, |
3014 | intel_sdvo->pixel_clock_max / 1000, |
3028 | intel_sdvo->pixel_clock_max / 1000, |
3015 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
3029 | (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', |
3016 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
3030 | (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', |
3017 | /* check currently supported outputs */ |
3031 | /* check currently supported outputs */ |
3018 | intel_sdvo->caps.output_flags & |
3032 | intel_sdvo->caps.output_flags & |
3019 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
3033 | (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', |
3020 | intel_sdvo->caps.output_flags & |
3034 | intel_sdvo->caps.output_flags & |
3021 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
3035 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
3022 | return true; |
3036 | return true; |
3023 | 3037 | ||
3024 | err_output: |
3038 | err_output: |
3025 | intel_sdvo_output_cleanup(intel_sdvo); |
3039 | intel_sdvo_output_cleanup(intel_sdvo); |
3026 | 3040 | ||
3027 | err: |
3041 | err: |
3028 | drm_encoder_cleanup(&intel_encoder->base); |
3042 | drm_encoder_cleanup(&intel_encoder->base); |
3029 | i2c_del_adapter(&intel_sdvo->ddc); |
3043 | i2c_del_adapter(&intel_sdvo->ddc); |
3030 | err_i2c_bus: |
3044 | err_i2c_bus: |
3031 | intel_sdvo_unselect_i2c_bus(intel_sdvo); |
3045 | intel_sdvo_unselect_i2c_bus(intel_sdvo); |
3032 | kfree(intel_sdvo); |
3046 | kfree(intel_sdvo); |
3033 | 3047 | ||
3034 | return false; |
3048 | return false; |
3035 | }>>><>>><>><>><>>>>>>>><>><>>><>>><>>>>><>><>>=>>><>>>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>>> |
3049 | }>>><>>><>><>><>>>>>>>>><>><>>><>>><>>>>><>><>>=>>><>>>>>=>=>><>><>><>><>><>><>><>><>><>><>><>>=>>>>>>>> |