WebSVN – Kolibri OS – Diff – /drivers/include/drm/drm_mode.h


/*
 * Copyright (c) 2007 Dave Airlie 
 * Copyright (c) 2007 Jakob Bornecrantz 
 * Copyright (c) 2008 Red Hat Inc.
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
 * Copyright (c) 2007-2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */
 
#ifndef _DRM_MODE_H
#define _DRM_MODE_H
 
#define DRM_DISPLAY_INFO_LEN	32
#define DRM_CONNECTOR_NAME_LEN	32
#define DRM_DISPLAY_MODE_LEN	32
#define DRM_PROP_NAME_LEN	32
 
#define DRM_MODE_TYPE_BUILTIN	(1<<0)
#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_PREFERRED	(1<<3)
#define DRM_MODE_TYPE_DEFAULT	(1<<4)
#define DRM_MODE_TYPE_USERDEF	(1<<5)
#define DRM_MODE_TYPE_DRIVER	(1<<6)
 
/* Video mode flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_FLAG_PHSYNC	(1<<0)
#define DRM_MODE_FLAG_NHSYNC	(1<<1)
#define DRM_MODE_FLAG_PVSYNC	(1<<2)
#define DRM_MODE_FLAG_NVSYNC	(1<<3)
#define DRM_MODE_FLAG_INTERLACE	(1<<4)
#define DRM_MODE_FLAG_DBLSCAN	(1<<5)
#define DRM_MODE_FLAG_CSYNC	(1<<6)
#define DRM_MODE_FLAG_PCSYNC	(1<<7)
#define DRM_MODE_FLAG_NCSYNC	(1<<8)
#define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST	(1<<10)
#define DRM_MODE_FLAG_PIXMUX	(1<<11)
#define DRM_MODE_FLAG_DBLCLK	(1<<12)
#define DRM_MODE_FLAG_CLKDIV2	(1<<13)
 
/* DPMS flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_DPMS_ON	0
#define DRM_MODE_DPMS_STANDBY	1
#define DRM_MODE_DPMS_SUSPEND	2
#define DRM_MODE_DPMS_OFF	3
 
/* Scaling mode options */
#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
					     software can still scale) */
#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
 
/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF	0
#define DRM_MODE_DITHERING_ON	1
#define DRM_MODE_DITHERING_AUTO 2
 
/* Dirty info options */
#define DRM_MODE_DIRTY_OFF      0
#define DRM_MODE_DIRTY_ON       1
#define DRM_MODE_DIRTY_ANNOTATE 2
 
struct drm_mode_modeinfo {
	__u32 clock;
	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
 
	__u32 vrefresh;
 
	__u32 flags;
	__u32 type;
	char name[DRM_DISPLAY_MODE_LEN];
};
 
struct drm_mode_card_res {
	__u64 fb_id_ptr;
	__u64 crtc_id_ptr;
	__u64 connector_id_ptr;
	__u64 encoder_id_ptr;
	__u32 count_fbs;
	__u32 count_crtcs;
	__u32 count_connectors;
	__u32 count_encoders;
	__u32 min_width, max_width;
	__u32 min_height, max_height;
};
 
struct drm_mode_crtc {
	__u64 set_connectors_ptr;
	__u32 count_connectors;
 
	__u32 crtc_id; /**< Id */
	__u32 fb_id; /**< Id of framebuffer */
 
	__u32 x, y; /**< Position on the frameuffer */
 
	__u32 gamma_size;
	__u32 mode_valid;
	struct drm_mode_modeinfo mode;
};
 
#define DRM_MODE_ENCODER_NONE	0
#define DRM_MODE_ENCODER_DAC	1
#define DRM_MODE_ENCODER_TMDS	2
#define DRM_MODE_ENCODER_LVDS	3
#define DRM_MODE_ENCODER_TVDAC	4
 
struct drm_mode_get_encoder {
	__u32 encoder_id;
	__u32 encoder_type;
 
	__u32 crtc_id; /**< Id of crtc */
 
	__u32 possible_crtcs;
	__u32 possible_clones;
};
 
/* This is for connectors with multiple signal types. */
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
#define DRM_MODE_SUBCONNECTOR_Automatic	0
#define DRM_MODE_SUBCONNECTOR_Unknown	0
#define DRM_MODE_SUBCONNECTOR_DVID	3
#define DRM_MODE_SUBCONNECTOR_DVIA	4
#define DRM_MODE_SUBCONNECTOR_Composite	5
#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
#define DRM_MODE_SUBCONNECTOR_Component	8
#define DRM_MODE_SUBCONNECTOR_SCART	9
 
#define DRM_MODE_CONNECTOR_Unknown	0
#define DRM_MODE_CONNECTOR_VGA		1
#define DRM_MODE_CONNECTOR_DVII		2
#define DRM_MODE_CONNECTOR_DVID		3
#define DRM_MODE_CONNECTOR_DVIA		4
#define DRM_MODE_CONNECTOR_Composite	5
#define DRM_MODE_CONNECTOR_SVIDEO	6
#define DRM_MODE_CONNECTOR_LVDS		7
#define DRM_MODE_CONNECTOR_Component	8
#define DRM_MODE_CONNECTOR_9PinDIN	9
#define DRM_MODE_CONNECTOR_DisplayPort	10
#define DRM_MODE_CONNECTOR_HDMIA	11
#define DRM_MODE_CONNECTOR_HDMIB	12
#define DRM_MODE_CONNECTOR_TV		13
#define DRM_MODE_CONNECTOR_eDP		14
 
struct drm_mode_get_connector {
 
	__u64 encoders_ptr;
	__u64 modes_ptr;
	__u64 props_ptr;
	__u64 prop_values_ptr;
 
	__u32 count_modes;
	__u32 count_props;
	__u32 count_encoders;
 
	__u32 encoder_id; /**< Current Encoder */
	__u32 connector_id; /**< Id */
	__u32 connector_type;
	__u32 connector_type_id;
 
	__u32 connection;
	__u32 mm_width, mm_height; /**< HxW in millimeters */
	__u32 subpixel;
};
 
#define DRM_MODE_PROP_PENDING	(1<<0)
#define DRM_MODE_PROP_RANGE	(1<<1)
#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
#define DRM_MODE_PROP_BLOB	(1<<4)
 
struct drm_mode_property_enum {
	__u64 value;
	char name[DRM_PROP_NAME_LEN];
};
 
struct drm_mode_get_property {
	__u64 values_ptr; /* values and blob lengths */
	__u64 enum_blob_ptr; /* enum and blob id ptrs */
 
	__u32 prop_id;
	__u32 flags;
	char name[DRM_PROP_NAME_LEN];
 
	__u32 count_values;
	__u32 count_enum_blobs;
};
 
struct drm_mode_connector_set_property {
	__u64 value;
	__u32 prop_id;
	__u32 connector_id;
};
 
struct drm_mode_get_blob {
	__u32 blob_id;
	__u32 length;
	__u64 data;
};
 
struct drm_mode_fb_cmd {
	__u32 fb_id;
	__u32 width, height;
	__u32 pitch;
	__u32 bpp;
	__u32 depth;
	/* driver specific handle */
	__u32 handle;
};
 
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
#define DRM_MODE_FB_DIRTY_FLAGS         0x03
 
/*
 * Mark a region of a framebuffer as dirty.
 *
 * Some hardware does not automatically update display contents
 * as a hardware or software draw to a framebuffer. This ioctl
 * allows userspace to tell the kernel and the hardware what
 * regions of the framebuffer have changed.
 *
 * The kernel or hardware is free to update more then just the
 * region specified by the clip rects. The kernel or hardware
 * may also delay and/or coalesce several calls to dirty into a
 * single update.
 *
 * Userspace may annotate the updates, the annotates are a
 * promise made by the caller that the change is either a copy
 * of pixels or a fill of a single color in the region specified.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 * the number of updated regions are half of num_clips given,
 * where the clip rects are paired in src and dst. The width and
 * height of each one of the pairs must match.
 *
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 * promises that the region specified of the clip rects is filled
 * completely with a single color as given in the color argument.
 */
 
struct drm_mode_fb_dirty_cmd {
	__u32 fb_id;
	__u32 flags;
	__u32 color;
	__u32 num_clips;
	__u64 clips_ptr;
};
 
struct drm_mode_mode_cmd {
	__u32 connector_id;
	struct drm_mode_modeinfo mode;
};
 
#define DRM_MODE_CURSOR_BO	(1<<0)
#define DRM_MODE_CURSOR_MOVE	(1<<1)
 
/*
 * depending on the value in flags different members are used.
 *
 * CURSOR_BO uses
 *    crtc
 *    width
 *    height
 *    handle - if 0 turns the cursor of
 *
 * CURSOR_MOVE uses
 *    crtc
 *    x
 *    y
 */
struct drm_mode_cursor {
	__u32 flags;
	__u32 crtc_id;
	__s32 x;
	__s32 y;
	__u32 width;
	__u32 height;
	/* driver specific handle */
	__u32 handle;
};
 
struct drm_mode_crtc_lut {
	__u32 crtc_id;
	__u32 gamma_size;
 
	/* pointers to arrays */
	__u64 red;
	__u64 green;
	__u64 blue;
};
 
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
 
/*
 * Request a page flip on the specified crtc.
 *
 * This ioctl will ask KMS to schedule a page flip for the specified
 * crtc.  Once any pending rendering targeting the specified fb (as of
 * ioctl time) has completed, the crtc will be reprogrammed to display
 * that fb after the next vertical refresh.  The ioctl returns
 * immediately, but subsequent rendering to the current fb will block
 * in the execbuffer ioctl until the page flip happens.  If a page
 * flip is already pending as the ioctl is called, EBUSY will be
 * returned.
 *
 * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
 * request that drm sends back a vblank event (see drm.h: struct
 * drm_event_vblank) when the page flip is done.  The user_data field
 * passed in with this ioctl will be returned as the user_data field
 * in the vblank event struct.
 *
 * The reserved field must be zero until we figure out something
 * clever to use it for.
 */
 
struct drm_mode_crtc_page_flip {
	__u32 crtc_id;
	__u32 fb_id;
	__u32 flags;
	__u32 reserved;
	__u64 user_data;
};
 
/* create a dumb scanout buffer */
struct drm_mode_create_dumb {
	uint32_t height;
	uint32_t width;
	uint32_t bpp;
	uint32_t flags;
	/* handle, pitch, size will be returned */
	uint32_t handle;
	uint32_t pitch;
	uint64_t size;
};
 
/* set up for mmap of a dumb scanout buffer */
struct drm_mode_map_dumb {
	/** Handle for the object being mapped. */
	__u32 handle;
	__u32 pad;
	/**
	 * Fake offset to use for subsequent mmap call
	 *
	 * This is a fixed-size type for 32/64 compatibility.
	 */
	__u64 offset;
};
 
struct drm_mode_destroy_dumb {
	uint32_t handle;
};
 
#endif
 
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Rev 1408	Rev 1964
1	/*	1	/*
2	* Copyright (c) 2007 Dave Airlie	2	* Copyright (c) 2007 Dave Airlie
3	* Copyright (c) 2007 Jakob Bornecrantz	3	* Copyright (c) 2007 Jakob Bornecrantz
4	* Copyright (c) 2008 Red Hat Inc.	4	* Copyright (c) 2008 Red Hat Inc.
5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA	5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6	* Copyright (c) 2007-2008 Intel Corporation	6	* Copyright (c) 2007-2008 Intel Corporation
7	*	7	*
8	* Permission is hereby granted, free of charge, to any person obtaining a	8	* Permission is hereby granted, free of charge, to any person obtaining a
9	* copy of this software and associated documentation files (the "Software"),	9	* copy of this software and associated documentation files (the "Software"),
10	* to deal in the Software without restriction, including without limitation	10	* to deal in the Software without restriction, including without limitation
11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
12	* and/or sell copies of the Software, and to permit persons to whom the	12	* and/or sell copies of the Software, and to permit persons to whom the
13	* Software is furnished to do so, subject to the following conditions:	13	* Software is furnished to do so, subject to the following conditions:
14	*	14	*
15	* The above copyright notice and this permission notice shall be included in	15	* The above copyright notice and this permission notice shall be included in
16	* all copies or substantial portions of the Software.	16	* all copies or substantial portions of the Software.
17	*	17	*
18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS	23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24	* IN THE SOFTWARE.	24	* IN THE SOFTWARE.
25	*/	25	*/
26		26
27	#ifndef _DRM_MODE_H	27	#ifndef _DRM_MODE_H
28	#define _DRM_MODE_H	28	#define _DRM_MODE_H
29		29
30	#define DRM_DISPLAY_INFO_LEN 32	30	#define DRM_DISPLAY_INFO_LEN 32
31	#define DRM_CONNECTOR_NAME_LEN 32	31	#define DRM_CONNECTOR_NAME_LEN 32
32	#define DRM_DISPLAY_MODE_LEN 32	32	#define DRM_DISPLAY_MODE_LEN 32
33	#define DRM_PROP_NAME_LEN 32	33	#define DRM_PROP_NAME_LEN 32
34		34
35	#define DRM_MODE_TYPE_BUILTIN (1<<0)	35	#define DRM_MODE_TYPE_BUILTIN (1<<0)
36	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)	36	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)
37	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)	37	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)
38	#define DRM_MODE_TYPE_PREFERRED (1<<3)	38	#define DRM_MODE_TYPE_PREFERRED (1<<3)
39	#define DRM_MODE_TYPE_DEFAULT (1<<4)	39	#define DRM_MODE_TYPE_DEFAULT (1<<4)
40	#define DRM_MODE_TYPE_USERDEF (1<<5)	40	#define DRM_MODE_TYPE_USERDEF (1<<5)
41	#define DRM_MODE_TYPE_DRIVER (1<<6)	41	#define DRM_MODE_TYPE_DRIVER (1<<6)
42		42
43	/* Video mode flags */	43	/* Video mode flags */
44	/* bit compatible with the xorg definitions. */	44	/* bit compatible with the xorg definitions. */
45	#define DRM_MODE_FLAG_PHSYNC (1<<0)	45	#define DRM_MODE_FLAG_PHSYNC (1<<0)
46	#define DRM_MODE_FLAG_NHSYNC (1<<1)	46	#define DRM_MODE_FLAG_NHSYNC (1<<1)
47	#define DRM_MODE_FLAG_PVSYNC (1<<2)	47	#define DRM_MODE_FLAG_PVSYNC (1<<2)
48	#define DRM_MODE_FLAG_NVSYNC (1<<3)	48	#define DRM_MODE_FLAG_NVSYNC (1<<3)
49	#define DRM_MODE_FLAG_INTERLACE (1<<4)	49	#define DRM_MODE_FLAG_INTERLACE (1<<4)
50	#define DRM_MODE_FLAG_DBLSCAN (1<<5)	50	#define DRM_MODE_FLAG_DBLSCAN (1<<5)
51	#define DRM_MODE_FLAG_CSYNC (1<<6)	51	#define DRM_MODE_FLAG_CSYNC (1<<6)
52	#define DRM_MODE_FLAG_PCSYNC (1<<7)	52	#define DRM_MODE_FLAG_PCSYNC (1<<7)
53	#define DRM_MODE_FLAG_NCSYNC (1<<8)	53	#define DRM_MODE_FLAG_NCSYNC (1<<8)
54	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */	54	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
55	#define DRM_MODE_FLAG_BCAST (1<<10)	55	#define DRM_MODE_FLAG_BCAST (1<<10)
56	#define DRM_MODE_FLAG_PIXMUX (1<<11)	56	#define DRM_MODE_FLAG_PIXMUX (1<<11)
57	#define DRM_MODE_FLAG_DBLCLK (1<<12)	57	#define DRM_MODE_FLAG_DBLCLK (1<<12)
58	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)	58	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
59		59
60	/* DPMS flags */	60	/* DPMS flags */
61	/* bit compatible with the xorg definitions. */	61	/* bit compatible with the xorg definitions. */
62	#define DRM_MODE_DPMS_ON 0	62	#define DRM_MODE_DPMS_ON 0
63	#define DRM_MODE_DPMS_STANDBY 1	63	#define DRM_MODE_DPMS_STANDBY 1
64	#define DRM_MODE_DPMS_SUSPEND 2	64	#define DRM_MODE_DPMS_SUSPEND 2
65	#define DRM_MODE_DPMS_OFF 3	65	#define DRM_MODE_DPMS_OFF 3
66		66
67	/* Scaling mode options */	67	/* Scaling mode options */
68	#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or	68	#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
69	software can still scale) */	69	software can still scale) */
70	#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */	70	#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
71	#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */	71	#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
72	#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */	72	#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
73		73
74	/* Dithering mode options */	74	/* Dithering mode options */
75	#define DRM_MODE_DITHERING_OFF 0	75	#define DRM_MODE_DITHERING_OFF 0
76	#define DRM_MODE_DITHERING_ON 1	76	#define DRM_MODE_DITHERING_ON 1
-		77	#define DRM_MODE_DITHERING_AUTO 2
77		78
78	/* Dirty info options */	79	/* Dirty info options */
79	#define DRM_MODE_DIRTY_OFF 0	80	#define DRM_MODE_DIRTY_OFF 0
80	#define DRM_MODE_DIRTY_ON 1	81	#define DRM_MODE_DIRTY_ON 1
81	#define DRM_MODE_DIRTY_ANNOTATE 2	82	#define DRM_MODE_DIRTY_ANNOTATE 2
82		83
83	struct drm_mode_modeinfo {	84	struct drm_mode_modeinfo {
84	__u32 clock;	85	__u32 clock;
85	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;	86	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
86	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;	87	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
87		88
88	__u32 vrefresh;	89	__u32 vrefresh;
89		90
90	__u32 flags;	91	__u32 flags;
91	__u32 type;	92	__u32 type;
92	char name[DRM_DISPLAY_MODE_LEN];	93	char name[DRM_DISPLAY_MODE_LEN];
93	};	94	};
94		95
95	struct drm_mode_card_res {	96	struct drm_mode_card_res {
96	__u64 fb_id_ptr;	97	__u64 fb_id_ptr;
97	__u64 crtc_id_ptr;	98	__u64 crtc_id_ptr;
98	__u64 connector_id_ptr;	99	__u64 connector_id_ptr;
99	__u64 encoder_id_ptr;	100	__u64 encoder_id_ptr;
100	__u32 count_fbs;	101	__u32 count_fbs;
101	__u32 count_crtcs;	102	__u32 count_crtcs;
102	__u32 count_connectors;	103	__u32 count_connectors;
103	__u32 count_encoders;	104	__u32 count_encoders;
104	__u32 min_width, max_width;	105	__u32 min_width, max_width;
105	__u32 min_height, max_height;	106	__u32 min_height, max_height;
106	};	107	};
107		108
108	struct drm_mode_crtc {	109	struct drm_mode_crtc {
109	__u64 set_connectors_ptr;	110	__u64 set_connectors_ptr;
110	__u32 count_connectors;	111	__u32 count_connectors;
111		112
112	__u32 crtc_id; /*< Id /	113	__u32 crtc_id; /*< Id /
113	__u32 fb_id; /*< Id of framebuffer /	114	__u32 fb_id; /*< Id of framebuffer /
114		115
115	__u32 x, y; /*< Position on the frameuffer /	116	__u32 x, y; /*< Position on the frameuffer /
116		117
117	__u32 gamma_size;	118	__u32 gamma_size;
118	__u32 mode_valid;	119	__u32 mode_valid;
119	struct drm_mode_modeinfo mode;	120	struct drm_mode_modeinfo mode;
120	};	121	};
121		122
122	#define DRM_MODE_ENCODER_NONE 0	123	#define DRM_MODE_ENCODER_NONE 0
123	#define DRM_MODE_ENCODER_DAC 1	124	#define DRM_MODE_ENCODER_DAC 1
124	#define DRM_MODE_ENCODER_TMDS 2	125	#define DRM_MODE_ENCODER_TMDS 2
125	#define DRM_MODE_ENCODER_LVDS 3	126	#define DRM_MODE_ENCODER_LVDS 3
126	#define DRM_MODE_ENCODER_TVDAC 4	127	#define DRM_MODE_ENCODER_TVDAC 4
127		128
128	struct drm_mode_get_encoder {	129	struct drm_mode_get_encoder {
129	__u32 encoder_id;	130	__u32 encoder_id;
130	__u32 encoder_type;	131	__u32 encoder_type;
131		132
132	__u32 crtc_id; /*< Id of crtc /	133	__u32 crtc_id; /*< Id of crtc /
133		134
134	__u32 possible_crtcs;	135	__u32 possible_crtcs;
135	__u32 possible_clones;	136	__u32 possible_clones;
136	};	137	};
137		138
138	/* This is for connectors with multiple signal types. */	139	/* This is for connectors with multiple signal types. */
139	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */	140	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
140	#define DRM_MODE_SUBCONNECTOR_Automatic 0	141	#define DRM_MODE_SUBCONNECTOR_Automatic 0
141	#define DRM_MODE_SUBCONNECTOR_Unknown 0	142	#define DRM_MODE_SUBCONNECTOR_Unknown 0
142	#define DRM_MODE_SUBCONNECTOR_DVID 3	143	#define DRM_MODE_SUBCONNECTOR_DVID 3
143	#define DRM_MODE_SUBCONNECTOR_DVIA 4	144	#define DRM_MODE_SUBCONNECTOR_DVIA 4
144	#define DRM_MODE_SUBCONNECTOR_Composite 5	145	#define DRM_MODE_SUBCONNECTOR_Composite 5
145	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6	146	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
146	#define DRM_MODE_SUBCONNECTOR_Component 8	147	#define DRM_MODE_SUBCONNECTOR_Component 8
147	#define DRM_MODE_SUBCONNECTOR_SCART 9	148	#define DRM_MODE_SUBCONNECTOR_SCART 9
148		149
149	#define DRM_MODE_CONNECTOR_Unknown 0	150	#define DRM_MODE_CONNECTOR_Unknown 0
150	#define DRM_MODE_CONNECTOR_VGA 1	151	#define DRM_MODE_CONNECTOR_VGA 1
151	#define DRM_MODE_CONNECTOR_DVII 2	152	#define DRM_MODE_CONNECTOR_DVII 2
152	#define DRM_MODE_CONNECTOR_DVID 3	153	#define DRM_MODE_CONNECTOR_DVID 3
153	#define DRM_MODE_CONNECTOR_DVIA 4	154	#define DRM_MODE_CONNECTOR_DVIA 4
154	#define DRM_MODE_CONNECTOR_Composite 5	155	#define DRM_MODE_CONNECTOR_Composite 5
155	#define DRM_MODE_CONNECTOR_SVIDEO 6	156	#define DRM_MODE_CONNECTOR_SVIDEO 6
156	#define DRM_MODE_CONNECTOR_LVDS 7	157	#define DRM_MODE_CONNECTOR_LVDS 7
157	#define DRM_MODE_CONNECTOR_Component 8	158	#define DRM_MODE_CONNECTOR_Component 8
158	#define DRM_MODE_CONNECTOR_9PinDIN 9	159	#define DRM_MODE_CONNECTOR_9PinDIN 9
159	#define DRM_MODE_CONNECTOR_DisplayPort 10	160	#define DRM_MODE_CONNECTOR_DisplayPort 10
160	#define DRM_MODE_CONNECTOR_HDMIA 11	161	#define DRM_MODE_CONNECTOR_HDMIA 11
161	#define DRM_MODE_CONNECTOR_HDMIB 12	162	#define DRM_MODE_CONNECTOR_HDMIB 12
162	#define DRM_MODE_CONNECTOR_TV 13	163	#define DRM_MODE_CONNECTOR_TV 13
163	#define DRM_MODE_CONNECTOR_eDP 14	164	#define DRM_MODE_CONNECTOR_eDP 14
164		165
165	struct drm_mode_get_connector {	166	struct drm_mode_get_connector {
166		167
167	__u64 encoders_ptr;	168	__u64 encoders_ptr;
168	__u64 modes_ptr;	169	__u64 modes_ptr;
169	__u64 props_ptr;	170	__u64 props_ptr;
170	__u64 prop_values_ptr;	171	__u64 prop_values_ptr;
171		172
172	__u32 count_modes;	173	__u32 count_modes;
173	__u32 count_props;	174	__u32 count_props;
174	__u32 count_encoders;	175	__u32 count_encoders;
175		176
176	__u32 encoder_id; /*< Current Encoder /	177	__u32 encoder_id; /*< Current Encoder /
177	__u32 connector_id; /*< Id /	178	__u32 connector_id; /*< Id /
178	__u32 connector_type;	179	__u32 connector_type;
179	__u32 connector_type_id;	180	__u32 connector_type_id;
180		181
181	__u32 connection;	182	__u32 connection;
182	__u32 mm_width, mm_height; /*< HxW in millimeters /	183	__u32 mm_width, mm_height; /*< HxW in millimeters /
183	__u32 subpixel;	184	__u32 subpixel;
184	};	185	};
185		186
186	#define DRM_MODE_PROP_PENDING (1<<0)	187	#define DRM_MODE_PROP_PENDING (1<<0)
187	#define DRM_MODE_PROP_RANGE (1<<1)	188	#define DRM_MODE_PROP_RANGE (1<<1)
188	#define DRM_MODE_PROP_IMMUTABLE (1<<2)	189	#define DRM_MODE_PROP_IMMUTABLE (1<<2)
189	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */	190	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
190	#define DRM_MODE_PROP_BLOB (1<<4)	191	#define DRM_MODE_PROP_BLOB (1<<4)
191		192
192	struct drm_mode_property_enum {	193	struct drm_mode_property_enum {
193	__u64 value;	194	__u64 value;
194	char name[DRM_PROP_NAME_LEN];	195	char name[DRM_PROP_NAME_LEN];
195	};	196	};
196		197
197	struct drm_mode_get_property {	198	struct drm_mode_get_property {
198	__u64 values_ptr; /* values and blob lengths */	199	__u64 values_ptr; /* values and blob lengths */
199	__u64 enum_blob_ptr; /* enum and blob id ptrs */	200	__u64 enum_blob_ptr; /* enum and blob id ptrs */
200		201
201	__u32 prop_id;	202	__u32 prop_id;
202	__u32 flags;	203	__u32 flags;
203	char name[DRM_PROP_NAME_LEN];	204	char name[DRM_PROP_NAME_LEN];
204		205
205	__u32 count_values;	206	__u32 count_values;
206	__u32 count_enum_blobs;	207	__u32 count_enum_blobs;
207	};	208	};
208		209
209	struct drm_mode_connector_set_property {	210	struct drm_mode_connector_set_property {
210	__u64 value;	211	__u64 value;
211	__u32 prop_id;	212	__u32 prop_id;
212	__u32 connector_id;	213	__u32 connector_id;
213	};	214	};
214		215
215	struct drm_mode_get_blob {	216	struct drm_mode_get_blob {
216	__u32 blob_id;	217	__u32 blob_id;
217	__u32 length;	218	__u32 length;
218	__u64 data;	219	__u64 data;
219	};	220	};
220		221
221	struct drm_mode_fb_cmd {	222	struct drm_mode_fb_cmd {
222	__u32 fb_id;	223	__u32 fb_id;
223	__u32 width, height;	224	__u32 width, height;
224	__u32 pitch;	225	__u32 pitch;
225	__u32 bpp;	226	__u32 bpp;
226	__u32 depth;	227	__u32 depth;
227	/* driver specific handle */	228	/* driver specific handle */
228	__u32 handle;	229	__u32 handle;
229	};	230	};
230		231
231	#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01	232	#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
232	#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02	233	#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
233	#define DRM_MODE_FB_DIRTY_FLAGS 0x03	234	#define DRM_MODE_FB_DIRTY_FLAGS 0x03
234		235
235	/*	236	/*
236	* Mark a region of a framebuffer as dirty.	237	* Mark a region of a framebuffer as dirty.
237	*	238	*
238	* Some hardware does not automatically update display contents	239	* Some hardware does not automatically update display contents
239	* as a hardware or software draw to a framebuffer. This ioctl	240	* as a hardware or software draw to a framebuffer. This ioctl
240	* allows userspace to tell the kernel and the hardware what	241	* allows userspace to tell the kernel and the hardware what
241	* regions of the framebuffer have changed.	242	* regions of the framebuffer have changed.
242	*	243	*
243	* The kernel or hardware is free to update more then just the	244	* The kernel or hardware is free to update more then just the
244	* region specified by the clip rects. The kernel or hardware	245	* region specified by the clip rects. The kernel or hardware
245	* may also delay and/or coalesce several calls to dirty into a	246	* may also delay and/or coalesce several calls to dirty into a
246	* single update.	247	* single update.
247	*	248	*
248	* Userspace may annotate the updates, the annotates are a	249	* Userspace may annotate the updates, the annotates are a
249	* promise made by the caller that the change is either a copy	250	* promise made by the caller that the change is either a copy
250	* of pixels or a fill of a single color in the region specified.	251	* of pixels or a fill of a single color in the region specified.
251	*	252	*
252	* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then	253	* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
253	* the number of updated regions are half of num_clips given,	254	* the number of updated regions are half of num_clips given,
254	* where the clip rects are paired in src and dst. The width and	255	* where the clip rects are paired in src and dst. The width and
255	* height of each one of the pairs must match.	256	* height of each one of the pairs must match.
256	*	257	*
257	* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller	258	* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
258	* promises that the region specified of the clip rects is filled	259	* promises that the region specified of the clip rects is filled
259	* completely with a single color as given in the color argument.	260	* completely with a single color as given in the color argument.
260	*/	261	*/
261		262
262	struct drm_mode_fb_dirty_cmd {	263	struct drm_mode_fb_dirty_cmd {
263	__u32 fb_id;	264	__u32 fb_id;
264	__u32 flags;	265	__u32 flags;
265	__u32 color;	266	__u32 color;
266	__u32 num_clips;	267	__u32 num_clips;
267	__u64 clips_ptr;	268	__u64 clips_ptr;
268	};	269	};
269		270
270	struct drm_mode_mode_cmd {	271	struct drm_mode_mode_cmd {
271	__u32 connector_id;	272	__u32 connector_id;
272	struct drm_mode_modeinfo mode;	273	struct drm_mode_modeinfo mode;
273	};	274	};
274		275
275	#define DRM_MODE_CURSOR_BO (1<<0)	276	#define DRM_MODE_CURSOR_BO (1<<0)
276	#define DRM_MODE_CURSOR_MOVE (1<<1)	277	#define DRM_MODE_CURSOR_MOVE (1<<1)
277		278
278	/*	279	/*
279	* depending on the value in flags diffrent members are used.	280	* depending on the value in flags different members are used.
280	*	281	*
281	* CURSOR_BO uses	282	* CURSOR_BO uses
282	* crtc	283	* crtc
283	* width	284	* width
284	* height	285	* height
285	* handle - if 0 turns the cursor of	286	* handle - if 0 turns the cursor of
286	*	287	*
287	* CURSOR_MOVE uses	288	* CURSOR_MOVE uses
288	* crtc	289	* crtc
289	* x	290	* x
290	* y	291	* y
291	*/	292	*/
292	struct drm_mode_cursor {	293	struct drm_mode_cursor {
293	__u32 flags;	294	__u32 flags;
294	__u32 crtc_id;	295	__u32 crtc_id;
295	__s32 x;	296	__s32 x;
296	__s32 y;	297	__s32 y;
297	__u32 width;	298	__u32 width;
298	__u32 height;	299	__u32 height;
299	/* driver specific handle */	300	/* driver specific handle */
300	__u32 handle;	301	__u32 handle;
301	};	302	};
302		303
303	struct drm_mode_crtc_lut {	304	struct drm_mode_crtc_lut {
304	__u32 crtc_id;	305	__u32 crtc_id;
305	__u32 gamma_size;	306	__u32 gamma_size;
306		307
307	/* pointers to arrays */	308	/* pointers to arrays */
308	__u64 red;	309	__u64 red;
309	__u64 green;	310	__u64 green;
310	__u64 blue;	311	__u64 blue;
311	};	312	};
312		313
313	#define DRM_MODE_PAGE_FLIP_EVENT 0x01	314	#define DRM_MODE_PAGE_FLIP_EVENT 0x01
314	#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT	315	#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
315		316
316	/*	317	/*
317	* Request a page flip on the specified crtc.	318	* Request a page flip on the specified crtc.
318	*	319	*
319	* This ioctl will ask KMS to schedule a page flip for the specified	320	* This ioctl will ask KMS to schedule a page flip for the specified
320	* crtc. Once any pending rendering targeting the specified fb (as of	321	* crtc. Once any pending rendering targeting the specified fb (as of
321	* ioctl time) has completed, the crtc will be reprogrammed to display	322	* ioctl time) has completed, the crtc will be reprogrammed to display
322	* that fb after the next vertical refresh. The ioctl returns	323	* that fb after the next vertical refresh. The ioctl returns
323	* immediately, but subsequent rendering to the current fb will block	324	* immediately, but subsequent rendering to the current fb will block
324	* in the execbuffer ioctl until the page flip happens. If a page	325	* in the execbuffer ioctl until the page flip happens. If a page
325	* flip is already pending as the ioctl is called, EBUSY will be	326	* flip is already pending as the ioctl is called, EBUSY will be
326	* returned.	327	* returned.
327	*	328	*
328	* The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will	329	* The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
329	* request that drm sends back a vblank event (see drm.h: struct	330	* request that drm sends back a vblank event (see drm.h: struct
330	* drm_event_vblank) when the page flip is done. The user_data field	331	* drm_event_vblank) when the page flip is done. The user_data field
331	* passed in with this ioctl will be returned as the user_data field	332	* passed in with this ioctl will be returned as the user_data field
332	* in the vblank event struct.	333	* in the vblank event struct.
333	*	334	*
334	* The reserved field must be zero until we figure out something	335	* The reserved field must be zero until we figure out something
335	* clever to use it for.	336	* clever to use it for.
336	*/	337	*/
337		338
338	struct drm_mode_crtc_page_flip {	339	struct drm_mode_crtc_page_flip {
339	__u32 crtc_id;	340	__u32 crtc_id;
340	__u32 fb_id;	341	__u32 fb_id;
341	__u32 flags;	342	__u32 flags;
342	__u32 reserved;	343	__u32 reserved;
343	__u64 user_data;	344	__u64 user_data;
344	};	345	};
-		346
-		347	/* create a dumb scanout buffer */
-		348	struct drm_mode_create_dumb {
-		349	uint32_t height;
-		350	uint32_t width;
-		351	uint32_t bpp;
-		352	uint32_t flags;
-		353	/* handle, pitch, size will be returned */
-		354	uint32_t handle;
-		355	uint32_t pitch;
-		356	uint64_t size;
-		357	};
-		358
-		359	/* set up for mmap of a dumb scanout buffer */
-		360	struct drm_mode_map_dumb {
-		361	/** Handle for the object being mapped. */
-		362	__u32 handle;
-		363	__u32 pad;
-		364	/**
-		365	* Fake offset to use for subsequent mmap call
-		366	*
-		367	* This is a fixed-size type for 32/64 compatibility.
-		368	*/
-		369	__u64 offset;
-		370	};
-		371
-		372	struct drm_mode_destroy_dumb {
-		373	uint32_t handle;
-		374	};
345		375
346	#endif	376	#endif
347		377
348	/*	378	/*
349	>	379	>
350		380
351	/*	381	/*
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(root)/drivers/include/drm/drm_mode.h – Rev 1408 → 1964