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1 | /* |
1 | /* |
2 | * Copyright © 2010 Intel Corporation |
2 | * Copyright © 2010 Intel Corporation |
3 | * |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
10 | * |
11 | * The above copyright notice and this permission notice (including the next |
11 | * The above copyright notice and this permission notice (including the next |
12 | * paragraph) shall be included in all copies or substantial portions of the |
12 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * Software. |
13 | * Software. |
14 | * |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
21 | * IN THE SOFTWARE. |
21 | * IN THE SOFTWARE. |
22 | * |
22 | * |
23 | * Authors: |
23 | * Authors: |
24 | * Eric Anholt |
24 | * Eric Anholt |
25 | * |
25 | * |
26 | */ |
26 | */ |
27 | 27 | ||
28 | #pragma once |
28 | #pragma once |
29 | 29 | ||
30 | #include "brw_shader.h" |
30 | #include "brw_shader.h" |
31 | 31 | ||
32 | extern "C" { |
32 | extern "C" { |
33 | 33 | ||
34 | #include |
34 | #include |
35 | 35 | ||
36 | #include "main/macros.h" |
36 | #include "main/macros.h" |
37 | #include "main/shaderobj.h" |
37 | #include "main/shaderobj.h" |
38 | #include "main/uniforms.h" |
38 | #include "main/uniforms.h" |
39 | #include "program/prog_parameter.h" |
39 | #include "program/prog_parameter.h" |
40 | #include "program/prog_print.h" |
40 | #include "program/prog_print.h" |
41 | #include "program/prog_optimize.h" |
41 | #include "program/prog_optimize.h" |
42 | #include "program/register_allocate.h" |
42 | #include "program/register_allocate.h" |
43 | #include "program/sampler.h" |
43 | #include "program/sampler.h" |
44 | #include "program/hash_table.h" |
44 | #include "program/hash_table.h" |
45 | #include "brw_context.h" |
45 | #include "brw_context.h" |
46 | #include "brw_eu.h" |
46 | #include "brw_eu.h" |
47 | #include "brw_wm.h" |
47 | #include "brw_wm.h" |
48 | #include "brw_shader.h" |
48 | #include "brw_shader.h" |
49 | } |
49 | } |
50 | #include "glsl/glsl_types.h" |
50 | #include "glsl/glsl_types.h" |
51 | #include "glsl/ir.h" |
51 | #include "glsl/ir.h" |
52 | 52 | ||
53 | class bblock_t; |
53 | class bblock_t; |
54 | namespace { |
54 | namespace { |
55 | struct acp_entry; |
55 | struct acp_entry; |
56 | } |
56 | } |
57 | 57 | ||
58 | class fs_reg { |
58 | class fs_reg { |
59 | public: |
59 | public: |
60 | /* Callers of this ralloc-based new need not call delete. It's |
60 | /* Callers of this ralloc-based new need not call delete. It's |
61 | * easier to just ralloc_free 'ctx' (or any of its ancestors). */ |
61 | * easier to just ralloc_free 'ctx' (or any of its ancestors). */ |
62 | static void* operator new(size_t size, void *ctx) |
62 | static void* operator new(size_t size, void *ctx) |
63 | { |
63 | { |
64 | void *node; |
64 | void *node; |
65 | 65 | ||
66 | node = ralloc_size(ctx, size); |
66 | node = ralloc_size(ctx, size); |
67 | assert(node != NULL); |
67 | assert(node != NULL); |
68 | 68 | ||
69 | return node; |
69 | return node; |
70 | } |
70 | } |
71 | 71 | ||
72 | void init(); |
72 | void init(); |
73 | 73 | ||
74 | fs_reg(); |
74 | fs_reg(); |
75 | fs_reg(float f); |
75 | fs_reg(float f); |
76 | fs_reg(int32_t i); |
76 | fs_reg(int32_t i); |
77 | fs_reg(uint32_t u); |
77 | fs_reg(uint32_t u); |
78 | fs_reg(struct brw_reg fixed_hw_reg); |
78 | fs_reg(struct brw_reg fixed_hw_reg); |
79 | fs_reg(enum register_file file, int reg); |
79 | fs_reg(enum register_file file, int reg); |
80 | fs_reg(enum register_file file, int reg, uint32_t type); |
80 | fs_reg(enum register_file file, int reg, uint32_t type); |
81 | fs_reg(class fs_visitor *v, const struct glsl_type *type); |
81 | fs_reg(class fs_visitor *v, const struct glsl_type *type); |
82 | 82 | ||
83 | bool equals(const fs_reg &r) const; |
83 | bool equals(const fs_reg &r) const; |
84 | bool is_zero() const; |
84 | bool is_zero() const; |
85 | bool is_one() const; |
85 | bool is_one() const; |
86 | bool is_valid_3src() const; |
86 | bool is_valid_3src() const; |
87 | 87 | ||
88 | /** Register file: ARF, GRF, MRF, IMM. */ |
88 | /** Register file: ARF, GRF, MRF, IMM. */ |
89 | enum register_file file; |
89 | enum register_file file; |
90 | /** |
90 | /** |
91 | * Register number. For ARF/MRF, it's the hardware register. For |
91 | * Register number. For ARF/MRF, it's the hardware register. For |
92 | * GRF, it's a virtual register number until register allocation |
92 | * GRF, it's a virtual register number until register allocation |
93 | */ |
93 | */ |
94 | int reg; |
94 | int reg; |
95 | /** |
95 | /** |
96 | * For virtual registers, this is a hardware register offset from |
96 | * For virtual registers, this is a hardware register offset from |
97 | * the start of the register block (for example, a constant index |
97 | * the start of the register block (for example, a constant index |
98 | * in an array access). |
98 | * in an array access). |
99 | */ |
99 | */ |
100 | int reg_offset; |
100 | int reg_offset; |
101 | /** Register type. BRW_REGISTER_TYPE_* */ |
101 | /** Register type. BRW_REGISTER_TYPE_* */ |
102 | int type; |
102 | int type; |
103 | bool negate; |
103 | bool negate; |
104 | bool abs; |
104 | bool abs; |
105 | bool sechalf; |
105 | bool sechalf; |
106 | struct brw_reg fixed_hw_reg; |
106 | struct brw_reg fixed_hw_reg; |
107 | int smear; /* -1, or a channel of the reg to smear to all channels. */ |
107 | int smear; /* -1, or a channel of the reg to smear to all channels. */ |
108 | 108 | ||
109 | /** Value for file == IMM */ |
109 | /** Value for file == IMM */ |
110 | union { |
110 | union { |
111 | int32_t i; |
111 | int32_t i; |
112 | uint32_t u; |
112 | uint32_t u; |
113 | float f; |
113 | float f; |
114 | } imm; |
114 | } imm; |
115 | 115 | ||
116 | fs_reg *reladdr; |
116 | fs_reg *reladdr; |
117 | }; |
117 | }; |
118 | 118 | ||
119 | static const fs_reg reg_undef; |
119 | static const fs_reg reg_undef; |
120 | static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F); |
120 | static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F); |
121 | static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D); |
121 | static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D); |
122 | 122 | ||
123 | class ip_record : public exec_node { |
123 | class ip_record : public exec_node { |
124 | public: |
124 | public: |
125 | static void* operator new(size_t size, void *ctx) |
125 | static void* operator new(size_t size, void *ctx) |
126 | { |
126 | { |
127 | void *node; |
127 | void *node; |
128 | 128 | ||
129 | node = rzalloc_size(ctx, size); |
129 | node = rzalloc_size(ctx, size); |
130 | assert(node != NULL); |
130 | assert(node != NULL); |
131 | 131 | ||
132 | return node; |
132 | return node; |
133 | } |
133 | } |
134 | 134 | ||
135 | ip_record(int ip) |
135 | ip_record(int ip) |
136 | { |
136 | { |
137 | this->ip = ip; |
137 | this->ip = ip; |
138 | } |
138 | } |
139 | 139 | ||
140 | int ip; |
140 | int ip; |
141 | }; |
141 | }; |
142 | 142 | ||
143 | class fs_inst : public backend_instruction { |
143 | class fs_inst : public backend_instruction { |
144 | public: |
144 | public: |
145 | /* Callers of this ralloc-based new need not call delete. It's |
145 | /* Callers of this ralloc-based new need not call delete. It's |
146 | * easier to just ralloc_free 'ctx' (or any of its ancestors). */ |
146 | * easier to just ralloc_free 'ctx' (or any of its ancestors). */ |
147 | static void* operator new(size_t size, void *ctx) |
147 | static void* operator new(size_t size, void *ctx) |
148 | { |
148 | { |
149 | void *node; |
149 | void *node; |
150 | 150 | ||
151 | node = rzalloc_size(ctx, size); |
151 | node = rzalloc_size(ctx, size); |
152 | assert(node != NULL); |
152 | assert(node != NULL); |
153 | 153 | ||
154 | return node; |
154 | return node; |
155 | } |
155 | } |
156 | 156 | ||
157 | void init(); |
157 | void init(); |
158 | 158 | ||
159 | fs_inst(); |
159 | fs_inst(); |
160 | fs_inst(enum opcode opcode); |
160 | fs_inst(enum opcode opcode); |
161 | fs_inst(enum opcode opcode, fs_reg dst); |
161 | fs_inst(enum opcode opcode, fs_reg dst); |
162 | fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0); |
162 | fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0); |
163 | fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); |
163 | fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); |
164 | fs_inst(enum opcode opcode, fs_reg dst, |
164 | fs_inst(enum opcode opcode, fs_reg dst, |
165 | fs_reg src0, fs_reg src1,fs_reg src2); |
165 | fs_reg src0, fs_reg src1,fs_reg src2); |
166 | 166 | ||
167 | bool equals(fs_inst *inst); |
167 | bool equals(fs_inst *inst); |
168 | bool overwrites_reg(const fs_reg ®); |
168 | bool overwrites_reg(const fs_reg ®); |
169 | bool is_send_from_grf(); |
169 | bool is_send_from_grf(); |
170 | bool is_partial_write(); |
170 | bool is_partial_write(); |
171 | 171 | ||
172 | fs_reg dst; |
172 | fs_reg dst; |
173 | fs_reg src[3]; |
173 | fs_reg src[3]; |
174 | bool saturate; |
174 | bool saturate; |
175 | int conditional_mod; /**< BRW_CONDITIONAL_* */ |
175 | int conditional_mod; /**< BRW_CONDITIONAL_* */ |
176 | 176 | ||
177 | /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional |
177 | /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional |
178 | * mod and predication. |
178 | * mod and predication. |
179 | */ |
179 | */ |
180 | uint8_t flag_subreg; |
180 | uint8_t flag_subreg; |
181 | 181 | ||
182 | int mlen; /**< SEND message length */ |
182 | int mlen; /**< SEND message length */ |
183 | int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */ |
183 | int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */ |
184 | int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */ |
184 | int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */ |
185 | uint32_t texture_offset; /**< Texture offset bitfield */ |
185 | uint32_t texture_offset; /**< Texture offset bitfield */ |
186 | int sampler; |
186 | int sampler; |
187 | int target; /**< MRT target. */ |
187 | int target; /**< MRT target. */ |
188 | bool eot; |
188 | bool eot; |
189 | bool header_present; |
189 | bool header_present; |
190 | bool shadow_compare; |
190 | bool shadow_compare; |
191 | bool force_uncompressed; |
191 | bool force_uncompressed; |
192 | bool force_sechalf; |
192 | bool force_sechalf; |
193 | bool force_writemask_all; |
193 | bool force_writemask_all; |
194 | uint32_t offset; /* spill/unspill offset */ |
194 | uint32_t offset; /* spill/unspill offset */ |
195 | 195 | ||
196 | /** @{ |
196 | /** @{ |
197 | * Annotation for the generated IR. One of the two can be set. |
197 | * Annotation for the generated IR. One of the two can be set. |
198 | */ |
198 | */ |
199 | const void *ir; |
199 | const void *ir; |
200 | const char *annotation; |
200 | const char *annotation; |
201 | /** @} */ |
201 | /** @} */ |
202 | }; |
202 | }; |
203 | 203 | ||
204 | /** |
204 | /** |
205 | * The fragment shader front-end. |
205 | * The fragment shader front-end. |
206 | * |
206 | * |
207 | * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR. |
207 | * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR. |
208 | */ |
208 | */ |
209 | class fs_visitor : public backend_visitor |
209 | class fs_visitor : public backend_visitor |
210 | { |
210 | { |
211 | public: |
211 | public: |
212 | 212 | ||
213 | fs_visitor(struct brw_context *brw, |
213 | fs_visitor(struct brw_context *brw, |
214 | struct brw_wm_compile *c, |
214 | struct brw_wm_compile *c, |
215 | struct gl_shader_program *shader_prog, |
215 | struct gl_shader_program *shader_prog, |
216 | struct gl_fragment_program *fp, |
216 | struct gl_fragment_program *fp, |
217 | unsigned dispatch_width); |
217 | unsigned dispatch_width); |
218 | ~fs_visitor(); |
218 | ~fs_visitor(); |
219 | 219 | ||
220 | fs_reg *variable_storage(ir_variable *var); |
220 | fs_reg *variable_storage(ir_variable *var); |
221 | int virtual_grf_alloc(int size); |
221 | int virtual_grf_alloc(int size); |
222 | void import_uniforms(fs_visitor *v); |
222 | void import_uniforms(fs_visitor *v); |
223 | 223 | ||
224 | void visit(ir_variable *ir); |
224 | void visit(ir_variable *ir); |
225 | void visit(ir_assignment *ir); |
225 | void visit(ir_assignment *ir); |
226 | void visit(ir_dereference_variable *ir); |
226 | void visit(ir_dereference_variable *ir); |
227 | void visit(ir_dereference_record *ir); |
227 | void visit(ir_dereference_record *ir); |
228 | void visit(ir_dereference_array *ir); |
228 | void visit(ir_dereference_array *ir); |
229 | void visit(ir_expression *ir); |
229 | void visit(ir_expression *ir); |
230 | void visit(ir_texture *ir); |
230 | void visit(ir_texture *ir); |
231 | void visit(ir_if *ir); |
231 | void visit(ir_if *ir); |
232 | void visit(ir_constant *ir); |
232 | void visit(ir_constant *ir); |
233 | void visit(ir_swizzle *ir); |
233 | void visit(ir_swizzle *ir); |
234 | void visit(ir_return *ir); |
234 | void visit(ir_return *ir); |
235 | void visit(ir_loop *ir); |
235 | void visit(ir_loop *ir); |
236 | void visit(ir_loop_jump *ir); |
236 | void visit(ir_loop_jump *ir); |
237 | void visit(ir_discard *ir); |
237 | void visit(ir_discard *ir); |
238 | void visit(ir_call *ir); |
238 | void visit(ir_call *ir); |
239 | void visit(ir_function *ir); |
239 | void visit(ir_function *ir); |
240 | void visit(ir_function_signature *ir); |
240 | void visit(ir_function_signature *ir); |
241 | 241 | ||
242 | void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler); |
242 | void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler); |
243 | 243 | ||
244 | bool can_do_source_mods(fs_inst *inst); |
244 | bool can_do_source_mods(fs_inst *inst); |
245 | 245 | ||
246 | fs_inst *emit(fs_inst inst); |
246 | fs_inst *emit(fs_inst inst); |
247 | fs_inst *emit(fs_inst *inst); |
247 | fs_inst *emit(fs_inst *inst); |
248 | void emit(exec_list list); |
248 | void emit(exec_list list); |
249 | 249 | ||
250 | fs_inst *emit(enum opcode opcode); |
250 | fs_inst *emit(enum opcode opcode); |
251 | fs_inst *emit(enum opcode opcode, fs_reg dst); |
251 | fs_inst *emit(enum opcode opcode, fs_reg dst); |
252 | fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0); |
252 | fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0); |
253 | fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); |
253 | fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1); |
254 | fs_inst *emit(enum opcode opcode, fs_reg dst, |
254 | fs_inst *emit(enum opcode opcode, fs_reg dst, |
255 | fs_reg src0, fs_reg src1, fs_reg src2); |
255 | fs_reg src0, fs_reg src1, fs_reg src2); |
256 | 256 | ||
257 | fs_inst *MOV(fs_reg dst, fs_reg src); |
257 | fs_inst *MOV(fs_reg dst, fs_reg src); |
258 | fs_inst *NOT(fs_reg dst, fs_reg src); |
258 | fs_inst *NOT(fs_reg dst, fs_reg src); |
259 | fs_inst *RNDD(fs_reg dst, fs_reg src); |
259 | fs_inst *RNDD(fs_reg dst, fs_reg src); |
260 | fs_inst *RNDE(fs_reg dst, fs_reg src); |
260 | fs_inst *RNDE(fs_reg dst, fs_reg src); |
261 | fs_inst *RNDZ(fs_reg dst, fs_reg src); |
261 | fs_inst *RNDZ(fs_reg dst, fs_reg src); |
262 | fs_inst *FRC(fs_reg dst, fs_reg src); |
262 | fs_inst *FRC(fs_reg dst, fs_reg src); |
263 | fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1); |
263 | fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1); |
264 | fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1); |
264 | fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1); |
265 | fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1); |
265 | fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1); |
266 | fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1); |
266 | fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1); |
267 | fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1); |
267 | fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1); |
268 | fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1); |
268 | fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1); |
269 | fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1); |
269 | fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1); |
270 | fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1); |
270 | fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1); |
271 | fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1); |
271 | fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1); |
272 | fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1); |
272 | fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1); |
273 | fs_inst *IF(uint32_t predicate); |
273 | fs_inst *IF(uint32_t predicate); |
274 | fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition); |
274 | fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition); |
275 | fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1, |
275 | fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1, |
276 | uint32_t condition); |
276 | uint32_t condition); |
277 | fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x); |
277 | fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x); |
278 | fs_inst *DEP_RESOLVE_MOV(int grf); |
278 | fs_inst *DEP_RESOLVE_MOV(int grf); |
279 | fs_inst *BFREV(fs_reg dst, fs_reg value); |
279 | fs_inst *BFREV(fs_reg dst, fs_reg value); |
280 | fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value); |
280 | fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value); |
281 | fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset); |
281 | fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset); |
282 | fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base); |
282 | fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base); |
283 | fs_inst *FBH(fs_reg dst, fs_reg value); |
283 | fs_inst *FBH(fs_reg dst, fs_reg value); |
284 | fs_inst *FBL(fs_reg dst, fs_reg value); |
284 | fs_inst *FBL(fs_reg dst, fs_reg value); |
285 | fs_inst *CBIT(fs_reg dst, fs_reg value); |
285 | fs_inst *CBIT(fs_reg dst, fs_reg value); |
286 | 286 | ||
287 | int type_size(const struct glsl_type *type); |
287 | int type_size(const struct glsl_type *type); |
288 | fs_inst *get_instruction_generating_reg(fs_inst *start, |
288 | fs_inst *get_instruction_generating_reg(fs_inst *start, |
289 | fs_inst *end, |
289 | fs_inst *end, |
290 | fs_reg reg); |
290 | fs_reg reg); |
291 | 291 | ||
292 | exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index, |
292 | exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index, |
293 | fs_reg varying_offset, |
293 | fs_reg varying_offset, |
294 | uint32_t const_offset); |
294 | uint32_t const_offset); |
295 | 295 | ||
296 | bool run(); |
296 | bool run(); |
297 | void setup_payload_gen4(); |
297 | void setup_payload_gen4(); |
298 | void setup_payload_gen6(); |
298 | void setup_payload_gen6(); |
299 | void assign_curb_setup(); |
299 | void assign_curb_setup(); |
300 | void calculate_urb_setup(); |
300 | void calculate_urb_setup(); |
301 | void assign_urb_setup(); |
301 | void assign_urb_setup(); |
302 | bool assign_regs(); |
302 | bool assign_regs(); |
303 | void assign_regs_trivial(); |
303 | void assign_regs_trivial(); |
304 | void setup_payload_interference(struct ra_graph *g, int payload_reg_count, |
304 | void setup_payload_interference(struct ra_graph *g, int payload_reg_count, |
305 | int first_payload_node); |
305 | int first_payload_node); |
306 | void setup_mrf_hack_interference(struct ra_graph *g, |
306 | void setup_mrf_hack_interference(struct ra_graph *g, |
307 | int first_mrf_hack_node); |
307 | int first_mrf_hack_node); |
308 | int choose_spill_reg(struct ra_graph *g); |
308 | int choose_spill_reg(struct ra_graph *g); |
309 | void spill_reg(int spill_reg); |
309 | void spill_reg(int spill_reg); |
310 | void split_virtual_grfs(); |
310 | void split_virtual_grfs(); |
311 | void compact_virtual_grfs(); |
311 | void compact_virtual_grfs(); |
312 | void move_uniform_array_access_to_pull_constants(); |
312 | void move_uniform_array_access_to_pull_constants(); |
313 | void setup_pull_constants(); |
313 | void setup_pull_constants(); |
314 | void calculate_live_intervals(); |
314 | void calculate_live_intervals(); |
315 | bool opt_algebraic(); |
315 | bool opt_algebraic(); |
316 | bool opt_cse(); |
316 | bool opt_cse(); |
317 | bool opt_cse_local(bblock_t *block, exec_list *aeb); |
317 | bool opt_cse_local(bblock_t *block, exec_list *aeb); |
318 | bool opt_copy_propagate(); |
318 | bool opt_copy_propagate(); |
319 | bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry); |
319 | bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry); |
320 | bool try_constant_propagate(fs_inst *inst, acp_entry *entry); |
320 | bool try_constant_propagate(fs_inst *inst, acp_entry *entry); |
321 | bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block, |
321 | bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block, |
322 | exec_list *acp); |
322 | exec_list *acp); |
323 | bool register_coalesce(); |
323 | bool register_coalesce(); |
324 | bool register_coalesce_2(); |
324 | bool register_coalesce_2(); |
325 | bool compute_to_mrf(); |
325 | bool compute_to_mrf(); |
326 | bool dead_code_eliminate(); |
326 | bool dead_code_eliminate(); |
327 | bool dead_code_eliminate_local(); |
327 | bool dead_code_eliminate_local(); |
328 | bool remove_dead_constants(); |
328 | bool remove_dead_constants(); |
329 | bool remove_duplicate_mrf_writes(); |
329 | bool remove_duplicate_mrf_writes(); |
330 | bool virtual_grf_interferes(int a, int b); |
330 | bool virtual_grf_interferes(int a, int b); |
331 | void schedule_instructions(bool post_reg_alloc); |
331 | void schedule_instructions(bool post_reg_alloc); |
332 | void insert_gen4_send_dependency_workarounds(); |
332 | void insert_gen4_send_dependency_workarounds(); |
333 | void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst); |
333 | void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst); |
334 | void insert_gen4_post_send_dependency_workarounds(fs_inst *inst); |
334 | void insert_gen4_post_send_dependency_workarounds(fs_inst *inst); |
335 | void fail(const char *msg, ...); |
335 | void fail(const char *msg, ...); |
336 | void lower_uniform_pull_constant_loads(); |
336 | void lower_uniform_pull_constant_loads(); |
337 | 337 | ||
338 | void push_force_uncompressed(); |
338 | void push_force_uncompressed(); |
339 | void pop_force_uncompressed(); |
339 | void pop_force_uncompressed(); |
340 | void push_force_sechalf(); |
340 | void push_force_sechalf(); |
341 | void pop_force_sechalf(); |
341 | void pop_force_sechalf(); |
342 | 342 | ||
343 | void emit_dummy_fs(); |
343 | void emit_dummy_fs(); |
344 | fs_reg *emit_fragcoord_interpolation(ir_variable *ir); |
344 | fs_reg *emit_fragcoord_interpolation(ir_variable *ir); |
345 | fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp, |
345 | fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp, |
346 | glsl_interp_qualifier interpolation_mode, |
346 | glsl_interp_qualifier interpolation_mode, |
347 | bool is_centroid); |
347 | bool is_centroid); |
348 | fs_reg *emit_frontfacing_interpolation(ir_variable *ir); |
348 | fs_reg *emit_frontfacing_interpolation(ir_variable *ir); |
349 | fs_reg *emit_general_interpolation(ir_variable *ir); |
349 | fs_reg *emit_general_interpolation(ir_variable *ir); |
350 | void emit_interpolation_setup_gen4(); |
350 | void emit_interpolation_setup_gen4(); |
351 | void emit_interpolation_setup_gen6(); |
351 | void emit_interpolation_setup_gen6(); |
352 | fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate, |
352 | fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate, |
353 | bool is_rect, int sampler, int texunit); |
353 | bool is_rect, int sampler, int texunit); |
354 | fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
354 | fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
355 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2); |
355 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2); |
356 | fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
356 | fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
357 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2, |
357 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2, |
358 | fs_reg sample_index); |
358 | fs_reg sample_index); |
359 | fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
359 | fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate, |
360 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2, |
360 | fs_reg shadow_comp, fs_reg lod, fs_reg lod2, |
361 | fs_reg sample_index); |
361 | fs_reg sample_index); |
362 | fs_reg fix_math_operand(fs_reg src); |
362 | fs_reg fix_math_operand(fs_reg src); |
363 | fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0); |
363 | fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0); |
364 | fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1); |
364 | fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1); |
365 | void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a); |
365 | void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a); |
366 | void emit_minmax(uint32_t conditionalmod, fs_reg dst, |
366 | void emit_minmax(uint32_t conditionalmod, fs_reg dst, |
367 | fs_reg src0, fs_reg src1); |
367 | fs_reg src0, fs_reg src1); |
368 | bool try_emit_saturate(ir_expression *ir); |
368 | bool try_emit_saturate(ir_expression *ir); |
369 | bool try_emit_mad(ir_expression *ir, int mul_arg); |
369 | bool try_emit_mad(ir_expression *ir, int mul_arg); |
370 | void emit_bool_to_cond_code(ir_rvalue *condition); |
370 | void emit_bool_to_cond_code(ir_rvalue *condition); |
371 | void emit_if_gen6(ir_if *ir); |
371 | void emit_if_gen6(ir_if *ir); |
372 | void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset); |
372 | void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset); |
373 | 373 | ||
374 | void emit_fragment_program_code(); |
374 | void emit_fragment_program_code(); |
375 | void setup_fp_regs(); |
375 | void setup_fp_regs(); |
376 | fs_reg get_fp_src_reg(const prog_src_register *src); |
376 | fs_reg get_fp_src_reg(const prog_src_register *src); |
377 | fs_reg get_fp_dst_reg(const prog_dst_register *dst); |
377 | fs_reg get_fp_dst_reg(const prog_dst_register *dst); |
378 | void emit_fp_alu1(enum opcode opcode, |
378 | void emit_fp_alu1(enum opcode opcode, |
379 | const struct prog_instruction *fpi, |
379 | const struct prog_instruction *fpi, |
380 | fs_reg dst, fs_reg src); |
380 | fs_reg dst, fs_reg src); |
381 | void emit_fp_alu2(enum opcode opcode, |
381 | void emit_fp_alu2(enum opcode opcode, |
382 | const struct prog_instruction *fpi, |
382 | const struct prog_instruction *fpi, |
383 | fs_reg dst, fs_reg src0, fs_reg src1); |
383 | fs_reg dst, fs_reg src0, fs_reg src1); |
384 | void emit_fp_scalar_write(const struct prog_instruction *fpi, |
384 | void emit_fp_scalar_write(const struct prog_instruction *fpi, |
385 | fs_reg dst, fs_reg src); |
385 | fs_reg dst, fs_reg src); |
386 | void emit_fp_scalar_math(enum opcode opcode, |
386 | void emit_fp_scalar_math(enum opcode opcode, |
387 | const struct prog_instruction *fpi, |
387 | const struct prog_instruction *fpi, |
388 | fs_reg dst, fs_reg src); |
388 | fs_reg dst, fs_reg src); |
389 | 389 | ||
390 | void emit_fp_minmax(const struct prog_instruction *fpi, |
390 | void emit_fp_minmax(const struct prog_instruction *fpi, |
391 | fs_reg dst, fs_reg src0, fs_reg src1); |
391 | fs_reg dst, fs_reg src0, fs_reg src1); |
392 | 392 | ||
393 | void emit_fp_sop(uint32_t conditional_mod, |
393 | void emit_fp_sop(uint32_t conditional_mod, |
394 | const struct prog_instruction *fpi, |
394 | const struct prog_instruction *fpi, |
395 | fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one); |
395 | fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one); |
396 | 396 | ||
397 | void emit_color_write(int target, int index, int first_color_mrf); |
397 | void emit_color_write(int target, int index, int first_color_mrf); |
- | 398 | void emit_alpha_test(); |
|
398 | void emit_fb_writes(); |
399 | void emit_fb_writes(); |
399 | 400 | ||
400 | void emit_shader_time_begin(); |
401 | void emit_shader_time_begin(); |
401 | void emit_shader_time_end(); |
402 | void emit_shader_time_end(); |
402 | void emit_shader_time_write(enum shader_time_shader_type type, |
403 | void emit_shader_time_write(enum shader_time_shader_type type, |
403 | fs_reg value); |
404 | fs_reg value); |
404 | 405 | ||
405 | bool try_rewrite_rhs_to_dst(ir_assignment *ir, |
406 | bool try_rewrite_rhs_to_dst(ir_assignment *ir, |
406 | fs_reg dst, |
407 | fs_reg dst, |
407 | fs_reg src, |
408 | fs_reg src, |
408 | fs_inst *pre_rhs_inst, |
409 | fs_inst *pre_rhs_inst, |
409 | fs_inst *last_rhs_inst); |
410 | fs_inst *last_rhs_inst); |
410 | void emit_assignment_writes(fs_reg &l, fs_reg &r, |
411 | void emit_assignment_writes(fs_reg &l, fs_reg &r, |
411 | const glsl_type *type, bool predicated); |
412 | const glsl_type *type, bool predicated); |
412 | void resolve_ud_negate(fs_reg *reg); |
413 | void resolve_ud_negate(fs_reg *reg); |
413 | void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg); |
414 | void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg); |
414 | 415 | ||
415 | fs_reg get_timestamp(); |
416 | fs_reg get_timestamp(); |
416 | 417 | ||
417 | struct brw_reg interp_reg(int location, int channel); |
418 | struct brw_reg interp_reg(int location, int channel); |
418 | void setup_uniform_values(ir_variable *ir); |
419 | void setup_uniform_values(ir_variable *ir); |
419 | void setup_builtin_uniform_values(ir_variable *ir); |
420 | void setup_builtin_uniform_values(ir_variable *ir); |
420 | int implied_mrf_writes(fs_inst *inst); |
421 | int implied_mrf_writes(fs_inst *inst); |
421 | 422 | ||
422 | void dump_instruction(backend_instruction *inst); |
423 | void dump_instruction(backend_instruction *inst); |
423 | 424 | ||
424 | struct gl_fragment_program *fp; |
425 | struct gl_fragment_program *fp; |
425 | struct brw_wm_compile *c; |
426 | struct brw_wm_compile *c; |
426 | unsigned int sanity_param_count; |
427 | unsigned int sanity_param_count; |
427 | 428 | ||
428 | int param_size[MAX_UNIFORMS * 4]; |
429 | int param_size[MAX_UNIFORMS * 4]; |
429 | 430 | ||
430 | int *virtual_grf_sizes; |
431 | int *virtual_grf_sizes; |
431 | int virtual_grf_count; |
432 | int virtual_grf_count; |
432 | int virtual_grf_array_size; |
433 | int virtual_grf_array_size; |
433 | int *virtual_grf_start; |
434 | int *virtual_grf_start; |
434 | int *virtual_grf_end; |
435 | int *virtual_grf_end; |
435 | bool live_intervals_valid; |
436 | bool live_intervals_valid; |
436 | 437 | ||
437 | /* This is the map from UNIFORM hw_reg + reg_offset as generated by |
438 | /* This is the map from UNIFORM hw_reg + reg_offset as generated by |
438 | * the visitor to the packed uniform number after |
439 | * the visitor to the packed uniform number after |
439 | * remove_dead_constants() that represents the actual uploaded |
440 | * remove_dead_constants() that represents the actual uploaded |
440 | * uniform index. |
441 | * uniform index. |
441 | */ |
442 | */ |
442 | int *params_remap; |
443 | int *params_remap; |
443 | int nr_params_remap; |
444 | int nr_params_remap; |
444 | 445 | ||
445 | struct hash_table *variable_ht; |
446 | struct hash_table *variable_ht; |
446 | fs_reg frag_depth; |
447 | fs_reg frag_depth; |
447 | fs_reg outputs[BRW_MAX_DRAW_BUFFERS]; |
448 | fs_reg outputs[BRW_MAX_DRAW_BUFFERS]; |
448 | unsigned output_components[BRW_MAX_DRAW_BUFFERS]; |
449 | unsigned output_components[BRW_MAX_DRAW_BUFFERS]; |
449 | fs_reg dual_src_output; |
450 | fs_reg dual_src_output; |
450 | int first_non_payload_grf; |
451 | int first_non_payload_grf; |
451 | /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */ |
452 | /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */ |
452 | int max_grf; |
453 | int max_grf; |
453 | int urb_setup[VARYING_SLOT_MAX]; |
454 | int urb_setup[VARYING_SLOT_MAX]; |
454 | 455 | ||
455 | fs_reg *fp_temp_regs; |
456 | fs_reg *fp_temp_regs; |
456 | fs_reg *fp_input_regs; |
457 | fs_reg *fp_input_regs; |
457 | 458 | ||
458 | /** @{ debug annotation info */ |
459 | /** @{ debug annotation info */ |
459 | const char *current_annotation; |
460 | const char *current_annotation; |
460 | const void *base_ir; |
461 | const void *base_ir; |
461 | /** @} */ |
462 | /** @} */ |
462 | 463 | ||
463 | bool failed; |
464 | bool failed; |
464 | char *fail_msg; |
465 | char *fail_msg; |
465 | 466 | ||
466 | /* Result of last visit() method. */ |
467 | /* Result of last visit() method. */ |
467 | fs_reg result; |
468 | fs_reg result; |
468 | 469 | ||
469 | fs_reg pixel_x; |
470 | fs_reg pixel_x; |
470 | fs_reg pixel_y; |
471 | fs_reg pixel_y; |
471 | fs_reg wpos_w; |
472 | fs_reg wpos_w; |
472 | fs_reg pixel_w; |
473 | fs_reg pixel_w; |
473 | fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; |
474 | fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; |
474 | fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; |
475 | fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; |
475 | fs_reg shader_start_time; |
476 | fs_reg shader_start_time; |
476 | 477 | ||
477 | int grf_used; |
478 | int grf_used; |
478 | 479 | ||
479 | const unsigned dispatch_width; /**< 8 or 16 */ |
480 | const unsigned dispatch_width; /**< 8 or 16 */ |
480 | 481 | ||
481 | int force_uncompressed_stack; |
482 | int force_uncompressed_stack; |
482 | int force_sechalf_stack; |
483 | int force_sechalf_stack; |
483 | }; |
484 | }; |
484 | 485 | ||
485 | /** |
486 | /** |
486 | * The fragment shader code generator. |
487 | * The fragment shader code generator. |
487 | * |
488 | * |
488 | * Translates FS IR to actual i965 assembly code. |
489 | * Translates FS IR to actual i965 assembly code. |
489 | */ |
490 | */ |
490 | class fs_generator |
491 | class fs_generator |
491 | { |
492 | { |
492 | public: |
493 | public: |
493 | fs_generator(struct brw_context *brw, |
494 | fs_generator(struct brw_context *brw, |
494 | struct brw_wm_compile *c, |
495 | struct brw_wm_compile *c, |
495 | struct gl_shader_program *prog, |
496 | struct gl_shader_program *prog, |
496 | struct gl_fragment_program *fp, |
497 | struct gl_fragment_program *fp, |
497 | bool dual_source_output); |
498 | bool dual_source_output); |
498 | ~fs_generator(); |
499 | ~fs_generator(); |
499 | 500 | ||
500 | const unsigned *generate_assembly(exec_list *simd8_instructions, |
501 | const unsigned *generate_assembly(exec_list *simd8_instructions, |
501 | exec_list *simd16_instructions, |
502 | exec_list *simd16_instructions, |
502 | unsigned *assembly_size); |
503 | unsigned *assembly_size); |
503 | 504 | ||
504 | private: |
505 | private: |
505 | void generate_code(exec_list *instructions); |
506 | void generate_code(exec_list *instructions); |
506 | void generate_fb_write(fs_inst *inst); |
507 | void generate_fb_write(fs_inst *inst); |
507 | void generate_pixel_xy(struct brw_reg dst, bool is_x); |
508 | void generate_pixel_xy(struct brw_reg dst, bool is_x); |
508 | void generate_linterp(fs_inst *inst, struct brw_reg dst, |
509 | void generate_linterp(fs_inst *inst, struct brw_reg dst, |
509 | struct brw_reg *src); |
510 | struct brw_reg *src); |
510 | void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src); |
511 | void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src); |
511 | void generate_math1_gen7(fs_inst *inst, |
512 | void generate_math1_gen7(fs_inst *inst, |
512 | struct brw_reg dst, |
513 | struct brw_reg dst, |
513 | struct brw_reg src); |
514 | struct brw_reg src); |
514 | void generate_math2_gen7(fs_inst *inst, |
515 | void generate_math2_gen7(fs_inst *inst, |
515 | struct brw_reg dst, |
516 | struct brw_reg dst, |
516 | struct brw_reg src0, |
517 | struct brw_reg src0, |
517 | struct brw_reg src1); |
518 | struct brw_reg src1); |
518 | void generate_math1_gen6(fs_inst *inst, |
519 | void generate_math1_gen6(fs_inst *inst, |
519 | struct brw_reg dst, |
520 | struct brw_reg dst, |
520 | struct brw_reg src); |
521 | struct brw_reg src); |
521 | void generate_math2_gen6(fs_inst *inst, |
522 | void generate_math2_gen6(fs_inst *inst, |
522 | struct brw_reg dst, |
523 | struct brw_reg dst, |
523 | struct brw_reg src0, |
524 | struct brw_reg src0, |
524 | struct brw_reg src1); |
525 | struct brw_reg src1); |
525 | void generate_math_gen4(fs_inst *inst, |
526 | void generate_math_gen4(fs_inst *inst, |
526 | struct brw_reg dst, |
527 | struct brw_reg dst, |
527 | struct brw_reg src); |
528 | struct brw_reg src); |
528 | void generate_math_g45(fs_inst *inst, |
529 | void generate_math_g45(fs_inst *inst, |
529 | struct brw_reg dst, |
530 | struct brw_reg dst, |
530 | struct brw_reg src); |
531 | struct brw_reg src); |
531 | void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src); |
532 | void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src); |
532 | void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src, |
533 | void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src, |
533 | bool negate_value); |
534 | bool negate_value); |
534 | void generate_spill(fs_inst *inst, struct brw_reg src); |
535 | void generate_spill(fs_inst *inst, struct brw_reg src); |
535 | void generate_unspill(fs_inst *inst, struct brw_reg dst); |
536 | void generate_unspill(fs_inst *inst, struct brw_reg dst); |
536 | void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst, |
537 | void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst, |
537 | struct brw_reg index, |
538 | struct brw_reg index, |
538 | struct brw_reg offset); |
539 | struct brw_reg offset); |
539 | void generate_uniform_pull_constant_load_gen7(fs_inst *inst, |
540 | void generate_uniform_pull_constant_load_gen7(fs_inst *inst, |
540 | struct brw_reg dst, |
541 | struct brw_reg dst, |
541 | struct brw_reg surf_index, |
542 | struct brw_reg surf_index, |
542 | struct brw_reg offset); |
543 | struct brw_reg offset); |
543 | void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst, |
544 | void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst, |
544 | struct brw_reg index, |
545 | struct brw_reg index, |
545 | struct brw_reg offset); |
546 | struct brw_reg offset); |
546 | void generate_varying_pull_constant_load_gen7(fs_inst *inst, |
547 | void generate_varying_pull_constant_load_gen7(fs_inst *inst, |
547 | struct brw_reg dst, |
548 | struct brw_reg dst, |
548 | struct brw_reg index, |
549 | struct brw_reg index, |
549 | struct brw_reg offset); |
550 | struct brw_reg offset); |
550 | void generate_mov_dispatch_to_flags(fs_inst *inst); |
551 | void generate_mov_dispatch_to_flags(fs_inst *inst); |
551 | void generate_set_simd4x2_offset(fs_inst *inst, |
552 | void generate_set_simd4x2_offset(fs_inst *inst, |
552 | struct brw_reg dst, |
553 | struct brw_reg dst, |
553 | struct brw_reg offset); |
554 | struct brw_reg offset); |
554 | void generate_discard_jump(fs_inst *inst); |
555 | void generate_discard_jump(fs_inst *inst); |
555 | 556 | ||
556 | void generate_pack_half_2x16_split(fs_inst *inst, |
557 | void generate_pack_half_2x16_split(fs_inst *inst, |
557 | struct brw_reg dst, |
558 | struct brw_reg dst, |
558 | struct brw_reg x, |
559 | struct brw_reg x, |
559 | struct brw_reg y); |
560 | struct brw_reg y); |
560 | void generate_unpack_half_2x16_split(fs_inst *inst, |
561 | void generate_unpack_half_2x16_split(fs_inst *inst, |
561 | struct brw_reg dst, |
562 | struct brw_reg dst, |
562 | struct brw_reg src); |
563 | struct brw_reg src); |
563 | 564 | ||
564 | void generate_shader_time_add(fs_inst *inst, |
565 | void generate_shader_time_add(fs_inst *inst, |
565 | struct brw_reg payload, |
566 | struct brw_reg payload, |
566 | struct brw_reg offset, |
567 | struct brw_reg offset, |
567 | struct brw_reg value); |
568 | struct brw_reg value); |
568 | 569 | ||
569 | void patch_discard_jumps_to_fb_writes(); |
570 | void patch_discard_jumps_to_fb_writes(); |
570 | 571 | ||
571 | struct brw_context *brw; |
572 | struct brw_context *brw; |
572 | struct gl_context *ctx; |
573 | struct gl_context *ctx; |
573 | 574 | ||
574 | struct brw_compile *p; |
575 | struct brw_compile *p; |
575 | struct brw_wm_compile *c; |
576 | struct brw_wm_compile *c; |
576 | 577 | ||
577 | struct gl_shader_program *prog; |
578 | struct gl_shader_program *prog; |
578 | struct gl_shader *shader; |
579 | struct gl_shader *shader; |
579 | const struct gl_fragment_program *fp; |
580 | const struct gl_fragment_program *fp; |
580 | 581 | ||
581 | unsigned dispatch_width; /**< 8 or 16 */ |
582 | unsigned dispatch_width; /**< 8 or 16 */ |
582 | 583 | ||
583 | exec_list discard_halt_patches; |
584 | exec_list discard_halt_patches; |
584 | bool dual_source_output; |
585 | bool dual_source_output; |
585 | void *mem_ctx; |
586 | void *mem_ctx; |
586 | }; |
587 | }; |
587 | 588 | ||
588 | bool brw_do_channel_expressions(struct exec_list *instructions); |
589 | bool brw_do_channel_expressions(struct exec_list *instructions); |
589 | bool brw_do_vector_splitting(struct exec_list *instructions); |
590 | bool brw_do_vector_splitting(struct exec_list *instructions); |
590 | bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);>>>>>>>> |
591 | bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);>>>>>>>> |