83,7 → 83,7 |
if (ASIC_IS_AVIVO(rdev)) |
WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
else { |
radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_location; |
radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_start; |
/* offset is from DISP(2)_BASE_ADDRESS */ |
WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
} |
175,7 → 175,7 |
|
/* offset is from DISP(2)_BASE_ADDRESS */ |
WREG32(RADEON_CUR_OFFSET, |
(gpu_addr - rdev->mc.vram_location + (yorg * 256))); |
(gpu_addr - rdev->mc.vram_start + (yorg * 256))); |
} |
radeon_lock_cursor_kms(crtc, false); |
} |