47,7 → 47,7 |
int radeon_tv = 0; |
int radeon_modeset = 1; |
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void parse_cmdline(char *cmdline, mode_t *mode, char *log); |
void parse_cmdline(char *cmdline, mode_t *mode, char *log, int *kms); |
int init_display(struct radeon_device *rdev, mode_t *mode); |
int init_display_kms(struct radeon_device *rdev, mode_t *mode); |
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478,22 → 478,24 |
return r; |
} |
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static struct card_info atom_card_info = { |
.dev = NULL, |
.reg_read = cail_reg_read, |
.reg_write = cail_reg_write, |
.mc_read = cail_mc_read, |
.mc_write = cail_mc_write, |
.pll_read = cail_pll_read, |
.pll_write = cail_pll_write, |
}; |
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int radeon_atombios_init(struct radeon_device *rdev) |
{ |
ENTER(); |
struct card_info *atom_card_info = |
kzalloc(sizeof(struct card_info), GFP_KERNEL); |
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atom_card_info.dev = rdev->ddev; |
rdev->mode_info.atom_context = atom_parse(&atom_card_info, rdev->bios); |
if (!atom_card_info) |
return -ENOMEM; |
|
rdev->mode_info.atom_card_info = atom_card_info; |
atom_card_info->dev = rdev->ddev; |
atom_card_info->reg_read = cail_reg_read; |
atom_card_info->reg_write = cail_reg_write; |
atom_card_info->mc_read = cail_mc_read; |
atom_card_info->mc_write = cail_mc_write; |
atom_card_info->pll_read = cail_pll_read; |
atom_card_info->pll_write = cail_pll_write; |
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rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios); |
radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
return 0; |
} |
501,6 → 503,7 |
void radeon_atombios_fini(struct radeon_device *rdev) |
{ |
kfree(rdev->mode_info.atom_context); |
kfree(rdev->mode_info.atom_card_info); |
} |
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int radeon_combios_init(struct radeon_device *rdev) |
886,7 → 889,7 |
return 0; |
|
if( cmdline && *cmdline ) |
parse_cmdline(cmdline, &usermode, log); |
parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
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if(!dbg_open(log)) |
{ |
898,7 → 901,7 |
return 0; |
}; |
} |
dbgprintf("Radeon RC05 cmdline %s\n", cmdline); |
dbgprintf("Radeon RC06 cmdline %s\n", cmdline); |
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enum_pci_devices(); |
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