114,6 → 114,7 |
i2c.i2c_id = gpio->sucI2cId.ucAccess; |
|
i2c.valid = true; |
break; |
} |
} |
|
345,7 → 346,9 |
DRM_MODE_CONNECTOR_Unknown, |
DRM_MODE_CONNECTOR_Unknown, |
DRM_MODE_CONNECTOR_Unknown, |
DRM_MODE_CONNECTOR_DisplayPort |
DRM_MODE_CONNECTOR_DisplayPort, |
DRM_MODE_CONNECTOR_eDP, |
DRM_MODE_CONNECTOR_Unknown |
}; |
|
bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) |
745,8 → 748,7 |
else |
radeon_add_legacy_encoder(dev, |
radeon_get_encoder_id(dev, |
(1 << |
i), |
(1 << i), |
dac), |
(1 << i)); |
} |
758,32 → 760,30 |
if (bios_connectors[j].valid && (i != j)) { |
if (bios_connectors[i].line_mux == |
bios_connectors[j].line_mux) { |
if (((bios_connectors[i]. |
devices & |
(ATOM_DEVICE_DFP_SUPPORT)) |
&& (bios_connectors[j]. |
devices & |
(ATOM_DEVICE_CRT_SUPPORT))) |
|| |
((bios_connectors[j]. |
devices & |
(ATOM_DEVICE_DFP_SUPPORT)) |
&& (bios_connectors[i]. |
devices & |
(ATOM_DEVICE_CRT_SUPPORT)))) { |
bios_connectors[i]. |
devices |= |
bios_connectors[j]. |
devices; |
bios_connectors[i]. |
connector_type = |
/* make sure not to combine LVDS */ |
if (bios_connectors[i].devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
bios_connectors[i].line_mux = 53; |
bios_connectors[i].ddc_bus.valid = false; |
continue; |
} |
if (bios_connectors[j].devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
bios_connectors[j].line_mux = 53; |
bios_connectors[j].ddc_bus.valid = false; |
continue; |
} |
/* combine analog and digital for DVI-I */ |
if (((bios_connectors[i].devices & (ATOM_DEVICE_DFP_SUPPORT)) && |
(bios_connectors[j].devices & (ATOM_DEVICE_CRT_SUPPORT))) || |
((bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) && |
(bios_connectors[i].devices & (ATOM_DEVICE_CRT_SUPPORT)))) { |
bios_connectors[i].devices |= |
bios_connectors[j].devices; |
bios_connectors[i].connector_type = |
DRM_MODE_CONNECTOR_DVII; |
if (bios_connectors[j].devices & |
(ATOM_DEVICE_DFP_SUPPORT)) |
if (bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) |
bios_connectors[i].hpd = |
bios_connectors[j].hpd; |
bios_connectors[j]. |
valid = false; |
bios_connectors[j].valid = false; |
} |
} |
} |
938,6 → 938,43 |
return false; |
} |
|
union igp_info { |
struct _ATOM_INTEGRATED_SYSTEM_INFO info; |
struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2; |
}; |
|
bool radeon_atombios_sideport_present(struct radeon_device *rdev) |
{ |
struct radeon_mode_info *mode_info = &rdev->mode_info; |
int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo); |
union igp_info *igp_info; |
u8 frev, crev; |
u16 data_offset; |
|
atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, |
&crev, &data_offset); |
|
igp_info = (union igp_info *)(mode_info->atom_context->bios + |
data_offset); |
|
if (igp_info) { |
switch (crev) { |
case 1: |
if (igp_info->info.ucMemoryType & 0xf0) |
return true; |
break; |
case 2: |
if (igp_info->info_2.ucMemoryType & 0x0f) |
return true; |
break; |
default: |
DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev); |
break; |
} |
} |
return false; |
} |
|
bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
struct radeon_encoder_int_tmds *tmds) |
{ |
1029,6 → 1066,7 |
ss->delay = ss_info->asSS_Info[i].ucSS_Delay; |
ss->range = ss_info->asSS_Info[i].ucSS_Range; |
ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div; |
break; |
} |
} |
} |
1234,6 → 1272,61 |
return true; |
} |
|
enum radeon_tv_std |
radeon_atombios_get_tv_info(struct radeon_device *rdev) |
{ |
struct radeon_mode_info *mode_info = &rdev->mode_info; |
int index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); |
uint16_t data_offset; |
uint8_t frev, crev; |
struct _ATOM_ANALOG_TV_INFO *tv_info; |
enum radeon_tv_std tv_std = TV_STD_NTSC; |
|
atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, &crev, &data_offset); |
|
tv_info = (struct _ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset); |
|
switch (tv_info->ucTV_BootUpDefaultStandard) { |
case ATOM_TV_NTSC: |
tv_std = TV_STD_NTSC; |
DRM_INFO("Default TV standard: NTSC\n"); |
break; |
case ATOM_TV_NTSCJ: |
tv_std = TV_STD_NTSC_J; |
DRM_INFO("Default TV standard: NTSC-J\n"); |
break; |
case ATOM_TV_PAL: |
tv_std = TV_STD_PAL; |
DRM_INFO("Default TV standard: PAL\n"); |
break; |
case ATOM_TV_PALM: |
tv_std = TV_STD_PAL_M; |
DRM_INFO("Default TV standard: PAL-M\n"); |
break; |
case ATOM_TV_PALN: |
tv_std = TV_STD_PAL_N; |
DRM_INFO("Default TV standard: PAL-N\n"); |
break; |
case ATOM_TV_PALCN: |
tv_std = TV_STD_PAL_CN; |
DRM_INFO("Default TV standard: PAL-CN\n"); |
break; |
case ATOM_TV_PAL60: |
tv_std = TV_STD_PAL_60; |
DRM_INFO("Default TV standard: PAL-60\n"); |
break; |
case ATOM_TV_SECAM: |
tv_std = TV_STD_SECAM; |
DRM_INFO("Default TV standard: SECAM\n"); |
break; |
default: |
tv_std = TV_STD_NTSC; |
DRM_INFO("Unknown TV standard; defaulting to NTSC\n"); |
break; |
} |
return tv_std; |
} |
|
struct radeon_encoder_tv_dac * |
radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder) |
{ |
1269,6 → 1362,7 |
dac = dac_info->ucDAC2_NTSC_DAC_Adjustment; |
tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); |
|
tv_dac->tv_std = radeon_atombios_get_tv_info(rdev); |
} |
return tv_dac; |
} |