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Regard whitespace Rev 1312 → Rev 1313

/drivers/video/drm/drm_edid.c
662,6 → 662,12
return NULL;
}
 
/* Some EDIDs have bogus h/vtotal values */
if (mode->hsync_end > mode->htotal)
mode->htotal = mode->hsync_end + 1;
if (mode->vsync_end > mode->vtotal)
mode->vtotal = mode->vsync_end + 1;
 
drm_mode_set_name(mode);
 
if (pt->misc & DRM_EDID_PT_INTERLACED)
/drivers/video/drm/drm_fb_helper.c
385,7 → 385,7
struct drm_framebuffer *fb = fb_helper->fb;
int depth;
 
if (var->pixclock == -1 || !var->pixclock)
if (var->pixclock != 0)
return -EINVAL;
 
/* Need to resize the fb object !!! */
477,7 → 477,7
int ret;
int i;
 
if (var->pixclock != -1) {
if (var->pixclock != 0) {
DRM_ERROR("PIXEL CLCOK SET\n");
return -EINVAL;
}
690,7 → 690,7
fb_helper->fb = fb;
 
if (new_fb) {
info->var.pixclock = -1;
info->var.pixclock = 0;
// if (register_framebuffer(info) < 0)
// return -EINVAL;
} else {
/drivers/video/drm/includes/syscall.h
229,13 → 229,15
return retval;
}
 
static inline void *__DestroyObject(void *obj)
static inline void __DestroyObject(void *obj)
{
__asm__ __volatile__ (
"call *__imp__DestroyObject"
:
:"a" (obj)
:"ebx","edx","esi","edi", "memory");
:"a" (obj));
__asm__ __volatile__ (
""
:::"eax","ebx","ecx","edx","esi","edi","cc","memory");
}
 
 
/drivers/video/drm/radeon/atom.c
107,6 → 107,7
base += 3;
break;
case ATOM_IIO_WRITE:
(void)ctx->card->reg_read(ctx->card, CU16(base + 1));
ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
base += 3;
break;
/drivers/video/drm/radeon/atombios.h
1141,7 → 1141,7
/* ucTableFormatRevision=1,ucTableContentRevision=2 */
typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
USHORT usPixelClock; /* in 10KHz; for bios convenient */
UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx defintions below */
UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx definitions below */
UCHAR ucAction; /* 0: turn off encoder */
/* 1: setup and turn on encoder */
UCHAR ucTruncate; /* bit0=0: Disable truncate */
1424,7 → 1424,7
/* Structures used in FirmwareInfoTable */
/****************************************************************************/
 
/* usBIOSCapability Defintion: */
/* usBIOSCapability Definition: */
/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
2386,7 → 2386,7
} ATOM_ANALOG_TV_INFO_V1_2;
 
/**************************************************************************/
/* VRAM usage and their defintions */
/* VRAM usage and their definitions */
 
/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
3046,7 → 3046,7
#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2
#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
 
/* Byte aligned defintion for BIOS usage */
/* Byte aligned definition for BIOS usage */
#define ATOM_S0_CRT1_MONOb0 0x01
#define ATOM_S0_CRT1_COLORb0 0x02
#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
3131,7 → 3131,7
#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L
 
/* Byte aligned defintion for BIOS usage */
/* Byte aligned definition for BIOS usage */
#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F
#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
#define ATOM_S2_CRT1_DPMS_STATEb2 0x01
3190,7 → 3190,7
#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L
#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L
 
/* Byte aligned defintion for BIOS usage */
/* Byte aligned definition for BIOS usage */
#define ATOM_S3_CRT1_ACTIVEb0 0x01
#define ATOM_S3_LCD1_ACTIVEb0 0x02
#define ATOM_S3_TV1_ACTIVEb0 0x04
3230,7 → 3230,7
#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L
#define ATOM_S4_LCD1_REFRESH_SHIFT 8
 
/* Byte aligned defintion for BIOS usage */
/* Byte aligned definition for BIOS usage */
#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF
#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0
#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0
3310,7 → 3310,7
#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L
#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L
 
/* Byte aligned defintion for BIOS usage */
/* Byte aligned definition for BIOS usage */
#define ATOM_S6_DEVICE_CHANGEb0 0x01
#define ATOM_S6_SCALER_CHANGEb0 0x02
#define ATOM_S6_LID_CHANGEb0 0x04
/drivers/video/drm/radeon/display.h
50,7 → 50,7
void (*show_cursor)(int show);
void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
void (__stdcall *restore_cursor)(int x, int y);
 
void (*disable_mouse)(void);
};
 
extern display_t *rdisplay;
/drivers/video/drm/radeon/makefile
73,13 → 73,14
rdisplay.c \
rdisplay_kms.c \
radeon_pm.c \
cmdline.c
cmdline.c \
cursor.S
 
 
SRC_DEP:=
 
 
NAME_OBJS = $(patsubst %.s, %.o, $(patsubst %.asm, %.o,\
NAME_OBJS = $(patsubst %.S, %.o, $(patsubst %.asm, %.o,\
$(patsubst %.c, %.o, $(NAME_SRC))))
 
 
92,3 → 93,6
 
%.o : %.c $(HFILES) Makefile
$(CC) $(CFLAGS) $(DEFINES) $(INCLUDES) -o $@ -c $<
 
%.o : %.S $(HFILES) Makefile
as -o $@ $<
/drivers/video/drm/radeon/r600.c
393,11 → 393,11
* AGP so that GPU can catch out of VRAM/AGP access
*/
if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
/* Enought place before */
/* Enough place before */
rdev->mc.vram_location = rdev->mc.gtt_location -
rdev->mc.mc_vram_size;
} else if (tmp > rdev->mc.mc_vram_size) {
/* Enought place after */
/* Enough place after */
rdev->mc.vram_location = rdev->mc.gtt_location +
rdev->mc.gtt_size;
} else {
/drivers/video/drm/radeon/radeon_agp.c
237,6 → 237,18
#endif
}
 
void radeon_agp_resume(struct radeon_device *rdev)
{
#if __OS_HAS_AGP
int r;
if (rdev->flags & RADEON_IS_AGP) {
r = radeon_agp_init(rdev);
if (r)
dev_warn(rdev->dev, "radeon AGP reinit failed\n");
}
#endif
}
 
void radeon_agp_fini(struct radeon_device *rdev)
{
#if __OS_HAS_AGP
/drivers/video/drm/radeon/radeon_connectors.c
566,8 → 566,9
radeon_i2c_do_lock(radeon_connector, 0);
 
if (!radeon_connector->edid) {
DRM_ERROR("DDC responded but not EDID found for %s\n",
DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
drm_get_connector_name(connector));
ret = connector_status_connected;
} else {
radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
 
720,7 → 721,7
radeon_i2c_do_lock(radeon_connector, 0);
 
if (!radeon_connector->edid) {
DRM_ERROR("DDC responded but not EDID found for %s\n",
DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
drm_get_connector_name(connector));
} else {
radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1070,10 → 1071,6
uint32_t subpixel_order = SubPixelNone;
int ret;
 
ENTER();
 
dbgprintf("id %d device %x type %x i2c %x\n",
connector_id, supported_device, connector_type, i2c_bus);
/* fixme - tv/cv/din */
if (connector_type == DRM_MODE_CONNECTOR_Unknown)
return;
1083,7 → 1080,6
radeon_connector = to_radeon_connector(connector);
if (radeon_connector->connector_id == connector_id) {
radeon_connector->devices |= supported_device;
LEAVE();
return;
}
}
1154,6 → 1150,13
if (ret)
goto failed;
radeon_connector->dac_load_detect = true;
/* RS400,RC410,RS480 chipset seems to report a lot
* of false positive on load detect, we haven't yet
* found a way to make load detect reliable on those
* chipset, thus just disable it for TV.
*/
if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
radeon_connector->dac_load_detect = false;
drm_connector_attach_property(&radeon_connector->base,
rdev->mode_info.load_detect_property,
1);
1178,7 → 1181,6
 
connector->display_info.subpixel_order = subpixel_order;
drm_sysfs_connector_add(connector);
LEAVE();
return;
 
failed:
1186,5 → 1188,4
radeon_i2c_destroy(radeon_connector->ddc_bus);
drm_connector_cleanup(connector);
kfree(connector);
LEAVE();
}
/drivers/video/drm/radeon/radeon_device.c
895,7 → 895,7
return 0;
};
}
dbgprintf("Radeon RC07 cmdline %s\n", cmdline);
dbgprintf("Radeon RC08 cmdline %s\n", cmdline);
 
enum_pci_devices();
 
/drivers/video/drm/radeon/radeon_fb.c
397,7 → 397,7
vm_node = kzalloc(sizeof(*vm_node),0);
 
vm_node->free = 0;
vm_node->size = 0x800000 >> 12;
vm_node->size = 0xC00000 >> 12;
vm_node->start = 0;
vm_node->mm = NULL;
 
/drivers/video/drm/radeon/radeon_object.c
52,8 → 52,8
 
ENTER();
 
r = drm_mm_init(&mm_vram, 0x800000 >> PAGE_SHIFT,
((rdev->mc.real_vram_size - 0x800000) >> PAGE_SHIFT));
r = drm_mm_init(&mm_vram, 0xC00000 >> PAGE_SHIFT,
((rdev->mc.real_vram_size - 0xC00000) >> PAGE_SHIFT));
if (r) {
DRM_ERROR("Failed initializing VRAM heap.\n");
return r;
297,8 → 297,6
(robj->vm_addr << PAGE_SHIFT);
robj->kptr = (void*)MapIoMem(robj->cpu_addr,
robj->mm_node->size << 12, PG_SW);
// dbgprintf("map io mem %x at %x\n", robj->cpu_addr, robj->kptr);
 
}
else
{
328,7 → 326,6
// spin_unlock(&robj->tobj.lock);
}
 
#if 0
 
void radeon_object_unpin(struct radeon_object *robj)
{
347,26 → 344,16
return;
}
// spin_unlock(&robj->tobj.lock);
r = radeon_object_reserve(robj, false);
if (unlikely(r != 0)) {
DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
return;
 
drm_mm_put_block(robj->mm_node);
 
kfree(robj);
}
flags = robj->tobj.mem.placement;
robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
r = ttm_buffer_object_validate(&robj->tobj,
robj->tobj.proposed_placement,
false, false);
if (unlikely(r != 0)) {
DRM_ERROR("radeon: failed to unpin buffer.\n");
}
radeon_object_unreserve(robj);
}
 
 
#if 0
 
 
 
/*
* To exclude mutual BO access we rely on bo_reserve exclusion, as all
* function are calling it.
/drivers/video/drm/radeon/rdisplay.c
13,6 → 13,11
static cursor_t* __stdcall select_cursor(cursor_t *cursor);
static void __stdcall move_cursor(cursor_t *cursor, int x, int y);
 
extern void destroy_cursor(void);
 
void disable_mouse(void)
{};
 
int init_cursor(cursor_t *cursor)
{
struct radeon_device *rdev;
55,9 → 60,20
 
radeon_object_kunmap(cursor->robj);
 
cursor->header.destroy = destroy_cursor;
 
return 0;
};
 
void fini_cursor(cursor_t *cursor)
{
list_del(&cursor->list);
radeon_object_unpin(cursor->robj);
KernelFree(cursor->data);
__DestroyObject(cursor);
};
 
 
static void radeon_show_cursor()
{
struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
188,6 → 204,7
rdisplay->show_cursor = NULL;
rdisplay->move_cursor = move_cursor;
rdisplay->restore_cursor = restore_cursor;
rdisplay->disable_mouse = disable_mouse;
 
select_cursor(rdisplay->cursor);
radeon_show_cursor();
/drivers/video/drm/radeon/rdisplay_kms.c
14,6 → 14,8
 
int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
 
void disable_mouse(void);
 
static void radeon_show_cursor_kms(struct drm_crtc *crtc)
{
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
369,6 → 371,7
rdisplay->show_cursor = NULL;
rdisplay->move_cursor = move_cursor_kms;
rdisplay->restore_cursor = restore_cursor;
rdisplay->disable_mouse = disable_mouse;
 
select_cursor_kms(rdisplay->cursor);
radeon_show_cursor_kms(rdisplay->crtc);
/drivers/video/drm/radeon/rv515.c
142,8 → 142,6
 
void rv515_vga_render_disable(struct radeon_device *rdev)
{
WREG32(R_000330_D1VGA_CONTROL, 0);
WREG32(R_000338_D2VGA_CONTROL, 0);
WREG32(R_000300_VGA_RENDER_CONTROL,
RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
}
391,7 → 389,6
save->d2crtc_control = RREG32(R_006880_D2CRTC_CONTROL);
 
/* Stop all video */
WREG32(R_000330_D1VGA_CONTROL, 0);
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
WREG32(R_000300_VGA_RENDER_CONTROL, 0);
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
400,6 → 397,8
WREG32(R_006880_D2CRTC_CONTROL, 0);
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
WREG32(R_000330_D1VGA_CONTROL, 0);
WREG32(R_000338_D2VGA_CONTROL, 0);
}
 
void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
413,6 → 412,8
WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control);
mdelay(1);
/* Restore video state */
WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 1);
WREG32(R_006080_D1CRTC_CONTROL, save->d1crtc_control);
419,8 → 420,6
WREG32(R_006880_D2CRTC_CONTROL, save->d2crtc_control);
WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);
}
 
/drivers/video/drm/radeon/rv770.c
831,11 → 831,11
* AGP so that GPU can catch out of VRAM/AGP access
*/
if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
/* Enought place before */
/* Enough place before */
rdev->mc.vram_location = rdev->mc.gtt_location -
rdev->mc.mc_vram_size;
} else if (tmp > rdev->mc.mc_vram_size) {
/* Enought place after */
/* Enough place after */
rdev->mc.vram_location = rdev->mc.gtt_location +
rdev->mc.gtt_size;
} else {