21,16 → 21,17 |
;; ;; |
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
|
format MS COFF |
format PE DLL native |
entry START |
|
API_VERSION = 0x01000100 |
DRIVER_VERSION = 5 |
CURRENT_API = 0x0200 |
COMPATIBLE_API = 0x0100 |
API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API |
|
MAX_DEVICES = 16 |
|
DEBUG = 1 |
__DEBUG__ = 1 |
__DEBUG_LEVEL__ = 2 |
__DEBUG_LEVEL__ = 1 ; 1 = all, 2 = errors only |
|
TX_RING_SIZE = 4 |
RX_RING_SIZE = 4 |
40,7 → 41,6 |
|
; Size of the in-memory receive ring. |
RX_BUF_LEN_IDX = 3 ; 0==8K, 1==16K, 2==32K, 3==64K |
RX_BUF_LEN = (8192 shl RX_BUF_LEN_IDX) |
|
; PCI Tuning Parameters |
; Threshold is bytes transferred to chip before transmission starts. |
47,23 → 47,20 |
TX_FIFO_THRESH = 256 ; In bytes, rounded down to 32 byte units. |
|
; The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024. |
RX_FIFO_THRESH = 4 ; Rx buffer level before first PCI xfer. |
RX_FIFO_THRESH = 4 ; Rx buffer level before first PCI transfer. |
RX_DMA_BURST = 4 ; Maximum PCI burst, '4' is 256 bytes |
TX_DMA_BURST = 4 |
|
|
section '.flat' readable writable executable |
|
include '../proc32.inc' |
include '../struct.inc' |
include '../macros.inc' |
include '../proc32.inc' |
include '../imports.inc' |
include '../fdo.inc' |
include '../netdrv.inc' |
include '../netdrv_pe.inc' |
|
public START |
public service_proc |
public version |
|
|
;************************************************************************** |
; VIA Rhine Register Definitions |
;************************************************************************** |
245,8 → 242,8 |
MIICR_MDI = 0x02 |
MIICR_MDC = 0x01 |
; Bits in the EECSR register |
EECSR_EEPR = 0x80 ; eeprom programed status, 73h means programed |
EECSR_EMBP = 0x40 ; eeprom embeded programming |
EECSR_EEPR = 0x80 ; eeprom programmed status, 73h means programmed |
EECSR_EMBP = 0x40 ; eeprom embedded programming |
EECSR_AUTOLD = 0x20 ; eeprom content reload |
EECSR_DPM = 0x10 ; eeprom direct programming |
EECSR_CS = 0x08 ; eeprom CS pin |
268,7 → 265,7 |
BCR1_POT1 = 0x02 |
BCR1_POT0 = 0x01 |
; Bits in the CFGA register |
CFGA_EELOAD = 0x80 ; enable eeprom embeded and direct programming |
CFGA_EELOAD = 0x80 ; enable eeprom embedded and direct programming |
CFGA_JUMPER = 0x40 |
CFGA_MTGPIO = 0x08 |
CFGA_T10EN = 0x02 |
482,64 → 479,50 |
IntrTxErrSummary = 0x082218 |
|
DEFAULT_INTR = (IntrRxDone or IntrRxErr or IntrRxEmpty or IntrRxOverflow or IntrRxDropped or IntrRxNoBuf) |
RX_BUF_LEN = (8192 shl RX_BUF_LEN_IDX) |
|
struct rx_head |
status dd ? |
control dd ? |
buff_addr dd ? ; address |
next_desc dd ? ; |
|
virtual at ebx |
buff_addr_virt dd ? |
rd 3 ; alignment |
ends |
|
device: |
struct tx_head |
status dd ? |
control dd ? |
buff_addr dd ? ; address |
next_desc dd ? ; |
|
ETH_DEVICE |
buff_addr_virt dd ? |
rd 3 ; alignment |
ends |
|
.io_addr dd ? |
.pci_dev dd ? |
.pci_bus dd ? |
.revision db ? |
.irq_line db ? |
.chip_id dw ? |
struct device ETH_DEVICE |
|
.cur_rx dw ? |
.cur_tx dw ? |
.last_tx dw ? |
io_addr dd ? |
pci_dev dd ? |
pci_bus dd ? |
revision db ? |
irq_line db ? |
chip_id dw ? |
|
rb 0x100-(($ - device) and 0xff) ; align 256 |
.tx_ring rb tx_head.sizeof*TX_RING_SIZE |
cur_rx dw ? |
cur_tx dw ? |
last_tx dw ? |
|
rb 0x100-(($ - device) and 0xff) ; align 256 |
.rx_ring rb rx_head.sizeof*RX_RING_SIZE |
rb 0x100 - ($ and 0xff) ; align 256 |
tx_ring rb sizeof.tx_head*TX_RING_SIZE |
|
.size = $ - device |
rb 0x100 - ($ and 0xff) ; align 256 |
rx_ring rb sizeof.rx_head*RX_RING_SIZE |
|
end virtual |
ends |
|
virtual at 0 |
rx_head: |
.status dd ? |
.control dd ? |
.buff_addr dd ? ; address |
.next_desc dd ? ; |
|
.buff_addr_virt dd ? |
rd 3 ; alignment |
.sizeof: |
end virtual |
|
|
virtual at 0 |
tx_head: |
.status dd ? |
.control dd ? |
.buff_addr dd ? ; address |
.next_desc dd ? ; |
|
.buff_addr_virt dd ? |
rd 3 ; alignment |
.sizeof: |
end virtual |
|
|
|
section '.flat' code readable align 16 |
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
;; ;; |
;; proc START ;; |
547,20 → 530,16 |
;; (standard driver proc) ;; |
;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
|
align 4 |
proc START stdcall, state:dword |
proc START c, reason:dword, cmdline:dword |
|
cmp [state], 1 |
jne .exit |
cmp [reason], DRV_ENTRY |
jne .fail |
|
.entry: |
|
DEBUGF 2,"Loading driver\n" |
stdcall RegService, my_service, service_proc |
DEBUGF 1,"Loading driver\n" |
invoke RegService, my_service, service_proc |
ret |
|
.fail: |
.exit: |
xor eax, eax |
ret |
|
574,7 → 553,6 |
;; (standard driver proc) ;; |
;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
|
align 4 |
proc service_proc stdcall, ioctl:dword |
|
mov edx, [ioctl] |
603,7 → 581,7 |
|
mov eax, [edx + IOCTL.input] |
cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
jne .fail ; other types arent supported for this card yet |
jne .fail ; other types aren't supported for this card yet |
|
; check if the device is already listed |
|
616,9 → 594,9 |
mov ax, [eax+1] ; |
.nextdevice: |
mov ebx, [esi] |
cmp al, byte[device.pci_bus] |
cmp al, byte[ebx + device.pci_bus] |
jne @f |
cmp ah, byte[device.pci_dev] |
cmp ah, byte[ebx + device.pci_dev] |
je .find_devicenum ; Device is already loaded, let's find it's device number |
@@: |
add esi, 4 |
625,50 → 603,52 |
loop .nextdevice |
|
|
; This device doesnt have its own eth_device structure yet, lets create one |
; This device doesn't have its own eth_device structure yet, lets create one |
.firstdevice: |
cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
jae .fail |
|
allocate_and_clear ebx, device.size, .fail ; Allocate the buffer for device structure |
allocate_and_clear ebx, sizeof.device, .fail ; Allocate the buffer for device structure |
|
; Fill in the direct call addresses into the struct |
|
mov [device.reset], reset |
mov [device.transmit], transmit |
mov [device.unload], unload |
mov [device.name], my_service |
mov [ebx + device.reset], reset |
mov [ebx + device.transmit], transmit |
mov [ebx + device.unload], unload |
mov [ebx + device.name], my_service |
|
; save the pci bus and device numbers |
|
mov eax, [edx + IOCTL.input] |
movzx ecx, byte[eax+1] |
mov [device.pci_bus], ecx |
mov [ebx + device.pci_bus], ecx |
movzx ecx, byte[eax+2] |
mov [device.pci_dev], ecx |
mov [ebx + device.pci_dev], ecx |
|
; Now, it's time to find the base io addres of the PCI device |
; Now, it's time to find the base io address of the PCI device |
|
PCI_find_io |
stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev] |
mov [ebx + device.io_addr], eax |
|
; We've found the io address, find IRQ now |
|
PCI_find_irq |
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line |
mov [ebx + device.irq_line], al |
|
DEBUGF 1,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
[device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:4 |
[ebx + device.pci_dev]:1,[ebx + device.pci_bus]:1,[ebx + device.irq_line]:1,[ebx + device.io_addr]:4 |
|
; Ok, the eth_device structure is ready, let's probe the device |
call probe ; this function will output in eax |
test eax, eax |
jnz .err ; If an error occured, exit |
jnz .err ; If an error occurred, exit |
|
mov eax, [devices] ; Add the device structure to our device list |
mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
inc [devices] ; |
|
mov [device.type], NET_TYPE_ETH |
call NetRegDev |
mov [ebx + device.type], NET_TYPE_ETH |
invoke NetRegDev |
|
cmp eax, -1 |
je .destroy |
679,19 → 659,19 |
|
.find_devicenum: |
DEBUGF 1,"Trying to find device number of already registered device\n" |
call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
; into a device number in edi |
mov eax, edi ; Application wants it in eax instead |
DEBUGF 1,"Kernel says: %u\n", eax |
ret |
|
; If an error occured, remove all allocated data and exit (returning -1 in eax) |
; If an error occurred, remove all allocated data and exit (returning -1 in eax) |
|
.destroy: |
; todo: reset device into virgin state |
|
.err: |
stdcall KernelFree, ebx |
invoke KernelFree, ebx |
|
.fail: |
or eax, -1 |
708,18 → 688,24 |
;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
|
|
|
;------- |
; |
; PROBE |
; |
;------- |
probe: |
|
mov eax, [device.io_addr] |
DEBUGF 1, "Probing card at 0x%x\n", eax |
DEBUGF 1, "Probing\n" |
|
; make the card a bus master |
PCI_make_bus_master |
|
; Make the device a bus master |
invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command |
or al, PCI_CMD_MASTER |
invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax |
|
; get device id |
stdcall PciRead16, [device.pci_bus], [device.pci_dev], PCI_DEVICE_ID |
mov [device.chip_id], ax |
invoke PciRead16, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.device_id |
mov [ebx + device.chip_id], ax |
|
mov esi, chiplist |
.loop: |
728,18 → 714,19 |
add esi, 8 |
cmp esi, chiplist + 6*8 |
jbe .loop |
DEBUGF 2, "Unknown chip: 0x%x, continueing anyway\n", ax |
DEBUGF 2, "Unknown chip: 0x%x, continuing anyway\n", ax |
jmp .done |
.got_it: |
mov eax, dword[esi+4] |
mov [device.name], eax |
mov [ebx + device.name], eax |
DEBUGF 1, "Chip type = %s\n", eax |
.done: |
|
; get revision id. |
PCI_find_rev |
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.revision_id |
mov [ebx + device.revision], al |
|
movzx eax, [device.revision] |
movzx eax, [ebx + device.revision] |
DEBUGF 1, "Card revision = 0x%x\n", eax |
|
; D-Link provided reset code (with comment additions) |
746,12 → 733,12 |
cmp al, 0x40 |
jb .below_x40 |
|
mov ax, [device.chip_id] |
mov ax, [ebx + device.chip_id] |
DEBUGF 1, "Enabling Sticky Bit Workaround for Chip_id: 0x%x\n", ax |
|
; clear sticky bit before reset & read ethernet address |
set_io 0 |
set_io bySTICKHW |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], bySTICKHW |
in al, dx |
and al, 0xFC |
out dx, al |
758,7 → 745,7 |
|
; (bits written are cleared?) |
; disable force PME-enable |
set_io byWOLcgClr |
set_io [ebx + device.io_addr], byWOLcgClr |
mov al, 0x80 |
out dx, al |
|
767,22 → 754,22 |
out dx, al |
|
; clear power status (undocumented in vt6102 docs?) |
set_io byPwrcsrClr |
set_io [ebx + device.io_addr], byPwrcsrClr |
out dx, al |
|
.below_x40: |
|
; Reset the chip to erase previous misconfiguration. |
set_io 0 |
set_io byCR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCR0 |
mov ax, CR_SFRST |
out dx, ax |
|
; if vt3043 delay after reset |
cmp [device.revision], 0x40 |
cmp [ebx + device.revision], 0x40 |
jae @f |
mov esi, 2000 ; 2000ms |
call Sleep |
mov esi, 200 ; 2000ms |
invoke Sleep |
@@: |
|
; polling till software reset complete |
796,36 → 783,36 |
@@: |
|
; issue AUTOLoad in EECSR to reload eeprom |
set_io byEECSR |
set_io [ebx + device.io_addr], byEECSR |
mov al, 0x20 |
out dx, al |
|
; if vt3065 delay after reset |
cmp [device.revision], 0x40 |
cmp [ebx + device.revision], 0x40 |
jb .not_vt3065 |
|
; delay 8ms to let MAC stable |
mov esi, 8 ; 8ms |
call Sleep |
; delay 10ms to let MAC stable |
mov esi, 1 ; 10ms |
invoke Sleep |
|
; for 3065D, EEPROM reloaded will cause bit 0 in MAC_REG_CFGA |
; turned on. it makes MAC receive magic packet |
; automatically. So, we turn it off. (D-Link) |
|
set_io byCFGA |
set_io [ebx + device.io_addr], byCFGA |
in al, dx |
and al, 0xFE |
out dx, al |
|
; turn on bit2 in PCI configuration register 0x53 , only for 3065 |
stdcall PciRead8, [device.pci_bus], [device.pci_dev], PCI_REG_MODE3 |
invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_REG_MODE3 |
or al, MODE3_MIION |
stdcall PciWrite8, [device.pci_bus], [device.pci_dev], PCI_REG_MODE3, eax |
invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_REG_MODE3, eax |
.not_vt3065: |
|
; back off algorithm, disable the right-most 4-bit off CFGD |
set_io 0 |
set_io byCFGD |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCFGD |
in al, dx |
and al, not (CFGD_RANDOM or CFGD_CFDX or CFGD_CEREN or CFGD_CETEN) |
out dx, al |
843,9 → 830,8 |
|
mov ecx, 5 |
.read_again: |
DEBUGF 1, "." |
mov esi, 1 |
call Sleep |
invoke Sleep |
|
stdcall ReadMII, 1 |
test eax, 0x0020 |
855,10 → 841,10 |
.read_done: |
DEBUGF 1, " OK\n" |
|
if DEBUG |
if 0 |
|
set_io 0 |
set_io 0x6C |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], 0x6C |
in al, dx |
and eax, 0xFF |
DEBUGF 1, "MII : Address %x\n", ax |
875,8 → 861,8 |
end if |
|
; query MII to know LineSpeed, duplex mode |
set_io 0 |
set_io MIIStatus |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], MIIStatus |
in al, dx |
test al, MIISR_SPEED |
jz .100mbps |
893,8 → 879,8 |
jz .halfduplex |
|
DEBUGF 1, "Fullduplex\n" |
set_io 0 |
set_io byCR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCR0 |
mov ax, CR_FDX |
out dx, ax |
jmp @f |
904,14 → 890,14 |
@@: |
|
; set MII 10 FULL ON, only apply in vt3043 |
cmp [device.chip_id], 0x3043 |
cmp [ebx + device.chip_id], 0x3043 |
jne @f |
stdcall WriteMII, 0x17, 1 shl 1, 1 |
@@: |
|
; turn on MII link change |
set_io 0 |
set_io byMIICR |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
and al, 0x7F |
out dx, al |
919,7 → 905,7 |
|
call MIIDelay |
|
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
mov al, 0x41 |
out dx, al |
|
927,7 → 913,7 |
|
pop eax |
or al, 0x80 |
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
out dx, al |
|
;**************************************************************************; |
939,20 → 925,19 |
DEBUGF 1, "reset\n" |
|
; attach int handler |
|
movzx eax, [device.irq_line] |
movzx eax, [ebx + device.irq_line] |
DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
stdcall AttachIntHandler, eax, int_handler, dword 0 |
invoke AttachIntHandler, eax, int_handler, ebx |
test eax, eax |
jnz @f |
DEBUGF 2,"\nCould not attach int handler!\n" |
; or eax, -1 |
; ret |
DEBUGF 2,"Could not attach int handler!\n" |
or eax, -1 |
ret |
@@: |
|
; Soft reset the chip. |
set_io 0 |
set_io byCR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCR0 |
mov ax, CR_SFRST |
out dx, ax |
|
961,24 → 946,24 |
; Initialize rings |
call init_ring |
|
; Setup Multicast |
; Set Multicast |
call set_rx_mode |
|
; set TCR RCR threshold to store and forward |
set_io 0 |
set_io byBCR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byBCR0 |
mov al, 0x3E |
out dx, al |
|
set_io byBCR1 |
set_io [ebx + device.io_addr], byBCR1 |
mov al, 0x38 |
out dx, al |
|
set_io byRCR |
set_io [ebx + device.io_addr], byRCR |
mov al, 0x2C |
out dx, al |
|
set_io byTCR |
set_io [ebx + device.io_addr], byTCR |
mov al, 0x60 |
out dx, al |
|
988,25 → 973,25 |
test eax, eax ; full duplex? |
jz @f |
|
set_io 0 |
set_io byCFGD |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCFGD |
mov al, CFGD_CFDX |
out dx, al |
|
set_io byCR0 |
set_io [ebx + device.io_addr], byCR0 |
mov ax, CR_FDX |
out dx, ax |
@@: |
|
; ENABLE interrupts |
set_io 0 |
set_io byIMR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byIMR0 |
mov ax, DEFAULT_INTR |
out dx, ax |
|
; KICK NIC to WORK |
|
set_io byCR0 |
set_io [ebx + device.io_addr], byCR0 |
in ax, dx |
and ax, not CR_STOP |
or ax, CR_STRT or CR_TXON or CR_RXON or CR_DPOLL |
1013,12 → 998,12 |
out dx, ax |
|
; Set the mtu, kernel will be able to send now |
mov [device.mtu], 1514 |
mov [ebx + device.mtu], 1514 |
|
; Set link state to unknown |
mov [device.state], ETH_LINK_UNKOWN |
mov [ebx + device.state], ETH_LINK_UNKNOWN |
|
; say reset was successfull |
; say reset was successful |
xor eax, eax |
ret |
|
1032,13 → 1017,13 |
DEBUGF 1, "rhine disable\n" |
|
; Switch to loopback mode to avoid hardware races. |
set_io 0 |
set_io byTCR |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byTCR |
mov al, 0x61 |
out dx, al |
|
; Stop the chip's Tx and Rx processes. |
set_io byCR0 |
set_io [ebx + device.io_addr], byCR0 |
mov ax, CR_STOP |
out dx, ax |
pop edx eax |
1053,8 → 1038,8 |
|
DEBUGF 1, "Reload eeprom\n" |
|
set_io 0 |
set_io byEECSR |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byEECSR |
mov al, 0x20 |
out dx, al |
; Typically 2 cycles to reload. |
1064,11 → 1049,13 |
test al, 0x20 |
jz @f |
loop .reload |
DEBUGF 1, "Reload timeout!\n" |
DEBUGF 2, "Reload eeprom: timeout!\n" |
@@: |
|
ret |
|
|
|
; Initialize the Rx and Tx rings, along with various 'dev' bits. |
align 4 |
init_ring: |
1075,63 → 1062,63 |
|
DEBUGF 1, "Init ring\n" |
|
lea edi, [device.rx_ring] |
lea edi, [ebx + device.rx_ring] |
mov eax, edi |
GetRealAddr |
invoke GetPhysAddr |
mov esi, eax |
push esi |
mov ecx, RX_RING_SIZE |
.rx_init: |
add esi, rx_head.sizeof |
add esi, sizeof.rx_head |
mov [edi + rx_head.status], RX_SBITS_OWN_BIT |
mov [edi + rx_head.control], PKT_BUF_SZ |
push ecx |
stdcall KernelAlloc, PKT_BUF_SZ |
invoke KernelAlloc, PKT_BUF_SZ |
pop ecx |
mov [edi + rx_head.buff_addr_virt], eax |
GetRealAddr |
invoke GetPhysAddr |
mov [edi + rx_head.buff_addr], eax ; buffer ptr |
mov [edi + rx_head.next_desc], esi ; next head |
add edi, rx_head.sizeof |
add edi, sizeof.rx_head |
dec ecx |
jnz .rx_init |
pop [edi - rx_head.sizeof + rx_head.next_desc] ; Mark the last entry as wrapping the ring. |
pop [edi - sizeof.rx_head + rx_head.next_desc] ; Mark the last entry as wrapping the ring. |
|
|
lea edi, [device.tx_ring] |
lea edi, [ebx + device.tx_ring] |
mov eax, edi |
GetRealAddr |
invoke GetPhysAddr |
mov esi, eax |
push esi |
mov ecx, TX_RING_SIZE |
.tx_init: |
add esi, tx_head.sizeof |
add esi, sizeof.tx_head |
mov [edi + tx_head.status], 0 |
mov [edi + tx_head.control], 0x00E08000 |
mov [edi + tx_head.buff_addr], 0 |
mov [edi + tx_head.next_desc], esi |
mov [edi + tx_head.buff_addr_virt], 0 |
add edi, tx_head.sizeof |
add edi, sizeof.tx_head |
dec ecx |
jnz .tx_init |
pop [edi - tx_head.sizeof + tx_head.next_desc] ; Mark the last entry as wrapping the ring. |
pop [edi - sizeof.tx_head + tx_head.next_desc] ; Mark the last entry as wrapping the ring. |
|
; write Descriptors to MAC |
lea eax, [device.rx_ring] |
GetRealAddr |
set_io 0 |
set_io dwCurrentRxDescAddr |
lea eax, [ebx + device.rx_ring] |
invoke GetPhysAddr |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], dwCurrentRxDescAddr |
out dx, eax |
|
lea eax, [device.tx_ring] |
GetRealAddr |
set_io dwCurrentTxDescAddr |
lea eax, [ebx + device.tx_ring] |
invoke GetPhysAddr |
set_io [ebx + device.io_addr], dwCurrentTxDescAddr |
out dx, eax |
|
xor eax, eax |
mov [device.cur_rx], ax |
mov [device.cur_tx], ax |
mov [device.last_tx], ax |
mov [ebx + device.cur_rx], ax |
mov [ebx + device.cur_tx], ax |
mov [ebx + device.last_tx], ax |
|
ret |
|
1169,12 → 1156,12 |
|
push esi ebx ecx edx |
|
set_io 0 |
set_io byMIIAD |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byMIIAD |
in al, dx |
mov bl, al |
|
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
mov bh, al |
and al, 0x7F |
1183,12 → 1170,12 |
call MIIDelay |
|
mov al, byte [byMIIIndex] |
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
out dx, al |
|
call MIIDelay |
|
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
or al, 0x40 |
out dx, al |
1200,24 → 1187,24 |
jz @f |
|
mov esi, 10 |
call Sleep |
invoke Sleep |
dec ecx |
jnz .read_again |
DEBUGF 1, "\nReadMII timeout!\n" |
DEBUGF 2, "ReadMII: timeout!\n" |
@@: |
|
call MIIDelay |
|
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
in ax, dx |
|
push eax |
mov ax, bx |
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
out dx, al |
|
shr ax, 8 |
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
out dx, al |
|
call MIIDelay |
1224,12 → 1211,14 |
|
pop eax |
and eax, 0xFFFF |
rol ax, 8 ;;;;; I dont know how or why but it seems needed... |
rol ax, 8 |
|
pop edx ecx ebx esi |
ret |
endp |
|
|
|
proc WriteMII stdcall, byMIISetByte:dword, byMIISetBit:dword, byMIIOP:dword |
|
; DEBUGF 1, "WriteMII SetByte=%x SetBit=%x OP=%x\n", [byMIISetByte], [byMIISetBit], [byMIIOP] |
1236,12 → 1225,12 |
|
push ebx eax ecx edx |
|
set_io 0 |
set_io byMIIAD |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byMIIAD |
in al, dx |
mov bl, al |
|
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
mov bh, al |
and al, 0x7F |
1250,12 → 1239,12 |
call MIIDelay |
|
mov al, byte [byMIISetByte] |
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
out dx, al |
|
call MIIDelay |
|
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
or al, 0x40 |
out dx, al |
1267,19 → 1256,19 |
jz .done |
|
mov esi, 10 |
call Sleep |
invoke Sleep |
dec ecx |
jnz .read_again0 |
DEBUGF 1, "WriteMII timeout 1\n" |
DEBUGF 2, "WriteMII: timeout (1)\n" |
.done: |
|
call MIIDelay |
|
set_io wMIIDATA |
set_io [ebx + device.io_addr], wMIIDATA |
in ax, dx |
|
mov ecx, [byMIISetBit] |
rol cx, 8 ;;;;;;;;;;;;;;;;; CHECKME |
rol cx, 8 |
|
cmp byte [byMIIOP], 0 |
jne @f |
1290,12 → 1279,12 |
or ax, cx |
.end_mascarad: |
|
set_io wMIIDATA |
set_io [ebx + device.io_addr], wMIIDATA |
out dx, ax |
|
call MIIDelay |
|
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
in al, dx |
or al, 0x20 |
out dx, al |
1307,10 → 1296,10 |
jz @f |
|
mov esi, 10 |
call Sleep |
invoke Sleep |
dec ecx |
jnz .read_again1 |
DEBUGF 1, "WriteMII timeout 2\n" |
DEBUGF 2, "WriteMII timeout (2)\n" |
@@: |
|
call MIIDelay |
1317,11 → 1306,11 |
|
mov ax, bx |
and al, 0x7F |
set_io byMIIAD |
set_io [ebx + device.io_addr], byMIIAD |
out dx, al |
|
shr ax, 8 |
set_io byMIICR |
set_io [ebx + device.io_addr], byMIICR |
out dx, al |
|
call MIIDelay |
1352,14 → 1341,14 |
|
; ! IFF_PROMISC |
mov eax, 0xffffffff |
set_io 0 |
set_io byMAR0 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byMAR0 |
out dx, eax |
|
set_io byMAR4 |
set_io [ebx + device.io_addr], byMAR4 |
out dx, eax |
|
set_io byRCR |
set_io [ebx + device.io_addr], byRCR |
mov al, 0x6C ;rx_mode = 0x0C; |
out dx, al ;outb(0x60 /* thresh */ | rx_mode, byRCR ); |
|
1372,7 → 1361,7 |
; Beware of PCI posted writes |
macro IOSYNC |
{ |
set_io StationAddr |
set_io [ebx + device.io_addr], StationAddr |
in al, dx |
} |
|
1381,9 → 1370,9 |
align 4 |
read_mac: |
|
lea edi, [device.mac] |
set_io 0 |
set_io byPAR0 |
lea edi, [ebx + device.mac] |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byPAR0 |
mov ecx, 6 |
.next: |
in al, dx |
1393,7 → 1382,7 |
jnz .next |
|
DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n", \ |
[device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
[ebx + device.mac+0]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2 |
|
|
ret |
1409,71 → 1398,75 |
;; ;; |
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
align 4 |
transmit: |
DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
mov eax, [esp+4] |
proc transmit stdcall bufferptr, buffersize |
|
pushf |
cli |
|
DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [buffersize] |
mov eax, [bufferptr] |
DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
[eax+13]:2,[eax+12]:2 |
|
cmp dword [esp+8], 1514 |
cmp [buffersize], 1514 |
ja .fail |
cmp dword [esp+8], 60 |
cmp [buffersize], 60 |
jb .fail |
|
movzx eax, [device.cur_tx] |
mov ecx, tx_head.sizeof |
movzx eax, [ebx + device.cur_tx] |
mov ecx, sizeof.tx_head |
mul ecx |
lea edi, [device.tx_ring] |
lea edi, [ebx + device.tx_ring] |
add edi, eax |
|
cmp [edi + tx_head.buff_addr_virt], 0 |
jne .fail |
|
mov eax, [esp+4] |
mov eax, [bufferptr] |
mov [edi + tx_head.buff_addr_virt], eax |
GetRealAddr |
invoke GetPhysAddr |
mov [edi + tx_head.buff_addr], eax |
mov ecx, [esp+8] |
mov ecx, [buffersize] |
and ecx, TX_CBITS_TX_BUF_SIZE |
or ecx, 0x00E08000 |
mov [edi + tx_head.control], ecx |
or [edi + tx_head.status], TX_SBITS_OWN_BIT |
|
set_io 0 |
set_io byCR1 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], byCR1 |
in al, dx |
or al, CR1_TDMD1 |
out dx, al |
|
inc [device.cur_tx] |
and [device.cur_tx], TX_RING_SIZE-1 |
inc [ebx + device.cur_tx] |
and [ebx + device.cur_tx], TX_RING_SIZE-1 |
|
;outw(IMRShadow,byIMR0); ; |
|
; Update stats |
inc [device.packets_tx] |
mov ecx, [esp+8] ;;;;; |
add dword [device.bytes_tx], ecx |
adc dword [device.bytes_tx + 4], 0 |
inc [ebx + device.packets_tx] |
mov ecx, [buffersize] |
add dword [ebx + device.bytes_tx], ecx |
adc dword [ebx + device.bytes_tx + 4], 0 |
|
xor eax, eax ; Transmit succesfull |
ret 8 |
DEBUGF 1,"Transmit OK\n" |
popf |
xor eax, eax |
ret |
|
.fail: |
DEBUGF 2, "Transmit Failed!\n" |
stdcall KernelFree, [esp+4] |
or eax, -1 ; Transmit failed |
ret 8 |
DEBUGF 2,"Transmit failed\n" |
invoke KernelFree, [bufferptr] |
popf |
or eax, -1 |
ret |
|
endp |
|
|
|
|
|
|
|
;;;;;;;;;;;;;;;;;;;;;;; |
;; ;; |
;; Interrupt handler ;; |
1487,7 → 1480,7 |
|
DEBUGF 1,"INT\n" |
|
; Find pointer of device wich made IRQ occur |
; Find pointer of device which made IRQ occur |
|
mov ecx, [devices] |
test ecx, ecx |
1496,8 → 1489,8 |
.nextdevice: |
mov ebx, [esi] |
|
set_io 0 |
set_io IntrStatus |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], IntrStatus |
in ax, dx |
out dx, ax ; send it back to ACK |
test ax, ax |
1527,12 → 1520,12 |
.more_RX: |
pop ebx |
|
; Get the current descripter pointer |
; Get the current descriptor pointer |
|
movzx eax, [device.cur_rx] |
mov ecx, rx_head.sizeof |
movzx eax, [ebx + device.cur_rx] |
mov ecx, sizeof.rx_head |
mul ecx |
lea edi, [device.rx_ring] |
lea edi, [ebx + device.rx_ring] |
add edi, eax |
|
; Check it's status |
1553,9 → 1546,9 |
|
; Update stats |
|
add dword [device.bytes_rx], ecx |
adc dword [device.bytes_rx + 4], 0 |
inc [device.packets_rx] |
add dword [ebx + device.bytes_rx], ecx |
adc dword [ebx + device.bytes_rx + 4], 0 |
inc [ebx + device.packets_rx] |
|
; Push packet size and pointer, kernel will need it.. |
|
1568,21 → 1561,21 |
; reset the RX descriptor |
|
push edi |
stdcall KernelAlloc, PKT_BUF_SZ |
invoke KernelAlloc, PKT_BUF_SZ |
pop edi |
mov [edi + rx_head.buff_addr_virt], eax |
GetRealAddr |
invoke GetPhysAddr |
mov [edi + rx_head.buff_addr], eax |
mov [edi + rx_head.status], RX_SBITS_OWN_BIT |
|
; Use next descriptor next time |
|
inc [device.cur_rx] |
and [device.cur_rx], RX_RING_SIZE - 1 |
inc [ebx + device.cur_rx] |
and [ebx + device.cur_rx], RX_RING_SIZE - 1 |
|
; At last, send packet to kernel |
|
jmp Eth_input |
jmp [Eth_input] |
|
.not_bit_own: |
.not_RX: |
1593,10 → 1586,10 |
jz .not_TX |
|
.loop_tx: |
movzx eax, [device.last_tx] |
mov ecx, tx_head.sizeof |
movzx eax, [ebx + device.last_tx] |
mov ecx, sizeof.tx_head |
mul ecx |
lea edi, [device.tx_ring] |
lea edi, [ebx + device.tx_ring] |
add edi, eax |
|
test [edi + tx_head.status], TX_SBITS_OWN_BIT |
1609,10 → 1602,10 |
|
push [edi + tx_head.buff_addr_virt] |
mov [edi + tx_head.buff_addr_virt], 0 |
call KernelFree |
invoke KernelFree |
|
inc [device.last_tx] |
and [device.last_tx], TX_RING_SIZE - 1 |
inc [ebx + device.last_tx] |
and [ebx + device.last_tx], TX_RING_SIZE - 1 |
|
jmp .loop_tx |
|
1620,11 → 1613,11 |
|
; On Rhine-II, Bit 3 indicates Tx descriptor write-back race. |
if 0 |
cmp [device.chip_id], 0x3065 ;if (tp->chip_id == 0x3065) |
cmp [ebx + device.chip_id], 0x3065 ;if (tp->chip_id == 0x3065) |
jne @f |
push ax |
xor eax, eax |
set_io IntrStatus2 |
set_io [ebx + device.io_addr], IntrStatus2 |
in al, dx ; intr_status |= inb(nic->ioaddr + IntrStatus2) << 16; |
shl eax, 16 |
pop ax |
1637,15 → 1630,15 |
xor ecx, ecx |
test eax, IntrTxDescRace |
jz @f |
set_io 0 |
set_io IntrStatus2 |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], IntrStatus2 |
push ax |
mov al, 0x08 |
out dx, al |
pop ax |
@@: |
set_io 0 |
set_io IntrStatus |
set_io [ebx + device.io_addr], 0 |
set_io [ebx + device.io_addr], IntrStatus |
out dx, ax |
IOSYNC |
|
1663,11 → 1656,11 |
|
; End of code |
|
section '.data' data readable writable align 16 ; place all uninitialized data here |
align 4 ; Place all initialised data here |
data fixups |
end data |
|
devices dd 0 |
version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
include '../peimport.inc' |
|
my_service db 'RHINE',0 ; max 16 chars including zero |
|
chiplist: |
1676,7 → 1669,7 |
dd 0x30651106, rhine_6102;, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII or HasWOL |
dd 0x31061106, rhine_6105;, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII or HasWOL |
; Duplicate entry, with 'M' features enabled. |
dd 0x31061106, rhine_6105;, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII or HasWOL or HasIPChecksum or HasVLAN |
; dd 0x31061106, rhine_6105;, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII or HasWOL or HasIPChecksum or HasVLAN |
dd 0x30531106, rhine_3053;, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII or HasWOL |
dd 0 |
|
1686,7 → 1679,9 |
rhine_6105 db "VIA VT6105LOM Rhine-III (3106)", 0 |
rhine_3053 db "VIA VT6105M Rhine-III (3053 prototype)", 0 |
|
include_debug_strings ; All data wich FDO uses will be included here |
include_debug_strings ; All data which FDO uses will be included here |
|
align 4 |
devices dd 0 |
device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
|