/kernel/trunk/core/apic.inc |
---|
18,30 → 18,30 |
LAPIC_BASE rd 1 |
endg |
APIC_ID equ 0x20 |
APIC_TPR equ 0x80 |
APIC_EOI equ 0xb0 |
APIC_LDR equ 0xd0 |
APIC_DFR equ 0xe0 |
APIC_SVR equ 0xf0 |
APIC_ISR equ 0x100 |
APIC_ESR equ 0x280 |
APIC_ICRL equ 0x300 |
APIC_ICRH equ 0x310 |
APIC_LVT_LINT0 equ 0x350 |
APIC_LVT_LINT1 equ 0x360 |
APIC_LVT_err equ 0x370 |
APIC_ID = 0x20 |
APIC_TPR = 0x80 |
APIC_EOI = 0xb0 |
APIC_LDR = 0xd0 |
APIC_DFR = 0xe0 |
APIC_SVR = 0xf0 |
APIC_ISR = 0x100 |
APIC_ESR = 0x280 |
APIC_ICRL = 0x300 |
APIC_ICRH = 0x310 |
APIC_LVT_LINT0 = 0x350 |
APIC_LVT_LINT1 = 0x360 |
APIC_LVT_err = 0x370 |
; APIC timer |
APIC_LVT_timer equ 0x320 |
APIC_timer_div equ 0x3e0 |
APIC_timer_init equ 0x380 |
APIC_timer_cur equ 0x390 |
APIC_LVT_timer = 0x320 |
APIC_timer_div = 0x3e0 |
APIC_timer_init = 0x380 |
APIC_timer_cur = 0x390 |
; IOAPIC |
IOAPIC_ID equ 0x0 |
IOAPIC_VER equ 0x1 |
IOAPIC_ARB equ 0x2 |
IOAPIC_REDTBL equ 0x10 |
IOAPIC_ID = 0x0 |
IOAPIC_VER = 0x1 |
IOAPIC_ARB = 0x2 |
IOAPIC_REDTBL = 0x10 |
align 4 |
APIC_init: |
/kernel/trunk/core/dll.inc |
---|
8,11 → 8,11 |
$Revision$ |
DRV_COMPAT equ 5 ;minimal required drivers version |
DRV_CURRENT equ 6 ;current drivers model version |
DRV_COMPAT = 5 ;minimal required drivers version |
DRV_CURRENT = 6 ;current drivers model version |
DRV_VERSION equ (DRV_COMPAT shl 16) or DRV_CURRENT |
PID_KERNEL equ 1 ;os_idle thread |
DRV_VERSION = (DRV_COMPAT shl 16) or DRV_CURRENT |
PID_KERNEL = 1 ;os_idle thread |
/kernel/trunk/core/heap.inc |
---|
18,9 → 18,9 |
handle dd ? ;+28 |
ends |
FREE_BLOCK equ 4 |
USED_BLOCK equ 8 |
DONT_FREE_BLOCK equ 10h |
FREE_BLOCK = 4 |
USED_BLOCK = 8 |
DONT_FREE_BLOCK = 10h |
block_next equ MEM_BLOCK.next_block |
560,7 → 560,7 |
;;;;;;;;;;;;;; USER HEAP ;;;;;;;;;;;;;;;;; |
HEAP_TOP equ 0x80000000 |
HEAP_TOP = 0x80000000 |
align 4 |
proc init_heap |
1265,21 → 1265,21 |
ret |
E_NOTFOUND equ 5 |
E_ACCESS equ 10 |
E_NOMEM equ 30 |
E_PARAM equ 33 |
E_NOTFOUND = 5 |
E_ACCESS = 10 |
E_NOMEM = 30 |
E_PARAM = 33 |
SHM_READ equ 0 |
SHM_WRITE equ 1 |
SHM_READ = 0 |
SHM_WRITE = 1 |
SHM_ACCESS_MASK equ 3 |
SHM_ACCESS_MASK = 3 |
SHM_OPEN equ (0 shl 2) |
SHM_OPEN_ALWAYS equ (1 shl 2) |
SHM_CREATE equ (2 shl 2) |
SHM_OPEN = 0 shl 2 |
SHM_OPEN_ALWAYS = 1 shl 2 |
SHM_CREATE = 2 shl 2 |
SHM_OPEN_MASK equ (3 shl 2) |
SHM_OPEN_MASK = 3 shl 2 |
align 4 |
proc shmem_open stdcall name:dword, size:dword, access:dword |
/kernel/trunk/core/irq.inc |
---|
8,9 → 8,9 |
$Revision$ |
IRQ_RESERVED equ 24 |
IRQ_RESERVED = 24 |
IRQ_POOL_SIZE equ 48 |
IRQ_POOL_SIZE = 48 |
uglobal |
/kernel/trunk/core/mtrrtest.asm |
---|
115,15 → 115,15 |
} |
include '../kglobals.inc' |
CAPS_MTRR equ 12 |
MSR_MTRR_DEF_TYPE equ 0x2FF |
CAPS_PGE equ 13 |
CAPS_PAT equ 16 |
MSR_CR_PAT equ 0x277 |
PAT_VALUE equ 0x00070106 ; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
MEM_WB equ 6 ;write-back memory |
MEM_WC equ 1 ;write combined memory |
MEM_UC equ 0 ;uncached memory |
CAPS_MTRR = 12 |
MSR_MTRR_DEF_TYPE = 0x2FF |
CAPS_PGE = 13 |
CAPS_PAT = 16 |
MSR_CR_PAT = 0x277 |
PAT_VALUE = 0x00070106 ; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
MEM_WB = 6 ;write-back memory |
MEM_WC = 1 ;write combined memory |
MEM_UC = 0 ;uncached memory |
include 'mtrr.inc' |
BOOT_VARS = 0 |
/kernel/trunk/core/sync.inc |
---|
11,8 → 11,8 |
RWSEM_WAITING_FOR_WRITE equ 0 |
RWSEM_WAITING_FOR_READ equ 1 |
RWSEM_WAITING_FOR_WRITE = 0 |
RWSEM_WAITING_FOR_READ = 1 |
;void __fastcall mutex_init(struct mutex *lock) |
/kernel/trunk/core/taskman.inc |
---|
8,7 → 8,7 |
$Revision$ |
GREEDY_KERNEL equ 0 |
GREEDY_KERNEL = 0 |
struct APP_HEADER_00_ |
banner dq ? |
889,10 → 889,10 |
popad |
iretd |
EFL_IF equ 0x0200 |
EFL_IOPL1 equ 0x1000 |
EFL_IOPL2 equ 0x2000 |
EFL_IOPL3 equ 0x3000 |
EFL_IF = 0x0200 |
EFL_IOPL1 = 0x1000 |
EFL_IOPL2 = 0x2000 |
EFL_IOPL3 = 0x3000 |
align 4 |
proc set_app_params stdcall,slot:dword, params:dword, flags:dword |