39,130 → 39,32 |
#ifdef __KERNEL__ |
#include <asm/asm.h> |
|
/* |
* The bias values and the counter type limits the number of |
* potential readers/writers to 32767 for 32 bits and 2147483647 |
* for 64 bits. |
*/ |
#define FASTCALL __attribute__ ((fastcall)) __attribute__ ((dllimport)) |
|
#ifdef CONFIG_X86_64 |
# define RWSEM_ACTIVE_MASK 0xffffffffL |
#else |
# define RWSEM_ACTIVE_MASK 0x0000ffffL |
#endif |
void FASTCALL DownRead(struct rw_semaphore *sem)__asm__("DownRead"); |
void FASTCALL DownWrite(struct rw_semaphore *sem)__asm__("DownWrite"); |
void FASTCALL UpRead(struct rw_semaphore *sem)__asm__("UpRead"); |
void FASTCALL UpWrite(struct rw_semaphore *sem)__asm__("UpWrite"); |
|
#define RWSEM_UNLOCKED_VALUE 0x00000000L |
#define RWSEM_ACTIVE_BIAS 0x00000001L |
#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1) |
#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS |
#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) |
|
/* |
* lock for reading |
*/ |
static inline void __down_read(struct rw_semaphore *sem) |
{ |
asm volatile("# beginning down_read\n\t" |
LOCK_PREFIX _ASM_INC "(%1)\n\t" |
/* adds 0x00000001 */ |
" jns 1f\n" |
" call call_rwsem_down_read_failed\n" |
"1:\n\t" |
"# ending down_read\n\t" |
: "+m" (sem->count) |
: "a" (sem) |
: "memory", "cc"); |
DownRead(sem); |
} |
|
/* |
* trylock for reading -- returns 1 if successful, 0 if contention |
*/ |
static inline int __down_read_trylock(struct rw_semaphore *sem) |
{ |
long result, tmp; |
asm volatile("# beginning __down_read_trylock\n\t" |
" mov %0,%1\n\t" |
"1:\n\t" |
" mov %1,%2\n\t" |
" add %3,%2\n\t" |
" jle 2f\n\t" |
LOCK_PREFIX " cmpxchg %2,%0\n\t" |
" jnz 1b\n\t" |
"2:\n\t" |
"# ending __down_read_trylock\n\t" |
: "+m" (sem->count), "=&a" (result), "=&r" (tmp) |
: "i" (RWSEM_ACTIVE_READ_BIAS) |
: "memory", "cc"); |
return result >= 0 ? 1 : 0; |
} |
|
/* |
* lock for writing |
*/ |
static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) |
{ |
long tmp; |
asm volatile("# beginning down_write\n\t" |
LOCK_PREFIX " xadd %1,(%2)\n\t" |
/* adds 0xffff0001, returns the old value */ |
" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" |
/* was the active mask 0 before? */ |
" jz 1f\n" |
" call call_rwsem_down_write_failed\n" |
"1:\n" |
"# ending down_write" |
: "+m" (sem->count), "=d" (tmp) |
: "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS) |
: "memory", "cc"); |
} |
|
static inline void __down_write(struct rw_semaphore *sem) |
{ |
__down_write_nested(sem, 0); |
DownWrite(sem); |
} |
|
/* |
* trylock for writing -- returns 1 if successful, 0 if contention |
*/ |
static inline int __down_write_trylock(struct rw_semaphore *sem) |
{ |
long result, tmp; |
asm volatile("# beginning __down_write_trylock\n\t" |
" mov %0,%1\n\t" |
"1:\n\t" |
" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" |
/* was the active mask 0 before? */ |
" jnz 2f\n\t" |
" mov %1,%2\n\t" |
" add %3,%2\n\t" |
LOCK_PREFIX " cmpxchg %2,%0\n\t" |
" jnz 1b\n\t" |
"2:\n\t" |
" sete %b1\n\t" |
" movzbl %b1, %k1\n\t" |
"# ending __down_write_trylock\n\t" |
: "+m" (sem->count), "=&a" (result), "=&r" (tmp) |
: "er" (RWSEM_ACTIVE_WRITE_BIAS) |
: "memory", "cc"); |
return result; |
} |
|
/* |
* unlock after reading |
*/ |
static inline void __up_read(struct rw_semaphore *sem) |
{ |
long tmp; |
asm volatile("# beginning __up_read\n\t" |
LOCK_PREFIX " xadd %1,(%2)\n\t" |
/* subtracts 1, returns the old value */ |
" jns 1f\n\t" |
" call call_rwsem_wake\n" /* expects old value in %edx */ |
"1:\n" |
"# ending __up_read\n" |
: "+m" (sem->count), "=d" (tmp) |
: "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS) |
: "memory", "cc"); |
UpRead(sem); |
} |
|
/* |
170,56 → 72,8 |
*/ |
static inline void __up_write(struct rw_semaphore *sem) |
{ |
long tmp; |
asm volatile("# beginning __up_write\n\t" |
LOCK_PREFIX " xadd %1,(%2)\n\t" |
/* subtracts 0xffff0001, returns the old value */ |
" jns 1f\n\t" |
" call call_rwsem_wake\n" /* expects old value in %edx */ |
"1:\n\t" |
"# ending __up_write\n" |
: "+m" (sem->count), "=d" (tmp) |
: "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS) |
: "memory", "cc"); |
UpWrite(sem); |
} |
|
/* |
* downgrade write lock to read lock |
*/ |
static inline void __downgrade_write(struct rw_semaphore *sem) |
{ |
asm volatile("# beginning __downgrade_write\n\t" |
LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t" |
/* |
* transitions 0xZZZZ0001 -> 0xYYYY0001 (i386) |
* 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64) |
*/ |
" jns 1f\n\t" |
" call call_rwsem_downgrade_wake\n" |
"1:\n\t" |
"# ending __downgrade_write\n" |
: "+m" (sem->count) |
: "a" (sem), "er" (-RWSEM_WAITING_BIAS) |
: "memory", "cc"); |
} |
|
/* |
* implement atomic add functionality |
*/ |
static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem) |
{ |
asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0" |
: "+m" (sem->count) |
: "er" (delta)); |
} |
|
/* |
* implement exchange and add functionality |
*/ |
static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem) |
{ |
return delta + xadd(&sem->count, delta); |
} |
|
#endif /* __KERNEL__ */ |
#endif /* _ASM_X86_RWSEM_H */ |