| 29,17 → 29,21 |
|---|
| |
| rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
| |
| r = radeon_object_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
| false, |
| RADEON_GEM_DOMAIN_VRAM, |
| false, &cursor->robj); |
| r = radeon_bo_create(rdev, NULL, CURSOR_WIDTH*CURSOR_HEIGHT*4, |
| false, RADEON_GEM_DOMAIN_VRAM, &cursor->robj); |
| |
| if (unlikely(r != 0)) |
| return r; |
| |
| radeon_object_pin(cursor->robj, TTM_PL_FLAG_VRAM, NULL); |
| r = radeon_bo_reserve(cursor->robj, false); |
| if (unlikely(r != 0)) |
| return r; |
| |
| r = radeon_object_kmap(cursor->robj, &bits); |
| r = radeon_bo_pin(cursor->robj, RADEON_GEM_DOMAIN_VRAM, NULL); |
| if (unlikely(r != 0)) |
| return r; |
| |
| r = radeon_bo_kmap(cursor->robj, (void**)&bits); |
| if (r) { |
| DRM_ERROR("radeon: failed to map cursor (%d).\n", r); |
| return r; |
| 57,7 → 61,7 |
|---|
| for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
| *bits++ = 0; |
| |
| radeon_object_kunmap(cursor->robj); |
| radeon_bo_kunmap(cursor->robj); |
| |
| // cursor->header.destroy = destroy_cursor; |
| |
| 67,7 → 71,7 |
|---|
| void fini_cursor(cursor_t *cursor) |
| { |
| list_del(&cursor->list); |
| radeon_object_unpin(cursor->robj); |
| radeon_bo_unpin(cursor->robj); |
| KernelFree(cursor->data); |
| __DestroyObject(cursor); |
| }; |
| 100,7 → 104,7 |
|---|
| old = rdisplay->cursor; |
| |
| rdisplay->cursor = cursor; |
| // gpu_addr = cursor->robj->gpu_addr; |
| gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
| |
| if (ASIC_IS_AVIVO(rdev)) |
| WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr); |
| 149,24 → 153,40 |
|---|
| if (ASIC_IS_AVIVO(rdev)) |
| { |
| int w = 32; |
| int i = 0; |
| |
| WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y); |
| WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y); |
| WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31); |
| } else { |
| |
| uint32_t gpu_addr; |
| int xorg =0, yorg=0; |
| |
| x = x - hot_x; |
| y = y - hot_y; |
| |
| if( x < 0 ) |
| { |
| xorg = -x + 1; |
| x = 0; |
| } |
| |
| if( y < 0 ) |
| { |
| yorg = -hot_y + 1; |
| y = 0; |
| }; |
| |
| WREG32(RADEON_CUR_HORZ_VERT_OFF, |
| (RADEON_CUR_LOCK | (hot_x << 16) | hot_y )); |
| (RADEON_CUR_LOCK | (xorg << 16) | yorg )); |
| WREG32(RADEON_CUR_HORZ_VERT_POSN, |
| (RADEON_CUR_LOCK | (x << 16) | y)); |
| |
| // gpu_addr = cursor->robj->gpu_addr; |
| gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
| |
| /* offset is from DISP(2)_BASE_ADDRESS */ |
| WREG32(RADEON_CUR_OFFSET, |
| (gpu_addr - rdev->mc.vram_location + (hot_y * 256))); |
| (gpu_addr - rdev->mc.vram_location + (yorg * 256))); |
| } |
| radeon_lock_cursor(false); |
| } |
| 176,7 → 196,7 |
|---|
| }; |
| |
| |
| bool init_display(struct radeon_device *rdev, mode_t *usermode) |
| bool init_display(struct radeon_device *rdev, videomode_t *usermode) |
| { |
| struct drm_device *dev; |
| |
| 216,4 → 236,34 |
|---|
| }; |
| |
| |
| struct fb_info *framebuffer_alloc(size_t size, struct device *dev) |
| { |
| #define BYTES_PER_LONG (BITS_PER_LONG/8) |
| #define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG)) |
| int fb_info_size = sizeof(struct fb_info); |
| struct fb_info *info; |
| char *p; |
| |
| if (size) |
| fb_info_size += PADDING; |
| |
| p = kzalloc(fb_info_size + size, GFP_KERNEL); |
| |
| if (!p) |
| return NULL; |
| |
| info = (struct fb_info *) p; |
| |
| if (size) |
| info->par = p + fb_info_size; |
| |
| return info; |
| #undef PADDING |
| #undef BYTES_PER_LONG |
| } |
| |
| void framebuffer_release(struct fb_info *info) |
| { |
| kfree(info); |
| } |
| |