| 126,7 → 126,8 |
|---|
| size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) + |
| RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE; |
| r = radeon_bo_create(rdev, size, PAGE_SIZE, true, |
| RADEON_GEM_DOMAIN_VRAM, 0, NULL, &rdev->vce.vcpu_bo); |
| RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL, |
| &rdev->vce.vcpu_bo); |
| if (r) { |
| dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r); |
| return r; |
| 452,11 → 453,11 |
|---|
| unsigned size) |
| { |
| struct radeon_cs_chunk *relocs_chunk; |
| struct radeon_cs_reloc *reloc; |
| struct radeon_bo_list *reloc; |
| uint64_t start, end, offset; |
| unsigned idx; |
| |
| relocs_chunk = &p->chunks[p->chunk_relocs_idx]; |
| relocs_chunk = p->chunk_relocs; |
| offset = radeon_get_ib_value(p, lo); |
| idx = radeon_get_ib_value(p, hi); |
| |
| 466,7 → 467,7 |
|---|
| return -EINVAL; |
| } |
| |
| reloc = p->relocs_ptr[(idx / 4)]; |
| reloc = &p->relocs[(idx / 4)]; |
| start = reloc->gpu_offset; |
| end = start + radeon_bo_size(reloc->robj); |
| start += offset; |
| 533,7 → 534,7 |
|---|
| uint32_t *size = &tmp; |
| int i, r; |
| |
| while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) { |
| while (p->idx < p->chunk_ib->length_dw) { |
| uint32_t len = radeon_get_ib_value(p, p->idx); |
| uint32_t cmd = radeon_get_ib_value(p, p->idx + 1); |
| |