685,8 → 685,8 |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = &radeon_atom_get_memory_clock, |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
// .set_clock_gating = &radeon_atom_set_clock_gating, |
}, |
.pflip = { |
761,8 → 761,8 |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = &radeon_atom_get_memory_clock, |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
// .set_clock_gating = &radeon_atom_set_clock_gating, |
}, |
.pflip = { |
990,7 → 990,7 |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = &r600_get_pcie_lanes, |
// .set_pcie_lanes = &r600_set_pcie_lanes, |
// .set_clock_gating = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &rs600_pre_page_flip, |
1061,11 → 1061,11 |
// .get_dynpm_state = &r600_pm_get_dynpm_state, |
// .get_engine_clock = &radeon_atom_get_engine_clock, |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = NULL, |
// .set_memory_clock = NULL, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_memory_clock = NULL, |
.set_memory_clock = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &rs600_pre_page_flip, |
1286,11 → 1286,11 |
// .get_dynpm_state = &r600_pm_get_dynpm_state, |
// .get_engine_clock = &radeon_atom_get_engine_clock, |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = NULL, |
// .set_memory_clock = NULL, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_memory_clock = NULL, |
.set_memory_clock = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &evergreen_pre_page_flip, |
1363,9 → 1363,9 |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = &radeon_atom_get_memory_clock, |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &evergreen_pre_page_flip, |
1468,9 → 1468,9 |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = &radeon_atom_get_memory_clock, |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &evergreen_pre_page_flip, |
1571,11 → 1571,11 |
// .get_dynpm_state = &r600_pm_get_dynpm_state, |
// .get_engine_clock = &radeon_atom_get_engine_clock, |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = NULL, |
// .set_memory_clock = NULL, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_memory_clock = NULL, |
.set_memory_clock = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &evergreen_pre_page_flip, |
1610,7 → 1610,7 |
// .ib_parse = &si_ib_parse, |
.emit_fence = &si_fence_ring_emit, |
.emit_semaphore = &r600_semaphore_ring_emit, |
// .cs_parse = NULL, |
.cs_parse = NULL, |
.ring_test = &r600_ring_test, |
.ib_test = &r600_ib_test, |
.is_lockup = &si_gpu_is_lockup, |
1621,7 → 1621,7 |
// .ib_parse = &si_ib_parse, |
.emit_fence = &si_fence_ring_emit, |
.emit_semaphore = &r600_semaphore_ring_emit, |
// .cs_parse = NULL, |
.cs_parse = NULL, |
.ring_test = &r600_ring_test, |
.ib_test = &r600_ib_test, |
.is_lockup = &si_gpu_is_lockup, |
1632,7 → 1632,7 |
// .ib_parse = &si_ib_parse, |
.emit_fence = &si_fence_ring_emit, |
.emit_semaphore = &r600_semaphore_ring_emit, |
// .cs_parse = NULL, |
.cs_parse = NULL, |
.ring_test = &r600_ring_test, |
.ib_test = &r600_ib_test, |
.is_lockup = &si_gpu_is_lockup, |
1678,9 → 1678,9 |
// .set_engine_clock = &radeon_atom_set_engine_clock, |
// .get_memory_clock = &radeon_atom_get_memory_clock, |
// .set_memory_clock = &radeon_atom_set_memory_clock, |
// .get_pcie_lanes = NULL, |
// .set_pcie_lanes = NULL, |
// .set_clock_gating = NULL, |
.get_pcie_lanes = NULL, |
.set_pcie_lanes = NULL, |
.set_clock_gating = NULL, |
}, |
.pflip = { |
// .pre_page_flip = &evergreen_pre_page_flip, |