618,7 → 618,7 |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
break; |
633,11 → 633,11 |
case R300_RB3D_COLOROFFSET2: |
case R300_RB3D_COLOROFFSET3: |
i = (reg - R300_RB3D_COLOROFFSET0) >> 2; |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
track->cb[i].robj = reloc->robj; |
646,11 → 646,11 |
ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
break; |
case R300_ZB_DEPTHOFFSET: |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
track->zb.robj = reloc->robj; |
675,11 → 675,11 |
case R300_TX_OFFSET_0+56: |
case R300_TX_OFFSET_0+60: |
i = (reg - R300_TX_OFFSET_0) >> 2; |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
|
748,11 → 748,11 |
/* RB3D_COLORPITCH2 */ |
/* RB3D_COLORPITCH3 */ |
if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
|
833,11 → 833,11 |
case 0x4F24: |
/* ZB_DEPTHPITCH */ |
if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
|
1048,11 → 1048,11 |
track->tex_dirty = true; |
break; |
case R300_ZB_ZPASS_ADDR: |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1090,11 → 1090,11 |
track->cb_dirty = true; |
break; |
case R300_RB3D_AARESOLVE_OFFSET: |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
idx, reg); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
track->aa.robj = reloc->robj; |
1159,10 → 1159,10 |
return r; |
break; |
case PACKET3_INDX_BUFFER: |
r = r100_cs_packet_next_reloc(p, &reloc); |
r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
if (r) { |
DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); |
r100_cs_dump_packet(p, pkt); |
radeon_cs_dump_packet(p, pkt); |
return r; |
} |
ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->lobj.gpu_offset); |
1260,21 → 1260,21 |
r100_cs_track_clear(p->rdev, track); |
p->track = track; |
do { |
r = r100_cs_packet_parse(p, &pkt, p->idx); |
r = radeon_cs_packet_parse(p, &pkt, p->idx); |
if (r) { |
return r; |
} |
p->idx += pkt.count + 2; |
switch (pkt.type) { |
case PACKET_TYPE0: |
case RADEON_PACKET_TYPE0: |
r = r100_cs_parse_packet0(p, &pkt, |
p->rdev->config.r300.reg_safe_bm, |
p->rdev->config.r300.reg_safe_bm_size, |
&r300_packet0_check); |
break; |
case PACKET_TYPE2: |
case RADEON_PACKET_TYPE2: |
break; |
case PACKET_TYPE3: |
case RADEON_PACKET_TYPE3: |
r = r300_packet3_check(p, &pkt); |
break; |
default: |
1387,6 → 1387,12 |
} |
|
/* Enable IRQ */ |
if (!rdev->irq.installed) { |
r = radeon_irq_kms_init(rdev); |
if (r) |
return r; |
} |
|
r100_irq_set(rdev); |
rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
/* 1M ring buffer */ |
1462,9 → 1468,6 |
r = radeon_fence_driver_init(rdev); |
if (r) |
return r; |
r = radeon_irq_kms_init(rdev); |
if (r) |
return r; |
/* Memory manager */ |
r = radeon_bo_init(rdev); |
if (r) |