| 165,7 → 165,7 |
|---|
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| break; |
| 178,11 → 178,11 |
|---|
| return r; |
| break; |
| case RADEON_RB3D_DEPTHOFFSET: |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| track->zb.robj = reloc->robj; |
| 191,11 → 191,11 |
|---|
| ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
| break; |
| case RADEON_RB3D_COLOROFFSET: |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| track->cb[0].robj = reloc->robj; |
| 210,11 → 210,11 |
|---|
| case R200_PP_TXOFFSET_4: |
| case R200_PP_TXOFFSET_5: |
| i = (reg - R200_PP_TXOFFSET_0) / 24; |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) { |
| 263,11 → 263,11 |
|---|
| case R200_PP_CUBIC_OFFSET_F5_5: |
| i = (reg - R200_PP_TXOFFSET_0) / 24; |
| face = (reg - ((i * 24) + R200_PP_TXOFFSET_0)) / 4; |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| track->textures[i].cube_info[face - 1].offset = idx_value; |
| 281,11 → 281,11 |
|---|
| track->zb_dirty = true; |
| break; |
| case RADEON_RB3D_COLORPITCH: |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| |
| 358,11 → 358,11 |
|---|
| track->zb_dirty = true; |
| break; |
| case RADEON_RB3D_ZPASS_ADDR: |
| r = r100_cs_packet_next_reloc(p, &reloc); |
| r = radeon_cs_packet_next_reloc(p, &reloc, 0); |
| if (r) { |
| DRM_ERROR("No reloc for ib[%d]=0x%04X\n", |
| idx, reg); |
| r100_cs_dump_packet(p, pkt); |
| radeon_cs_dump_packet(p, pkt); |
| return r; |
| } |
| ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |