36,7 → 36,7 |
|
struct gmbus_pin { |
const char *name; |
int reg; |
i915_reg_t reg; |
}; |
|
/* Map gmbus pin pairs to names and registers. */ |
63,9 → 63,9 |
}; |
|
static const struct gmbus_pin gmbus_pins_bxt[] = { |
[GMBUS_PIN_1_BXT] = { "dpb", PCH_GPIOB }, |
[GMBUS_PIN_2_BXT] = { "dpc", PCH_GPIOC }, |
[GMBUS_PIN_3_BXT] = { "misc", PCH_GPIOD }, |
[GMBUS_PIN_1_BXT] = { "dpb", GPIOB }, |
[GMBUS_PIN_2_BXT] = { "dpc", GPIOC }, |
[GMBUS_PIN_3_BXT] = { "misc", GPIOD }, |
}; |
|
/* pin is expected to be valid */ |
74,7 → 74,7 |
{ |
if (IS_BROXTON(dev_priv)) |
return &gmbus_pins_bxt[pin]; |
else if (IS_SKYLAKE(dev_priv)) |
else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) |
return &gmbus_pins_skl[pin]; |
else if (IS_BROADWELL(dev_priv)) |
return &gmbus_pins_bdw[pin]; |
89,7 → 89,7 |
|
if (IS_BROXTON(dev_priv)) |
size = ARRAY_SIZE(gmbus_pins_bxt); |
else if (IS_SKYLAKE(dev_priv)) |
else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) |
size = ARRAY_SIZE(gmbus_pins_skl); |
else if (IS_BROADWELL(dev_priv)) |
size = ARRAY_SIZE(gmbus_pins_bdw); |
96,7 → 96,8 |
else |
size = ARRAY_SIZE(gmbus_pins); |
|
return pin < size && get_gmbus_pin(dev_priv, pin)->reg; |
return pin < size && |
i915_mmio_reg_valid(get_gmbus_pin(dev_priv, pin)->reg); |
} |
|
/* Intel GPIO access functions */ |
240,9 → 241,8 |
|
algo = &bus->bit_algo; |
|
bus->gpio_reg = dev_priv->gpio_mmio_base + |
get_gmbus_pin(dev_priv, pin)->reg; |
|
bus->gpio_reg = _MMIO(dev_priv->gpio_mmio_base + |
i915_mmio_reg_offset(get_gmbus_pin(dev_priv, pin)->reg)); |
bus->adapter.algo_data = algo; |
algo->setsda = set_data; |
algo->setscl = set_clock; |
472,9 → 472,7 |
} |
|
static int |
gmbus_xfer(struct i2c_adapter *adapter, |
struct i2c_msg *msgs, |
int num) |
do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) |
{ |
struct intel_gmbus *bus = container_of(adapter, |
struct intel_gmbus, |
483,14 → 481,6 |
int i = 0, inc, try = 0; |
int ret = 0; |
|
intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); |
mutex_lock(&dev_priv->gmbus_mutex); |
|
if (bus->force_bit) { |
ret = i2c_bit_algo.master_xfer(adapter, msgs, num); |
goto out; |
} |
|
retry: |
I915_WRITE(GMBUS0, bus->reg0); |
|
505,17 → 495,13 |
ret = gmbus_xfer_write(dev_priv, &msgs[i]); |
} |
|
if (!ret) |
ret = gmbus_wait_hw_status(dev_priv, GMBUS_HW_WAIT_PHASE, |
GMBUS_HW_WAIT_EN); |
if (ret == -ETIMEDOUT) |
goto timeout; |
if (ret == -ENXIO) |
else if (ret) |
goto clear_err; |
|
ret = gmbus_wait_hw_status(dev_priv, GMBUS_HW_WAIT_PHASE, |
GMBUS_HW_WAIT_EN); |
if (ret == -ENXIO) |
goto clear_err; |
if (ret) |
goto timeout; |
} |
|
/* Generate a STOP condition on the bus. Note that gmbus can't generata |
589,13 → 575,34 |
bus->adapter.name, bus->reg0 & 0xff); |
I915_WRITE(GMBUS0, 0); |
|
/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */ |
/* |
* Hardware may not support GMBUS over these pins? Try GPIO bitbanging |
* instead. Use EAGAIN to have i2c core retry. |
*/ |
bus->force_bit = 1; |
ret = -EAGAIN; |
|
out: |
return ret; |
} |
|
static int |
gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) |
{ |
struct intel_gmbus *bus = container_of(adapter, struct intel_gmbus, |
adapter); |
struct drm_i915_private *dev_priv = bus->dev_priv; |
int ret; |
|
intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); |
mutex_lock(&dev_priv->gmbus_mutex); |
|
if (bus->force_bit) |
ret = i2c_bit_algo.master_xfer(adapter, msgs, num); |
else |
ret = do_gmbus_xfer(adapter, msgs, num); |
|
out: |
mutex_unlock(&dev_priv->gmbus_mutex); |
|
intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS); |
|
return ret; |
628,12 → 635,13 |
|
if (HAS_PCH_NOP(dev)) |
return 0; |
else if (HAS_PCH_SPLIT(dev)) |
dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA; |
else if (IS_VALLEYVIEW(dev)) |
|
if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) |
dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE; |
else |
dev_priv->gpio_mmio_base = 0; |
else if (!HAS_GMCH_DISPLAY(dev_priv)) |
dev_priv->gpio_mmio_base = |
i915_mmio_reg_offset(PCH_GPIOA) - |
i915_mmio_reg_offset(GPIOA); |
|
mutex_init(&dev_priv->gmbus_mutex); |
init_waitqueue_head(&dev_priv->gmbus_wait_queue); |
656,6 → 664,12 |
|
bus->adapter.algo = &gmbus_algorithm; |
|
/* |
* We wish to retry with bit banging |
* after a timed out GMBUS attempt. |
*/ |
bus->adapter.retries = 1; |
|
/* By default use a conservative clock rate */ |
bus->reg0 = pin | GMBUS_RATE_100KHZ; |
|