WebSVN – Kolibri OS – Path Comparison – / – /drivers/video/drm/i915/intel_drv.h Rev 6936 and /drivers/video/drm/i915/intel

Regard whitespace Rev 6936 → Rev 6937

 /drivers/video/drm/i915/intel_drv.h
 ,8 → 124,6
 struct intel_fbdev {
         struct drm_fb_helper helper;
         struct intel_framebuffer *fb;
-        struct list_head fbdev_list;
-        struct drm_display_mode *our_mode;
         int preferred_bpp;
 };
 ,6 → 249,7
         unsigned int cdclk;
         bool dpll_set;
         struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
+        struct intel_wm_config wm_config;
 };
 struct intel_plane_state {
 ,6 → 280,9
         int scaler_id;
         struct drm_intel_sprite_colorkey ckey;
+        /* async flip related structures */
+        struct drm_i915_gem_request *wait_req;
 };
 struct intel_initial_plane_config {
 ,6 → 337,21
 /* drm_mode->private_flags */
 #define I915_MODE_FLAG_INHERITED 1
+struct intel_pipe_wm {
+        struct intel_wm_level wm[5];
+        uint32_t linetime;
+        bool fbc_wm_enabled;
+        bool pipe_enabled;
+        bool sprites_enabled;
+        bool sprites_scaled;
+};
+struct skl_pipe_wm {
+        struct skl_wm_level wm[8];
+        struct skl_wm_level trans_wm;
+        uint32_t linetime;
+};
 struct intel_crtc_state {
         struct drm_crtc_state base;
 ,7 → 366,9
 #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS       (1<<0) /* unreliable sync mode.flags */
         unsigned long quirks;
-        bool update_pipe;
+        bool update_pipe; /* can a fast modeset be performed? */
+        bool disable_cxsr;
+        bool update_wm_pre, update_wm_post; /* watermarks are updated */
         /* Pipe source size (ie. panel fitter input size)
          * All planes will be positioned inside this space,
 ,6 → 396,9
          * accordingly. */
         bool has_dp_encoder;
+        /* DSI has special cases */
+        bool has_dsi_encoder;
         /* Whether we should send NULL infoframes. Required for audio. */
         bool has_hdmi_sink;
 ,6 → 491,20
         /* w/a for waiting 2 vblanks during crtc enable */
         enum pipe hsw_workaround_pipe;
+        /* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
+        bool disable_lp_wm;
+        struct {
+                /*
+                 * optimal watermarks, programmed post-vblank when this state
+                 * is committed
+                 */
+                union {
+                        struct intel_pipe_wm ilk;
+                        struct skl_pipe_wm skl;
+                } optimal;
+        } wm;
 };
 struct vlv_wm_state {
 ,28 → 516,14
         bool cxsr;
 };
-struct intel_pipe_wm {
-        struct intel_wm_level wm[5];
-        uint32_t linetime;
-        bool fbc_wm_enabled;
-        bool pipe_enabled;
-        bool sprites_enabled;
-        bool sprites_scaled;
-};
 struct intel_mmio_flip {
         struct work_struct work;
         struct drm_i915_private *i915;
         struct drm_i915_gem_request *req;
         struct intel_crtc *crtc;
+        unsigned int rotation;
 };
-struct skl_pipe_wm {
-        struct skl_wm_level wm[8];
-        struct skl_wm_level trans_wm;
-        uint32_t linetime;
-};
 /*
  * Tracking of operations that need to be performed at the beginning/end of an
  * atomic commit, outside the atomic section where interrupts are disabled.
 ,13 → 532,9
  */
 struct intel_crtc_atomic_commit {
         /* Sleepable operations to perform before commit */
-        bool wait_for_flips;
         bool disable_fbc;
         bool disable_ips;
-        bool disable_cxsr;
         bool pre_disable_primary;
-        bool update_wm_pre, update_wm_post;
-        unsigned disabled_planes;
         /* Sleepable operations to perform after commit */
         unsigned fb_bits;
 ,9 → 586,10
         /* per-pipe watermark state */
         struct {
                 /* watermarks currently being used  */
-                struct intel_pipe_wm active;
-                /* SKL wm values currently in use */
-                struct skl_pipe_wm skl_active;
+                union {
+                        struct intel_pipe_wm ilk;
+                        struct skl_pipe_wm skl;
+                } active;
                 /* allow CxSR on this pipe */
                 bool cxsr_allowed;
         } wm;
 ,7 → 697,7
 #define intel_fb_obj(x) (x ? to_intel_framebuffer(x)->obj : NULL)
 struct intel_hdmi {
-        u32 hdmi_reg;
+        i915_reg_t hdmi_reg;
         int ddc_bus;
         bool limited_color_range;
         bool color_range_auto;
 ,7 → 713,8
         void (*set_infoframes)(struct drm_encoder *encoder,
                                bool enable,
                                const struct drm_display_mode *adjusted_mode);
-        bool (*infoframe_enabled)(struct drm_encoder *encoder);
+        bool (*infoframe_enabled)(struct drm_encoder *encoder,
+                                  const struct intel_crtc_state *pipe_config);
 };
 struct intel_dp_mst_encoder;
 ,15 → 740,10
         M2_N2
 };
-struct sink_crc {
-        bool started;
-        u8 last_crc[6];
-        int last_count;
-};
 struct intel_dp {
-        uint32_t output_reg;
-        uint32_t aux_ch_ctl_reg;
+        i915_reg_t output_reg;
+        i915_reg_t aux_ch_ctl_reg;
+        i915_reg_t aux_ch_data_reg[5];
         uint32_t DP;
         int link_rate;
         uint8_t lane_count;
 ,7 → 757,6
         /* sink rates as reported by DP_SUPPORTED_LINK_RATES */
         uint8_t num_sink_rates;
         int sink_rates[DP_MAX_SUPPORTED_RATES];
-        struct sink_crc sink_crc;
         struct drm_dp_aux aux;
         uint8_t train_set[4];
         int panel_power_up_delay;
 ,6 → 770,8
         unsigned long last_power_on;
         unsigned long last_backlight_off;
+        struct notifier_block edp_notifier;
         /*
          * Pipe whose power sequencer is currently locked into
          * this port. Only relevant on VLV/CHV.
 ,6 → 799,11
                                      int send_bytes,
                                      uint32_t aux_clock_divider);
+        /* This is called before a link training is starterd */
+        void (*prepare_link_retrain)(struct intel_dp *intel_dp);
+        bool train_set_valid;
         /* Displayport compliance testing */
         unsigned long compliance_test_type;
         unsigned long compliance_test_data;
 ,6 → 818,8
         struct intel_hdmi hdmi;
         enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
         bool release_cl2_override;
+        /* for communication with audio component; protected by av_mutex */
+        const struct drm_connector *audio_connector;
 };
 struct intel_dp_mst_encoder {
 ,7 → 963,8
                                          enum pipe pipe);
 void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                                          enum transcoder pch_transcoder);
-void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv);
+void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv);
+void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv);
 /* i915_irq.c */
 void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
 ,6 → 995,8
 /* intel_ddi.c */
+void intel_ddi_clk_select(struct intel_encoder *encoder,
+                          const struct intel_crtc_state *pipe_config);
 void intel_prepare_ddi(struct drm_device *dev);
 void hsw_fdi_link_train(struct drm_crtc *crtc);
 void intel_ddi_init(struct drm_device *dev, enum port port);
 ,7 → 1011,7
 bool intel_ddi_pll_select(struct intel_crtc *crtc,
                           struct intel_crtc_state *crtc_state);
 void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
-void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
+void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp);
 bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
 void intel_ddi_fdi_disable(struct drm_crtc *crtc);
 void intel_ddi_get_config(struct intel_encoder *encoder,
 ,6 → 1079,15
 {
         drm_wait_one_vblank(dev, pipe);
 }
+static inline void
+intel_wait_for_vblank_if_active(struct drm_device *dev, int pipe)
+{
+        const struct intel_crtc *crtc =
+                to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
+        if (crtc->active)
+                intel_wait_for_vblank(dev, pipe);
+}
 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
 void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
                          struct intel_digital_port *dport,
 ,9 → 1101,7
                                     struct drm_modeset_acquire_ctx *ctx);
 int intel_pin_and_fence_fb_obj(struct drm_plane *plane,
                                struct drm_framebuffer *fb,
-                               const struct drm_plane_state *plane_state,
-                               struct intel_engine_cs *pipelined,
-                               struct drm_i915_gem_request **pipelined_request);
+                               const struct drm_plane_state *plane_state);
 struct drm_framebuffer *
 __intel_framebuffer_create(struct drm_device *dev,
                            struct drm_mode_fb_cmd2 *mode_cmd,
 ,7 → 1182,10
 void bxt_enable_dc9(struct drm_i915_private *dev_priv);
 void bxt_disable_dc9(struct drm_i915_private *dev_priv);
 void skl_init_cdclk(struct drm_i915_private *dev_priv);
+int skl_sanitize_cdclk(struct drm_i915_private *dev_priv);
 void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
+void skl_enable_dc6(struct drm_i915_private *dev_priv);
+void skl_disable_dc6(struct drm_i915_private *dev_priv);
 void intel_dp_get_m_n(struct intel_crtc *crtc,
                       struct intel_crtc_state *pipe_config);
 void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n);
 ,7 → 1206,6
 intel_display_port_aux_power_domain(struct intel_encoder *intel_encoder);
 void intel_mode_from_pipe_config(struct drm_display_mode *mode,
                                  struct intel_crtc_state *pipe_config);
-void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
 void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
 ,16 → 1220,12
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 /* intel_csr.c */
-void intel_csr_ucode_init(struct drm_device *dev);
-enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv);
-void intel_csr_load_status_set(struct drm_i915_private *dev_priv,
-                                        enum csr_state state);
-void intel_csr_load_program(struct drm_device *dev);
-void intel_csr_ucode_fini(struct drm_device *dev);
-void assert_csr_loaded(struct drm_i915_private *dev_priv);
+void intel_csr_ucode_init(struct drm_i915_private *);
+void intel_csr_load_program(struct drm_i915_private *);
+void intel_csr_ucode_fini(struct drm_i915_private *);
 /* intel_dp.c */
-bool intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
+void intel_dp_init(struct drm_device *dev, i915_reg_t output_reg, enum port port);
 bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
                              struct intel_connector *intel_connector);
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
 ,8 → 1261,26
 void intel_edp_drrs_invalidate(struct drm_device *dev,
                 unsigned frontbuffer_bits);
 void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits);
+bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
+                                         struct intel_digital_port *port);
 void hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config);
+void
+intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
+                                       uint8_t dp_train_pat);
+void
+intel_dp_set_signal_levels(struct intel_dp *intel_dp);
+void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
+uint8_t
+intel_dp_voltage_max(struct intel_dp *intel_dp);
+uint8_t
+intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing);
+void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
+                           uint8_t *link_bw, uint8_t *rate_select);
+bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
+bool
+intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]);
 /* intel_dp_mst.c */
 int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
 void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
 ,7 → 1295,7
 /* legacy fbdev emulation in intel_fbdev.c */
 #ifdef CONFIG_DRM_FBDEV_EMULATION
 extern int intel_fbdev_init(struct drm_device *dev);
-extern void intel_fbdev_initial_config(void *data, async_cookie_t cookie);
+extern void intel_fbdev_initial_config_async(struct drm_device *dev);
 extern void intel_fbdev_fini(struct drm_device *dev);
 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous);
 extern void intel_fbdev_output_poll_changed(struct drm_device *dev);
 ,7 → 1306,7
         return 0;
 }
-static inline void intel_fbdev_initial_config(void *data, async_cookie_t cookie)
+static inline void intel_fbdev_initial_config_async(struct drm_device *dev)
 {
 }
 ,9 → 1324,11
 #endif
 /* intel_fbc.c */
-bool intel_fbc_enabled(struct drm_i915_private *dev_priv);
-void intel_fbc_update(struct drm_i915_private *dev_priv);
+bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
+void intel_fbc_deactivate(struct intel_crtc *crtc);
+void intel_fbc_update(struct intel_crtc *crtc);
 void intel_fbc_init(struct drm_i915_private *dev_priv);
+void intel_fbc_enable(struct intel_crtc *crtc);
 void intel_fbc_disable(struct drm_i915_private *dev_priv);
 void intel_fbc_disable_crtc(struct intel_crtc *crtc);
 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
 ,11 → 1336,10
                           enum fb_op_origin origin);
 void intel_fbc_flush(struct drm_i915_private *dev_priv,
                      unsigned int frontbuffer_bits, enum fb_op_origin origin);
-const char *intel_no_fbc_reason_str(enum no_fbc_reason reason);
 void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv);
 /* intel_hdmi.c */
-void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);
+void intel_hdmi_init(struct drm_device *dev, i915_reg_t hdmi_reg, enum port port);
 void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
                                struct intel_connector *intel_connector);
 struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 ,8 → 1415,13
 /* intel_runtime_pm.c */
 int intel_power_domains_init(struct drm_i915_private *);
 void intel_power_domains_fini(struct drm_i915_private *);
-void intel_power_domains_init_hw(struct drm_i915_private *dev_priv);
+void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume);
+void intel_power_domains_suspend(struct drm_i915_private *dev_priv);
+void skl_pw1_misc_io_init(struct drm_i915_private *dev_priv);
+void skl_pw1_misc_io_fini(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
+const char *
+intel_display_power_domain_str(enum intel_display_power_domain domain);
 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
                                     enum intel_display_power_domain domain);
 ,9 → 1429,95
                                       enum intel_display_power_domain domain);
 void intel_display_power_get(struct drm_i915_private *dev_priv,
                              enum intel_display_power_domain domain);
+bool intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+                                        enum intel_display_power_domain domain);
 void intel_display_power_put(struct drm_i915_private *dev_priv,
                              enum intel_display_power_domain domain);
+static inline void
+assert_rpm_device_not_suspended(struct drm_i915_private *dev_priv)
+{
+        WARN_ONCE(dev_priv->pm.suspended,
+                  "Device suspended during HW access\n");
+}
+static inline void
+assert_rpm_wakelock_held(struct drm_i915_private *dev_priv)
+{
+        assert_rpm_device_not_suspended(dev_priv);
+        /* FIXME: Needs to be converted back to WARN_ONCE, but currently causes
+         * too much noise. */
+        if (!atomic_read(&dev_priv->pm.wakeref_count))
+                DRM_DEBUG_DRIVER("RPM wakelock ref not held during HW access");
+}
+static inline int
+assert_rpm_atomic_begin(struct drm_i915_private *dev_priv)
+{
+        int seq = atomic_read(&dev_priv->pm.atomic_seq);
+        assert_rpm_wakelock_held(dev_priv);
+        return seq;
+}
+static inline void
+assert_rpm_atomic_end(struct drm_i915_private *dev_priv, int begin_seq)
+{
+        WARN_ONCE(atomic_read(&dev_priv->pm.atomic_seq) != begin_seq,
+                  "HW access outside of RPM atomic section\n");
+}
+/**
+ * disable_rpm_wakeref_asserts - disable the RPM assert checks
+ * @dev_priv: i915 device instance
+ *
+ * This function disable asserts that check if we hold an RPM wakelock
+ * reference, while keeping the device-not-suspended checks still enabled.
+ * It's meant to be used only in special circumstances where our rule about
+ * the wakelock refcount wrt. the device power state doesn't hold. According
+ * to this rule at any point where we access the HW or want to keep the HW in
+ * an active state we must hold an RPM wakelock reference acquired via one of
+ * the intel_runtime_pm_get() helpers. Currently there are a few special spots
+ * where this rule doesn't hold: the IRQ and suspend/resume handlers, the
+ * forcewake release timer, and the GPU RPS and hangcheck works. All other
+ * users should avoid using this function.
+ *
+ * Any calls to this function must have a symmetric call to
+ * enable_rpm_wakeref_asserts().
+ */
+static inline void
+disable_rpm_wakeref_asserts(struct drm_i915_private *dev_priv)
+{
+        atomic_inc(&dev_priv->pm.wakeref_count);
+}
+/**
+ * enable_rpm_wakeref_asserts - re-enable the RPM assert checks
+ * @dev_priv: i915 device instance
+ *
+ * This function re-enables the RPM assert checks after disabling them with
+ * disable_rpm_wakeref_asserts. It's meant to be used only in special
+ * circumstances otherwise its use should be avoided.
+ *
+ * Any calls to this function must have a symmetric call to
+ * disable_rpm_wakeref_asserts().
+ */
+static inline void
+enable_rpm_wakeref_asserts(struct drm_i915_private *dev_priv)
+{
+        atomic_dec(&dev_priv->pm.wakeref_count);
+}
+/* TODO: convert users of these to rely instead on proper RPM refcounting */
+#define DISABLE_RPM_WAKEREF_ASSERTS(dev_priv)   \
+        disable_rpm_wakeref_asserts(dev_priv)
+#define ENABLE_RPM_WAKEREF_ASSERTS(dev_priv)    \
+        enable_rpm_wakeref_asserts(dev_priv)
 void intel_runtime_pm_get(struct drm_i915_private *dev_priv);
+bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
 ,12 → 1534,6
 void intel_suspend_hw(struct drm_device *dev);
 int ilk_wm_max_level(const struct drm_device *dev);
 void intel_update_watermarks(struct drm_crtc *crtc);
-void intel_update_sprite_watermarks(struct drm_plane *plane,
-                                    struct drm_crtc *crtc,
-                                    uint32_t sprite_width,
-                                    uint32_t sprite_height,
-                                    int pixel_size,
-                                    bool enabled, bool scaled);
 void intel_init_pm(struct drm_device *dev);
 void intel_pm_setup(struct drm_device *dev);
 void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 ,7 → 1561,8
 uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config);
 /* intel_sdvo.c */
-bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
+bool intel_sdvo_init(struct drm_device *dev,
+                     i915_reg_t reg, enum port port);
 /* intel_sprite.c */
 ,4 → 1610,12
                                struct drm_plane_state *state);
 extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;
+int drm_core_init(void);
+void set_fake_framebuffer();
+int kolibri_framebuffer_init(void *param);
+void shmem_file_delete(struct file *filep);
+void intel_fbdev_initial_config(void *data, async_cookie_t cookie);
+int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
+            struct drm_driver *driver);
 #endif /* __INTEL_DRV_H__ */

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Regard whitespace Rev 6936 → Rev 6937