| 782,7 → 782,6 |
|---|
| bool has_aux_irq, |
| int send_bytes, |
| uint32_t aux_clock_divider); |
| bool train_set_valid; |
| |
| /* Displayport compliance testing */ |
| unsigned long compliance_test_type; |
| 1177,7 → 1176,7 |
|---|
| int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); |
| int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); |
| |
| unsigned long intel_plane_obj_offset(struct intel_plane *intel_plane, |
| u32 intel_plane_obj_offset(struct intel_plane *intel_plane, |
| struct drm_i915_gem_object *obj, |
| unsigned int plane); |
| |
| 1195,7 → 1194,7 |
|---|
| void assert_csr_loaded(struct drm_i915_private *dev_priv); |
| |
| /* intel_dp.c */ |
| void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
| bool intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
| bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
| struct intel_connector *intel_connector); |
| void intel_dp_set_link_params(struct intel_dp *intel_dp, |
| 1203,6 → 1202,8 |
|---|
| void intel_dp_start_link_train(struct intel_dp *intel_dp); |
| void intel_dp_stop_link_train(struct intel_dp *intel_dp); |
| void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
| void intel_dp_encoder_reset(struct drm_encoder *encoder); |
| void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); |
| void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
| int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc); |
| bool intel_dp_compute_config(struct intel_encoder *encoder, |