44,6 → 44,8 |
#define I915_CSR_SKL "i915/skl_dmc_ver1.bin" |
#define I915_CSR_BXT "i915/bxt_dmc_ver1.bin" |
|
#define FIRMWARE_URL "https://01.org/linuxgraphics/intel-linux-graphics-firmwares" |
|
MODULE_FIRMWARE(I915_CSR_SKL); |
MODULE_FIRMWARE(I915_CSR_BXT); |
|
218,7 → 220,7 |
* Everytime display comes back from low power state this function is called to |
* copy the firmware from internal memory to registers. |
*/ |
void intel_csr_load_program(struct drm_i915_private *dev_priv) |
bool intel_csr_load_program(struct drm_i915_private *dev_priv) |
{ |
u32 *payload = dev_priv->csr.dmc_payload; |
uint32_t i, fw_size; |
225,12 → 227,12 |
|
if (!IS_GEN9(dev_priv)) { |
DRM_ERROR("No CSR support available for this platform\n"); |
return; |
return false; |
} |
|
if (!dev_priv->csr.dmc_payload) { |
DRM_ERROR("Tried to program CSR with empty payload\n"); |
return; |
return false; |
} |
|
fw_size = dev_priv->csr.dmc_fw_size; |
243,6 → 245,8 |
} |
|
dev_priv->csr.dc_state = 0; |
|
return true; |
} |
|
static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, |
281,10 → 285,11 |
|
csr->version = css_header->version; |
|
if (IS_SKYLAKE(dev) && csr->version < SKL_CSR_VERSION_REQUIRED) { |
if ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) && |
csr->version < SKL_CSR_VERSION_REQUIRED) { |
DRM_INFO("Refusing to load old Skylake DMC firmware v%u.%u," |
" please upgrade to v%u.%u or later" |
" [https://01.org/linuxgraphics/intel-linux-graphics-firmwares].\n", |
" [" FIRMWARE_URL "].\n", |
CSR_VERSION_MAJOR(csr->version), |
CSR_VERSION_MINOR(csr->version), |
CSR_VERSION_MAJOR(SKL_CSR_VERSION_REQUIRED), |
371,12 → 376,14 |
return dmc_payload; |
} |
|
static void csr_load_work_fn(struct drm_i915_private *dev_priv) |
static void csr_load_work_fn(struct work_struct *work) |
{ |
struct drm_i915_private *dev_priv; |
struct intel_csr *csr; |
const struct firmware *fw; |
int ret; |
|
dev_priv = container_of(work, typeof(*dev_priv), csr.work); |
csr = &dev_priv->csr; |
|
ret = request_firmware(&fw, dev_priv->csr.fw_path, |
400,7 → 407,10 |
CSR_VERSION_MAJOR(csr->version), |
CSR_VERSION_MINOR(csr->version)); |
} else { |
DRM_ERROR("Failed to load DMC firmware, disabling rpm\n"); |
dev_notice(dev_priv->dev->dev, |
"Failed to load DMC firmware" |
" [" FIRMWARE_URL "]," |
" disabling runtime power management.\n"); |
} |
|
release_firmware(fw); |
417,10 → 427,12 |
{ |
struct intel_csr *csr = &dev_priv->csr; |
|
INIT_WORK(&dev_priv->csr.work, csr_load_work_fn); |
|
if (!HAS_CSR(dev_priv)) |
return; |
|
if (IS_SKYLAKE(dev_priv)) |
if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) |
csr->fw_path = I915_CSR_SKL; |
else if (IS_BROXTON(dev_priv)) |
csr->fw_path = I915_CSR_BXT; |
437,7 → 449,7 |
*/ |
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); |
|
csr_load_work_fn(dev_priv); |
schedule_work(&dev_priv->csr.work); |
} |
|
/** |