| 120,7 → 120,9 |
|---|
| u8 ssc_freq:1; |
| u8 enable_lfp_on_override:1; |
| u8 disable_ssc_ddt:1; |
| u8 rsvd8:3; /* finish byte */ |
| u8 rsvd7:1; |
| u8 display_clock_mode:1; |
| u8 rsvd8:1; /* finish byte */ |
| |
| /* bits 3 */ |
| u8 disable_smooth_vision:1; |
| 133,7 → 135,10 |
|---|
| /* bits 5 */ |
| u8 int_crt_support:1; |
| u8 int_tv_support:1; |
| u8 rsvd11:6; /* finish byte */ |
| u8 int_efp_support:1; |
| u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */ |
| u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */ |
| u8 rsvd11:3; /* finish byte */ |
| } __attribute__((packed)); |
| |
| /* pre-915 */ |
| 197,8 → 202,7 |
|---|
| struct child_device_config { |
| u16 handle; |
| u16 device_type; |
| u8 i2c_speed; |
| u8 rsvd[9]; |
| u8 device_id[10]; /* ascii string */ |
| u16 addin_offset; |
| u8 dvo_port; /* See Device_PORT_* above */ |
| u8 i2c_pin; |
| 446,11 → 450,11 |
|---|
| #define EDP_VSWING_1_2V 3 |
| |
| struct edp_power_seq { |
| u16 t3; |
| u16 t7; |
| u16 t1_t3; |
| u16 t8; |
| u16 t9; |
| u16 t10; |
| u16 t12; |
| u16 t11_t12; |
| } __attribute__ ((packed)); |
| |
| struct edp_link_params { |
| 463,8 → 467,12 |
|---|
| struct bdb_edp { |
| struct edp_power_seq power_seqs[16]; |
| u32 color_depth; |
| struct edp_link_params link_params[16]; |
| u32 sdrrs_msa_timing_delay; |
| struct edp_link_params link_params[16]; |
| |
| /* ith bit indicates enabled/disabled for (i+1)th panel */ |
| u16 edp_s3d_feature; |
| u16 edp_t3_optimization; |
| } __attribute__ ((packed)); |
| |
| void intel_setup_bios(struct drm_device *dev); |