255,6 → 255,7 |
src = GEN7_BLENDFACTOR_ONE; //gen6_blend_op[op].src_blend; |
dst = GEN7_BLENDFACTOR_INV_SRC_ALPHA; //gen6_blend_op[op].dst_blend; |
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#if 0 |
/* If there's no dst alpha channel, adjust the blend op so that |
* we'll treat it always as 1. |
1357,6 → 1358,14 |
} |
} |
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fastcall static void |
gen7_render_composite_blt(struct sna *sna, |
const struct sna_composite_op *op, |
const struct sna_composite_rectangles *r) |
{ |
gen7_get_rectangles(sna, op, 1, gen7_emit_composite_state); |
op->prim_emit(sna, op, r); |
} |
static uint32_t |
gen7_composite_create_blend_state(struct sna_static_stream *stream) |
{ |
1390,14 → 1399,6 |
} |
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fastcall static void |
gen7_render_composite_blt(struct sna *sna, |
const struct sna_composite_op *op, |
const struct sna_composite_rectangles *r) |
{ |
gen7_get_rectangles(sna, op, 1, gen7_emit_composite_state); |
op->prim_emit(sna, op, r); |
} |
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static void gen7_render_composite_done(struct sna *sna, |
const struct sna_composite_op *op) |
1502,6 → 1503,93 |
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static void gen7_render_flush(struct sna *sna) |
{ |
gen4_vertex_close(sna); |
1510,8 → 1598,6 |
assert(sna->render.vertex_offset == 0); |
} |
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static void |
gen7_render_context_switch(struct kgem *kgem, |
int new_mode) |
1593,7 → 1679,6 |
return (DEVICE_ID(sna->PciInfo) & 0xf) == 0x6; |
} |
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static bool gen7_render_setup(struct sna *sna) |
{ |
struct gen7_render_state *state = &sna->render_state.gen7; |
1680,7 → 1765,6 |
return state->general_bo != NULL; |
} |
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bool gen7_render_init(struct sna *sna) |
{ |
if (!gen7_render_setup(sna)) |
1698,6 → 1782,8 |
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sna->render.max_3d_size = GEN7_MAX_SIZE; |
sna->render.max_3d_pitch = 1 << 18; |
sna->render.caps = HW_BIT_BLIT | HW_TEX_BLIT; |
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return true; |
} |
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