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Regard whitespace Rev 1229 → Rev 1230

/drivers/video/drm/includes/syscall.h
49,6 → 49,9
void* STDCALL UserAlloc(size_t size)__asm__("UserAlloc");
int STDCALL UserFree(void *mem)__asm__("UserFree");
 
void* STDCALL GetDisplay()__asm__("GetDisplay");
 
 
addr_t STDCALL AllocPages(count_t count)__asm__("AllocPages");
 
void* STDCALL CreateRingBuffer(size_t size, u32_t map)__asm__("CreateRingBuffer");
/drivers/video/drm/radeon/radeon_device.c
47,6 → 47,8
int radeon_connector_table = 0;
int radeon_tv = 0;
 
int pre_init_display(struct radeon_device *rdev);
int post_init_display(struct radeon_device *rdev);
 
/*
* Clear GPU surface registers.
696,6 → 698,7
return 0;
}
 
 
int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct drm_device *dev;
748,7 → 751,9
// driver->name, driver->major, driver->minor, driver->patchlevel,
// driver->date, pci_name(pdev), dev->primary->index);
 
pre_init_display(dev->dev_private);
set_mode(dev, 1280, 1024);
post_init_display(dev->dev_private);
 
LEAVE();
 
/drivers/video/drm/radeon/radeon_fb.c
448,6 → 448,7
return name;
}
 
void set_crtc(struct drm_crtc *crtc);
 
bool set_mode(struct drm_device *dev, int width, int height)
{
476,30 → 477,8
if(crtc == NULL)
continue;
 
/*
list_for_each_entry(mode, &connector->modes, head)
{
if (mode->type & DRM_MODE_TYPE_PREFERRED);
break;
};
 
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
struct radeon_native_mode *native_mode = &radeon_encoder->native_mode;
 
native_mode->panel_xres = mode->hdisplay;
native_mode->panel_yres = mode->vdisplay;
 
native_mode->hblank = mode->htotal - mode->hdisplay;
native_mode->hoverplus = mode->hsync_start - mode->hdisplay;
native_mode->hsync_width = mode->hsync_end - mode->hsync_start;
native_mode->vblank = mode->vtotal - mode->vdisplay;
native_mode->voverplus = mode->vsync_start - mode->vdisplay;
native_mode->vsync_width = mode->vsync_end - mode->vsync_start;
native_mode->dotclock = mode->clock;
native_mode->flags = mode->flags;
*/
list_for_each_entry(mode, &connector->modes, head)
{
char *con_name, *enc_name;
 
struct drm_framebuffer *fb;
533,6 → 512,7
 
crtc->fb = fb;
crtc->enabled = true;
set_crtc(crtc);
 
ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb);
 
/drivers/video/drm/radeon/rdisplay.c
34,6 → 34,11
struct radeon_object *robj;
}cursor_t;
 
int init_cursor(cursor_t *cursor);
cursor_t* __stdcall select_cursor(cursor_t *cursor);
void __stdcall move_cursor(cursor_t *cursor, int x, int y);
void __stdcall restore_cursor(int x, int y);
 
struct tag_display
{
int x;
52,14 → 57,24
 
cursor_t *cursor;
int (*init_cursor)(cursor_t*);
cursor_t* (*select_cursor)(display_t*, cursor_t*);
cursor_t* (__stdcall *select_cursor)(cursor_t*);
void (*show_cursor)(int show);
void (*move_cursor)(int x, int y);
void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y);
void (__stdcall *restore_cursor)(int x, int y);
 
};
 
 
display_t *rdisplay;
static display_t *rdisplay;
 
 
void set_crtc(struct drm_crtc *crtc)
{
ENTER();
rdisplay->crtc = crtc;
LEAVE();
}
 
int init_cursor(cursor_t *cursor)
{
struct radeon_device *rdev;
94,7 → 109,7
{
for(j = 0; j < 32; j++)
*bits++ = *src++;
for(j = 0; j < CURSOR_WIDTH-32; j++)
for(j = 32; j < CURSOR_WIDTH; j++)
*bits++ = 0;
}
for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)
105,12 → 120,41
return 0;
};
 
int init_display(struct radeon_device *rdev)
static void radeon_show_cursor(struct drm_crtc *crtc)
{
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct radeon_device *rdev = crtc->dev->dev_private;
 
if (ASIC_IS_AVIVO(rdev)) {
WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
} else {
switch (radeon_crtc->crtc_id) {
case 0:
WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
break;
case 1:
WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
break;
default:
return;
}
 
WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |
(RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
}
}
 
int pre_init_display(struct radeon_device *rdev)
{
cursor_t *cursor;
 
// rdisplay = get_display();
ENTER();
 
rdisplay = GetDisplay();
 
rdisplay->ddev = rdev->ddev;
 
list_for_each_entry(cursor, &rdisplay->cursors, list)
117,9 → 161,33
{
init_cursor(cursor);
};
 
LEAVE();
 
return 1;
};
 
int post_init_display(struct radeon_device *rdev)
{
cursor_t *cursor;
 
ENTER();
 
select_cursor(rdisplay->cursor);
 
radeon_show_cursor(rdisplay->crtc);
 
rdisplay->init_cursor = init_cursor;
rdisplay->select_cursor = select_cursor;
rdisplay->show_cursor = NULL;
rdisplay->move_cursor = move_cursor;
rdisplay->restore_cursor = restore_cursor;
 
LEAVE();
 
return 1;
};
 
static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock)
{
struct radeon_device *rdev = crtc->dev->dev_private;
143,7 → 211,7
}
}
 
cursor_t* select_cursor(display_t *display, cursor_t *cursor)
cursor_t* __stdcall select_cursor(cursor_t *cursor)
{
struct radeon_device *rdev;
struct radeon_crtc *radeon_crtc;
153,9 → 221,9
rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
radeon_crtc = to_radeon_crtc(rdisplay->crtc);
 
old = display->cursor;
old = rdisplay->cursor;
 
display->cursor = cursor;
rdisplay->cursor = cursor;
gpu_addr = cursor->robj->gpu_addr;
 
if (ASIC_IS_AVIVO(rdev))
165,18 → 233,20
/* offset is from DISP(2)_BASE_ADDRESS */
WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);
}
 
return old;
};
 
 
int radeon_cursor_move(display_t *display, int x, int y)
void __stdcall move_cursor(cursor_t *cursor, int x, int y)
{
struct radeon_device *rdev;
rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
struct drm_crtc *crtc = rdisplay->crtc;
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct radeon_device *rdev = crtc->dev->dev_private;
 
int hot_x = rdisplay->cursor->hot_x - 1;
int hot_y = rdisplay->cursor->hot_y - 1;
int hot_x = cursor->hot_x;
int hot_y = cursor->hot_y;
 
radeon_lock_cursor(crtc, true);
if (ASIC_IS_AVIVO(rdev))
186,8 → 256,8
struct drm_crtc *crtc_p;
 
/* avivo cursor are offset into the total surface */
x += crtc->x;
y += crtc->y;
// x += crtc->x;
// y += crtc->y;
 
// DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);
#if 0
215,11 → 285,10
w = 1;
}
#endif
 
WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
(x << 16) | y);
WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset,
(hot_x << 16) | hot_y-1);
(hot_x << 16) | hot_y);
WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
((w - 1) << 16) | 31);
} else {
236,8 → 305,9
(radeon_crtc->legacy_cursor_offset + (hot_y * 256)));
}
radeon_lock_cursor(crtc, false);
 
return 0;
}
 
void __stdcall restore_cursor(int x, int y)
{
};