/contrib/toolchain/binutils/include/ChangeLog |
---|
1,3 → 1,415 |
2015-11-09 Alan Modra <amodra@gmail.com> |
PR gdb/17133 |
* obstack.h (__attribute_pure__): Expand _GL_ATTRIBUTE_PURE. |
2015-11-09 Alan Modra <amodra@gmail.com> |
PR gdb/17133 |
* obstack.h: Import current gnulib file. |
2015-10-22 H.J. Lu <hongjiu.lu@intel.com> |
* bfdlink.h (bfd_link_info): Add call_nop_as_suffix and |
call_nop_byte. |
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> |
* dis-asm.h (arc_get_disassembler): Correct declaration. |
2015-09-30 Nick Clifton <nickc@redhat.com> |
Import the following patches from the GCC mainline: |
2015-08-14 Pierre-Marie de Rodat <derodat@adacore.com> |
* dwarf2.def (DW_AT_GNU_bias): New attribute. |
2015-08-14 Pierre-Marie de Rodat <derodat@adacore.com> |
* dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New |
attributes. |
2015-09-26 James Bowman <james.bowman@ftdichip.com> |
* opcode/ft32.h: Add instruction macros FT32_*() |
2015-09-20 Rich Felker <dalias@libc.org> |
* bfdlink.h (struct bfd_link_info): Add "nointerp" field. |
2015-08-23 Alan Modra <amodra@gmail.com> |
* bfdlink.h (enum output_type): Reorder enum. |
2015-08-19 Alan Modra <amodra@gmail.com> |
* bfdlink.h (enum output_type): Delete type_executable, add type_pde |
and type_pie. Reorder. |
(struct bfd_link_info): Delete pic field. |
(bfd_link_executable, bfd_link_pde, bfd_link_pie, bfd_link_pic): Adjust. |
2015-08-19 Alan Modra <amodra@gmail.com> |
* bfdlink.h (bfd_link_pde): Define. |
2015-08-18 H.J. Lu <hongjiu.lu@intel.com> |
* include/bfdlink.h (output_type): New enum. |
(bfd_link_executable): New macro. |
(bfd_link_dll): Likewise. |
(bfd_link_relocatable): Likewise. |
(bfd_link_pic): Likewise. |
(bfd_link_pie): Likewise. |
(bfd_link_info): Remove shared, executable, pie and relocatable. |
Add output_type and pic. |
2015-08-12 H.J. Lu <hongjiu.lu@intel.com> |
Sync with GCC |
2015-08-11 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> |
* ansidecl.h (GCC_FINAL): New macro. |
2015-07-16 Jiong Wang <jiong.wang@arm.com> |
* elf/aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration. |
2015-07-14 H.J. Lu <hongjiu.lu@intel.com> |
Sync with GCC |
2014-10-28 Richard Henderson <rth@redhat.com> |
* longlong.h [__alpha] (umul_ppmm): Disable for c++. |
2015-07-14 H.J. Lu <hongjiu.lu@intel.com> |
Sync with GCC |
2014-12-09 Trevor Saunders <tsaunders@mozilla.com> |
* hashtab.h, splay-tree.h: Remove GTY markers. |
2015-07-14 H.J. Lu <hongjiu.lu@intel.com> |
Sync with GCC |
2015-03-02 Markus Trippelsdorf <markus@trippelsdorf.de> |
PR target/65261 |
* ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro. |
2015-07-09 Catherine Moore <clm@codesourcery.com> |
* elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. |
2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com> |
* elf/avr.h: Add new 32 bit PC relative relocation. |
2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com> |
* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro. |
2015-06-22 Nick Clifton <nickc@redhat.com> |
* dis-asm.h (struct disassemble_info): Add stop_vma field. |
2015-05-28 Catherine Moore <clm@codesourcery.com> |
include/ |
* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. |
2015-05-22 Yunlian Jiang <yunlian@google.com> |
* libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is |
not defined. |
2015-05-12 Jiong Wang <jiong.wang@arm.com> |
* elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration. |
2015-05-01 H.J. Lu <hongjiu.lu@intel.com> |
Merge with gcc: |
2014-11-11 Anthony Brandon <anthony.brandon@gmail.com> |
Manuel López-Ibáñez <manu@gcc.gnu.org> |
PR driver/36312 |
* filenames.h: Add prototype for canonical_filename_eq. |
2015-04-30 DJ Delorie <dj@redhat.com> |
* dis-asm.h (print_insn_rl78_g10): New. |
(print_insn_rl78_g13): New. |
(print_insn_rl78_g14): New. |
(rl78_get_disassembler): New. |
2015-04-17 Richard Earnshaw <rearnsha@arm.com> |
Merge from gcc: |
2015-03-19 Richard Biener <rguenther@suse.de> |
* partition.h (struct partition_elem): Re-order elements to |
avoid padding. |
2015-04-14 H.J. Lu <hongjiu.lu@intel.com> |
* bfdlink.h (bfd_link_info): Add compress_debug. |
2015-04-14 H.J. Lu <hongjiu.lu@intel.com> |
PR ld/pr17709 |
* bfdlink.h (bfd_link_info): Add extern_protected_data. |
2015-03-10 Matthew Wahab <matthew.wahab@arm.com> |
PR ld/16572 |
* elf/arm.h (EF_ARM_HASENTRY): Remove. |
2015-02-19 Pedro Alves <palves@redhat.com> |
* floatformat.h [__cplusplus]: Wrap in extern "C". |
2015-02-14 Alan Modra <amodra@gmail.com> |
PR ld/17973 |
* bfdlink.h (struct bfd_link_info): Delete loading_lto_outputs. |
2015-02-09 Mark Wielaard <mjw@redhat.com> |
* dwarf2.h: Add DW_LANG_Fortran03 and DW_LANG_Fortran08. |
2015-02-09 Mark Wielaard <mjw@redhat.com> |
* dwarf2.def: Add DW_TAG_atomic_type. |
2015-01-28 James Bowman <james.bowman@ftdichip.com> |
* dis-asm.h (print_insn_ft32): Declare. |
2015-01-15 Mark Wielaard <mjw@redhat.com> |
* dwarf2.def (DW_AT_noreturn): New DWARF5 attribute. |
2015-01-14 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
* libiberty.h: Merge from GCC. |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-12-24 Uros Bizjak <ubizjak@gmail.com> |
Ben Elliston <bje@au.ibm.com> |
Manuel Lopez-Ibanez <manu@gcc.gnu.org> |
* libiberty.h (xasprintf): Declare. |
2014-12-23 Alan Modra <amodra@gmail.com> |
* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add |
linker_def. |
2014-12-12 Phil Muldoon <pmuldoon@redhat.com> |
Jan Kratochvil <jan.kratochvil@redhat.com> |
Tom Tromey <tromey@redhat.com> |
* gcc-c-fe.def: New file. |
* gcc-c-interface.h: New file. |
* gcc-interface.h: New file. |
2014-12-11 Uros Bizjak <ubizjak@gmail.com> |
Ben Elliston <bje@au.ibm.com> |
Manuel Lopez-Ibanez <manu@gcc.gnu.org> |
* libiberty.h (xvasprintf): Declare. |
2014-12-06 Eric Botcazou <ebotcazou@adacore.com> |
* dis-asm.h (print_insn_visium): Declare. |
2014-11-24 Mark Wielaard <mjw@redhat.com> |
* dwarf2.h: Add DW_LANG_C_plus_plus_11, DW_LANG_C11 and |
DW_LANG_C_plus_plus_14. |
2014-11-21 Shinichiro Hamaji <shinichiro.hamaji@gmail.com> |
* dwarf2.def (DW_AT_APPLE_optimized, DW_AT_APPLE_flags) |
(DW_AT_APPLE_isa, DW_AT_APPLE_block) |
(DW_AT_APPLE_major_runtime_vers, DW_AT_APPLE_runtime_class) |
(DW_AT_APPLE_omit_frame_ptr, DW_AT_APPLE_property_name) |
(DW_AT_APPLE_property_getter, DW_AT_APPLE_property_setter) |
(DW_AT_APPLE_property_attribute, DW_AT_APPLE_objc_complete_type) |
(DW_AT_APPLE_property): New macros. |
2014-11-21 Mark Wielaard <mjw@redhat.com> |
PR debug/63239 |
* dwarf2.def (DW_AT_GNU_deleted): New attribute. |
2014-11-21 Terry Guo <terry.guo@arm.com> |
* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. |
(FPU_VFP_V5D16): Likewise. |
(FPU_VFP_V5_SP_D16): Likewise. |
(FPU_ARCH_VFP_V5D16): Likewise. |
(FPU_ARCH_VFP_V5_SP_D16): Likewise. |
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> |
* bfdlink.h (struct bfd_link_info): Add bndplt. |
2014-10-30 Andrew Pinski <apinski@cavium.com> |
* elf/mips.h (AFL_EXT_OCTEON3): Define. |
INSN_OCTEON3, CPU_OCTEON3): Define. |
2014-10-28 Yury Gribov <y.gribov@samsung.com> |
* libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes. |
2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com> |
* elf/mips.h (AFL_ASE_MASK): Define. |
2014-10-15 David Malcolm <dmalcolm@redhat.com> |
* libiberty.h (choose_tmpdir): New prototype. |
2014-09-26 Max Ostapenko <m.ostapenko@partner.samsung.com> |
* libiberty.h (PEX_STDOUT_APPEND): New flag. |
(PEX_STDERR_APPEND): Likewise. |
2014-09-23 Iain Buclaw <ibuclaw@gdcproject.org> |
* demangle.h (DMGL_DLANG): New macro. |
(DMGL_STYLE_MASK): Add DMGL_DLANG. |
(demangling_styles): Add dlang_demangling. |
(DLANG_DEMANGLING_STYLE_STRING): New macro. |
(DLANG_DEMANGLING): New macro. |
(dlang_demangle): New prototype. |
2014-09-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
* longlong.h: Add __udiv_w_sdiv prototype. |
2014-08-12 Alan Modra <amodra@gmail.com> |
* bfdlink.h (struct bfd_link_callbacks <notice>): Remove "string" |
param, add "inh". |
2014-08-12 Alan Modra <amodra@gmail.com> |
* bfdlink.h (struct bfd_link_info): Add lto_plugin_active. |
2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> |
* elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. |
(Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. |
(Val_GNU_MIPS_ABI_FP_64): Redefine. |
(Val_GNU_MIPS_ABI_FP_XX): Define. |
(Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. |
(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. |
(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. |
(AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. |
(AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. |
(AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. |
(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. |
(AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. |
(AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. |
(AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. |
(AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. |
(AFL_EXT_LOONGSON_2F): Likewise. |
(bfd_mips_elf_swap_abiflags_v0_in): Prototype. |
(bfd_mips_elf_swap_abiflags_v0_out): Likewise. |
(bfd_mips_isa_ext): Likewise. |
2014-06-13 Alan Modra <amodra@gmail.com> |
* bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. |
2014-06-13 Alan Modra <amodra@gmail.com> |
* bfdlink.h: Update for bfd.link_next change. |
2014-06-10 Alan Modra <amodra@gmail.com> |
PR ld/16910 |
* bfdlink.h (unwrap_hash_lookup): Declare. |
2014-05-01 Steve Ellcey <sellcey@mips.com> |
* include/longlong.h: Import latest version from GCC tree. |
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com> |
* opcode/mips.h (ASE_XPA): New define. |
2014-04-22 Christian Svensson <blue@cmd.nu> |
* dis-asm.h: Remove openrisc and or32 support. Add support for or1k. |
2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
* elf/avr.h: Add new DIFF relocs. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2014-01-21 Tom Tromey <tromey@redhat.com> |
* ansidecl.h (ANSI_PROTOTYPES, PTRCONST, LONG_DOUBLE, PARAMS) |
(VPARAMS, VA_START, VA_OPEN, VA_CLOSE, VA_FIXEDARG, CONST) |
(VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID, AND, DOTS) |
(NOARGS): Don't define. |
* libiberty.h (expandargv, writeargv): Don't use PARAMS. |
2014-01-09 Tom Tromey <tromey@redhat.com> |
* gdbm.h: Remove. |
2013-12-23 Bill Maddox <maddox@google.com> |
* demangle.h (enum gnu_v3_ctor_kinds): |
Added literal gnu_v3_unified_ctor. |
(enum gnu_v3_ctor_kinds): |
Added literal gnu_v3_unified_dtor. |
2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
Wei-Cheng Wang <cole945@gmail.com> |
* dis-asm.h (print_insn_nds32): Add nds32 target. |
2013-12-04 Richard Sandiford <rdsandiford@googlemail.com> |
* longlong.h: New file. |
2013-11-11 Catherine Moore <clm@codesourcery.com> |
* opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... |
(INSN_LOAD_MEMORY): ...this. |
2013-10-29 Marc Glisse <marc.glisse@inria.fr> |
PR tree-optimization/58689 |
* ansidecl.h (ATTRIBUTE_RETURNS_NONNULL): New macro. |
* libiberty.h (basename, lbasename, dos_lbasename, unix_lbasename, |
concat_copy): Mark with attributes nonnull(1) and returns_nonnull. |
(concat, reconcat, concat_copy2, choose_temp_base, xstrerror, |
xmalloc, xrealloc, xcalloc, xstrdup, xstrndup, xmemdup, pex_init): |
Mark with attribute returns_nonnull. |
2013-10-22 Sterling Augustine <saugustine@google.com> |
* gdb/gdb-index.h: Merge from gdb tree. |
2013-10-10 Sean Keys <skeys@ipdatasys.com> |
* xgate.h : Cleanup after opcode |
table modification.. |
2013-08-20 Alan Modra <amodra@gmail.com> |
* floatformat.h (floatformat_ibm_long_double): Delete. |
1955,7 → 2367,7 |
For older changes see ChangeLog-9103 |
Copyright (C) 2004-2012 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/MAINTAINERS |
---|
1,6 → 1,6 |
See ../binutils/MAINTAINERS |
Copyright (C) 2012 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/alloca-conf.h |
---|
1,4 → 1,4 |
/* Copyright 2012 Free Software Foundation, Inc. |
/* Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This program is free software: you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/ansidecl.h |
---|
1,7 → 1,5 |
/* ANSI and traditional C compatability macros |
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, |
2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
This file is part of the GNU C Library. |
This program is free software; you can redistribute it and/or modify |
24,94 → 22,17 |
Macro ANSI C definition Traditional C definition |
----- ---- - ---------- ----------- - ---------- |
ANSI_PROTOTYPES 1 not defined |
PTR `void *' `char *' |
PTRCONST `void *const' `char *' |
LONG_DOUBLE `long double' `double' |
const not defined `' |
volatile not defined `' |
signed not defined `' |
VA_START(ap, var) va_start(ap, var) va_start(ap) |
Note that it is safe to write "void foo();" indicating a function |
with no return value, in all K+R compilers we have been able to test. |
For declaring functions with prototypes, we also provide these: |
PARAMS ((prototype)) |
-- for functions which take a fixed number of arguments. Use this |
when declaring the function. When defining the function, write a |
K+R style argument list. For example: |
char *strcpy PARAMS ((char *dest, char *source)); |
... |
char * |
strcpy (dest, source) |
char *dest; |
char *source; |
{ ... } |
VPARAMS ((prototype, ...)) |
-- for functions which take a variable number of arguments. Use |
PARAMS to declare the function, VPARAMS to define it. For example: |
int printf PARAMS ((const char *format, ...)); |
... |
int |
printf VPARAMS ((const char *format, ...)) |
{ |
... |
} |
For writing functions which take variable numbers of arguments, we |
also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These |
hide the differences between K+R <varargs.h> and C89 <stdarg.h> more |
thoroughly than the simple VA_START() macro mentioned above. |
VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end. |
Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls |
corresponding to the list of fixed arguments. Then use va_arg |
normally to get the variable arguments, or pass your va_list object |
around. You do not declare the va_list yourself; VA_OPEN does it |
for you. |
Here is a complete example: |
int |
printf VPARAMS ((const char *format, ...)) |
{ |
int result; |
VA_OPEN (ap, format); |
VA_FIXEDARG (ap, const char *, format); |
result = vfprintf (stdout, format, ap); |
VA_CLOSE (ap); |
return result; |
} |
You can declare variables either before or after the VA_OPEN, |
VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning |
and end of a block. They must appear at the same nesting level, |
and any variables declared after VA_OPEN go out of scope at |
VA_CLOSE. Unfortunately, with a K+R compiler, that includes the |
argument list. You can have multiple instances of VA_OPEN/VA_CLOSE |
pairs in a single function in case you need to traverse the |
argument list more than once. |
For ease of writing code which uses GCC extensions but needs to be |
portable to other compilers, we provide the GCC_VERSION macro that |
simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various |
wrappers around __attribute__. Also, __extension__ will be #defined |
to nothing if it doesn't work. See below. |
to nothing if it doesn't work. See below. */ |
This header also defines a lot of obsolete macros: |
CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID, |
AND, DOTS, NOARGS. Don't use them. */ |
#ifndef _ANSIDECL_H |
#define _ANSIDECL_H 1 |
149,28 → 70,8 |
C++ compilers, does not define __STDC__, though it acts as if this |
was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */ |
#define ANSI_PROTOTYPES 1 |
#define PTR void * |
#define PTRCONST void *const |
#define LONG_DOUBLE long double |
/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in |
a #ifndef. */ |
#ifndef PARAMS |
#define PARAMS(ARGS) ARGS |
#endif |
#define VPARAMS(ARGS) ARGS |
#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR) |
/* variadic function helper macros */ |
/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's |
use without inhibiting further decls and without declaring an |
actual variable. */ |
#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy |
#define VA_CLOSE(AP) } va_end(AP); } |
#define VA_FIXEDARG(AP, T, N) struct Qdmy |
#undef const |
#undef volatile |
#undef signed |
188,36 → 89,10 |
# endif |
#endif |
/* These are obsolete. Do not use. */ |
#ifndef IN_GCC |
#define CONST const |
#define VOLATILE volatile |
#define SIGNED signed |
#define PROTO(type, name, arglist) type name arglist |
#define EXFUN(name, proto) name proto |
#define DEFUN(name, arglist, args) name(args) |
#define DEFUN_VOID(name) name(void) |
#define AND , |
#define DOTS , ... |
#define NOARGS void |
#endif /* ! IN_GCC */ |
#else /* Not ANSI C. */ |
#undef ANSI_PROTOTYPES |
#define PTR char * |
#define PTRCONST PTR |
#define LONG_DOUBLE double |
#define PARAMS(args) () |
#define VPARAMS(args) (va_alist) va_dcl |
#define VA_START(va_list, var) va_start(va_list) |
#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy |
#define VA_CLOSE(AP) } va_end(AP); } |
#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE) |
/* some systems define these in header files for non-ansi mode */ |
#undef const |
#undef volatile |
228,20 → 103,6 |
#define signed |
#define inline |
#ifndef IN_GCC |
#define CONST |
#define VOLATILE |
#define SIGNED |
#define PROTO(type, name, arglist) type name () |
#define EXFUN(name, proto) name() |
#define DEFUN(name, arglist, args) name arglist args; |
#define DEFUN_VOID(name) name() |
#define AND ; |
#define DOTS |
#define NOARGS |
#endif /* ! IN_GCC */ |
#endif /* ANSI C. */ |
/* Define macros for some gcc attributes. This permits us to use the |
311,6 → 172,15 |
# endif /* GNUC >= 3.3 */ |
#endif /* ATTRIBUTE_NONNULL */ |
/* Attribute `returns_nonnull' was valid as of gcc 4.9. */ |
#ifndef ATTRIBUTE_RETURNS_NONNULL |
# if (GCC_VERSION >= 4009) |
# define ATTRIBUTE_RETURNS_NONNULL __attribute__ ((__returns_nonnull__)) |
# else |
# define ATTRIBUTE_RETURNS_NONNULL |
# endif /* GNUC >= 4.9 */ |
#endif /* ATTRIBUTE_RETURNS_NONNULL */ |
/* Attribute `pure' was valid as of gcc 3.0. */ |
#ifndef ATTRIBUTE_PURE |
# if (GCC_VERSION >= 3000) |
404,6 → 274,15 |
# endif /* GNUC >= 4.3 */ |
#endif /* ATTRIBUTE_HOT */ |
/* Attribute 'no_sanitize_undefined' was valid as of gcc 4.9. */ |
#ifndef ATTRIBUTE_NO_SANITIZE_UNDEFINED |
# if (GCC_VERSION >= 4009) |
# define ATTRIBUTE_NO_SANITIZE_UNDEFINED __attribute__ ((no_sanitize_undefined)) |
# else |
# define ATTRIBUTE_NO_SANITIZE_UNDEFINED |
# endif /* GNUC >= 4.9 */ |
#endif /* ATTRIBUTE_NO_SANITIZE_UNDEFINED */ |
/* We use __extension__ in some places to suppress -pedantic warnings |
about GCC extensions. This feature didn't work properly before |
gcc 2.8. */ |
434,6 → 313,15 |
#define ENUM_BITFIELD(TYPE) unsigned int |
#endif |
/* This is used to mark a class or virtual function as final. */ |
#if __cplusplus >= 201103L |
#define GCC_FINAL final |
#elif GCC_VERSION >= 4007 |
#define GCC_FINAL __final |
#else |
#define GCC_FINAL |
#endif |
#ifdef __cplusplus |
} |
#endif |
/contrib/toolchain/binutils/include/aout/ChangeLog |
---|
1,3 → 1,11 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2010-04-15 Nick Clifton <nickc@redhat.com> |
* adobe.h: Update copyright notice to use GPLv3. |
248,7 → 256,7 |
directory. |
Copyright (C) 1991-2012 Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/aout/adobe.h |
---|
1,6 → 1,6 |
/* `a.out.adobe' differences from standard a.out files |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/aout64.h |
---|
1,6 → 1,6 |
/* `a.out' object-file definitions, including extensions to 64-bit fields |
Copyright 1999, 2000, 2001, 2003, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/ar.h |
---|
1,6 → 1,6 |
/* archive file definition for GNU software |
Copyright 2001, 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/dynix3.h |
---|
1,6 → 1,6 |
/* a.out specifics for Sequent Symmetry running Dynix 3.x |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/encap.h |
---|
1,5 → 1,5 |
/* Yet Another Try at encapsulating bfd object files in coff. |
Copyright 1988, 1989, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1988-2015 Free Software Foundation, Inc. |
Written by Pace Willisson 12/9/88 |
This file is obsolete. It needs to be converted to just define a bunch |
/contrib/toolchain/binutils/include/aout/host.h |
---|
1,7 → 1,7 |
/* host.h - Parameters about the a.out format, based on the host system |
on which the program is compiled. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/hp.h |
---|
1,5 → 1,5 |
/* Special version of <a.out.h> for use under HP-UX. |
Copyright 1988, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1988-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/hp300hpux.h |
---|
1,6 → 1,5 |
/* Special version of <a.out.h> for use under HP-UX. |
Copyright 1988, 1993, 1995, 2001, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1988-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/hppa.h |
---|
1,4 → 1,4 |
/* Copyright 2012 Free Software Foundation, Inc. |
/* Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/ranlib.h |
---|
1,5 → 1,5 |
/* ranlib.h -- archive library index member definition for GNU. |
Copyright 1990, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1990-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/reloc.h |
---|
1,5 → 1,5 |
/* reloc.h -- Header file for relocation information. |
Copyright 1989, 1990, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/stab.def |
---|
1,6 → 1,5 |
/* Table of DBX symbol codes for the GNU system. |
Copyright 1988, 1991, 1992, 1993, 1994, 1996, 1998, 2004, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1988-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or |
modify it under the terms of the GNU General Public License as |
/contrib/toolchain/binutils/include/aout/stab_gnu.h |
---|
1,6 → 1,6 |
/* gnu_stab.h Definitions for GNU extensions to STABS |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/aout/sun4.h |
---|
1,6 → 1,6 |
/* SPARC-specific values for a.out files |
Copyright 2001, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/bfdlink.h |
---|
1,7 → 1,5 |
/* bfdlink.h -- header file for BFD link routines |
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 |
Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Written by Steve Chamberlain and Ian Lance Taylor, Cygnus Support. |
This file is part of BFD, the Binary File Descriptor library. |
93,8 → 91,14 |
/* Type of this entry. */ |
ENUM_BITFIELD (bfd_link_hash_type) type : 8; |
/* Symbol is referenced in a normal object file, as distict from a LTO |
IR object file. */ |
unsigned int non_ir_ref : 1; |
/* Symbol is a built-in define. These will be overridden by PROVIDE |
in a linker script. */ |
unsigned int linker_def : 1; |
/* A union of information depending upon the type. */ |
union |
{ |
169,6 → 173,8 |
struct bfd_link_hash_entry *undefs; |
/* Entries are added to the tail of the undefs list. */ |
struct bfd_link_hash_entry *undefs_tail; |
/* Function to free the hash table on closing BFD. */ |
void (*hash_table_free) (bfd *); |
/* The type of the link hash table. */ |
enum bfd_link_hash_table_type type; |
}; |
188,6 → 194,12 |
(bfd *, struct bfd_link_info *, const char *, bfd_boolean, |
bfd_boolean, bfd_boolean); |
/* If H is a wrapped symbol, ie. the symbol name starts with "__wrap_" |
and the remainder is found in wrap_hash, return the real symbol. */ |
extern struct bfd_link_hash_entry *unwrap_hash_lookup |
(struct bfd_link_info *, bfd *, struct bfd_link_hash_entry *); |
/* Traverse a link hash table. */ |
extern void bfd_link_hash_traverse |
(struct bfd_link_hash_table *, |
247,23 → 259,31 |
struct bfd_elf_dynamic_list; |
struct bfd_elf_version_tree; |
/* Types of output. */ |
enum output_type |
{ |
type_pde, |
type_pie, |
type_relocatable, |
type_dll, |
}; |
#define bfd_link_pde(info) ((info)->type == type_pde) |
#define bfd_link_dll(info) ((info)->type == type_dll) |
#define bfd_link_relocatable(info) ((info)->type == type_relocatable) |
#define bfd_link_pie(info) ((info)->type == type_pie) |
#define bfd_link_executable(info) (bfd_link_pde (info) || bfd_link_pie (info)) |
#define bfd_link_pic(info) (bfd_link_dll (info) || bfd_link_pie (info)) |
/* This structure holds all the information needed to communicate |
between BFD and the linker when doing a link. */ |
struct bfd_link_info |
{ |
/* TRUE if BFD should generate a shared object (or a pie). */ |
unsigned int shared: 1; |
/* Output type. */ |
ENUM_BITFIELD (output_type) type : 2; |
/* TRUE if generating an executable, position independent or not. */ |
unsigned int executable : 1; |
/* TRUE if generating a position independent executable. */ |
unsigned int pie: 1; |
/* TRUE if BFD should generate a relocatable object file. */ |
unsigned int relocatable: 1; |
/* TRUE if BFD should pre-bind symbols in a shared object. */ |
unsigned int symbolic: 1; |
286,8 → 306,8 |
callback. */ |
unsigned int notice_all: 1; |
/* TRUE if we are loading LTO outputs. */ |
unsigned int loading_lto_outputs: 1; |
/* TRUE if the LTO plugin is active. */ |
unsigned int lto_plugin_active: 1; |
/* TRUE if global symbols in discarded sections should be stripped. */ |
unsigned int strip_discarded: 1; |
330,9 → 350,9 |
/* TRUE if PT_GNU_RELRO segment should be created. */ |
unsigned int relro: 1; |
/* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment |
should be created. */ |
unsigned int eh_frame_hdr: 1; |
/* Nonzero if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment |
should be created. 1 for DWARF2 tables, 2 for compact tables. */ |
unsigned int eh_frame_hdr_type: 2; |
/* TRUE if we should warn when adding a DT_TEXTREL to a shared object. */ |
unsigned int warn_shared_textrel: 1; |
408,6 → 428,18 |
/* TRUE if the linker script contained an explicit PHDRS command. */ |
unsigned int user_phdrs: 1; |
/* TRUE if BND prefix in PLT entries is always generated. */ |
unsigned int bndplt: 1; |
/* TRUE if generation of .interp/PT_INTERP should be suppressed. */ |
unsigned int nointerp: 1; |
/* TRUE if generate a 1-byte NOP as suffix for x86 call instruction. */ |
unsigned int call_nop_as_suffix : 1; |
/* The 1-byte NOP for x86 call instruction. */ |
char call_nop_byte; |
/* Char that may appear as the first char of a symbol, but should be |
skipped (like symbol_leading_char) when looking up symbols in |
wrap_hash. Used by PowerPC Linux for 'dot' symbols. */ |
416,6 → 448,9 |
/* Separator between archive and filename in linker script filespecs. */ |
char path_separator; |
/* Compress DWARF debug sections. */ |
enum compressed_debug_section_type compress_debug; |
/* Default stack size. Zero means default (often zero itself), -1 |
means explicitly zero-sized. */ |
bfd_signed_vma stacksize; |
465,7 → 500,7 |
bfd *output_bfd; |
/* The list of input BFD's involved in the link. These are chained |
together via the link_next field. */ |
together via the link.next field. */ |
bfd *input_bfds; |
bfd **input_bfds_tail; |
502,6 → 537,11 |
relaxation returning true in *AGAIN. */ |
int relax_trip; |
/* > 0 to treat protected data defined in the shared library as |
reference external. 0 to treat it as internal. -1 to let |
backend to decide. */ |
int extern_protected_data; |
/* Non-zero if auto-import thunks for DATA items in pei386 DLLs |
should be generated/linked against. Set to 1 if this feature |
is explicitly requested by the user, -1 if enabled by default. */ |
631,15 → 671,14 |
(struct bfd_link_info *, const char *name, |
bfd *abfd, asection *section, bfd_vma address); |
/* A function which is called when a symbol in notice_hash is |
defined or referenced. H is the symbol. ABFD, SECTION and |
ADDRESS are the (new) value of the symbol. If SECTION is |
bfd_und_section, this is a reference. FLAGS are the symbol |
BSF_* flags. STRING is the name of the symbol to indirect to if |
the sym is indirect, or the warning string if a warning sym. */ |
defined or referenced. H is the symbol, INH the indirect symbol |
if applicable. ABFD, SECTION and ADDRESS are the (new) value of |
the symbol. If SECTION is bfd_und_section, this is a reference. |
FLAGS are the symbol BSF_* flags. */ |
bfd_boolean (*notice) |
(struct bfd_link_info *, struct bfd_link_hash_entry *h, |
bfd *abfd, asection *section, bfd_vma address, flagword flags, |
const char *string); |
struct bfd_link_hash_entry *inh, |
bfd *abfd, asection *section, bfd_vma address, flagword flags); |
/* Error or warning link info message. */ |
void (*einfo) |
(const char *fmt, ...); |
/contrib/toolchain/binutils/include/binary-io.h |
---|
1,5 → 1,5 |
/* Binary mode I/O. |
Copyright (C) 2001, 2003, 2005, 2008 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software: you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
40,6 → 40,8 |
# include <io.h> /* declares setmode() */ |
# else |
# define setmode _setmode |
# undef fileno |
# define fileno _fileno |
# endif |
# ifdef __DJGPP__ |
# include <unistd.h> /* declares isatty() */ |
/contrib/toolchain/binutils/include/bout.h |
---|
2,7 → 2,7 |
GNU tools modified to support the i80960 (or tools that operate on |
object files created by such tools). |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/cgen/ChangeLog |
---|
1,3 → 1,15 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2014-01-06 Tom Tromey <tromey@redhat.com> |
* bitset.h: Remove uses of PARAMS. |
2013-07-18 Andrew Neitsch <andrew@neitsch.ca> |
PR binutils/15728 |
18,7 → 30,7 |
* bitset.h: New file. Moved here from ../opcode/cgen-bitset.h. |
Update license to GPL v3. |
Copyright (C) 2009-2012 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/cgen/basic-modes.h |
---|
1,5 → 1,5 |
/* Basic CGEN modes. |
Copyright 2005, 2007, 2009 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
This file is part of the GNU opcodes library. |
/contrib/toolchain/binutils/include/cgen/basic-ops.h |
---|
1,5 → 1,5 |
/* Basic semantics ops support for CGEN. |
Copyright 2005-2013 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
This file is part of the GNU opcodes library. |
/contrib/toolchain/binutils/include/cgen/bitset.h |
---|
1,5 → 1,5 |
/* Header file the type CGEN_BITSET. |
Copyright 2002, 2005, 2009 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of the GNU opcodes library. |
38,16 → 38,16 |
char *bits; |
} CGEN_BITSET; |
extern CGEN_BITSET *cgen_bitset_create PARAMS ((unsigned)); |
extern void cgen_bitset_init PARAMS ((CGEN_BITSET *, unsigned)); |
extern void cgen_bitset_clear PARAMS ((CGEN_BITSET *)); |
extern void cgen_bitset_add PARAMS ((CGEN_BITSET *, unsigned)); |
extern void cgen_bitset_set PARAMS ((CGEN_BITSET *, unsigned)); |
extern int cgen_bitset_compare PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); |
extern void cgen_bitset_union PARAMS ((CGEN_BITSET *, CGEN_BITSET *, CGEN_BITSET *)); |
extern int cgen_bitset_intersect_p PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); |
extern int cgen_bitset_contains PARAMS ((CGEN_BITSET *, unsigned)); |
extern CGEN_BITSET *cgen_bitset_copy PARAMS ((CGEN_BITSET *)); |
extern CGEN_BITSET *cgen_bitset_create (unsigned); |
extern void cgen_bitset_init (CGEN_BITSET *, unsigned); |
extern void cgen_bitset_clear (CGEN_BITSET *); |
extern void cgen_bitset_add (CGEN_BITSET *, unsigned); |
extern void cgen_bitset_set (CGEN_BITSET *, unsigned); |
extern int cgen_bitset_compare (CGEN_BITSET *, CGEN_BITSET *); |
extern void cgen_bitset_union (CGEN_BITSET *, CGEN_BITSET *, CGEN_BITSET *); |
extern int cgen_bitset_intersect_p (CGEN_BITSET *, CGEN_BITSET *); |
extern int cgen_bitset_contains (CGEN_BITSET *, unsigned); |
extern CGEN_BITSET *cgen_bitset_copy (CGEN_BITSET *); |
#ifdef __cplusplus |
} // extern "C" |
/contrib/toolchain/binutils/include/coff/ChangeLog |
---|
1,3 → 1,49 |
2015-01-06 Alan Modra <amodra@gmail.com> |
PR binutils/17754 |
* internal.h (internal_auxent): Increase size of x_fname field to |
20 to allow for PE format's longer file names. |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-08-20 Daniel Micay <danielmicay@gmail.com> |
* pe.h: Add HIGH_ENTROPY_VA flag |
2014-04-22 Christian Svensson <blue@cmd.nu> |
* or32.h: Delete. |
2014-04-08 Jon TURNEY <jon.turney@dronecode.org.uk> |
* pe.h (external_IMAGE_DEBUG_DIRECTORY, _CV_INFO_PDB70) |
(_CV_INFO_PDB20): Add structures and constants for debug directory |
and codeview records. |
* internal.h (internal_IMAGE_DEBUG_DIRECTORY, CODEVIEW_INFO): |
Add structures and constants for internal representation of debug |
directory and codeview records. |
2014-03-13 Tristan Gingold <gingold@adacore.com> |
* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare. |
(FILHSZ_BIGOBJ): Define. |
(struct external_SYMBOL_EX): Declare. |
(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define. |
(union external_AUX_SYMBOL_EX): Declare. |
(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define. |
* internal.h (struct internal_filehdr): Change type |
of f_nscns. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2013-12-06 Tristan Gingold <gingold@adacore.com> |
* pe.h (UWOP_EPILOG, UWOP_PARE): Define. |
2013-07-10 Tristan Gingold <gingold@adacore.com> |
* rs6000.h (external_core_dumpx): New structure. |
359,7 → 405,7 |
For older changes see ChangeLog-9103 |
Copyright (C) 2004-2012 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/coff/alpha.h |
---|
1,7 → 1,7 |
/* ECOFF support on Alpha machines. |
coff/ecoff.h must be included before this file. |
Copyright 2001, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/apollo.h |
---|
1,6 → 1,6 |
/* coff information for Apollo M68K |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/arm.h |
---|
1,6 → 1,5 |
/* ARM COFF support for BFD. |
Copyright 1998, 1999, 2000, 2002, 2003, 2010, 2013 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/coff/aux-coff.h |
---|
1,6 → 1,6 |
/* Modifications of internal.h and m68k.h needed by A/UX |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/ecoff.h |
---|
2,7 → 2,7 |
This does not include symbol information, found in sym.h and |
symconst.h. |
Copyright 2001, 2002, 2003, 2004, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/external.h |
---|
1,6 → 1,6 |
/* external.h -- External COFF structures |
Copyright 2001, 2006, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/go32exe.h |
---|
1,6 → 1,6 |
/* COFF information for PC running go32. |
Copyright 2001, 2005, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/h8300.h |
---|
1,6 → 1,6 |
/* coff information for Renesas H8/300 and H8/300-H |
Copyright 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/h8500.h |
---|
1,6 → 1,6 |
/* coff information for Renesas H8/500 |
Copyright 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/i386.h |
---|
1,6 → 1,6 |
/* coff information for Intel 386/486. |
Copyright 2001, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/i860.h |
---|
1,6 → 1,6 |
/* COFF information for the Intel i860. |
Copyright 2001, 2003, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/i960.h |
---|
1,6 → 1,6 |
/* coff information for 80960. Origins: Intel corp, natch. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/ia64.h |
---|
1,6 → 1,6 |
/* coff information for HP/Intel IA-64. |
Copyright 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/internal.h |
---|
1,8 → 1,7 |
/* Internal format of COFF object file data structures, for GNU BFD. |
This file is part of BFD, the Binary File Descriptor library. |
Copyright 1999, 2000, 2001, 2002, 2003, 2004. 2005, 2006, 2007, 2009, |
2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
74,7 → 73,7 |
/* Standard coff internal info. */ |
unsigned short f_magic; /* magic number */ |
unsigned short f_nscns; /* number of sections */ |
unsigned int f_nscns; /* number of sections */ |
long f_timdat; /* time & date stamp */ |
bfd_vma f_symptr; /* file pointer to symtab */ |
long f_nsyms; /* number of symtab entries */ |
133,6 → 132,44 |
/* DataDirectory[15] is currently reserved, so no define. */ |
#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16 |
/* Extra structure used in debug directory. */ |
struct internal_IMAGE_DEBUG_DIRECTORY |
{ |
unsigned long Characteristics; |
unsigned long TimeDateStamp; |
unsigned short MajorVersion; |
unsigned short MinorVersion; |
unsigned long Type; |
unsigned long SizeOfData; |
unsigned long AddressOfRawData; |
unsigned long PointerToRawData; |
}; |
#define PE_IMAGE_DEBUG_TYPE_UNKNOWN 0 |
#define PE_IMAGE_DEBUG_TYPE_COFF 1 |
#define PE_IMAGE_DEBUG_TYPE_CODEVIEW 2 |
#define PE_IMAGE_DEBUG_TYPE_FPO 3 |
#define PE_IMAGE_DEBUG_TYPE_MISC 4 |
#define PE_IMAGE_DEBUG_TYPE_EXCEPTION 5 |
#define PE_IMAGE_DEBUG_TYPE_FIXUP 6 |
#define PE_IMAGE_DEBUG_TYPE_OMAP_TO_SRC 7 |
#define PE_IMAGE_DEBUG_TYPE_OMAP_FROM_SRC 8 |
#define PE_IMAGE_DEBUG_TYPE_BORLAND 9 |
#define PE_IMAGE_DEBUG_TYPE_RESERVED10 10 |
#define PE_IMAGE_DEBUG_TYPE_CLSID 11 |
/* Extra structure for a codeview debug record */ |
#define CV_INFO_SIGNATURE_LENGTH 16 |
typedef struct _CODEVIEW_INFO |
{ |
unsigned long CVSignature; |
char Signature[CV_INFO_SIGNATURE_LENGTH]; |
unsigned int SignatureLength; |
unsigned long Age; |
// char PdbFileName[]; |
} CODEVIEW_INFO; |
/* Default image base for NT. */ |
#define NT_EXE_IMAGE_BASE 0x400000 |
#define NT_DLL_IMAGE_BASE 0x10000000 |
153,17 → 190,17 |
/* FIXME: The following entries are in AOUTHDR. But they aren't |
available internally in bfd. We add them here so that objdump |
can dump them. */ |
/* The state of the image file */ |
/* The state of the image file. */ |
short Magic; |
/* Linker major version number */ |
/* Linker major version number. */ |
char MajorLinkerVersion; |
/* Linker minor version number */ |
/* Linker minor version number. */ |
char MinorLinkerVersion; |
/* Total size of all code sections */ |
/* Total size of all code sections. */ |
long SizeOfCode; |
/* Total size of all initialized data sections */ |
/* Total size of all initialized data sections. */ |
long SizeOfInitializedData; |
/* Total size of all uninitialized data sections */ |
/* Total size of all uninitialized data sections. */ |
long SizeOfUninitializedData; |
/* Address of entry point relative to image base. */ |
bfd_vma AddressOfEntryPoint; |
173,38 → 210,38 |
bfd_vma BaseOfData; |
/* PE stuff */ |
bfd_vma ImageBase; /* address of specific location in memory that |
file is located, NT default 0x10000 */ |
bfd_vma ImageBase; /* Address of specific location in memory that |
file is located, NT default 0x10000. */ |
bfd_vma SectionAlignment; /* section alignment default 0x1000 */ |
bfd_vma FileAlignment; /* file alignment default 0x200 */ |
short MajorOperatingSystemVersion; /* minimum version of the operating */ |
short MinorOperatingSystemVersion; /* system req'd for exe, default to 1*/ |
short MajorImageVersion; /* user defineable field to store version of */ |
short MinorImageVersion; /* exe or dll being created, default to 0 */ |
short MajorSubsystemVersion; /* minimum subsystem version required to */ |
short MinorSubsystemVersion; /* run exe; default to 3.1 */ |
long Reserved1; /* seems to be 0 */ |
long SizeOfImage; /* size of memory to allocate for prog */ |
long SizeOfHeaders; /* size of PE header and section table */ |
long CheckSum; /* set to 0 */ |
bfd_vma SectionAlignment; /* Section alignment default 0x1000. */ |
bfd_vma FileAlignment; /* File alignment default 0x200. */ |
short MajorOperatingSystemVersion; /* Minimum version of the operating. */ |
short MinorOperatingSystemVersion; /* System req'd for exe, default to 1. */ |
short MajorImageVersion; /* User defineable field to store version of */ |
short MinorImageVersion; /* exe or dll being created, default to 0. */ |
short MajorSubsystemVersion; /* Minimum subsystem version required to */ |
short MinorSubsystemVersion; /* run exe; default to 3.1. */ |
long Reserved1; /* Seems to be 0. */ |
long SizeOfImage; /* Size of memory to allocate for prog. */ |
long SizeOfHeaders; /* Size of PE header and section table. */ |
long CheckSum; /* Set to 0. */ |
short Subsystem; |
/* type of subsystem exe uses for user interface, |
/* Type of subsystem exe uses for user interface, |
possible values: |
1 - NATIVE Doesn't require a subsystem |
2 - WINDOWS_GUI runs in Windows GUI subsystem |
3 - WINDOWS_CUI runs in Windows char sub. (console app) |
5 - OS2_CUI runs in OS/2 character subsystem |
7 - POSIX_CUI runs in Posix character subsystem */ |
unsigned short DllCharacteristics; /* flags for DLL init */ |
bfd_vma SizeOfStackReserve; /* amount of memory to reserve */ |
bfd_vma SizeOfStackCommit; /* amount of memory initially committed for |
initial thread's stack, default is 0x1000 */ |
bfd_vma SizeOfHeapReserve; /* amount of virtual memory to reserve and */ |
bfd_vma SizeOfHeapCommit; /* commit, don't know what to defaut it to */ |
long LoaderFlags; /* can probably set to 0 */ |
long NumberOfRvaAndSizes; /* number of entries in next entry, 16 */ |
7 - POSIX_CUI runs in Posix character subsystem. */ |
unsigned short DllCharacteristics; /* flags for DLL init. */ |
bfd_vma SizeOfStackReserve; /* Amount of memory to reserve. */ |
bfd_vma SizeOfStackCommit; /* Amount of memory initially committed for |
initial thread's stack, default is 0x1000. */ |
bfd_vma SizeOfHeapReserve; /* Amount of virtual memory to reserve and */ |
bfd_vma SizeOfHeapCommit; /* commit, don't know what to defaut it to. */ |
long LoaderFlags; /* Can probably set to 0. */ |
long NumberOfRvaAndSizes; /* Number of entries in next entry, 16. */ |
IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; |
}; |
551,7 → 588,11 |
union |
{ |
char x_fname[FILNMLEN]; |
/* PR 17754: We use to FILNMLEN for the size of the x_fname |
array, but that cause problems as PE targets use a larger |
value. We cannot use their definition of EFILNMLEN as this |
header can be used without including any PE headers. */ |
char x_fname[20]; |
struct |
{ |
long x_zeroes; |
/contrib/toolchain/binutils/include/coff/m68k.h |
---|
1,6 → 1,6 |
/* coff information for M68K |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/m88k.h |
---|
1,6 → 1,6 |
/* coff information for 88k bcs |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/mcore.h |
---|
1,5 → 1,5 |
/* Motorola MCore support for BFD. |
Copyright 1999, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/coff/mips.h |
---|
1,7 → 1,7 |
/* ECOFF support on MIPS machines. |
coff/ecoff.h must be included before this file. |
Copyright 1999, 2004, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/mipspe.h |
---|
1,6 → 1,6 |
/* coff information for Windows CE with MIPS VR4111 |
Copyright 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/pe.h |
---|
1,7 → 1,6 |
/* pe.h - PE COFF header information |
Copyright 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
41,6 → 40,7 |
/* DllCharacteristics flag bits. The inconsistent naming may seem |
odd, but that is how they are defined in the PE specification. */ |
#define IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA 0x0020 |
#define IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE 0x0040 |
#define IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY 0x0080 |
#define IMAGE_DLL_CHARACTERISTICS_NX_COMPAT 0x0100 |
102,7 → 102,7 |
#define IMAGE_SCN_ALIGN_4096BYTES IMAGE_SCN_ALIGN_POWER_CONST (12) |
#define IMAGE_SCN_ALIGN_8192BYTES IMAGE_SCN_ALIGN_POWER_CONST (13) |
/* Encode alignment power into IMAGE_SCN_ALIGN bits of s_flags */ |
/* Encode alignment power into IMAGE_SCN_ALIGN bits of s_flags. */ |
#define COFF_ENCODE_ALIGNMENT(SECTION, ALIGNMENT_POWER) \ |
((SECTION).s_flags |= IMAGE_SCN_ALIGN_POWER_CONST ((ALIGNMENT_POWER))) |
201,7 → 201,7 |
struct external_PEI_IMAGE_hdr |
{ |
char nt_signature[4]; /* required NT signature, 0x4550. */ |
char nt_signature[4]; /* Required NT signature, 0x4550. */ |
/* From standard header. */ |
char f_magic[2]; /* Magic number. */ |
240,7 → 240,7 |
/* Note: additional bytes may be inserted before the signature. Use |
the e_lfanew field to find the actual location of the NT signature. */ |
char nt_signature[4]; /* required NT signature, 0x4550. */ |
char nt_signature[4]; /* Required NT signature, 0x4550. */ |
/* From standard header. */ |
char f_magic[2]; /* Magic number. */ |
359,6 → 359,85 |
#define IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2 |
#define IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3 |
/* Bigobj header. */ |
struct external_ANON_OBJECT_HEADER_BIGOBJ |
{ |
/* ANON_OBJECT_HEADER_V2 header. */ |
char Sig1[2]; |
char Sig2[2]; |
char Version[2]; |
char Machine[2]; |
char TimeDateStamp[4]; |
char ClassID[16]; |
char SizeOfData[4]; |
char Flags[4]; |
char MetaDataSize[4]; |
char MetaDataOffset[4]; |
/* BIGOBJ specific. */ |
char NumberOfSections[4]; |
char PointerToSymbolTable[4]; |
char NumberOfSymbols[4]; |
}; |
#define FILHSZ_BIGOBJ (14 * 4) |
struct external_SYMBOL_EX |
{ |
union |
{ |
char e_name[E_SYMNMLEN]; |
struct |
{ |
char e_zeroes[4]; |
char e_offset[4]; |
} e; |
} e; |
char e_value[4]; |
char e_scnum[4]; |
char e_type[2]; |
char e_sclass[1]; |
char e_numaux[1]; |
} ATTRIBUTE_PACKED ; |
#define SYMENT_BIGOBJ struct external_SYMBOL_EX |
#define SYMESZ_BIGOBJ 20 |
#define FILNMLEN_BIGOBJ 20 |
union external_AUX_SYMBOL_EX |
{ |
struct |
{ |
char WeakDefaultSymIndex[4]; |
char WeakSearchType[4]; |
char rgbReserved[12]; |
} Sym; |
struct |
{ |
char Name[FILNMLEN_BIGOBJ]; |
} File; |
struct |
{ |
char Length[4]; /* Section length. */ |
char NumberOfRelocations[2];/* # relocation entries. */ |
char NumberOfLinenumbers[2];/* # line numbers. */ |
char Checksum[4]; /* Section COMDAT checksum. */ |
char Number[2]; /* COMDAT associated section index. */ |
char Selection[1]; /* COMDAT selection number. */ |
char bReserved[1]; |
char HighNumber[2]; /* High bits of COMDAT associated sec. */ |
char rgbReserved[2]; |
} Section; |
} ATTRIBUTE_PACKED; |
#define AUXENT_BIGOBJ union external_AUX_SYMBOL_EX |
#define AUXESZ_BIGOBJ 20 |
/* .pdata/.xdata defines and structures for x64 PE+ for exception handling. */ |
/* .pdata in exception directory. */ |
368,7 → 447,6 |
bfd_vma rva_BeginAddress; |
bfd_vma rva_EndAddress; |
bfd_vma rva_UnwindData; |
unsigned int isChained : 1; |
}; |
struct external_pex64_runtime_function |
393,8 → 471,10 |
#define UWOP_SET_FPREG 3 |
#define UWOP_SAVE_NONVOL 4 |
#define UWOP_SAVE_NONVOL_FAR 5 |
#define UWOP_SAVE_XMM 6 |
#define UWOP_SAVE_XMM_FAR 7 |
#define UWOP_SAVE_XMM 6 /* For version 1. */ |
#define UWOP_EPILOG 6 /* For version 2. */ |
#define UWOP_SAVE_XMM_FAR 7 /* For version 1 (deprecated). */ |
#define UWOP_SPARE 7 /* For version 2. */ |
#define UWOP_SAVE_XMM128 8 |
#define UWOP_SAVE_XMM128_FAR 9 |
#define UWOP_PUSH_MACHFRAME 10 |
441,14 → 521,10 |
bfd_vma FrameOffset; |
bfd_vma sizeofUnwindCodes; |
bfd_byte *rawUnwindCodes; |
/* Valid for UNW_FLAG_EHANDLER and UNW_FLAG_UHANDLER. */ |
bfd_vma CountOfScopes; |
bfd_byte *rawScopeEntries; |
bfd_vma rva_ExceptionHandler; /* UNW_EHANDLER. */ |
bfd_vma rva_TerminationHandler; /* UNW_FLAG_UHANDLER. */ |
bfd_vma rva_FrameHandler; /* UNW_FLAG_FHANDLER. */ |
bfd_vma FrameHandlerArgument; /* UNW_FLAG_FHANDLER. */ |
bfd_vma rva_FunctionEntry; /* UNW_FLAG_CHAININFO. */ |
bfd_vma rva_ExceptionHandler; /* UNW_EHANDLER or UNW_FLAG_UHANDLER. */ |
bfd_vma rva_BeginAddress; /* UNW_FLAG_CHAININFO. */ |
bfd_vma rva_EndAddress; /* UNW_FLAG_CHAININFO. */ |
bfd_vma rva_UnwindData; /* UNW_FLAG_CHAININFO. */ |
}; |
struct external_pex64_unwind_info |
509,4 → 585,42 |
(PEX64_OFFSET_TO_SCOPE_COUNT(COUNTOFUNWINDCODES) + \ |
PEX64_SCOPE_ENTRY_SIZE * (IDX)) |
/* Extra structure used in debug directory. */ |
struct external_IMAGE_DEBUG_DIRECTORY |
{ |
char Characteristics[4]; |
char TimeDateStamp[4]; |
char MajorVersion[2]; |
char MinorVersion[2]; |
char Type[4]; |
char SizeOfData[4]; |
char AddressOfRawData[4]; |
char PointerToRawData[4]; |
}; |
/* Extra structures used in codeview debug record. */ |
/* This is not part of the PE specification. */ |
#define CVINFO_PDB70_CVSIGNATURE 0x53445352 // "RSDS" |
#define CVINFO_PDB20_CVSIGNATURE 0x3031424e // "NB10" |
#define CVINFO_CV50_CVSIGNATURE 0x3131424e // "NB11" |
#define CVINFO_CV41_CVSIGNATURE 0x3930424e // âNB09" |
typedef struct _CV_INFO_PDB70 |
{ |
char CvSignature[4]; |
char Signature[16]; |
char Age[4]; |
char PdbFileName[]; |
} CV_INFO_PDB70; |
typedef struct _CV_INFO_PDB20 |
{ |
char CvHeader[4]; |
char Offset[4]; |
char Signature[4]; |
char Age[4]; |
char PdbFileName[]; |
} CV_INFO_PDB20; |
#endif /* _PE_H */ |
/contrib/toolchain/binutils/include/coff/powerpc.h |
---|
1,7 → 1,7 |
/* Basic coff information for the PowerPC |
Based on coff/rs6000.h, coff/i386.h and others. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/rs6000.h |
---|
1,5 → 1,5 |
/* IBM RS/6000 "XCOFF" file definitions for BFD. |
Copyright (C) 1990, 1991, 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 1990-2015 Free Software Foundation, Inc. |
Written by Mimi Phuong-Thao Vo of IBM |
and John Gilmore of Cygnus Support. |
/contrib/toolchain/binutils/include/coff/rs6k64.h |
---|
1,5 → 1,5 |
/* IBM RS/6000 "XCOFF64" file definitions for BFD. |
Copyright (C) 2000, 2001, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/sh.h |
---|
1,6 → 1,6 |
/* coff information for Renesas SH |
Copyright 2000, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/sparc.h |
---|
1,6 → 1,6 |
/* coff information for Sparc. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/ti.h |
---|
2,8 → 2,7 |
customized in a target-specific file, and then this file included (see |
tic54x.h for an example). |
Copyright 2000, 2001, 2002, 2003, 2005, 2008, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/tic30.h |
---|
1,6 → 1,6 |
/* coff information for Texas Instruments TMS320C3X |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/tic4x.h |
---|
1,7 → 1,7 |
/* TI COFF information for Texas Instruments TMS320C4X/C3X. |
This file customizes the settings in coff/ti.h. |
Copyright 2002, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/tic54x.h |
---|
1,7 → 1,7 |
/* TI COFF information for Texas Instruments TMS320C54X. |
This file customizes the settings in coff/ti.h. |
Copyright 2000, 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/tic80.h |
---|
1,6 → 1,6 |
/* coff information for TI TMS320C80 (MVP) |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/w65.h |
---|
1,6 → 1,6 |
/* coff information for WDC 65816 |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/we32k.h |
---|
1,6 → 1,6 |
/* coff information for we32k |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/coff/x86_64.h |
---|
1,5 → 1,5 |
/* COFF information for AMD 64. |
Copyright 2006, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/coff/xcoff.h |
---|
1,7 → 1,6 |
/* Internal format of XCOFF object file data structures for BFD. |
Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, |
2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1995-2015 Free Software Foundation, Inc. |
Written by Ian Lance Taylor <ian@cygnus.com>, Cygnus Support. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/coff/z80.h |
---|
1,5 → 1,5 |
/* coff information for Zilog Z80 |
Copyright 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
Contributed by Arnold Metselaar <arnold_m@operamail.com> |
This program is free software; you can redistribute it and/or modify |
/contrib/toolchain/binutils/include/coff/z8k.h |
---|
1,6 → 1,6 |
/* coff information for Zilog Z800N |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/demangle.h |
---|
1,6 → 1,5 |
/* Defs for interface to demanglers. |
Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, |
2003, 2004, 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1992-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or |
modify it under the terms of the GNU Library General Public License |
63,9 → 62,10 |
#define DMGL_EDG (1 << 13) |
#define DMGL_GNU_V3 (1 << 14) |
#define DMGL_GNAT (1 << 15) |
#define DMGL_DLANG (1 << 16) |
/* If none of these are set, use 'current_demangling_style' as the default. */ |
#define DMGL_STYLE_MASK (DMGL_AUTO|DMGL_GNU|DMGL_LUCID|DMGL_ARM|DMGL_HP|DMGL_EDG|DMGL_GNU_V3|DMGL_JAVA|DMGL_GNAT) |
#define DMGL_STYLE_MASK (DMGL_AUTO|DMGL_GNU|DMGL_LUCID|DMGL_ARM|DMGL_HP|DMGL_EDG|DMGL_GNU_V3|DMGL_JAVA|DMGL_GNAT|DMGL_DLANG) |
/* Enumeration of possible demangling styles. |
87,7 → 87,8 |
edg_demangling = DMGL_EDG, |
gnu_v3_demangling = DMGL_GNU_V3, |
java_demangling = DMGL_JAVA, |
gnat_demangling = DMGL_GNAT |
gnat_demangling = DMGL_GNAT, |
dlang_demangling = DMGL_DLANG |
} current_demangling_style; |
/* Define string names for the various demangling styles. */ |
102,6 → 103,7 |
#define GNU_V3_DEMANGLING_STYLE_STRING "gnu-v3" |
#define JAVA_DEMANGLING_STYLE_STRING "java" |
#define GNAT_DEMANGLING_STYLE_STRING "gnat" |
#define DLANG_DEMANGLING_STYLE_STRING "dlang" |
/* Some macros to test what demangling style is active. */ |
115,6 → 117,7 |
#define GNU_V3_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_GNU_V3) |
#define JAVA_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_JAVA) |
#define GNAT_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_GNAT) |
#define DLANG_DEMANGLING (((int) CURRENT_DEMANGLING_STYLE) & DMGL_DLANG) |
/* Provide information about the available demangle styles. This code is |
pulled from gdb into libiberty because it is useful to binutils also. */ |
169,10 → 172,17 |
char * |
ada_demangle (const char *mangled, int options); |
extern char * |
dlang_demangle (const char *mangled, int options); |
enum gnu_v3_ctor_kinds { |
gnu_v3_complete_object_ctor = 1, |
gnu_v3_base_object_ctor, |
gnu_v3_complete_object_allocating_ctor, |
/* These are not part of the V3 ABI. Unified constructors are generated |
as a speed-for-space optimization when the -fdeclone-ctor-dtor option |
is used, and are always internal symbols. */ |
gnu_v3_unified_ctor, |
gnu_v3_object_ctor_group |
}; |
188,6 → 198,10 |
gnu_v3_deleting_dtor = 1, |
gnu_v3_complete_object_dtor, |
gnu_v3_base_object_dtor, |
/* These are not part of the V3 ABI. Unified destructors are generated |
as a speed-for-space optimization when the -fdeclone-ctor-dtor option |
is used, and are always internal symbols. */ |
gnu_v3_unified_dtor, |
gnu_v3_object_dtor_group |
}; |
/contrib/toolchain/binutils/include/dis-asm.h |
---|
1,7 → 1,6 |
/* Interface between the opcode library and its callers. |
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010, |
2011, 2012 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
213,6 → 212,14 |
/* Command line options specific to the target disassembler. */ |
char * disassembler_options; |
/* If non-zero then try not disassemble beyond this address, even if |
there are values left in the buffer. This address is the address |
of the nearest symbol forwards from the start of the disassembly, |
and it is assumed that it lies on the boundary between instructions. |
If an instruction spans this address then this is an error in the |
file being disassembled. */ |
bfd_vma stop_vma; |
} disassemble_info; |
227,7 → 234,6 |
extern int print_insn_big_arm (bfd_vma, disassemble_info *); |
extern int print_insn_big_mips (bfd_vma, disassemble_info *); |
extern int print_insn_big_nios2 (bfd_vma, disassemble_info *); |
extern int print_insn_big_or32 (bfd_vma, disassemble_info *); |
extern int print_insn_big_powerpc (bfd_vma, disassemble_info *); |
extern int print_insn_big_score (bfd_vma, disassemble_info *); |
extern int print_insn_cr16 (bfd_vma, disassemble_info *); |
238,6 → 244,7 |
extern int print_insn_epiphany (bfd_vma, disassemble_info *); |
extern int print_insn_fr30 (bfd_vma, disassemble_info *); |
extern int print_insn_frv (bfd_vma, disassemble_info *); |
extern int print_insn_ft32 (bfd_vma, disassemble_info *); |
extern int print_insn_h8300 (bfd_vma, disassemble_info *); |
extern int print_insn_h8300h (bfd_vma, disassemble_info *); |
extern int print_insn_h8300s (bfd_vma, disassemble_info *); |
255,7 → 262,6 |
extern int print_insn_little_arm (bfd_vma, disassemble_info *); |
extern int print_insn_little_mips (bfd_vma, disassemble_info *); |
extern int print_insn_little_nios2 (bfd_vma, disassemble_info *); |
extern int print_insn_little_or32 (bfd_vma, disassemble_info *); |
extern int print_insn_little_powerpc (bfd_vma, disassemble_info *); |
extern int print_insn_little_score (bfd_vma, disassemble_info *); |
extern int print_insn_lm32 (bfd_vma, disassemble_info *); |
277,8 → 283,9 |
extern int print_insn_moxie (bfd_vma, disassemble_info *); |
extern int print_insn_msp430 (bfd_vma, disassemble_info *); |
extern int print_insn_mt (bfd_vma, disassemble_info *); |
extern int print_insn_nds32 (bfd_vma, disassemble_info *); |
extern int print_insn_ns32k (bfd_vma, disassemble_info *); |
extern int print_insn_openrisc (bfd_vma, disassemble_info *); |
extern int print_insn_or1k (bfd_vma, disassemble_info *); |
extern int print_insn_pdp11 (bfd_vma, disassemble_info *); |
extern int print_insn_pj (bfd_vma, disassemble_info *); |
extern int print_insn_rs6000 (bfd_vma, disassemble_info *); |
297,6 → 304,7 |
extern int print_insn_tilepro (bfd_vma, disassemble_info *); |
extern int print_insn_v850 (bfd_vma, disassemble_info *); |
extern int print_insn_vax (bfd_vma, disassemble_info *); |
extern int print_insn_visium (bfd_vma, disassemble_info *); |
extern int print_insn_w65 (bfd_vma, disassemble_info *); |
extern int print_insn_xc16x (bfd_vma, disassemble_info *); |
extern int print_insn_xgate (bfd_vma, disassemble_info *); |
307,9 → 315,13 |
extern int print_insn_z8002 (bfd_vma, disassemble_info *); |
extern int print_insn_rx (bfd_vma, disassemble_info *); |
extern int print_insn_rl78 (bfd_vma, disassemble_info *); |
extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *); |
extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *); |
extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *); |
extern disassembler_ftype arc_get_disassembler (void *); |
extern disassembler_ftype arc_get_disassembler (bfd *); |
extern disassembler_ftype cris_get_disassembler (bfd *); |
extern disassembler_ftype rl78_get_disassembler (bfd *); |
extern void print_aarch64_disassembler_options (FILE *); |
extern void print_i386_disassembler_options (FILE *); |
/contrib/toolchain/binutils/include/dwarf2.def |
---|
1,9 → 1,7 |
/* -*- c -*- |
Declarations and definitions of codes relating to the DWARF2 and |
DWARF3 symbolic debugging information formats. |
Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002, |
2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 1992-2015 Free Software Foundation, Inc. |
Written by Gary Funck (gary@intrepid.com) The Ada Joint Program |
Office (AJPO), Florida State University and Silicon Graphics Inc. |
133,6 → 131,8 |
DW_TAG (DW_TAG_type_unit, 0x41) |
DW_TAG (DW_TAG_rvalue_reference_type, 0x42) |
DW_TAG (DW_TAG_template_alias, 0x43) |
/* DWARF 5. */ |
DW_TAG (DW_TAG_atomic_type, 0x47) |
DW_TAG_DUP (DW_TAG_lo_user, 0x4080) |
DW_TAG_DUP (DW_TAG_hi_user, 0xffff) |
308,6 → 308,8 |
DW_AT (DW_AT_const_expr, 0x6c) |
DW_AT (DW_AT_enum_class, 0x6d) |
DW_AT (DW_AT_linkage_name, 0x6e) |
/* DWARF 5. */ |
DW_AT (DW_AT_noreturn, 0x87) |
DW_AT_DUP (DW_AT_lo_user, 0x2000) /* Implementation-defined range start. */ |
DW_AT_DUP (DW_AT_hi_user, 0x3fff) /* Implementation-defined range end. */ |
383,6 → 385,8 |
DW_AT (DW_AT_GNU_all_source_call_sites, 0x2118) |
/* Section offset into .debug_macro section. */ |
DW_AT (DW_AT_GNU_macros, 0x2119) |
/* Attribute for C++ deleted special member functions (= delete;). */ |
DW_AT (DW_AT_GNU_deleted, 0x211a) |
/* Extensions for Fission. See http://gcc.gnu.org/wiki/DebugFission. */ |
DW_AT (DW_AT_GNU_dwo_name, 0x2130) |
DW_AT (DW_AT_GNU_dwo_id, 0x2131) |
400,6 → 404,13 |
See http://gcc.gnu.org/wiki/DW_AT_GNAT_descriptive_type . */ |
DW_AT (DW_AT_use_GNAT_descriptive_type, 0x2301) |
DW_AT (DW_AT_GNAT_descriptive_type, 0x2302) |
/* Rational constant extension. |
See https://gcc.gnu.org/wiki/DW_AT_GNU_numerator_denominator . */ |
DW_TAG (DW_AT_GNU_numerator, 0x2303) |
DW_TAG (DW_AT_GNU_denominator, 0x2304) |
/* Biased integer extension. |
See https://gcc.gnu.org/wiki/DW_AT_GNU_bias . */ |
DW_TAG (DW_AT_GNU_bias, 0x2305) |
/* UPC extension. */ |
DW_AT (DW_AT_upc_threads_scaled, 0x3210) |
/* PGI (STMicroelectronics) extensions. */ |
406,6 → 417,20 |
DW_AT (DW_AT_PGI_lbase, 0x3a00) |
DW_AT (DW_AT_PGI_soffset, 0x3a01) |
DW_AT (DW_AT_PGI_lstride, 0x3a02) |
/* Apple extensions. */ |
DW_AT (DW_AT_APPLE_optimized, 0x3fe1) |
DW_AT (DW_AT_APPLE_flags, 0x3fe2) |
DW_AT (DW_AT_APPLE_isa, 0x3fe3) |
DW_AT (DW_AT_APPLE_block, 0x3fe4) |
DW_AT (DW_AT_APPLE_major_runtime_vers, 0x3fe5) |
DW_AT (DW_AT_APPLE_runtime_class, 0x3fe6) |
DW_AT (DW_AT_APPLE_omit_frame_ptr, 0x3fe7) |
DW_AT (DW_AT_APPLE_property_name, 0x3fe8) |
DW_AT (DW_AT_APPLE_property_getter, 0x3fe9) |
DW_AT (DW_AT_APPLE_property_setter, 0x3fea) |
DW_AT (DW_AT_APPLE_property_attribute, 0x3feb) |
DW_AT (DW_AT_APPLE_objc_complete_type, 0x3fec) |
DW_AT (DW_AT_APPLE_property, 0x3fed) |
DW_END_AT |
DW_FIRST_OP (DW_OP_addr, 0x03) |
/contrib/toolchain/binutils/include/dwarf2.h |
---|
1,8 → 1,6 |
/* Declarations and definitions of codes relating to the DWARF2 and |
DWARF3 symbolic debugging information formats. |
Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002, |
2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 1992-2015 Free Software Foundation, Inc. |
Written by Gary Funck (gary@intrepid.com) The Ada Joint Program |
Office (AJPO), Florida State University and Silicon Graphics Inc. |
309,6 → 307,12 |
/* DWARF 5. */ |
DW_LANG_Go = 0x0016, |
DW_LANG_C_plus_plus_11 = 0x001a, /* dwarf5.20141029.pdf DRAFT */ |
DW_LANG_C11 = 0x001d, |
DW_LANG_C_plus_plus_14 = 0x0021, |
DW_LANG_Fortran03 = 0x0022, |
DW_LANG_Fortran08 = 0x0023, |
DW_LANG_lo_user = 0x8000, /* Implementation-defined range start. */ |
DW_LANG_hi_user = 0xffff, /* Implementation-defined range start. */ |
/contrib/toolchain/binutils/include/dyn-string.h |
---|
1,6 → 1,5 |
/* An abstract string datatype. |
Copyright (C) 1998, 1999, 2000, 2002, 2004, 2005, 2009 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by Mark Mitchell (mark@markmitchell.com). |
This file is part of GCC. |
/contrib/toolchain/binutils/include/elf/ChangeLog |
---|
1,11 → 1,305 |
2015-12-10 Alan Modra <amodra@gmail.com> |
Apply from master. |
2015-12-07 Alan Modra <amodra@gmail.com> |
* ppc64.h (R_PPC64_ENTRY): Define. |
2015-11-11 Alan Modra <amodra@gmail.com> |
Peter Bergner <bergner@vnet.ibm.com> |
* ppc.h (R_PPC_REL16DX_HA): New reloction. |
* ppc64.h (R_PPC64_REL16DX_HA): Likewise. |
2015-10-28 Cupertino Miranda <cmiranda@synopsys.com> |
* arc-reloc.def (ARC_32_PCREL): New definition. |
(ARC_TLS_DTPOFF): Arrange it in order. |
2015-10-27 Stephen Fisher <sfisher@panix.com> |
* common.h (NT_NETBSD_MARCH): Define. |
2015-10-22 H.J. Lu <hongjiu.lu@intel.com> |
* x86-64.h (R_X86_64_GOTPCRELX): New. |
(R_X86_64_REX_GOTPCRELX): Likewise. |
2015-10-22 H.J. Lu <hongjiu.lu@intel.com> |
* i386.h (R_386_GOT32X): New relocation. |
2015-10-07 Cupertino Miranda <cmiranda@synopsys.com> |
* arc-reloc.def: Macro file with definition of all relocation |
types. |
* arc.h: Changed macros for the newly supported ARC cpus. Altered |
enum defining the supported relocations. |
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added |
macro for EM_ARC_COMPACT2. |
2015-09-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
* common.h (DF_1_STUB, DF_1_PIE): Define. |
2015-09-21 H.J. Lu <hongjiu.lu@intel.com> |
* external.h (Elf64_External_Chdr): Change ch_type to 4 bytes |
and add ch_reserved. |
2015-08-11 Jiong Wang <jiong.wang@arm.com> |
* aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. |
2015-08-11 Jiong Wang <jiong.wang@arm.com> |
* aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define. |
2015-08-11 Jiong Wang <jiong.wang@arm.com> |
* aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define. |
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> |
Cesar Philippidis <cesar@codesourcery.com> |
* nios2.h (R_NIOS2_R2_S12): New. |
(R_NIOS2_R2_I10_1_PCREL): New. |
(R_NIOS2_R2_T1I7_1_PCREL): New. |
(R_NIOS2_R2_T1I7_2): New. |
(R_NIOS2_R2_T2I4): New. |
(R_NIOS2_R2_T2I4_1): New. |
(R_NIOS2_R2_T2I4_2): New. |
(R_NIOS2_R2_X1I7_2): New. |
(R_NIOS2_R2_X2L5): New. |
(R_NIOS2_R2_F1I5_2): New. |
(R_NIOS2_R2_L5I4X1): New. |
(R_NIOS2_R2_T1X1I6): New. |
(R_NIOS2_R2_T1X1I6_2): New. |
(R_NIOS2_ILLEGAL): Renumber. |
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> |
Cesar Philippidis <cesar@codesourcery.com> |
* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. |
2015-05-29 Roland McGrath <mcgrathr@google.com> |
* common.h (GNU_ABI_TAG_SYLLABLE): New macro. |
(GNU_ABI_TAG_NACL): New macro. |
2015-05-11 H.J. Lu <hongjiu.lu@intel.com> |
* common.h (EM_486): Renamed to ... |
(EM_IAMCU): This. |
2015-04-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
* s390.h: Define Tag_GNU_S390_ABI_Vector. |
2015-04-24 Alan Modra <amodra@gmail.com> |
* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and |
similar segments only contain alloc sections. |
2015-04-24 H.J. Lu <hongjiu.lu@intel.com> |
PR binutils/18316 |
* mep.h (SEC_MEP_VLIW): Removed. |
2015-04-09 Nick Clifton <nickc@redhat.com> |
* rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field. |
(E_FLAG_RX_SINSNS_YES): Likewise. |
(E_FLAG_RX_SINSNS_MASK): New define. |
2015-04-03 H.J. Lu <hongjiu.lu@intel.com> |
* external.h (Elf32_External_Chdr): New. |
(Elf64_External_Chdr): Likewise. |
* internal.h (Elf_Internal_Chdr): Likewise. |
2015-03-26 H.J. Lu <hongjiu.lu@intel.com> |
* common.h (ELFOSABI_CLOUDABI): New. |
(SHF_COMPRESSED): Likewise. |
(ELFCOMPRESS_ZLIB): Likewise. |
(ELFCOMPRESS_LOOS): Likewise. |
(ELFCOMPRESS_HIOS): Likewise. |
(ELFCOMPRESS_LOPROC): Likewise. |
(ELFCOMPRESS_HIPROC): Likewise. |
2015-03-19 Nick Clifton <nickc@redhat.com> |
* rl78.h (E_FLAG_RL78_G10): Redefine. |
(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13 |
E_FLAG_RL78_G14): New flags. |
2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com> |
* aarch64.h (R_AARCH64_P32_TLSGD_ADR_PREL21): Add. |
2015-02-24 Nick Clifton <nickc@redhat.com> |
* v850.h (EF_RH850_SIMD): Delete deprecated flag. |
(EF_RH850_CACHE): Likewise. |
(EF_RH850_MMU): Likewise. |
(EF_RH850_DATA_ALIGN8): Likewise. |
(SHT_RENESAS_IOP): Fix typo in name. |
(SHT_RENESAS_INFO): Define. |
(V850_NOTE_SECNAME): Define. |
(SIZEOF_V850_NOTE): Define. |
(V850_NOTE_NAME): Define. |
(enum v850_notes): New enum. |
(NUM_V850_NOTES): Define. |
2015-02-23 Nick Clifton <nickc@redhat.com> |
PR 17915 |
* score.h: Fix typo in license header. |
2015-02-20 Andreas Arnez <arnez@linux.vnet.ibm.com> |
* common.h (NT_S390_VXRS_LOW): New macro. |
(NT_S390_VXRS_HIGH): Likewise. |
2015-01-28 James Bowman <james.bowman@ftdichip.com> |
* common.h (EM_FT32): Define. |
* ft32.h: New file. |
2015-01-09 Anthony Green <green@moxielogic.com> |
* common.h (EM_MOXIE): Redefine to official number. |
(EM_MOXIE_OLD): Define (from old number). |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> |
* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum values. |
2014-12-06 Eric Botcazou <ebotcazou@adacore.com> |
* common.h (EM_VISIUM): Define. |
* visium.h: New file. |
2014-11-13 H.J. Lu <hongjiu.lu@intel.com> |
* x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete. |
2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> |
* sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved. |
2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> |
* sparc.h (Tag_GNU_Sparc_HWCAPS2): New object attribute. |
(ELF_SPARC_HWCAP2_FJATHPLUS): New HWCAP2 bitmask value. |
(ELF_SPARC_HWCAP2_VIS3B): Likewise. |
(ELF_SPARC_HWCAP2_ADP): Likewise. |
(ELF_SPARC_HWCAP2_SPARC5): Likewise. |
(ELF_SPARC_HWCAP2_MWAIT): Likewise. |
(ELF_SPARC_HWCAP2_XMPMUL): Likewise. |
(ELF_SPARC_HWCAP2_XMONT): Likewise. |
(ELF_SPARC_HWCAP2_NSEC): Likewise. |
(ELF_SPARC_HWCAP2_FJATHHPC): Likewise. |
(ELF_SPARC_HWCAP2_FJDES): Likewise. |
(ELF_SPARC_HWCAP2_FJAES): Likewise. |
2014-10-08 Will Newton <will.newton@linaro.org> |
* aarch64.h: Sync up relocations with ABI release 1.0. |
2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
* nds32.h: Declare new relocations. |
2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com> |
Matthew Fortune <matthew.fortune@imgtec.com> |
* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, |
R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. |
(E_MIPS_ARCH_32R6): New define. |
(E_MIPS_ARCH_64R6): New define. |
2014-08-26 DJ Delorie <dj@redhat.com> |
* rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits |
2014-07-07 Barney Stratford <barney_stratford@fastmail.fm> |
* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6. |
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm> |
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
Pitchumani Sivanupandi <pitchumani.s@atmel.com> |
Soundararajan <Sounderarajan.D@atmel.com> |
* avr.h (E_AVR_MACH_AVRTINY): Define avrtiny machine number. |
(R_AVR_LDS_STS_16): Define 16 bit lds/sts reloc number. |
* include/opcode/avr.h (AVR_ISA_TINY): Define avrtiny specific ISA. |
(AVR_ISA_2xxxa): Define ISA without LPM. |
(AVR_ISA_AVRTINY): Define avrtiny arch ISA. |
Add doc for contraint used in 16 bit lds/sts. |
Adjust ISA group for icall, ijmp, pop and push. |
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. |
2014-04-22 Christian Svensson <blue@cmd.nu> |
* common.h: Remove openrisc and or32 support. Add support for or1k. |
* or1k.h: New file. |
* openrisc.h: Delete. |
* or32.h: Delete. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2014-03-05 Alan Modra <amodra@gmail.com> |
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. |
2014-02-06 Andrew Pinski <apinski@cavium.com> |
* mips.h (E_MIPS_MACH_OCTEON3): New machine flag. |
2014-02-03 Sandra Loosemore <sandra@codesourcery.com> |
* nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New. |
(R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New. |
(R_NIOS2_ILLEGAL): Adjust. |
2014-01-30 Sandra Loosemore <sandra@codesourcery.com> |
* nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT. |
2014-01-30 Ulrich Weigand <uweigand@de.ibm.com> |
* common.h (AT_HWCAP2): Define. |
2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
Wei-Cheng Wang <cole945@gmail.com> |
* nds32.h: New file for Andes NDS32. |
2013-12-07 Mike Frysinger <vapier@gentoo.org> |
* epiphany.h: Remove +x file mode. |
2013-11-17 H.J. Lu <hongjiu.lu@intel.com> |
* x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. |
2013-11-15 Alan Modra <amodra@gmail.com> |
2013-11-13 Yufeng Zhang <yufeng.zhang@arm.com> |
Apply changes from mainline to 2.24 |
* aarch64.h: Define R_AARCH64_TLS_DTPMOD64, |
R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard |
R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and |
R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC. |
2013-10-30 Alan Modra <amodra@gmail.com> |
* ppc.h (DT_PPC_TLSOPT): Delete. |
(DT_PPC_OPT, PPC_OPT_TLS): Define. |
* ppc64.h (DT_PPC64_TLSOPT): Delete. |
12,25 → 306,26 |
(DT_PPC64_OPT, PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC): Define. |
2013-10-30 Alan Modra <amodra@gmail.com> |
* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define. |
(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions. |
(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define. |
2013-10-30 Alan Modra <amodra@gmail.com> |
* ppc64.h (EF_PPC64_ABI): Define. |
2013-10-30 Alan Modra <amodra@gmail.com> |
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, |
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, |
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New. |
(IS_PPC64_TLS_RELOC): Match new tls relocs. |
2013-11-13 Yufeng Zhang <yufeng.zhang@arm.com> |
2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
* aarch64.h: Define R_AARCH64_TLS_DTPMOD64, |
R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard |
R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and |
R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC. |
* mips.h (enum): Add Tag_GNU_MIPS_ABI_MSA. |
(enum): Add Val_GNU_MIPS_ABI_MSA_ANY and Val_GNU_MIPS_ABI_MSA_128. |
2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com> |
1907,7 → 2202,7 |
For older changes see ChangeLog-9103 |
Copyright (C) 2004-2012 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/elf/aarch64.h |
---|
1,6 → 1,6 |
/* AArch64 ELF support for BFD. |
Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Contributed by ARM Ltd. |
This file is part of GNU Binutils. |
124,10 → 124,20 |
RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25) |
RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26) |
RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27) |
RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28) |
RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80) |
RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81) |
RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91) |
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92) |
RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103) |
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104) |
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105) |
269,20 → 279,87 |
/* LD/ST64: (S+A) & 0xff8 */ |
RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286) |
/* Group relocations to create a 16, 32, 48, or 64 bit PC-relative |
offset inline. */ |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292) |
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293) |
/* LD/ST128: (S+A) & 0xff0 */ |
RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299) |
/* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative |
offset inline. */ |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305) |
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306) |
/* GOT-relative data relocations. */ |
RELOC_NUMBER (R_AARCH64_GOTREL64, 307) |
RELOC_NUMBER (R_AARCH64_GOTREL32, 308) |
/* GOT-relative instruction relocations. */ |
RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309) |
RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310) |
RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311) |
RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312) |
RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313) |
/* General Dynamic TLS relocations. */ |
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512) |
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513) |
RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514) |
RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515) |
RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516) |
/* Local Dynamic TLS relocations. */ |
RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517) |
RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518) |
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521) |
RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526) |
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527) |
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528) |
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529) |
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538) |
/* Initial Exec TLS relocations. */ |
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539) |
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540) |
RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541) |
RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542) |
RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543) |
/* Local Exec TLS relocations. */ |
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544) |
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545) |
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546) |
291,7 → 368,17 |
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549) |
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550) |
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559) |
/* TLS descriptor relocations. */ |
RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560) |
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561) |
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562) |
303,6 → 390,11 |
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568) |
RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570) |
RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572) |
RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573) |
/* Dynamic relocations */ |
/* Copy symbol at runtime. */ |
/contrib/toolchain/binutils/include/elf/alpha.h |
---|
1,5 → 1,5 |
/* ALPHA ELF support for BFD. |
Copyright 1996, 1998, 2000, 2001, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
By Eric Youngdale, <eric@aib.com>. No processor supplement available |
for this platform. |
/contrib/toolchain/binutils/include/elf/arc-reloc.def |
---|
0,0 → 1,462 |
ARC_RELOC_HOWTO(ARC_NONE, 0, \ |
2, \ |
32, \ |
replace_none, \ |
bitfield, \ |
0) |
ARC_RELOC_HOWTO(ARC_8, 1, \ |
0, \ |
8, \ |
replace_bits8, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_16, 2, \ |
1, \ |
16, \ |
replace_bits16, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_24, 3, \ |
2, \ |
24, \ |
replace_bits24, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_32, 4, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_N8, 8, \ |
0, \ |
8, \ |
replace_bits8, \ |
bitfield, \ |
( S - A )) |
ARC_RELOC_HOWTO(ARC_N16, 9, \ |
1, \ |
16, \ |
replace_bits16, \ |
bitfield, \ |
( S - A )) |
ARC_RELOC_HOWTO(ARC_N24, 10, \ |
2, \ |
24, \ |
replace_bits24, \ |
bitfield, \ |
( S - A )) |
ARC_RELOC_HOWTO(ARC_N32, 11, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( S - A )) |
ARC_RELOC_HOWTO(ARC_SDA, 12, \ |
2, \ |
9, \ |
replace_disp9, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_SECTOFF, 13, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( S - SECTSTART ) + A )) |
ARC_RELOC_HOWTO(ARC_S21H_PCREL, 14, \ |
2, \ |
20, \ |
replace_disp21h, \ |
signed, \ |
( ( ( S + A ) - P ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_S21W_PCREL, 15, \ |
2, \ |
19, \ |
replace_disp21w, \ |
signed, \ |
( ( ( S + A ) - P ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_S25H_PCREL, 16, \ |
2, \ |
24, \ |
replace_disp25h, \ |
signed, \ |
( ( ( S + A ) - P ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_S25W_PCREL, 17, \ |
2, \ |
23, \ |
replace_disp25w, \ |
signed, \ |
( ( ( S + A ) - P ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_SDA32, 18, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( S + A ) - _SDA_BASE_ )) |
ARC_RELOC_HOWTO(ARC_SDA_LDST, 19, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
signed, \ |
( ( S + A ) - _SDA_BASE_ )) |
ARC_RELOC_HOWTO(ARC_SDA_LDST1, 20, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
signed, \ |
( ( ( S + A ) - _SDA_BASE_ ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_SDA_LDST2, 21, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
signed, \ |
( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_SDA16_LD, 22, \ |
1, \ |
9, \ |
replace_disp9s, \ |
signed, \ |
( ( S + A ) - _SDA_BASE_ )) |
ARC_RELOC_HOWTO(ARC_SDA16_LD1, 23, \ |
1, \ |
9, \ |
replace_disp9s, \ |
signed, \ |
( ( ( S + A ) - _SDA_BASE_ ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_SDA16_LD2, 24, \ |
1, \ |
9, \ |
replace_disp9s, \ |
signed, \ |
( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_S13_PCREL, 25, \ |
1, \ |
11, \ |
replace_disp13s, \ |
signed, \ |
( ( ( S + A ) - P ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_W, 26, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( S + A ) & ( ~3 ) )) |
ARC_RELOC_HOWTO(ARC_32_ME, 27, \ |
2, \ |
32, \ |
replace_limm, \ |
signed, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_32_ME_S, 105, \ |
2, \ |
32, \ |
replace_limms, \ |
signed, \ |
( S + A )) |
ARC_RELOC_HOWTO(ARC_N32_ME, 28, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( S - A )) |
ARC_RELOC_HOWTO(ARC_SECTOFF_ME, 29, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( S - SECTSTART ) + A )) |
ARC_RELOC_HOWTO(ARC_SDA32_ME, 30, \ |
2, \ |
32, \ |
replace_limm, \ |
signed, \ |
( ( S + A ) - _SDA_BASE_ )) |
ARC_RELOC_HOWTO(ARC_W_ME, 31, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( S + A )) |
ARC_RELOC_HOWTO(AC_SECTOFF_U8, 35, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( S + A ) - SECTSTART )) |
ARC_RELOC_HOWTO(AC_SECTOFF_U8_1, 36, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( ( S + A ) - SECTSTART ) >> 1 )) |
ARC_RELOC_HOWTO(AC_SECTOFF_U8_2, 37, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( ( S + A ) - SECTSTART ) >> 2 )) |
ARC_RELOC_HOWTO(AC_SECTFOFF_S9, 38, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( S + A ) - SECTSTART )) |
ARC_RELOC_HOWTO(AC_SECTFOFF_S9_1, 39, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( ( S + A ) - SECTSTART ) >> 1 )) |
ARC_RELOC_HOWTO(AC_SECTFOFF_S9_2, 40, \ |
2, \ |
9, \ |
replace_disp9ls, \ |
bitfield, \ |
( ( ( S + A ) - SECTSTART ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_SECTOFF_ME_1, 41, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( ( S - SECTSTART ) + A ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_SECTOFF_ME_2, 42, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( ( S - SECTSTART ) + A ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_SECTOFF_1, 43, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( ( S - SECTSTART ) + A ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_SECTOFF_2, 44, \ |
2, \ |
32, \ |
replace_word32, \ |
bitfield, \ |
( ( ( S - SECTSTART ) + A ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_SDA16_ST2, 48, \ |
1, \ |
9, \ |
replace_disp9s1, \ |
signed, \ |
( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_32_PCREL, 49, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( S + A ) - PDATA )) |
ARC_RELOC_HOWTO(ARC_PC32, 50, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( S + A ) - P )) |
ARC_RELOC_HOWTO(ARC_GOT32, 59, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
( G + A )) |
ARC_RELOC_HOWTO(ARC_GOTPC32, 51, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( ( GOT + G ) + A ) - P )) |
ARC_RELOC_HOWTO(ARC_PLT32, 52, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( L + A ) - P )) |
ARC_RELOC_HOWTO(ARC_COPY, 53, \ |
2, \ |
0, \ |
replace_none, \ |
signed, \ |
none) |
ARC_RELOC_HOWTO(ARC_GLOB_DAT, 54, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
S) |
ARC_RELOC_HOWTO(ARC_JMP_SLOT, 55, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
S) |
ARC_RELOC_HOWTO(ARC_RELATIVE, 56, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( B + A )) |
ARC_RELOC_HOWTO(ARC_GOTOFF, 57, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( S + A ) - GOT )) |
ARC_RELOC_HOWTO(ARC_GOTPC, 58, \ |
2, \ |
32, \ |
replace_word32, \ |
signed, \ |
( ( GOT + A ) - P )) |
ARC_RELOC_HOWTO(ARC_S21W_PCREL_PLT, 60, \ |
2, \ |
19, \ |
replace_disp21w, \ |
signed, \ |
( ( ( L + A ) - P ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_S25H_PCREL_PLT, 61, \ |
2, \ |
24, \ |
replace_disp25h, \ |
signed, \ |
( ( ( L + A ) - P ) >> 1 )) |
ARC_RELOC_HOWTO(ARC_TLS_DTPMOD, 66, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_TPOFF, 68, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_GD_GOT, 69, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_GD_LD, 70, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_GD_CALL, 71, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_IE_GOT, 72, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_DTPOFF, 67, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_DTPOFF_S9, 73, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_LE_S9, 74, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_TLS_LE_32, 75, \ |
2, \ |
32, \ |
replace_word32, \ |
dont, \ |
0) |
ARC_RELOC_HOWTO(ARC_S25W_PCREL_PLT, 76, \ |
2, \ |
23, \ |
replace_disp25w, \ |
signed, \ |
( ( ( L + A ) - P ) >> 2 )) |
ARC_RELOC_HOWTO(ARC_S21H_PCREL_PLT, 77, \ |
2, \ |
20, \ |
replace_disp21h, \ |
signed, \ |
( ( ( L + A ) - P ) >> 1 )) |
/contrib/toolchain/binutils/include/elf/arc.h |
---|
1,5 → 1,5 |
/* ARC ELF support for BFD. |
Copyright 1995, 1997, 1998, 2000, 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 1995-2015 Free Software Foundation, Inc. |
Contributed by Doug Evans, (dje@cygnus.com) |
This file is part of BFD, the Binary File Descriptor library. |
28,26 → 28,42 |
/* Relocations. */ |
#define ARC_RELOC_HOWTO(TYPE, VALUE, SIZE, BITSIZE, RELOC_FUNCTION, OVERFLOW, FORMULA) \ |
RELOC_NUMBER(R_##TYPE, VALUE) |
START_RELOC_NUMBERS (elf_arc_reloc_type) |
RELOC_NUMBER (R_ARC_NONE, 0) |
RELOC_NUMBER (R_ARC_32, 1) |
RELOC_NUMBER (R_ARC_B26, 2) |
RELOC_NUMBER (R_ARC_B22_PCREL, 3) |
#include "arc-reloc.def" |
END_RELOC_NUMBERS (R_ARC_max) |
#undef ARC_RELOC_HOWTO |
/* Processor specific flags for the ELF header e_flags field. */ |
/* Four bit ARC machine type field. */ |
#define EF_ARC_MACH_MSK 0x000000ff |
#define EF_ARC_OSABI_MSK 0x00000f00 |
#define EF_ARC_ALL_MSK (EF_ARC_MACH_MSK | EF_ARC_OSABI_MSK) |
/* Four bit ARC machine type field. */ |
#define EF_ARC_MACH 0x0000000f |
/* Various CPU types. */ |
#define E_ARC_MACH_ARC600 0x00000002 |
#define E_ARC_MACH_ARC601 0x00000004 |
#define E_ARC_MACH_ARC700 0x00000003 |
#define E_ARC_MACH_ARC5 0 |
#define E_ARC_MACH_ARC6 1 |
#define E_ARC_MACH_ARC7 2 |
#define E_ARC_MACH_ARC8 3 |
/* Processor specific flags for the ELF header e_flags field. */ |
#define EF_ARC_CPU_GENERIC 0x00000000 |
#define EF_ARC_CPU_ARCV2EM 0x00000005 |
#define EF_ARC_CPU_ARCV2HS 0x00000006 |
/* ARC Linux specific ABIs. */ |
#define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */ |
#define E_ARC_OSABI_V2 0x00000200 |
#define E_ARC_OSABI_V3 0x00000300 |
#define E_ARC_OSABI_CURRENT E_ARC_OSABI_V3 |
/* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. */ |
/* File contains position independent code. */ |
/contrib/toolchain/binutils/include/elf/arm.h |
---|
1,6 → 1,5 |
/* ARM ELF support for BFD. |
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
25,7 → 24,6 |
/* Processor specific flags for the ELF header e_flags field. */ |
#define EF_ARM_RELEXEC 0x01 |
#define EF_ARM_HASENTRY 0x02 |
#define EF_ARM_INTERWORK 0x04 |
#define EF_ARM_APCS_26 0x08 |
#define EF_ARM_APCS_FLOAT 0x10 |
320,6 → 318,23 |
Tag_VFP_HP_extension = Tag_FP_HP_extension |
}; |
/* Values for Tag_ABI_FP_number_model. */ |
enum |
{ |
AEABI_FP_number_model_none = 0, |
AEABI_FP_number_model_ieee754_number = 1, |
AEABI_FP_number_model_rtabi = 2, |
AEABI_FP_number_model_ieee754_all = 3 |
}; |
/* Values for Tag_ABI_VFP_args. */ |
enum |
{ |
AEABI_VFP_args_base = 0, |
AEABI_VFP_args_vfp = 1, |
AEABI_VFP_args_toolchain = 2, |
AEABI_VFP_args_compatible = 3 |
}; |
#endif |
/* The name of the note section used to identify arm variants. */ |
/contrib/toolchain/binutils/include/elf/avr.h |
---|
1,6 → 1,5 |
/* AVR ELF support for BFD. |
Copyright 1999, 2000, 2004, 2006, 2010, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
Contributed by Denis Chertykov <denisc@overta.ru> |
This file is part of BFD, the Binary File Descriptor library. |
41,6 → 40,7 |
#define E_AVR_MACH_AVR5 5 |
#define E_AVR_MACH_AVR51 51 |
#define E_AVR_MACH_AVR6 6 |
#define E_AVR_MACH_AVRTINY 100 |
#define E_AVR_MACH_XMEGA1 101 |
#define E_AVR_MACH_XMEGA2 102 |
#define E_AVR_MACH_XMEGA3 103 |
81,6 → 81,13 |
RELOC_NUMBER (R_AVR_8_LO8, 27) |
RELOC_NUMBER (R_AVR_8_HI8, 28) |
RELOC_NUMBER (R_AVR_8_HLO8, 29) |
RELOC_NUMBER (R_AVR_DIFF8, 30) |
RELOC_NUMBER (R_AVR_DIFF16, 31) |
RELOC_NUMBER (R_AVR_DIFF32, 32) |
RELOC_NUMBER (R_AVR_LDS_STS_16, 33) |
RELOC_NUMBER (R_AVR_PORT6, 34) |
RELOC_NUMBER (R_AVR_PORT5, 35) |
RELOC_NUMBER (R_AVR_32_PCREL, 36) |
END_RELOC_NUMBERS (R_AVR_max) |
#endif /* _ELF_AVR_H */ |
/contrib/toolchain/binutils/include/elf/bfin.h |
---|
1,5 → 1,5 |
/* Blackfin ELF support for BFD. |
Copyright (C) 2005, 2006, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/common.h |
---|
1,5 → 1,5 |
/* ELF support for BFD. |
Copyright 1991-2013 Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support, from information published |
in "UNIX System V Release 4, Programmers Guide: ANSI C and |
73,6 → 73,7 |
#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */ |
#define ELFOSABI_AROS 15 /* AROS */ |
#define ELFOSABI_FENIXOS 16 /* FenixOS */ |
#define ELFOSABI_CLOUDABI 17 /* Nuxi CloudABI */ |
#define ELFOSABI_C6000_ELFABI 64 /* Bare-metal TMS320C6000 */ |
#define ELFOSABI_C6000_LINUX 65 /* Linux TMS320C6000 */ |
#define ELFOSABI_ARM 97 /* ARM */ |
105,7 → 106,7 |
#define EM_386 3 /* Intel 80386 */ |
#define EM_68K 4 /* Motorola m68k family */ |
#define EM_88K 5 /* Motorola m88k family */ |
#define EM_486 6 /* Intel 80486 *//* Reserved for future use */ |
#define EM_IAMCU 6 /* Intel MCU */ |
#define EM_860 7 /* Intel 80860 */ |
#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ |
#define EM_S370 9 /* IBM System/370 */ |
192,8 → 193,8 |
#define EM_MN10300 89 /* Matsushita MN10300 */ |
#define EM_MN10200 90 /* Matsushita MN10200 */ |
#define EM_PJ 91 /* picoJava */ |
#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ |
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ |
#define EM_OR1K 92 /* OpenRISC 1000 32-bit embedded processor */ |
#define EM_ARC_COMPACT 93 /* ARC International ARCompact processor */ |
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ |
#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */ |
#define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */ |
294,6 → 295,7 |
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ |
#define EM_CUDA 190 /* NVIDIA CUDA architecture */ |
#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */ |
#define EM_ARC_COMPACT2 195 /* Synopsys ARCompact V2 */ |
#define EM_RL78 197 /* Renesas RL78 family. */ |
#define EM_78K0R 199 /* Renesas 78K0R. */ |
#define EM_INTEL205 205 /* Reserved by Intel */ |
301,6 → 303,9 |
#define EM_INTEL207 207 /* Reserved by Intel */ |
#define EM_INTEL208 208 /* Reserved by Intel */ |
#define EM_INTEL209 209 /* Reserved by Intel */ |
#define EM_VISIUM 221 /* Controls and Data Services VISIUMcore processor */ |
#define EM_FT32 222 /* FTDI Chip FT32 high performance 32-bit RISC architecture */ |
#define EM_MOXIE 223 /* Moxie processor family */ |
/* If it is necessary to assign new unofficial EM_* values, please pick large |
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision |
339,9 → 344,6 |
/* FR30 magic number - no EABI available. */ |
#define EM_CYGNUS_FR30 0x3330 |
/* OpenRISC magic number. Written in the absense of an ABI. */ |
#define EM_OPENRISC_OLD 0x3426 |
/* DLX magic number. Written in the absense of an ABI. */ |
#define EM_DLX 0x5aa5 |
360,9 → 362,6 |
/* Ubicom IP2xxx; Written in the absense of an ABI. */ |
#define EM_IP2K_OLD 0x8217 |
/* (Deprecated) Temporary number for the OpenRISC processor. */ |
#define EM_OR32 0x8472 |
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */ |
#define EM_CYGNUS_POWERPC 0x9025 |
399,7 → 398,8 |
#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */ |
#define EM_MOXIE 0xFEED /* Moxie */ |
/* Old, unofficial value for Moxie. */ |
#define EM_MOXIE_OLD 0xFEED |
/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */ |
#define EM_SCORE_OLD 95 |
408,6 → 408,9 |
#define EM_ADAPTEVA_EPIPHANY 0x1223 /* Adapteva's Epiphany architecture. */ |
/* Old constant that might be in use by some software. */ |
#define EM_OPENRISC EM_OR1K |
/* See the above comment before you add a new EM_* value here. */ |
/* Values for e_version. */ |
505,6 → 508,7 |
#define SHF_OS_NONCONFORMING (1 << 8) /* OS specific processing required */ |
#define SHF_GROUP (1 << 9) /* Member of a section group */ |
#define SHF_TLS (1 << 10) /* Thread local storage section */ |
#define SHF_COMPRESSED (1 << 11) /* Section with compressed data */ |
/* #define SHF_MASKOS 0x0F000000 *//* OS-specific semantics */ |
#define SHF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */ |
519,6 → 523,13 |
are not to be further |
relocated. */ |
/* Compression types */ |
#define ELFCOMPRESS_ZLIB 1 /* Compressed with zlib. */ |
#define ELFCOMPRESS_LOOS 0x60000000 /* OS-specific semantics, lo */ |
#define ELFCOMPRESS_HIOS 0x6FFFFFFF /* OS-specific semantics, hi */ |
#define ELFCOMPRESS_LOPROC 0x70000000 /* Processor-specific semantics, lo */ |
#define ELFCOMPRESS_HIPROC 0x7FFFFFFF /* Processor-specific semantics, hi */ |
/* Values of note segment descriptor types for core files. */ |
#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */ |
556,6 → 567,10 |
/* note name must be "LINUX". */ |
#define NT_S390_TDB 0x308 /* S390 transaction diagnostic block */ |
/* note name must be "LINUX". */ |
#define NT_S390_VXRS_LOW 0x309 /* S390 vector registers 0-15 upper half */ |
/* note name must be "LINUX". */ |
#define NT_S390_VXRS_HIGH 0x30a /* S390 vector registers 16-31 */ |
/* note name must be "LINUX". */ |
#define NT_ARM_VFP 0x400 /* ARM VFP registers */ |
/* The following definitions should really use NT_AARCH_..., but defined |
this way for compatibility with Linux. */ |
621,10 → 636,13 |
#define GNU_ABI_TAG_SOLARIS 2 |
#define GNU_ABI_TAG_FREEBSD 3 |
#define GNU_ABI_TAG_NETBSD 4 |
#define GNU_ABI_TAG_SYLLABLE 5 |
#define GNU_ABI_TAG_NACL 6 |
/* Values for NetBSD .note.netbsd.ident notes. Note name is "NetBSD". */ |
#define NT_NETBSD_IDENT 1 |
#define NT_NETBSD_MARCH 5 |
/* Values for OpenBSD .note.openbsd.ident notes. Note name is "OpenBSD". */ |
851,6 → 869,8 |
#define DF_1_SYMINTPOSE 0x00800000 |
#define DF_1_GLOBAUDIT 0x01000000 |
#define DF_1_SINGLETON 0x02000000 |
#define DF_1_STUB 0x04000000 |
#define DF_1_PIE 0x08000000 |
/* Flag values for the DT_FLAGS entry. */ |
#define DF_ORIGIN (1 << 0) |
959,6 → 979,7 |
#define AT_BASE_PLATFORM 24 /* String identifying real platform, |
may differ from AT_PLATFORM. */ |
#define AT_RANDOM 25 /* Address of 16 random bytes. */ |
#define AT_HWCAP2 26 /* Extension of AT_HWCAP. */ |
#define AT_EXECFN 31 /* Filename of executable. */ |
/* Pointer to the global system page used for system calls and other |
nice things. */ |
/contrib/toolchain/binutils/include/elf/cr16.h |
---|
1,5 → 1,5 |
/* CR16 ELF support for BFD. |
Copyright 2007, 2010 Free Software Foundation, Inc. |
Copyright (C) 2007-2015 Free Software Foundation, Inc. |
Contributed by M R Swami Reddy. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/cr16c.h |
---|
1,5 → 1,5 |
/* CR16C ELF support for BFD. |
Copyright 2004, 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/cris.h |
---|
1,5 → 1,5 |
/* CRIS ELF support for BFD. |
Copyright 2000, 2001, 2004, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Axis Communications AB, Lund, Sweden. |
Written by Hans-Peter Nilsson. |
/contrib/toolchain/binutils/include/elf/crx.h |
---|
1,5 → 1,5 |
/* CRX ELF support for BFD. |
Copyright 2004, 2010 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Contributed by Tomer Levi, NSC, Israel. |
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel. |
Updates, BFDizing, GNUifying and ELF support by Tomer Levi. |
/contrib/toolchain/binutils/include/elf/d10v.h |
---|
1,5 → 1,5 |
/* d10v ELF support for BFD. |
Copyright 1998, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/d30v.h |
---|
1,5 → 1,5 |
/* d30v ELF support for BFD. |
Copyright 1998, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/dlx.h |
---|
1,5 → 1,5 |
/* DLX support for BFD. |
Copyright 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/dwarf.h |
---|
3,7 → 3,7 |
Written by Ron Guilmette (rfg@netcom.com) |
Copyright 1992, 1993, 1995, 1999, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1992-2015 Free Software Foundation, Inc. |
This file is part of both GCC and the BFD library. |
/contrib/toolchain/binutils/include/elf/epiphany.h |
---|
1,5 → 1,5 |
/* Adapteva EPIPHANY ELF support for BFD. |
Copyright (C) 2009, 2011 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Contributed by Embecosm on behalf of Adapteva, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/external.h |
---|
1,6 → 1,5 |
/* ELF support for BFD. |
Copyright 1991, 1992, 1993, 1995, 1997, 1998, 1999, 2001, 2003, 2005, |
2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support, from information published |
in "UNIX System V Release 4, Programmers Guide: ANSI C and |
136,6 → 135,21 |
unsigned char sh_entsize[8]; /* Entry size if section holds table */ |
} Elf64_External_Shdr; |
/* Compression header */ |
typedef struct { |
unsigned char ch_type[4]; /* Type of compression */ |
unsigned char ch_size[4]; /* Size of uncompressed data in bytes */ |
unsigned char ch_addralign[4]; /* Alignment of uncompressed data */ |
} Elf32_External_Chdr; |
typedef struct { |
unsigned char ch_type[4]; /* Type of compression */ |
unsigned char ch_reserved[4]; /* Padding */ |
unsigned char ch_size[8]; /* Size of uncompressed data in bytes */ |
unsigned char ch_addralign[8]; /* Alignment of uncompressed data */ |
} Elf64_External_Chdr; |
/* Symbol table entry */ |
typedef struct { |
/contrib/toolchain/binutils/include/elf/fr30.h |
---|
1,5 → 1,5 |
/* FR30 ELF support for BFD. |
Copyright 1998, 1999, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/frv.h |
---|
1,5 → 1,5 |
/* FRV ELF support for BFD. |
Copyright (C) 2002, 2003, 2004, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/ft32.h |
---|
0,0 → 1,37 |
/* ft32 ELF support for BFD. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software Foundation, |
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
#ifndef _ELF_FT32_H |
#define _ELF_FT32_H |
#include "elf/reloc-macros.h" |
/* Relocation types. */ |
START_RELOC_NUMBERS (elf_ft32_reloc_type) |
RELOC_NUMBER (R_FT32_NONE, 0) |
RELOC_NUMBER (R_FT32_32, 1) |
RELOC_NUMBER (R_FT32_16, 2) |
RELOC_NUMBER (R_FT32_8, 3) |
RELOC_NUMBER (R_FT32_10, 4) |
RELOC_NUMBER (R_FT32_20, 5) |
RELOC_NUMBER (R_FT32_17, 6) |
RELOC_NUMBER (R_FT32_18, 7) |
END_RELOC_NUMBERS (R_FT32_max) |
#endif /* _ELF_FT32_H */ |
/contrib/toolchain/binutils/include/elf/h8.h |
---|
1,5 → 1,5 |
/* H8300/h8500 ELF support for BFD. |
Copyright 2001-2013 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/hppa.h |
---|
1,6 → 1,5 |
/* HPPA ELF support for BFD. |
Copyright 1993, 1994, 1995, 1998, 1999, 2000, 2005, 2006, 2008, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/i370.h |
---|
1,5 → 1,5 |
/* i370 ELF support for BFD. |
Copyright 2000, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/i386.h |
---|
1,6 → 1,5 |
/* ix86 ELF support for BFD. |
Copyright 1998, 1999, 2000, 2002, 2004, 2005, 2006, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
67,6 → 66,8 |
RELOC_NUMBER (R_386_TLS_DESC_CALL,40) |
RELOC_NUMBER (R_386_TLS_DESC, 41) |
RELOC_NUMBER (R_386_IRELATIVE, 42) /* Adjust indirectly by program base */ |
/* Load from 32 bit GOT entry, relaxable. */ |
RELOC_NUMBER (R_386_GOT32X, 43) |
/* Used by Intel. */ |
RELOC_NUMBER (R_386_USED_BY_INTEL_200, 200) |
/contrib/toolchain/binutils/include/elf/i860.h |
---|
1,5 → 1,5 |
/* i860 ELF support for BFD. |
Copyright 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Jason Eckhardt <jle@cygnus.com>. |
/contrib/toolchain/binutils/include/elf/i960.h |
---|
1,5 → 1,5 |
/* Intel 960 ELF support for BFD. |
Copyright 1999, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/ia64.h |
---|
1,6 → 1,5 |
/* IA-64 ELF support for BFD. |
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2008, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/internal.h |
---|
1,6 → 1,5 |
/* ELF support for BFD. |
Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002, |
2003, 2006, 2007, 2008, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support, from information published |
in "UNIX System V Release 4, Programmers Guide: ANSI C and |
116,6 → 115,14 |
unsigned char *contents; /* Section contents. */ |
} Elf_Internal_Shdr; |
/* Compression header */ |
typedef struct elf_internal_chdr { |
unsigned int ch_type; /* Type of compression */ |
bfd_size_type ch_size; /* Size of uncompressed data in bytes */ |
bfd_vma ch_addralign; /* Alignment of uncompressed data */ |
} Elf_Internal_Chdr; |
/* Symbol table entry */ |
struct elf_internal_sym { |
318,6 → 325,13 |
|| (((sec_hdr)->sh_flags & SHF_TLS) == 0 \ |
&& (segment)->p_type != PT_TLS \ |
&& (segment)->p_type != PT_PHDR)) \ |
/* PT_LOAD and similar segments only have SHF_ALLOC sections. */ \ |
&& !(((sec_hdr)->sh_flags & SHF_ALLOC) == 0 \ |
&& ((segment)->p_type == PT_LOAD \ |
|| (segment)->p_type == PT_DYNAMIC \ |
|| (segment)->p_type == PT_GNU_EH_FRAME \ |
|| (segment)->p_type == PT_GNU_RELRO \ |
|| (segment)->p_type == PT_GNU_STACK)) \ |
/* Any section besides one of type SHT_NOBITS must have file \ |
offsets within the segment. */ \ |
&& ((sec_hdr)->sh_type == SHT_NOBITS \ |
/contrib/toolchain/binutils/include/elf/ip2k.h |
---|
1,5 → 1,5 |
/* IP2xxx ELF support for BFD. |
Copyright (C) 2000, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/iq2000.h |
---|
1,5 → 1,5 |
/* IQ2000 ELF support for BFD. |
Copyright (C) 2002, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/lm32.h |
---|
1,5 → 1,5 |
/* Lattice Mico32 ELF support for BFD. |
Copyright 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
Contributed by Jon Beniston <jon@beniston.com> |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/m32c.h |
---|
1,5 → 1,5 |
/* M32C ELF support for BFD. |
Copyright (C) 2004, 2010 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/m32r.h |
---|
1,6 → 1,5 |
/* M32R ELF support for BFD. |
Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2008, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/m68hc11.h |
---|
1,5 → 1,5 |
/* m68hc11 & m68hc12 ELF support for BFD. |
Copyright 1999, 2000, 2001, 2002, 2010, 2012 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/m68k.h |
---|
1,6 → 1,5 |
/* MC68k ELF support for BFD. |
Copyright 1998, 1999, 2000, 2002, 2005, 2006, 2007, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mcore.h |
---|
1,5 → 1,5 |
/* Motorola MCore support for BFD. |
Copyright 1995, 1999, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1995-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mep.h |
---|
1,6 → 1,5 |
/* Toshiba MeP ELF support for BFD. |
Copyright (C) 2001, 2004, 2005, 2007, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
25,10 → 24,6 |
#define SHF_MEP_VLIW 0x10000000 /* contains vliw code */ |
/* This bit is reserved by BFD for processor specific stuff. Name |
it properly so that we can easily stay consistent elsewhere. */ |
#define SEC_MEP_VLIW SEC_TIC54X_BLOCK |
#include "elf/reloc-macros.h" |
/* Note: The comments in this file are used by bfd/mep-relocs.pl to |
/contrib/toolchain/binutils/include/elf/metag.h |
---|
1,5 → 1,5 |
/* Meta ELF support for BFD. |
Copyright (C) 2013 Free Software Foundation, Inc. |
Copyright (C) 2013-2015 Free Software Foundation, Inc. |
Contributed by Imagination Technologies Ltd. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/microblaze.h |
---|
1,6 → 1,6 |
/* Xilinx MicroBlaze support for BFD. |
Copyright 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mips.h |
---|
1,7 → 1,5 |
/* MIPS ELF support for BFD. |
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
2003, 2004, 2005, 2008, 2009, 2010, 2013 |
Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from |
information in the System V Application Binary Interface, MIPS |
89,7 → 87,14 |
RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49) |
RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50) |
RELOC_NUMBER (R_MIPS_GLOB_DAT, 51) |
FAKE_RELOC (R_MIPS_max, 52) |
/* Space to grow */ |
RELOC_NUMBER (R_MIPS_PC21_S2, 60) |
RELOC_NUMBER (R_MIPS_PC26_S2, 61) |
RELOC_NUMBER (R_MIPS_PC18_S3, 62) |
RELOC_NUMBER (R_MIPS_PC19_S2, 63) |
RELOC_NUMBER (R_MIPS_PCHI16, 64) |
RELOC_NUMBER (R_MIPS_PCLO16, 65) |
FAKE_RELOC (R_MIPS_max, 66) |
/* These relocs are used for the mips16. */ |
FAKE_RELOC (R_MIPS16_min, 100) |
RELOC_NUMBER (R_MIPS16_26, 100) |
239,6 → 244,12 |
/* -mips64r2 code. */ |
#define E_MIPS_ARCH_64R2 0x80000000 |
/* -mips32r6 code. */ |
#define E_MIPS_ARCH_32R6 0x90000000 |
/* -mips64r6 code. */ |
#define E_MIPS_ARCH_64R6 0xa0000000 |
/* The ABI of the file. Also see EF_MIPS_ABI2 above. */ |
#define EF_MIPS_ABI 0x0000F000 |
275,6 → 286,7 |
#define E_MIPS_MACH_OCTEON 0x008b0000 |
#define E_MIPS_MACH_XLR 0x008c0000 |
#define E_MIPS_MACH_OCTEON2 0x008d0000 |
#define E_MIPS_MACH_OCTEON3 0x008e0000 |
#define E_MIPS_MACH_5400 0x00910000 |
#define E_MIPS_MACH_5900 0x00920000 |
#define E_MIPS_MACH_5500 0x00980000 |
429,6 → 441,8 |
/* Runtime procedure descriptor table exception information (ucode) ??? */ |
#define SHT_MIPS_PDR_EXCEPTION 0x70000029 |
/* ABI related flags section. */ |
#define SHT_MIPS_ABIFLAGS 0x7000002a |
/* A section of type SHT_MIPS_LIBLIST contains an array of the |
following structure. The sh_link field is the section index of the |
595,6 → 609,9 |
/* .MIPS.options section. */ |
#define PT_MIPS_OPTIONS 0x70000002 |
/* Records ABI related flags. */ |
#define PT_MIPS_ABIFLAGS 0x70000003 |
/* Processor specific dynamic array tags. */ |
/* 32 bit version number for runtime linker interface. */ |
732,6 → 749,9 |
/* Points to the base of a writable PLT. */ |
#define DT_MIPS_RWPLT 0x70000034 |
/* Relative offset of run time loader map, used for debugging. */ |
#define DT_MIPS_RLD_MAP_REL 0x70000035 |
/* Flags which may appear in a DT_MIPS_FLAGS entry. */ |
/* No flags. */ |
1049,8 → 1069,60 |
bfd_vma ri_gp_value; |
} Elf64_Internal_RegInfo; |
/* ABI Flags structure version 0. */ |
typedef struct |
{ |
/* Version of flags structure. */ |
unsigned char version[2]; |
/* The level of the ISA: 1-5, 32, 64. */ |
unsigned char isa_level[1]; |
/* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ |
unsigned char isa_rev[1]; |
/* The size of general purpose registers. */ |
unsigned char gpr_size[1]; |
/* The size of co-processor 1 registers. */ |
unsigned char cpr1_size[1]; |
/* The size of co-processor 2 registers. */ |
unsigned char cpr2_size[1]; |
/* The floating-point ABI. */ |
unsigned char fp_abi[1]; |
/* Processor-specific extension. */ |
unsigned char isa_ext[4]; |
/* Mask of ASEs used. */ |
unsigned char ases[4]; |
/* Mask of general flags. */ |
unsigned char flags1[4]; |
unsigned char flags2[4]; |
} Elf_External_ABIFlags_v0; |
typedef struct |
{ |
/* Version of flags structure. */ |
unsigned short version; |
/* The level of the ISA: 1-5, 32, 64. */ |
unsigned char isa_level; |
/* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ |
unsigned char isa_rev; |
/* The size of general purpose registers. */ |
unsigned char gpr_size; |
/* The size of co-processor 1 registers. */ |
unsigned char cpr1_size; |
/* The size of co-processor 2 registers. */ |
unsigned char cpr2_size; |
/* The floating-point ABI. */ |
unsigned char fp_abi; |
/* Processor-specific extension. */ |
unsigned long isa_ext; |
/* Mask of ASEs used. */ |
unsigned long ases; |
/* Mask of general flags. */ |
unsigned long flags1; |
unsigned long flags2; |
} Elf_Internal_ABIFlags_v0; |
typedef struct |
{ |
/* The hash value computed from the name of the corresponding |
dynamic symbol. */ |
unsigned char ms_hash_value[4]; |
1089,6 → 1161,12 |
extern void bfd_mips_elf64_swap_reginfo_out |
(bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *); |
/* MIPS ELF flags swapping routines. */ |
extern void bfd_mips_elf_swap_abiflags_v0_in |
(bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *); |
extern void bfd_mips_elf_swap_abiflags_v0_out |
(bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *); |
/* Masks for the info work of an ODK_EXCEPTIONS descriptor. */ |
#define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */ |
#define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */ |
1127,7 → 1205,58 |
#define OHWA0_R4KEOP_CHECKED 0x00000001 |
#define OHWA0_R4KEOP_CLEAN 0x00000002 |
/* Values for the xxx_size bytes of an ABI flags structure. */ |
#define AFL_REG_NONE 0x00 /* No registers. */ |
#define AFL_REG_32 0x01 /* 32-bit registers. */ |
#define AFL_REG_64 0x02 /* 64-bit registers. */ |
#define AFL_REG_128 0x03 /* 128-bit registers. */ |
/* Masks for the ases word of an ABI flags structure. */ |
#define AFL_ASE_DSP 0x00000001 /* DSP ASE. */ |
#define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */ |
#define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */ |
#define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */ |
#define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */ |
#define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */ |
#define AFL_ASE_MT 0x00000040 /* MT ASE. */ |
#define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */ |
#define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */ |
#define AFL_ASE_MSA 0x00000200 /* MSA ASE. */ |
#define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */ |
#define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */ |
#define AFL_ASE_XPA 0x00001000 /* XPA ASE. */ |
#define AFL_ASE_MASK 0x00001fff /* All ASEs. */ |
/* Values for the isa_ext word of an ABI flags structure. */ |
#define AFL_EXT_XLR 1 /* RMI Xlr instruction. */ |
#define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */ |
#define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */ |
#define AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */ |
#define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */ |
#define AFL_EXT_5900 6 /* MIPS R5900 instruction. */ |
#define AFL_EXT_4650 7 /* MIPS R4650 instruction. */ |
#define AFL_EXT_4010 8 /* LSI R4010 instruction. */ |
#define AFL_EXT_4100 9 /* NEC VR4100 instruction. */ |
#define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */ |
#define AFL_EXT_10000 11 /* MIPS R10000 instruction. */ |
#define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */ |
#define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */ |
#define AFL_EXT_4120 14 /* NEC VR4120 instruction. */ |
#define AFL_EXT_5400 15 /* NEC VR5400 instruction. */ |
#define AFL_EXT_5500 16 /* NEC VR5500 instruction. */ |
#define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */ |
#define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */ |
#define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */ |
/* Masks for the flags1 word of an ABI flags structure. */ |
#define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */ |
extern unsigned int bfd_mips_isa_ext (bfd *); |
/* Object attribute tags. */ |
enum |
{ |
1135,6 → 1264,9 |
/* Floating-point ABI used by this object file. */ |
Tag_GNU_MIPS_ABI_FP = 4, |
/* MSA ABI used by this object file. */ |
Tag_GNU_MIPS_ABI_MSA = 8, |
}; |
/* Object attribute values. */ |
1155,7 → 1287,28 |
Val_GNU_MIPS_ABI_FP_SOFT = 3, |
/* Using -mips32r2 -mfp64. */ |
Val_GNU_MIPS_ABI_FP_64 = 4, |
Val_GNU_MIPS_ABI_FP_OLD_64 = 4, |
/* Using -mfpxx */ |
Val_GNU_MIPS_ABI_FP_XX = 5, |
/* Using -mips32r2 -mfp64. */ |
Val_GNU_MIPS_ABI_FP_64 = 6, |
/* Using -mips32r2 -mfp64 -mno-odd-spreg. */ |
Val_GNU_MIPS_ABI_FP_64A = 7, |
/* This is reserved for backward-compatibility with an earlier |
implementation of the MIPS NaN2008 functionality. */ |
Val_GNU_MIPS_ABI_FP_NAN2008 = 8, |
/* Values defined for Tag_GNU_MIPS_ABI_MSA. */ |
/* Not tagged or not using any ABIs affected by the differences. */ |
Val_GNU_MIPS_ABI_MSA_ANY = 0, |
/* Using 128-bit MSA. */ |
Val_GNU_MIPS_ABI_MSA_128 = 1, |
}; |
#endif /* _ELF_MIPS_H */ |
/contrib/toolchain/binutils/include/elf/mmix.h |
---|
1,5 → 1,5 |
/* MMIX support for BFD. |
Copyright 2001, 2002, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mn10200.h |
---|
1,5 → 1,5 |
/* MN10200 ELF support for BFD. |
Copyright 1998, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mn10300.h |
---|
1,5 → 1,5 |
/* MN10300 ELF support for BFD. |
Copyright 1998, 1999, 2000, 2003, 2007 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/moxie.h |
---|
1,5 → 1,5 |
/* moxie ELF support for BFD. |
Copyright 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/msp430.h |
---|
1,5 → 1,5 |
/* MSP430 ELF support for BFD. |
Copyright (C) 2002-2013 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Contributed by Dmitry Diky <diwil@mail.ru> |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/mt.h |
---|
1,5 → 1,5 |
/* MS1 ELF support for BFD. |
Copyright (C) 2000, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/nds32.h |
---|
0,0 → 1,299 |
/* NDS32 ELF support for BFD. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Contributed by Andes Technology Corporation. |
This file is part of BFD, the Binary File Descriptor library. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
02110-1301, USA. */ |
#ifndef _ELF_NDS32_H |
#define _ELF_NDS32_H |
#include "elf/reloc-macros.h" |
/* Relocations. */ |
START_RELOC_NUMBERS (elf_nds32_reloc_type) |
RELOC_NUMBER (R_NDS32_NONE, 0) |
/* REL relocations. */ |
RELOC_NUMBER (R_NDS32_16, 1) |
RELOC_NUMBER (R_NDS32_32, 2) |
RELOC_NUMBER (R_NDS32_20, 3) |
RELOC_NUMBER (R_NDS32_9_PCREL, 4) |
RELOC_NUMBER (R_NDS32_15_PCREL, 5) |
RELOC_NUMBER (R_NDS32_17_PCREL, 6) |
RELOC_NUMBER (R_NDS32_25_PCREL, 7) |
RELOC_NUMBER (R_NDS32_HI20, 8) |
RELOC_NUMBER (R_NDS32_LO12S3, 9) |
RELOC_NUMBER (R_NDS32_LO12S2, 10) |
RELOC_NUMBER (R_NDS32_LO12S1, 11) |
RELOC_NUMBER (R_NDS32_LO12S0, 12) |
RELOC_NUMBER (R_NDS32_SDA15S3, 13) |
RELOC_NUMBER (R_NDS32_SDA15S2, 14) |
RELOC_NUMBER (R_NDS32_SDA15S1, 15) |
RELOC_NUMBER (R_NDS32_SDA15S0, 16) |
RELOC_NUMBER (R_NDS32_GNU_VTINHERIT, 17) |
RELOC_NUMBER (R_NDS32_GNU_VTENTRY, 18) |
/* RELA relocations. */ |
RELOC_NUMBER (R_NDS32_16_RELA, 19) |
RELOC_NUMBER (R_NDS32_32_RELA, 20) |
RELOC_NUMBER (R_NDS32_20_RELA, 21) |
RELOC_NUMBER (R_NDS32_9_PCREL_RELA, 22) |
RELOC_NUMBER (R_NDS32_15_PCREL_RELA, 23) |
RELOC_NUMBER (R_NDS32_17_PCREL_RELA, 24) |
RELOC_NUMBER (R_NDS32_25_PCREL_RELA, 25) |
RELOC_NUMBER (R_NDS32_HI20_RELA, 26) |
RELOC_NUMBER (R_NDS32_LO12S3_RELA, 27) |
RELOC_NUMBER (R_NDS32_LO12S2_RELA, 28) |
RELOC_NUMBER (R_NDS32_LO12S1_RELA, 29) |
RELOC_NUMBER (R_NDS32_LO12S0_RELA, 30) |
RELOC_NUMBER (R_NDS32_SDA15S3_RELA, 31) |
RELOC_NUMBER (R_NDS32_SDA15S2_RELA, 32) |
RELOC_NUMBER (R_NDS32_SDA15S1_RELA, 33) |
RELOC_NUMBER (R_NDS32_SDA15S0_RELA, 34) |
RELOC_NUMBER (R_NDS32_RELA_GNU_VTINHERIT, 35) |
RELOC_NUMBER (R_NDS32_RELA_GNU_VTENTRY, 36) |
RELOC_NUMBER (R_NDS32_GOT20, 37) |
RELOC_NUMBER (R_NDS32_25_PLTREL, 38) |
RELOC_NUMBER (R_NDS32_COPY, 39) |
RELOC_NUMBER (R_NDS32_GLOB_DAT, 40) |
RELOC_NUMBER (R_NDS32_JMP_SLOT, 41) |
RELOC_NUMBER (R_NDS32_RELATIVE, 42) |
RELOC_NUMBER (R_NDS32_GOTOFF, 43) |
RELOC_NUMBER (R_NDS32_GOTPC20, 44) |
RELOC_NUMBER (R_NDS32_GOT_HI20, 45) |
RELOC_NUMBER (R_NDS32_GOT_LO12, 46) |
RELOC_NUMBER (R_NDS32_GOTPC_HI20, 47) |
RELOC_NUMBER (R_NDS32_GOTPC_LO12, 48) |
RELOC_NUMBER (R_NDS32_GOTOFF_HI20, 49) |
RELOC_NUMBER (R_NDS32_GOTOFF_LO12, 50) |
RELOC_NUMBER (R_NDS32_INSN16, 51) |
RELOC_NUMBER (R_NDS32_LABEL, 52) |
RELOC_NUMBER (R_NDS32_LONGCALL1, 53) |
RELOC_NUMBER (R_NDS32_LONGCALL2, 54) |
RELOC_NUMBER (R_NDS32_LONGCALL3, 55) |
RELOC_NUMBER (R_NDS32_LONGJUMP1, 56) |
RELOC_NUMBER (R_NDS32_LONGJUMP2, 57) |
RELOC_NUMBER (R_NDS32_LONGJUMP3, 58) |
RELOC_NUMBER (R_NDS32_LOADSTORE, 59) |
RELOC_NUMBER (R_NDS32_9_FIXED_RELA, 60) |
RELOC_NUMBER (R_NDS32_15_FIXED_RELA, 61) |
RELOC_NUMBER (R_NDS32_17_FIXED_RELA, 62) |
RELOC_NUMBER (R_NDS32_25_FIXED_RELA, 63) |
RELOC_NUMBER (R_NDS32_PLTREL_HI20, 64) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_PLTREL_LO12, 65) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_PLT_GOTREL_HI20, 66) |
RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO12, 67) |
RELOC_NUMBER (R_NDS32_SDA12S2_DP_RELA, 68) |
RELOC_NUMBER (R_NDS32_SDA12S2_SP_RELA, 69) |
RELOC_NUMBER (R_NDS32_LO12S2_DP_RELA, 70) |
RELOC_NUMBER (R_NDS32_LO12S2_SP_RELA, 71) |
RELOC_NUMBER (R_NDS32_LO12S0_ORI_RELA, 72) |
RELOC_NUMBER (R_NDS32_SDA16S3_RELA, 73) |
RELOC_NUMBER (R_NDS32_SDA17S2_RELA, 74) |
RELOC_NUMBER (R_NDS32_SDA18S1_RELA, 75) |
RELOC_NUMBER (R_NDS32_SDA19S0_RELA, 76) |
RELOC_NUMBER (R_NDS32_DWARF2_OP1_RELA, 77) |
RELOC_NUMBER (R_NDS32_DWARF2_OP2_RELA, 78) |
RELOC_NUMBER (R_NDS32_DWARF2_LEB_RELA, 79) |
RELOC_NUMBER (R_NDS32_UPDATE_TA_RELA, 80) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_9_PLTREL, 81) |
RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO20, 82) |
RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO15, 83) |
RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO19, 84) |
RELOC_NUMBER (R_NDS32_GOT_LO15, 85) |
RELOC_NUMBER (R_NDS32_GOT_LO19, 86) |
RELOC_NUMBER (R_NDS32_GOTOFF_LO15, 87) |
RELOC_NUMBER (R_NDS32_GOTOFF_LO19, 88) |
RELOC_NUMBER (R_NDS32_GOT15S2_RELA, 89) |
RELOC_NUMBER (R_NDS32_GOT17S2_RELA, 90) |
RELOC_NUMBER (R_NDS32_5_RELA, 91) |
RELOC_NUMBER (R_NDS32_10_UPCREL_RELA, 92) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_SDA_FP7U2_RELA, 93) |
RELOC_NUMBER (R_NDS32_WORD_9_PCREL_RELA, 94) |
RELOC_NUMBER (R_NDS32_25_ABS_RELA, 95) |
RELOC_NUMBER (R_NDS32_17IFC_PCREL_RELA, 96) |
RELOC_NUMBER (R_NDS32_10IFCU_PCREL_RELA, 97) |
RELOC_NUMBER (R_NDS32_TLS_LE_HI20, 98) |
RELOC_NUMBER (R_NDS32_TLS_LE_LO12, 99) |
RELOC_NUMBER (R_NDS32_TLS_IE_HI20, 100) |
RELOC_NUMBER (R_NDS32_TLS_IE_LO12S2, 101) |
RELOC_NUMBER (R_NDS32_TLS_TPOFF, 102) |
RELOC_NUMBER (R_NDS32_TLS_LE_20, 103) |
RELOC_NUMBER (R_NDS32_TLS_LE_15S0, 104) |
RELOC_NUMBER (R_NDS32_TLS_LE_15S1, 105) |
RELOC_NUMBER (R_NDS32_TLS_LE_15S2, 106) |
RELOC_NUMBER (R_NDS32_LONGCALL4, 107) |
RELOC_NUMBER (R_NDS32_LONGCALL5, 108) |
RELOC_NUMBER (R_NDS32_LONGCALL6, 109) |
RELOC_NUMBER (R_NDS32_LONGJUMP4, 110) |
RELOC_NUMBER (R_NDS32_LONGJUMP5, 111) |
RELOC_NUMBER (R_NDS32_LONGJUMP6, 112) |
RELOC_NUMBER (R_NDS32_LONGJUMP7, 113) |
RELOC_NUMBER (R_NDS32_RELAX_ENTRY, 192) |
RELOC_NUMBER (R_NDS32_GOT_SUFF, 193) |
RELOC_NUMBER (R_NDS32_GOTOFF_SUFF, 194) |
RELOC_NUMBER (R_NDS32_PLT_GOT_SUFF, 195) |
RELOC_NUMBER (R_NDS32_MULCALL_SUFF, 196) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_PTR, 197) |
RELOC_NUMBER (R_NDS32_PTR_COUNT, 198) |
RELOC_NUMBER (R_NDS32_PTR_RESOLVED, 199) |
RELOC_NUMBER (R_NDS32_PLTBLOCK, 200) /* This is obsoleted. */ |
RELOC_NUMBER (R_NDS32_RELAX_REGION_BEGIN, 201) |
RELOC_NUMBER (R_NDS32_RELAX_REGION_END, 202) |
RELOC_NUMBER (R_NDS32_MINUEND, 203) |
RELOC_NUMBER (R_NDS32_SUBTRAHEND, 204) |
RELOC_NUMBER (R_NDS32_DIFF8, 205) |
RELOC_NUMBER (R_NDS32_DIFF16, 206) |
RELOC_NUMBER (R_NDS32_DIFF32, 207) |
RELOC_NUMBER (R_NDS32_DIFF_ULEB128, 208) |
RELOC_NUMBER (R_NDS32_DATA, 209) |
RELOC_NUMBER (R_NDS32_TRAN, 210) |
RELOC_NUMBER (R_NDS32_TLS_LE_ADD, 211) |
RELOC_NUMBER (R_NDS32_TLS_LE_LS, 212) |
RELOC_NUMBER (R_NDS32_EMPTY, 213) |
END_RELOC_NUMBERS (R_NDS32_max) |
/* Processor specific section indices. These sections do not actually |
exist. Symbols with a st_shndx field corresponding to one of these |
values have a special meaning. */ |
/* Processor specific flags for the ELF header e_flags field. |
31 28 27 8 7 4 3 0 |
--------------------------------------------- |
| ARCH | CONFUGURAION FIELD | ABI | ELF_VER | |
--------------------------------------------- */ |
/* Architechure definition. */ |
/* 4-bit (b31-b28) nds32 architecture field. |
We can have up to 15 architectures; 0000 is for unknown. */ |
#define EF_NDS_ARCH 0xF0000000 |
#define EF_NDS_ARCH_SHIFT 28 |
/* There could be more architectures. For now, only n1 and n1h. */ |
#define E_NDS_ARCH_STAR_RESERVED 0x00000000 |
#define E_NDS_ARCH_STAR_V1_0 0x10000000 |
#define E_NDS_ARCH_STAR_V2_0 0x20000000 |
#define E_NDS_ARCH_STAR_V3_0 0x30000000 |
#define E_NDS_ARCH_STAR_V3_M 0x40000000 |
#define E_NDS_ARCH_STAR_V0_9 0x90000000 /* Obsoleted. */ |
/* n1 code. */ |
#define E_N1_ARCH E_NDS_ARCH_STAR_V0_9 |
/* n1h code. */ |
#define E_N1H_ARCH E_NDS_ARCH_STAR_V1_0 |
/* Configuration field definitioans. */ |
#define EF_NDS_INST 0x0FFFFF00 |
/* E_NDS_ARCH_STAR_V1_0 configuration fields. |
E_NDS_ARCH_STAR_V2_0 configuration fields. |
These are discarded in v2. |
* E_NDS32_HAS_MFUSR_PC_INST 0x00000100 |
* E_NDS32_HAS_DIV_INST 0x00002000 |
* E_NDS32_HAS_NO_MAC_INST 0x00100000 |
These are added in v2. |
* E_NDS32_HAS_DIV_DX_INST 0x00002000 |
* E_NDS32_HAS_MAC_DX_INST 0x00100000 */ |
/* MFUSR rt, PC and correct ISYNC, MSYNC instructions. |
Old N1213HC has no such instructions. */ |
#define E_NDS32_HAS_MFUSR_PC_INST 0x00000100 /* Reclaimed. */ |
#define E_NDS32_HAS_EX9_INST 0x00000100 /* v3, ELF 1.4. */ |
/* C/C++ performance extension instructions. */ |
#define E_NDS32_HAS_EXT_INST 0x00000200 |
/* Performance extension set II instructions. */ |
#define E_NDS32_HAS_EXT2_INST 0x00000400 |
/* Single precision Floating point processor instructions. */ |
#define E_NDS32_HAS_FPU_INST 0x00000800 |
/* Audio instructions with 32-bit audio dx.lo register. */ |
#define E_NDS32_HAS_AUDIO_INST 0x00001000 |
/* DIV instructions. */ |
#define E_NDS32_HAS_DIV_INST 0x00002000 /* Reclaimed. */ |
/* DIV instructions using d0/d1. */ |
#define E_NDS32_HAS_DIV_DX_INST 0x00002000 /* v2. */ |
/* 16-bit instructions. */ |
#define E_NDS32_HAS_16BIT_INST 0x00004000 /* Reclaimed. */ |
#define E_NDS32_HAS_IFC_INST 0x00004000 /* v3, ELF 1.4. */ |
/* String operation instructions. */ |
#define E_NDS32_HAS_STRING_INST 0x00008000 |
/* Reduced register file. */ |
#define E_NDS32_HAS_REDUCED_REGS 0x00010000 |
/* Video instructions. */ |
#define E_NDS32_HAS_VIDEO_INST 0x00020000 /* Reclaimed. */ |
#define E_NDS32_HAS_SATURATION_INST 0x00020000 /* v3, ELF 1.4. */ |
/* Encription instructions. */ |
#define E_NDS32_HAS_ENCRIPT_INST 0x00040000 |
/* Doulbe Precision Floating point processor instructions. */ |
#define E_NDS32_HAS_FPU_DP_INST 0x00080000 |
/* No MAC instruction used. */ |
#define E_NDS32_HAS_NO_MAC_INST 0x00100000 /* Reclaimed when V2/V3. */ |
/* MAC instruction using d0/d1. */ |
#define E_NDS32_HAS_MAC_DX_INST 0x00100000 /* v2. */ |
/* L2 cache instruction. */ |
#define E_NDS32_HAS_L2C_INST 0x00200000 |
/* FPU registers configuration when FPU SP/DP presents; 0x00c00000. */ |
#define E_NDS32_FPU_REG_CONF_SHIFT 22 |
#define E_NDS32_FPU_REG_CONF (0x3 << E_NDS32_FPU_REG_CONF_SHIFT) |
#define E_NDS32_FPU_REG_8SP_4DP 0x0 |
#define E_NDS32_FPU_REG_16SP_8DP 0x1 |
#define E_NDS32_FPU_REG_32SP_16DP 0x2 |
#define E_NDS32_FPU_REG_32SP_32DP 0x3 |
/* FPU MAC instruction used. */ |
#define E_NDS32_HAS_FPU_MAC_INST 0x01000000 |
/* <<<Empty Check>>>. */ |
#define E_NDS32_NULL 0x02000000 |
/* PIC enabled. */ |
#define E_NDS32_HAS_PIC 0x04000000 |
/* Use custom section. */ |
#define E_NDS32_HAS_CUSTOM_SEC 0x08000000 |
/* 4-bit for ABI signature, allow up to 16 ABIs |
0: for OLD ABI V0, phase out |
1: for V1 , starting with V0 toolchain |
2: for V2 |
3: for V2FP (fs0, fs1 as function parameter) |
4: for AABI */ |
/* Only old N1213HC use V0. |
New ABI is used due to return register is changed to r0 from r5. */ |
#define EF_NDS_ABI 0x000000F0 |
#define EF_NDS_ABI_SHIFT 4 |
#define E_NDS_ABI_V0 0x00000000 |
#define E_NDS_ABI_V1 0x00000010 |
#define E_NDS_ABI_V2 0x00000020 |
#define E_NDS_ABI_V2FP 0x00000030 |
#define E_NDS_ABI_AABI 0x00000040 |
#define E_NDS_ABI_V2FP_PLUS 0x00000050 |
/* This flag signifies the version of Andes ELF. |
Some more information may exist somewhere which is TBD. */ |
#define EF_NDS32_ELF_VERSION 0x0000000F |
#define EF_NDS32_ELF_VERSION_SHIFT 0 |
/* Andes ELF Version 1.3 and before. */ |
#define E_NDS32_ELF_VER_1_2 0x0 |
/* Andes ELF Version 1.31. */ |
#define E_NDS32_ELF_VER_1_3 0x1 |
/* Andes ELF Version 1.4. Change the way we fix .debug_* and .gcc_except_table. |
Change three bit for EX9, IFC and SAT. */ |
#define E_NDS32_ELF_VER_1_4 0x2 |
#endif |
/contrib/toolchain/binutils/include/elf/nios2.h |
---|
1,5 → 1,5 |
/* Altera Nios II ELF support for BFD. |
Copyright (C) 2012, 2013 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Contributed by Nigel Gray (ngray@altera.com). |
Contributed by Mentor Graphics, Inc. |
34,6 → 34,8 |
function to work properly. */ |
START_RELOC_NUMBERS (elf_nios2_reloc_type) |
/* Relocs used by both R1 and R2, with different howtos to match |
the respective encodings. */ |
RELOC_NUMBER (R_NIOS2_NONE, 0) |
RELOC_NUMBER (R_NIOS2_S16, 1) |
RELOC_NUMBER (R_NIOS2_U16, 2) |
75,7 → 77,29 |
RELOC_NUMBER (R_NIOS2_JUMP_SLOT, 38) |
RELOC_NUMBER (R_NIOS2_RELATIVE, 39) |
RELOC_NUMBER (R_NIOS2_GOTOFF, 40) |
RELOC_NUMBER (R_NIOS2_ILLEGAL, 41) |
RELOC_NUMBER (R_NIOS2_CALL26_NOAT, 41) |
RELOC_NUMBER (R_NIOS2_GOT_LO, 42) |
RELOC_NUMBER (R_NIOS2_GOT_HA, 43) |
RELOC_NUMBER (R_NIOS2_CALL_LO, 44) |
RELOC_NUMBER (R_NIOS2_CALL_HA, 45) |
/* Relocs specific to R2. */ |
RELOC_NUMBER (R_NIOS2_R2_S12, 64) |
RELOC_NUMBER (R_NIOS2_R2_I10_1_PCREL, 65) |
RELOC_NUMBER (R_NIOS2_R2_T1I7_1_PCREL, 66) |
RELOC_NUMBER (R_NIOS2_R2_T1I7_2, 67) |
RELOC_NUMBER (R_NIOS2_R2_T2I4, 68) |
RELOC_NUMBER (R_NIOS2_R2_T2I4_1, 69) |
RELOC_NUMBER (R_NIOS2_R2_T2I4_2, 70) |
RELOC_NUMBER (R_NIOS2_R2_X1I7_2, 71) |
RELOC_NUMBER (R_NIOS2_R2_X2L5, 72) |
RELOC_NUMBER (R_NIOS2_R2_F1I5_2, 73) |
RELOC_NUMBER (R_NIOS2_R2_L5I4X1, 74) |
RELOC_NUMBER (R_NIOS2_R2_T1X1I6, 75) |
RELOC_NUMBER (R_NIOS2_R2_T1X1I6_2, 76) |
/* Last reloc. */ |
RELOC_NUMBER (R_NIOS2_ILLEGAL, 77) |
END_RELOC_NUMBERS (R_NIOS2_maxext) |
/* Processor-specific section flags. */ |
88,4 → 112,9 |
/* Address of _gp. */ |
#define DT_NIOS2_GP 0x70000002 |
/* Processor specific flags for the Elf header e_flags field. */ |
#define EF_NIOS2_ARCH_R1 0x00000000 |
#define EF_NIOS2_ARCH_R2 0x00000001 |
#endif /* _ELF_NIOS2_H */ |
/contrib/toolchain/binutils/include/elf/or1k.h |
---|
0,0 → 1,65 |
/* Or1k ELF support for BFD. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, see <http://www.gnu.org/licenses/> */ |
#ifndef _ELF_OR1K_H |
#define _ELF_OR1K_H |
#include "elf/reloc-macros.h" |
/* Relocations. */ |
START_RELOC_NUMBERS (elf_or1k_reloc_type) |
RELOC_NUMBER (R_OR1K_NONE, 0) |
RELOC_NUMBER (R_OR1K_32, 1) |
RELOC_NUMBER (R_OR1K_16, 2) |
RELOC_NUMBER (R_OR1K_8, 3) |
RELOC_NUMBER (R_OR1K_LO_16_IN_INSN, 4) |
RELOC_NUMBER (R_OR1K_HI_16_IN_INSN, 5) |
RELOC_NUMBER (R_OR1K_INSN_REL_26, 6) |
RELOC_NUMBER (R_OR1K_GNU_VTENTRY, 7) |
RELOC_NUMBER (R_OR1K_GNU_VTINHERIT, 8) |
RELOC_NUMBER (R_OR1K_32_PCREL, 9) |
RELOC_NUMBER (R_OR1K_16_PCREL, 10) |
RELOC_NUMBER (R_OR1K_8_PCREL, 11) |
RELOC_NUMBER (R_OR1K_GOTPC_HI16, 12) |
RELOC_NUMBER (R_OR1K_GOTPC_LO16, 13) |
RELOC_NUMBER (R_OR1K_GOT16, 14) |
RELOC_NUMBER (R_OR1K_PLT26, 15) |
RELOC_NUMBER (R_OR1K_GOTOFF_HI16, 16) |
RELOC_NUMBER (R_OR1K_GOTOFF_LO16, 17) |
RELOC_NUMBER (R_OR1K_COPY, 18) |
RELOC_NUMBER (R_OR1K_GLOB_DAT, 19) |
RELOC_NUMBER (R_OR1K_JMP_SLOT, 20) |
RELOC_NUMBER (R_OR1K_RELATIVE, 21) |
RELOC_NUMBER (R_OR1K_TLS_GD_HI16, 22) |
RELOC_NUMBER (R_OR1K_TLS_GD_LO16, 23) |
RELOC_NUMBER (R_OR1K_TLS_LDM_HI16, 24) |
RELOC_NUMBER (R_OR1K_TLS_LDM_LO16, 25) |
RELOC_NUMBER (R_OR1K_TLS_LDO_HI16, 26) |
RELOC_NUMBER (R_OR1K_TLS_LDO_LO16, 27) |
RELOC_NUMBER (R_OR1K_TLS_IE_HI16, 28) |
RELOC_NUMBER (R_OR1K_TLS_IE_LO16, 29) |
RELOC_NUMBER (R_OR1K_TLS_LE_HI16, 30) |
RELOC_NUMBER (R_OR1K_TLS_LE_LO16, 31) |
RELOC_NUMBER (R_OR1K_TLS_TPOFF, 32) |
RELOC_NUMBER (R_OR1K_TLS_DTPOFF, 33) |
RELOC_NUMBER (R_OR1K_TLS_DTPMOD, 34) |
END_RELOC_NUMBERS (R_OR1K_max) |
#define EF_OR1K_NODELAY (1UL << 0) |
#endif /* _ELF_OR1K_H */ |
/contrib/toolchain/binutils/include/elf/pj.h |
---|
1,5 → 1,5 |
/* picoJava ELF support for BFD. |
Copyright 1999, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/ppc.h |
---|
1,6 → 1,5 |
/* PPC ELF support for BFD. |
Copyright 1995, 1996, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2008, |
2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1995-2015 Free Software Foundation, Inc. |
By Michael Meissner, Cygnus Support, <meissner@cygnus.com>, |
from information in the System V Application Binary Interface, |
150,6 → 149,9 |
RELOC_NUMBER (R_PPC_VLE_SDAREL_HA16A, 231) |
RELOC_NUMBER (R_PPC_VLE_SDAREL_HA16D, 232) |
/* Power9 split rel16 for addpcis. */ |
RELOC_NUMBER (R_PPC_REL16DX_HA, 246) |
/* Support STT_GNU_IFUNC plt calls. */ |
RELOC_NUMBER (R_PPC_IRELATIVE, 248) |
/contrib/toolchain/binutils/include/elf/ppc64.h |
---|
1,5 → 1,5 |
/* PPC64 ELF support for BFD. |
Copyright 2003, 2005, 2009, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
149,10 → 149,19 |
RELOC_NUMBER (R_PPC64_DTPREL16_HIGH, 114) |
RELOC_NUMBER (R_PPC64_DTPREL16_HIGHA, 115) |
/* Added for ELFv2. */ |
RELOC_NUMBER (R_PPC64_REL24_NOTOC, 116) |
RELOC_NUMBER (R_PPC64_ADDR64_LOCAL, 117) |
RELOC_NUMBER (R_PPC64_ENTRY, 118) |
#ifndef RELOC_MACROS_GEN_FUNC |
/* Fake relocation only used internally by ld. */ |
RELOC_NUMBER (R_PPC64_LO_DS_OPT, 128) |
#endif |
/* Power9 split rel16 for addpcis. */ |
RELOC_NUMBER (R_PPC64_REL16DX_HA, 246) |
/* Support STT_GNU_IFUNC plt calls. */ |
RELOC_NUMBER (R_PPC64_JMP_IREL, 247) |
RELOC_NUMBER (R_PPC64_IRELATIVE, 248) |
/contrib/toolchain/binutils/include/elf/reloc-macros.h |
---|
1,5 → 1,5 |
/* Generic relocation support for BFD. |
Copyright 1998, 1999, 2000, 2003, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/rl78.h |
---|
1,5 → 1,5 |
/* RL78 ELF support for BFD. |
Copyright (C) 2008-2013 Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
106,9 → 106,14 |
/* Values for the e_flags field in the ELF header. */ |
#define E_FLAG_RL78_64BIT_DOUBLES (1 << 0) |
#define E_FLAG_RL78_DSP (1 << 1) /* Defined in the RL78 CPU Object file specification, but not explained. */ |
#define E_FLAG_RL78_G10 (1 << 2) /* CPU is missing register banks 1-3, so uses different ABI. */ |
#define E_FLAG_RL78_CPU_MASK 0x0c |
#define E_FLAG_RL78_ANY_CPU 0x00 /* CPU not specified. Assume no CPU specific code usage. */ |
#define E_FLAG_RL78_G10 0x04 /* CPU is missing register banks 1-3, so uses different ABI. */ |
#define E_FLAG_RL78_G13 0x08 /* CPU uses a peripheral for multiply/divide. */ |
#define E_FLAG_RL78_G14 0x0c /* CPU has multiply/divide instructions. */ |
/* These define the addend field of R_RL78_RH_RELAX relocations. */ |
#define RL78_RELAXA_MASK 0x000000f0 /* Mask for relax types */ |
#define RL78_RELAXA_BRA 0x00000010 /* Any type of branch (must be decoded). */ |
#define RL78_RELAXA_ADDR16 0x00000020 /* addr16->sfr/saddr opportunity */ |
#define RL78_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */ |
/contrib/toolchain/binutils/include/elf/rx.h |
---|
1,5 → 1,5 |
/* RX ELF support for BFD. |
Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
120,6 → 120,11 |
#define E_FLAG_RX_PID (1 << 2) /* Unofficial - DJ */ |
#define E_FLAG_RX_ABI (1 << 3) /* Binary passes stacked arguments using natural alignment. Unofficial - NC. */ |
#define E_FLAG_RX_SINSNS_SET (1 << 6) /* Set if bit-5 is significant. */ |
#define E_FLAG_RX_SINSNS_YES (1 << 7) /* Set if string instructions are used in the binary. */ |
#define E_FLAG_RX_SINSNS_NO 0 /* Bit-5 if this binary must not be linked with a string instruction using binary. */ |
#define E_FLAG_RX_SINSNS_MASK (3 << 6) /* Mask of bits used to determine string instruction use. */ |
/* These define the addend field of R_RX_RH_RELAX relocations. */ |
#define RX_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */ |
#define RX_RELAXA_IMM12 0x00000020 /* Imm8/16/24/32 at bit offset 12. */ |
/contrib/toolchain/binutils/include/elf/s390.h |
---|
1,5 → 1,5 |
/* 390 ELF support for BFD. |
Copyright 2000, 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Carl B. Pedersen and Martin Schwidefsky. |
This file is part of BFD, the Binary File Descriptor library. |
129,6 → 129,17 |
RELOC_NUMBER (R_390_GNU_VTENTRY, 251) |
END_RELOC_NUMBERS (R_390_max) |
#endif /* _ELF_390_H */ |
/* Object attribute tags. */ |
enum |
{ |
/* 0-3 are generic. */ |
/* 4 is reserved for the FP ABI. */ |
/* Vector ABI: |
0 = not affected by the vector ABI, or not tagged. |
1 = software vector ABI being used |
2 = hardware vector ABI being used. */ |
Tag_GNU_S390_ABI_Vector = 8, |
}; |
#endif /* _ELF_390_H */ |
/contrib/toolchain/binutils/include/elf/score.h |
---|
1,5 → 1,5 |
/* Score ELF support for BFD. |
Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
Contributed by |
Brain.lin (brain.lin@sunplusct.com) |
Mei Ligang (ligang@sunnorth.com.cn) |
18,8 → 18,9 |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software Foundation, |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
along with this program; if not, write to the Free Software |
Foundation Inc., 51 Franklin Street - Fifth Floor, Boston, |
MA 02110-1301, USA. */ |
#ifndef _ELF_SCORE_H |
#define _ELF_SCORE_H |
/contrib/toolchain/binutils/include/elf/sh.h |
---|
1,6 → 1,5 |
/* SH ELF support for BFD. |
Copyright 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/sparc.h |
---|
1,7 → 1,5 |
/* SPARC ELF support for BFD. |
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2008, 2010, |
2011 |
Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
By Doug Evans, Cygnus Support, <dje@cygnus.com>. |
This file is part of BFD, the Binary File Descriptor library. |
192,9 → 190,19 |
{ |
/* 0-3 are generic. */ |
Tag_GNU_Sparc_HWCAPS = 4, |
Tag_GNU_Sparc_HWCAPS2 = 8 |
}; |
/* These values match the AV_SPARC_* hwcap bits defined under Solaris. */ |
/* Generally speaking the ELF_SPARC_HWCAP_* and ELF_SPARC_HWCAP2_* |
values match the AV_SPARC_* and AV2_SPARC_* bits respectively. |
However Solaris 11 introduced a backwards-incompatible change |
deprecating the RANDOM, TRANS and ASI_CACHE_SPARING bits in the |
AT_SUNW_CAP_HW1 flags, reusing the bits for the unrelated hwcaps |
FJATHHPC, FJDES and FJAES respectively. In GNU/Linux we opted to |
keep the old hwcaps in Tag_GNU_Sparc_HWCAPS and allocate bits for |
FJATHHPC, FJDES and JFAES in Tag_GNU_Sparc_HWCAPS2. */ |
#define ELF_SPARC_HWCAP_MUL32 0x00000001 /* umul/umulcc/smul/smulcc insns */ |
#define ELF_SPARC_HWCAP_DIV32 0x00000002 /* udiv/udivcc/sdiv/sdivcc insns */ |
#define ELF_SPARC_HWCAP_FSMULD 0x00000004 /* 'fsmuld' insn */ |
228,4 → 236,17 |
#define ELF_SPARC_HWCAP_CBCOND 0x10000000 /* Compare and Branch insns */ |
#define ELF_SPARC_HWCAP_CRC32C 0x20000000 /* CRC32C insn */ |
#define ELF_SPARC_HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */ |
#define ELF_SPARC_HWCAP2_VIS3B 0x00000002 /* Subset of VIS3 present on sparc64 X+ */ |
#define ELF_SPARC_HWCAP2_ADP 0x00000004 /* Application Data Protection */ |
#define ELF_SPARC_HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */ |
#define ELF_SPARC_HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */ |
#define ELF_SPARC_HWCAP2_XMPMUL 0x00000020 /* XOR multiple precision multiply */ |
#define ELF_SPARC_HWCAP2_XMONT 0x00000040 /* XOR Montgomery mult/sqr instructions */ |
#define ELF_SPARC_HWCAP2_NSEC \ |
0x00000080 /* pause insn with support for nsec timings */ |
#define ELF_SPARC_HWCAP2_FJATHHPC 0x00001000 /* Fujitsu HPC instrs */ |
#define ELF_SPARC_HWCAP2_FJDES 0x00002000 /* Fujitsu DES instrs */ |
#define ELF_SPARC_HWCAP2_FJAES 0x00010000 /* Fujitsu AES instrs */ |
#endif /* _ELF_SPARC_H */ |
/contrib/toolchain/binutils/include/elf/spu.h |
---|
1,6 → 1,6 |
/* SPU ELF support for BFD. |
Copyright 2006, 2007, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/tic6x-attrs.h |
---|
1,6 → 1,5 |
/* TI C6X ELF attributes. |
Copyright 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/tic6x.h |
---|
1,6 → 1,5 |
/* TI C6X ELF support for BFD. |
Copyright 2010, 2011 |
Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/tilegx.h |
---|
1,5 → 1,5 |
/* TILE-Gx ELF support for BFD. |
Copyright 2011 Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/tilepro.h |
---|
1,5 → 1,5 |
/* TILEPro ELF support for BFD. |
Copyright 2011 Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/v850.h |
---|
1,5 → 1,5 |
/* V850 ELF support for BFD. |
Copyright 1997-2013 Free Software Foundation, Inc. |
Copyright (C) 1997-2015 Free Software Foundation, Inc. |
Created by Michael Meissner, Cygnus Support <meissner@cygnus.com> |
This file is part of BFD, the Binary File Descriptor library. |
158,12 → 158,8 |
#define EF_RH850_FPU_DOUBLE 0x00000001 /* sizeof(double) == 8. */ |
#define EF_RH850_FPU_SINGLE 0x00000002 /* sizeof(double) == 4. */ |
#define EF_RH850_SIMD 0x00000004 |
#define EF_RH850_CACHE 0x00000008 |
#define EF_RH850_MMU 0x00000010 |
#define EF_RH850_REGMODE22 0x00000020 /* Registers r15-r24 (inclusive) are not used. */ |
#define EF_RH850_REGMODE32 0x00000040 |
#define EF_RH850_DATA_ALIGN8 0x00000080 /* 8-byte alignment supported. */ |
#define EF_RH850_GP_FIX 0x00000100 /* r4 is fixed. */ |
#define EF_RH850_GP_NOFIX 0x00000200 /* r4 is callee save. */ |
#define EF_RH850_EP_FIX 0x00000400 /* r30 is fixed. */ |
173,7 → 169,7 |
#define EF_RH850_REG2_RESERVE 0x00004000 /* r2 is fixed. */ |
#define EF_RH850_REG2_NORESERVE 0x00008000 /* r2 is callee saved. */ |
#define SHT_RNESAS_IOP SHT_LOUSER /* Used by Renesas linker. */ |
#define SHT_RENESAS_IOP SHT_LOUSER /* Used by Renesas linker. */ |
#define SHF_RENESAS_ABS 0x80000000 /* Absolute section. */ |
#define SHF_GHS_ABS 0x00000400 /* Use unknown. */ |
280,4 → 276,54 |
END_RELOC_NUMBERS (R_V800_max) |
/* Type for Renesas note sections. NB/ This is in application space |
rather than processor space as it refers to the requirements of the |
binary concerned. A given processor may be able to handle multiple |
different types of application. */ |
#define SHT_RENESAS_INFO 0xa0000000 |
/* Contents of a Renesas note entry: |
namesz +------------------+ |
| 4 | "REL\0" |
descsz +------------------+ |
| 4 | Currently 4byte only |
type +------------------+ |
| ID | |
name +------------------+ |
| REL\0 | |
desc +------------------+ |
| Value | |
+------------------+ */ |
#define V850_NOTE_SECNAME ".note.renesas" |
#define SIZEOF_V850_NOTE 20 |
#define V850_NOTE_NAME "REL" |
enum v850_notes |
{ |
V850_NOTE_ALIGNMENT = 1, /* Alignment of 8-byte entities. */ |
#define EF_RH850_DATA_ALIGN4 0x0001 /* Aligned to 4-byte bounadries. */ |
#define EF_RH850_DATA_ALIGN8 0x0002 /* Aligned to 8-byte bounadries. */ |
V850_NOTE_DATA_SIZE = 2, /* Sizeof double and long double. */ |
#define EF_RH850_DOUBLE32 0x0001 /* 32-bits in size. */ |
#define EF_RH850_DOUBLE64 0x0002 /* 64-bits in size. */ |
V850_NOTE_FPU_INFO = 3, /* Defined if extended floating point insns are used. */ |
#define EF_RH850_FPU20 0x0001 /* Set if [N]]M{ADD|SUB}F.S are used. */ |
#define EF_RH850_FPU30 0x0002 /* Set if ADSF.D or ADDF.D is used. */ |
V850_NOTE_SIMD_INFO = 4, |
#define EF_RH850_SIMD 0x0001 |
V850_NOTE_CACHE_INFO = 5, |
#define EF_RH850_CACHE 0x0001 |
V850_NOTE_MMU_INFO = 6 |
#define EF_RH850_MMU 0x0001 |
}; |
#define NUM_V850_NOTES V850_NOTE_MMU_INFO |
#endif /* _ELF_V850_H */ |
/contrib/toolchain/binutils/include/elf/vax.h |
---|
1,5 → 1,5 |
/* VAX ELF support for BFD. |
Copyright (C) 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Contributed by Matt Thomas <matt@3am-software.com>. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/visium.h |
---|
0,0 → 1,51 |
/* Visium ELF support for BFD. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software Foundation, |
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
#ifndef _ELF_VISIUM_H |
#define _ELF_VISIUM_H |
#include "elf/reloc-macros.h" |
/* Processor specific flags for the ELF header e_flags field. */ |
#define EF_VISIUM_ARCH_MCM 0x01 |
#define EF_VISIUM_ARCH_MCM24 0x02 |
#define EF_VISIUM_ARCH_GR6 0x04 |
/* Relocations. */ |
START_RELOC_NUMBERS (elf_visium_reloc_type) |
RELOC_NUMBER (R_VISIUM_NONE, 0) |
RELOC_NUMBER (R_VISIUM_8, 1) |
RELOC_NUMBER (R_VISIUM_16, 2) |
RELOC_NUMBER (R_VISIUM_32, 3) |
RELOC_NUMBER (R_VISIUM_8_PCREL, 4) |
RELOC_NUMBER (R_VISIUM_16_PCREL, 5) |
RELOC_NUMBER (R_VISIUM_32_PCREL, 6) |
RELOC_NUMBER (R_VISIUM_PC16, 7) |
RELOC_NUMBER (R_VISIUM_HI16, 8) |
RELOC_NUMBER (R_VISIUM_LO16, 9) |
RELOC_NUMBER (R_VISIUM_IM16, 10) |
RELOC_NUMBER (R_VISIUM_HI16_PCREL, 11) |
RELOC_NUMBER (R_VISIUM_LO16_PCREL, 12) |
RELOC_NUMBER (R_VISIUM_IM16_PCREL, 13) |
RELOC_NUMBER (R_VISIUM_GNU_VTINHERIT, 200) |
RELOC_NUMBER (R_VISIUM_GNU_VTENTRY, 201) |
END_RELOC_NUMBERS(R_VISIUM_max) |
#endif /* _ELF_VISIUM_H */ |
/contrib/toolchain/binutils/include/elf/vxworks.h |
---|
1,6 → 1,5 |
/* VxWorks ELF support for BFD. |
Copyright 2007, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2007-2015 Free Software Foundation, Inc. |
Contributed by Nathan Sidwell <nathan@codesourcery.com> |
/contrib/toolchain/binutils/include/elf/x86-64.h |
---|
1,6 → 1,5 |
/* x86_64 ELF support for BFD. |
Copyright (C) 2000, 2001, 2002, 2004, 2005, 2006, 2008, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Jan Hubicka <jh@suse.cz> |
This file is part of BFD, the Binary File Descriptor library. |
59,8 → 58,7 |
offset to GOT entry */ |
RELOC_NUMBER (R_X86_64_GOTPC64, 29) /* 64 bit signed pc relative |
offset to GOT */ |
RELOC_NUMBER (R_X86_64_GOTPLT64, 30) /* like GOT64, but indicates |
that PLT entry is needed */ |
RELOC_NUMBER (R_X86_64_GOTPLT64, 30) /* Obsolete. The same as GOT64. */ |
RELOC_NUMBER (R_X86_64_PLTOFF64, 31) /* 64 bit GOT relative offset |
to PLT entry */ |
RELOC_NUMBER (R_X86_64_SIZE32, 32) /* 32-bit symbol size */ |
78,6 → 76,12 |
signed with BND prefix */ |
RELOC_NUMBER (R_X86_64_PLT32_BND, 40) /* 32 bit PLT address with |
BND prefix */ |
/* Load from 32 bit signed pc relative offset to GOT entry without |
REX prefix, relaxable. */ |
RELOC_NUMBER (R_X86_64_GOTPCRELX, 41) |
/* Load from 32 bit signed pc relative offset to GOT entry with |
REX prefix, relaxable. */ |
RELOC_NUMBER (R_X86_64_REX_GOTPCRELX, 42) |
RELOC_NUMBER (R_X86_64_GNU_VTINHERIT, 250) /* GNU C++ hack */ |
RELOC_NUMBER (R_X86_64_GNU_VTENTRY, 251) /* GNU C++ hack */ |
END_RELOC_NUMBERS (R_X86_64_max) |
/contrib/toolchain/binutils/include/elf/xc16x.h |
---|
1,5 → 1,5 |
/* Infineon XC16X ELF support for BFD. |
Copyright 2006, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
Contributed by KPIT Cummins Infosystems |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/xgate.h |
---|
1,5 → 1,5 |
/* XGATE ELF support for BFD. |
Copyright 2010, 2011, 2012 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/xstormy16.h |
---|
1,5 → 1,5 |
/* XSTORMY16 ELF support for BFD. |
Copyright (C) 2001, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/elf/xtensa.h |
---|
1,5 → 1,5 |
/* Xtensa ELF support for BFD. |
Copyright 2003, 2004, 2007, 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/fibheap.h |
---|
1,6 → 1,5 |
/* A Fibonacci heap datatype. |
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2009 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by Daniel Berlin (dan@cgsoftware.com). |
This file is part of GCC. |
/contrib/toolchain/binutils/include/filenames.h |
---|
5,7 → 5,7 |
use forward- and back-slash in path names interchangeably, and |
some of them have case-insensitive file names. |
Copyright 2000, 2001, 2007, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
90,6 → 90,8 |
extern int filename_eq (const void *s1, const void *s2); |
extern int canonical_filename_eq (const char *a, const char *b); |
#ifdef __cplusplus |
} |
#endif |
/contrib/toolchain/binutils/include/floatformat.h |
---|
1,6 → 1,5 |
/* IEEE floating point support declarations, for GDB, the GNU Debugger. |
Copyright 1991, 1994, 1995, 1997, 2000, 2003, 2005, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
23,6 → 22,10 |
#include "ansidecl.h" |
#ifdef __cplusplus |
extern "C" { |
#endif |
/* A floatformat consists of a sign bit, an exponent and a mantissa. Once the |
bytes are concatenated according to the byteorder flag, then each of those |
fields is contiguous. We number the bits with 0 being the most significant |
149,4 → 152,8 |
extern int |
floatformat_is_valid (const struct floatformat *fmt, const void *from); |
#ifdef __cplusplus |
} |
#endif |
#endif /* defined (FLOATFORMAT_H) */ |
/contrib/toolchain/binutils/include/fnmatch.h |
---|
1,4 → 1,4 |
/* Copyright 1991, 1992, 1993, 1996 Free Software Foundation, Inc. |
/* Copyright (C) 1991-2015 Free Software Foundation, Inc. |
NOTE: The canonical source of this file is maintained with the GNU C Library. |
Bugs can be reported to bug-glibc@prep.ai.mit.edu. |
/contrib/toolchain/binutils/include/fopen-bin.h |
---|
7,7 → 7,7 |
cope with a "b" in the string, indicating binary files, but some reject this |
(and thereby don't conform to ANSI C, but what else is new?). |
Copyright 1996-2012 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/fopen-same.h |
---|
7,7 → 7,7 |
"b" to the string, indicating binary files, but some reject this |
(and thereby don't conform to ANSI C, but what else is new?). |
Copyright 1996-2012 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/fopen-vms.h |
---|
5,7 → 5,7 |
This version is for VMS systems, where text and binary files are |
different. |
Copyright 1996-2012 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/gcc-c-fe.def |
---|
0,0 → 1,197 |
/* Interface between GCC C FE and GDB -*- c -*- |
Copyright (C) 2014-2015 Free Software Foundation, Inc. |
This file is part of GCC. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
/* Create a new "decl" in GCC. A decl is a declaration, basically a |
kind of symbol. |
NAME is the name of the new symbol. SYM_KIND is the kind of |
symbol being requested. SYM_TYPE is the new symbol's C type; |
except for labels, where this is not meaningful and should be |
zero. If SUBSTITUTION_NAME is not NULL, then a reference to this |
decl in the source will later be substituted with a dereference |
of a variable of the given name. Otherwise, for symbols having |
an address (e.g., functions), ADDRESS is the address. FILENAME |
and LINE_NUMBER refer to the symbol's source location. If this |
is not known, FILENAME can be NULL and LINE_NUMBER can be 0. |
This function returns the new decl. */ |
GCC_METHOD7 (gcc_decl, build_decl, |
const char *, /* Argument NAME. */ |
enum gcc_c_symbol_kind, /* Argument SYM_KIND. */ |
gcc_type, /* Argument SYM_TYPE. */ |
const char *, /* Argument SUBSTITUTION_NAME. */ |
gcc_address, /* Argument ADDRESS. */ |
const char *, /* Argument FILENAME. */ |
unsigned int) /* Argument LINE_NUMBER. */ |
/* Insert a GCC decl into the symbol table. DECL is the decl to |
insert. IS_GLOBAL is true if this is an outermost binding, and |
false if it is a possibly-shadowing binding. */ |
GCC_METHOD2 (int /* bool */, bind, |
gcc_decl, /* Argument DECL. */ |
int /* bool */) /* Argument IS_GLOBAL. */ |
/* Insert a tagged type into the symbol table. NAME is the tag name |
of the type and TAGGED_TYPE is the type itself. TAGGED_TYPE must |
be either a struct, union, or enum type, as these are the only |
types that have tags. FILENAME and LINE_NUMBER refer to the type's |
source location. If this is not known, FILENAME can be NULL and |
LINE_NUMBER can be 0. */ |
GCC_METHOD4 (int /* bool */, tagbind, |
const char *, /* Argument NAME. */ |
gcc_type, /* Argument TAGGED_TYPE. */ |
const char *, /* Argument FILENAME. */ |
unsigned int) /* Argument LINE_NUMBER. */ |
/* Return the type of a pointer to a given base type. */ |
GCC_METHOD1 (gcc_type, build_pointer_type, |
gcc_type) /* Argument BASE_TYPE. */ |
/* Create a new 'struct' type. Initially it has no fields. */ |
GCC_METHOD0 (gcc_type, build_record_type) |
/* Create a new 'union' type. Initially it has no fields. */ |
GCC_METHOD0 (gcc_type, build_union_type) |
/* Add a field to a struct or union type. FIELD_NAME is the field's |
name. FIELD_TYPE is the type of the field. BITSIZE and BITPOS |
indicate where in the struct the field occurs. */ |
GCC_METHOD5 (int /* bool */, build_add_field, |
gcc_type, /* Argument RECORD_OR_UNION_TYPE. */ |
const char *, /* Argument FIELD_NAME. */ |
gcc_type, /* Argument FIELD_TYPE. */ |
unsigned long, /* Argument BITSIZE. */ |
unsigned long) /* Argument BITPOS. */ |
/* After all the fields have been added to a struct or union, the |
struct or union type must be "finished". This does some final |
cleanups in GCC. */ |
GCC_METHOD2 (int /* bool */, finish_record_or_union, |
gcc_type, /* Argument RECORD_OR_UNION_TYPE. */ |
unsigned long) /* Argument SIZE_IN_BYTES. */ |
/* Create a new 'enum' type. The new type initially has no |
associated constants. */ |
GCC_METHOD1 (gcc_type, build_enum_type, |
gcc_type) /* Argument UNDERLYING_INT_TYPE. */ |
/* Add a new constant to an enum type. NAME is the constant's |
name and VALUE is its value. */ |
GCC_METHOD3 (int /* bool */, build_add_enum_constant, |
gcc_type, /* Argument ENUM_TYPE. */ |
const char *, /* Argument NAME. */ |
unsigned long) /* Argument VALUE. */ |
/* After all the constants have been added to an enum, the type must |
be "finished". This does some final cleanups in GCC. */ |
GCC_METHOD1 (int /* bool */, finish_enum_type, |
gcc_type) /* Argument ENUM_TYPE. */ |
/* Create a new function type. RETURN_TYPE is the type returned by |
the function, and ARGUMENT_TYPES is a vector, of length NARGS, of |
the argument types. IS_VARARGS is true if the function is |
varargs. */ |
GCC_METHOD3 (gcc_type, build_function_type, |
gcc_type, /* Argument RETURN_TYPE. */ |
const struct gcc_type_array *, /* Argument ARGUMENT_TYPES. */ |
int /* bool */) /* Argument IS_VARARGS. */ |
/* Return an integer type with the given properties. */ |
GCC_METHOD2 (gcc_type, int_type, |
int /* bool */, /* Argument IS_UNSIGNED. */ |
unsigned long) /* Argument SIZE_IN_BYTES. */ |
/* Return a floating point type with the given properties. */ |
GCC_METHOD1 (gcc_type, float_type, |
unsigned long) /* Argument SIZE_IN_BYTES. */ |
/* Return the 'void' type. */ |
GCC_METHOD0 (gcc_type, void_type) |
/* Return the 'bool' type. */ |
GCC_METHOD0 (gcc_type, bool_type) |
/* Create a new array type. If NUM_ELEMENTS is -1, then the array |
is assumed to have an unknown length. */ |
GCC_METHOD2 (gcc_type, build_array_type, |
gcc_type, /* Argument ELEMENT_TYPE. */ |
int) /* Argument NUM_ELEMENTS. */ |
/* Create a new variably-sized array type. UPPER_BOUND_NAME is the |
name of a local variable that holds the upper bound of the array; |
it is one less than the array size. */ |
GCC_METHOD2 (gcc_type, build_vla_array_type, |
gcc_type, /* Argument ELEMENT_TYPE. */ |
const char *) /* Argument UPPER_BOUND_NAME. */ |
/* Return a qualified variant of a given base type. QUALIFIERS says |
which qualifiers to use; it is composed of or'd together |
constants from 'enum gcc_qualifiers'. */ |
GCC_METHOD2 (gcc_type, build_qualified_type, |
gcc_type, /* Argument UNQUALIFIED_TYPE. */ |
enum gcc_qualifiers) /* Argument QUALIFIERS. */ |
/* Build a complex type given its element type. */ |
GCC_METHOD1 (gcc_type, build_complex_type, |
gcc_type) /* Argument ELEMENT_TYPE. */ |
/* Build a vector type given its element type and number of |
elements. */ |
GCC_METHOD2 (gcc_type, build_vector_type, |
gcc_type, /* Argument ELEMENT_TYPE. */ |
int) /* Argument NUM_ELEMENTS. */ |
/* Build a constant. NAME is the constant's name and VALUE is its |
value. FILENAME and LINE_NUMBER refer to the type's source |
location. If this is not known, FILENAME can be NULL and |
LINE_NUMBER can be 0. */ |
GCC_METHOD5 (int /* bool */, build_constant, |
gcc_type, /* Argument TYPE. */ |
const char *, /* Argument NAME. */ |
unsigned long, /* Argument VALUE. */ |
const char *, /* Argument FILENAME. */ |
unsigned int) /* Argument LINE_NUMBER. */ |
/* Emit an error and return an error type object. */ |
GCC_METHOD1 (gcc_type, error, |
const char *) /* Argument MESSAGE. */ |
/contrib/toolchain/binutils/include/gcc-c-interface.h |
---|
0,0 → 1,220 |
/* Interface between GCC C FE and GDB |
Copyright (C) 2014-2015 Free Software Foundation, Inc. |
This file is part of GCC. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
#ifndef GCC_C_INTERFACE_H |
#define GCC_C_INTERFACE_H |
#include "gcc-interface.h" |
/* This header defines the interface to the GCC API. It must be both |
valid C and valid C++, because it is included by both programs. */ |
#ifdef __cplusplus |
extern "C" { |
#endif |
/* Forward declaration. */ |
struct gcc_c_context; |
/* |
* Definitions and declarations for the C front end. |
*/ |
/* Defined versions of the C front-end API. */ |
enum gcc_c_api_version |
{ |
GCC_C_FE_VERSION_0 = 0 |
}; |
/* Qualifiers. */ |
enum gcc_qualifiers |
{ |
GCC_QUALIFIER_CONST = 1, |
GCC_QUALIFIER_VOLATILE = 2, |
GCC_QUALIFIER_RESTRICT = 4 |
}; |
/* This enumerates the kinds of decls that GDB can create. */ |
enum gcc_c_symbol_kind |
{ |
/* A function. */ |
GCC_C_SYMBOL_FUNCTION, |
/* A variable. */ |
GCC_C_SYMBOL_VARIABLE, |
/* A typedef. */ |
GCC_C_SYMBOL_TYPEDEF, |
/* A label. */ |
GCC_C_SYMBOL_LABEL |
}; |
/* This enumerates the types of symbols that GCC might request from |
GDB. */ |
enum gcc_c_oracle_request |
{ |
/* An ordinary symbol -- a variable, function, typedef, or enum |
constant. */ |
GCC_C_ORACLE_SYMBOL, |
/* A struct, union, or enum tag. */ |
GCC_C_ORACLE_TAG, |
/* A label. */ |
GCC_C_ORACLE_LABEL |
}; |
/* The type of the function called by GCC to ask GDB for a symbol's |
definition. DATUM is an arbitrary value supplied when the oracle |
function is registered. CONTEXT is the GCC context in which the |
request is being made. REQUEST specifies what sort of symbol is |
being requested, and IDENTIFIER is the name of the symbol. */ |
typedef void gcc_c_oracle_function (void *datum, |
struct gcc_c_context *context, |
enum gcc_c_oracle_request request, |
const char *identifier); |
/* The type of the function called by GCC to ask GDB for a symbol's |
address. This should return 0 if the address is not known. */ |
typedef gcc_address gcc_c_symbol_address_function (void *datum, |
struct gcc_c_context *ctxt, |
const char *identifier); |
/* An array of types used for creating a function type. */ |
struct gcc_type_array |
{ |
/* Number of elements. */ |
int n_elements; |
/* The elements. */ |
gcc_type *elements; |
}; |
/* The vtable used by the C front end. */ |
struct gcc_c_fe_vtable |
{ |
/* The version of the C interface. The value is one of the |
gcc_c_api_version constants. */ |
unsigned int c_version; |
/* Set the callbacks for this context. |
The binding oracle is called whenever the C parser needs to look |
up a symbol. This gives the caller a chance to lazily |
instantiate symbols using other parts of the gcc_c_fe_interface |
API. |
The address oracle is called whenever the C parser needs to look |
up a symbol. This is only called for symbols not provided by the |
symbol oracle -- that is, just built-in functions where GCC |
provides the declaration. |
DATUM is an arbitrary piece of data that is passed back verbatim |
to the callbakcs in requests. */ |
void (*set_callbacks) (struct gcc_c_context *self, |
gcc_c_oracle_function *binding_oracle, |
gcc_c_symbol_address_function *address_oracle, |
void *datum); |
#define GCC_METHOD0(R, N) \ |
R (*N) (struct gcc_c_context *); |
#define GCC_METHOD1(R, N, A) \ |
R (*N) (struct gcc_c_context *, A); |
#define GCC_METHOD2(R, N, A, B) \ |
R (*N) (struct gcc_c_context *, A, B); |
#define GCC_METHOD3(R, N, A, B, C) \ |
R (*N) (struct gcc_c_context *, A, B, C); |
#define GCC_METHOD4(R, N, A, B, C, D) \ |
R (*N) (struct gcc_c_context *, A, B, C, D); |
#define GCC_METHOD5(R, N, A, B, C, D, E) \ |
R (*N) (struct gcc_c_context *, A, B, C, D, E); |
#define GCC_METHOD7(R, N, A, B, C, D, E, F, G) \ |
R (*N) (struct gcc_c_context *, A, B, C, D, E, F, G); |
#include "gcc-c-fe.def" |
#undef GCC_METHOD0 |
#undef GCC_METHOD1 |
#undef GCC_METHOD2 |
#undef GCC_METHOD3 |
#undef GCC_METHOD4 |
#undef GCC_METHOD5 |
#undef GCC_METHOD7 |
}; |
/* The C front end object. */ |
struct gcc_c_context |
{ |
/* Base class. */ |
struct gcc_base_context base; |
/* Our vtable. This is a separate field because this is simpler |
than implementing a vtable inheritance scheme in C. */ |
const struct gcc_c_fe_vtable *c_ops; |
}; |
/* The name of the .so that the compiler builds. We dlopen this |
later. */ |
#define GCC_C_FE_LIBCC libcc1.so |
/* The compiler exports a single initialization function. This macro |
holds its name as a symbol. */ |
#define GCC_C_FE_CONTEXT gcc_c_fe_context |
/* The type of the initialization function. The caller passes in the |
desired base version and desired C-specific version. If the |
request can be satisfied, a compatible gcc_context object will be |
returned. Otherwise, the function returns NULL. */ |
typedef struct gcc_c_context *gcc_c_fe_context_function |
(enum gcc_base_api_version, |
enum gcc_c_api_version); |
#ifdef __cplusplus |
} |
#endif |
#endif /* GCC_C_INTERFACE_H */ |
/contrib/toolchain/binutils/include/gcc-interface.h |
---|
0,0 → 1,127 |
/* Generic interface between GCC and GDB |
Copyright (C) 2014-2015 Free Software Foundation, Inc. |
This file is part of GCC. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
#ifndef GCC_INTERFACE_H |
#define GCC_INTERFACE_H |
/* This header defines the interface to the GCC API. It must be both |
valid C and valid C++, because it is included by both programs. */ |
#ifdef __cplusplus |
extern "C" { |
#endif |
/* Opaque typedefs for objects passed through the interface. */ |
typedef unsigned long long gcc_type; |
typedef unsigned long long gcc_decl; |
/* An address in the inferior. */ |
typedef unsigned long long gcc_address; |
/* Forward declaration. */ |
struct gcc_base_context; |
/* Defined versions of the generic API. */ |
enum gcc_base_api_version |
{ |
GCC_FE_VERSION_0 = 0 |
}; |
/* The operations defined by the GCC base API. This is the vtable for |
the real context structure which is passed around. |
The "base" API is concerned with basics shared by all compiler |
front ends: setting command-line arguments, the file names, etc. |
Front-end-specific interfaces inherit from this one. */ |
struct gcc_base_vtable |
{ |
/* The actual version implemented in this interface. This field can |
be relied on not to move, so users can always check it if they |
desire. The value is one of the gcc_base_api_version constants. |
*/ |
unsigned int version; |
/* Set the compiler's command-line options for the next compilation. |
TRIPLET_REGEXP is a regular expression that is used to match the |
configury triplet prefix to the compiler. |
The arguments are copied by GCC. ARGV need not be |
NULL-terminated. The arguments must be set separately for each |
compilation; that is, after a compile is requested, the |
previously-set arguments cannot be reused. |
This returns NULL on success. On failure, returns a malloc()d |
error message. The caller is responsible for freeing it. */ |
char *(*set_arguments) (struct gcc_base_context *self, |
const char *triplet_regexp, |
int argc, char **argv); |
/* Set the file name of the program to compile. The string is |
copied by the method implementation, but the caller must |
guarantee that the file exists through the compilation. */ |
void (*set_source_file) (struct gcc_base_context *self, const char *file); |
/* Set a callback to use for printing error messages. DATUM is |
passed through to the callback unchanged. */ |
void (*set_print_callback) (struct gcc_base_context *self, |
void (*print_function) (void *datum, |
const char *message), |
void *datum); |
/* Perform the compilation. FILENAME is the name of the resulting |
object file. VERBOSE can be set to cause GCC to print some |
information as it works. Returns true on success, false on |
error. */ |
int /* bool */ (*compile) (struct gcc_base_context *self, |
const char *filename, |
int /* bool */ verbose); |
/* Destroy this object. */ |
void (*destroy) (struct gcc_base_context *self); |
}; |
/* The GCC object. */ |
struct gcc_base_context |
{ |
/* The virtual table. */ |
const struct gcc_base_vtable *ops; |
}; |
/* The name of the dummy wrapper function generated by gdb. */ |
#define GCC_FE_WRAPPER_FUNCTION "_gdb_expr" |
#ifdef __cplusplus |
} |
#endif |
#endif /* GCC_INTERFACE_H */ |
/contrib/toolchain/binutils/include/gdb/ChangeLog |
---|
1,3 → 1,56 |
2015-11-10 Mike Frysinger <vapier@gentoo.org> |
* sim-cr16.h (sim_cr16_translate_dmap_addr): Delete. |
(sim_cr16_translate_imap_addr): Likewise. |
(sim_cr16_translate_addr): Likewise. |
* sim-d10v.h (sim_d10v_translate_dmap_addr): Delete. |
(sim_d10v_translate_imap_addr): Likewise. |
(sim_d10v_translate_addr): Likewise. |
2015-06-17 Mike Frysinger <vapier@gentoo.org> |
* callback.h (CB_TARGET_DEFS_MAP): Add name member. |
(cb_host_str_syscall, cb_host_str_errno, cb_host_str_signal, |
cb_target_str_syscall, cb_target_str_errno, cb_target_str_signal): |
Declare. |
2015-03-28 James Bowman <james.bowman@ftdichip.com> |
* sim-ft32.h: New file. |
2015-05-15 Mike Frysinger <vapier@gentoo.org> |
* remote-sim.h (struct host_callback_struct): Define. |
2015-01-31 Doug Evans <xdje42@gmail.com> |
* section-scripts.h: Remove "future extension" comment. |
(SECTION_SCRIPT_ID_PYTHON_TEXT): New macro. |
(SECTION_SCRIPT_ID_SCHEME_TEXT): New macro. |
2014-12-03 Joel Brobecker <brobecker@adacore.com> |
* callback.h (struct host_callback_struct) <to_stat>: Renamed |
from "stat". |
<to_fstat>: Renamed from "fstat". |
<to_lstat>: Renamed from "lstat". |
2014-03-10 Mike Frysinger <vapier@gentoo.org> |
* remote-sim.h (sim_do_command): Add const to cmd. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright notice. |
2014-03-05 Mike Frysinger <vapier@gentoo.org> |
* remote-sim.h (sim_load): Add const to prog. |
2014-02-09 Doug Evans <xdje42@gmail.com> |
* section-scripts.h: New file. |
2013-03-15 Steve Ellcey <sellcey@mips.com> |
* gdb/remote-sim.h (sim_command_completer): Make char arguments const. |
258,7 → 311,7 |
* signals.h: New file, from gdb/defs.h. |
Copyright (C) 2002-2013 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/gdb/callback.h |
---|
1,5 → 1,5 |
/* Remote target system call callback support. |
Copyright 1997-2013 Free Software Foundation, Inc. |
Copyright (C) 1997-2015 Free Software Foundation, Inc. |
Contributed by Cygnus Solutions. |
This file is part of GDB. |
59,6 → 59,7 |
name of the symbol. */ |
typedef struct { |
const char *name; |
int host_val; |
int target_val; |
} CB_TARGET_DEFS_MAP; |
88,9 → 89,9 |
void (*flush_stdout) (host_callback *); |
int (*write_stderr) (host_callback *, const char *, int); |
void (*flush_stderr) (host_callback *); |
int (*stat) (host_callback *, const char *, struct stat *); |
int (*fstat) (host_callback *, int, struct stat *); |
int (*lstat) (host_callback *, const char *, struct stat *); |
int (*to_stat) (host_callback *, const char *, struct stat *); |
int (*to_fstat) (host_callback *, int, struct stat *); |
int (*to_lstat) (host_callback *, const char *, struct stat *); |
int (*ftruncate) (host_callback *, int, long); |
int (*truncate) (host_callback *, const char *, long); |
int (*pipe) (host_callback *, int *); |
316,6 → 317,14 |
/* Translate host signal number to target. */ |
int cb_host_to_gdb_signal (host_callback *, int); |
/* Translate symbols into human readable strings. */ |
const char *cb_host_str_syscall (host_callback *, int); |
const char *cb_host_str_errno (host_callback *, int); |
const char *cb_host_str_signal (host_callback *, int); |
const char *cb_target_str_syscall (host_callback *, int); |
const char *cb_target_str_errno (host_callback *, int); |
const char *cb_target_str_signal (host_callback *, int); |
/* Translate host stat struct to target. |
If stat struct ptr is NULL, just compute target stat struct size. |
Result is size of target stat struct or 0 if error. */ |
/contrib/toolchain/binutils/include/gdb/fileio.h |
---|
1,6 → 1,6 |
/* Hosted File I/O interface definitions, for GDB, the GNU Debugger. |
Copyright 2003-2013 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/gdb/gdb-index.h |
---|
1,5 → 1,5 |
/* Public attributes of the .gdb_index section. |
Copyright 2012-2013 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
68,7 → 68,7 |
Give the unused bits a value so gdb will print them sensibly. */ |
GDB_INDEX_SYMBOL_KIND_UNUSED5 = 5, |
GDB_INDEX_SYMBOL_KIND_UNUSED6 = 6, |
GDB_INDEX_SYMBOL_KIND_UNUSED7 = 7, |
GDB_INDEX_SYMBOL_KIND_UNUSED7 = 7 |
} gdb_index_symbol_kind; |
#define GDB_INDEX_SYMBOL_KIND_SHIFT 28 |
/contrib/toolchain/binutils/include/gdb/remote-sim.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the simulator and gdb. |
Copyright 1993-2013 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
60,9 → 60,10 |
} SIM_RC; |
/* The bfd struct, as an opaque type. */ |
/* Some structs, as opaque types. */ |
struct bfd; |
struct host_callback_struct; |
/* Main simulator entry points. */ |
140,7 → 141,7 |
Such manipulation should probably (?) occure in |
sim_create_inferior. */ |
SIM_RC sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty); |
SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty); |
/* Prepare to run the simulated program. |
273,7 → 274,7 |
Simulators should be prepared to deal with any combination of NULL |
or empty CMD. */ |
void sim_do_command (SIM_DESC sd, char *cmd); |
void sim_do_command (SIM_DESC sd, const char *cmd); |
/* Complete a command based on the available sim commands. Returns an |
array of possible matches. */ |
/contrib/toolchain/binutils/include/gdb/section-scripts.h |
---|
0,0 → 1,62 |
/* Definition of kinds of records in section .debug_gdb_scripts. |
Copyright (C) 2014-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
#ifndef GDB_SECTION_SCRIPTS_H |
#define GDB_SECTION_SCRIPTS_H |
/* Each entry in section .debug_gdb_scripts begins with a byte that is used to |
identify the entry. This byte is to use as we choose. |
0 is reserved so that it is never used (to catch errors). |
It is recommended to avoid ASCII values 32-127 to help catch (most) cases |
of forgetting to include this byte. |
Other unused values needn't specify different scripting languages, |
but we have no need for anything else at the moment. |
These values are defined as macros so that they can be used in embedded |
asms and assembler source files. */ |
/* Reserved. */ |
#define SECTION_SCRIPT_ID_NEVER_USE 0 |
/* The record is a nul-terminated file name to load as a python file. */ |
#define SECTION_SCRIPT_ID_PYTHON_FILE 1 |
/* Native GDB scripts are not currently supported in .debug_gdb_scripts, |
but we reserve a value for it. */ |
/*#define SECTION_SCRIPT_ID_GDB_FILE 2*/ |
/* The record is a nul-terminated file name to load as a guile(scheme) |
file. */ |
#define SECTION_SCRIPT_ID_SCHEME_FILE 3 |
/* The record is a nul-terminated string. |
The first line is the name of the script. |
Subsequent lines are interpreted as a python script. */ |
#define SECTION_SCRIPT_ID_PYTHON_TEXT 4 |
/* Native GDB scripts are not currently supported in .debug_gdb_scripts, |
but we reserve a value for it. */ |
/*#define SECTION_SCRIPT_ID_GDB_TEXT 5*/ |
/* The record is a nul-terminated string. |
The first line is the name of the script. |
Subsequent lines are interpreted as a guile(scheme) script. */ |
#define SECTION_SCRIPT_ID_SCHEME_TEXT 6 |
#endif /* GDB_SECTION_SCRIPTS_H */ |
/contrib/toolchain/binutils/include/gdb/signals.def |
---|
1,5 → 1,5 |
/* Target signal numbers for GDB and the GDB remote protocol. |
Copyright 2010-2013 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
186,15 → 186,15 |
/* Mach exceptions. In versions of GDB before 5.2, these were just before |
GDB_SIGNAL_INFO if you were compiling on a Mach host (and missing |
otherwise). */ |
SET (TARGET_EXC_BAD_ACCESS, 145, "EXC_BAD_ACCESS", "Could not access memory") |
SET (TARGET_EXC_BAD_INSTRUCTION, 146, "EXC_BAD_INSTRUCTION", |
SET (GDB_EXC_BAD_ACCESS, 145, "EXC_BAD_ACCESS", "Could not access memory") |
SET (GDB_EXC_BAD_INSTRUCTION, 146, "EXC_BAD_INSTRUCTION", |
"Illegal instruction/operand") |
SET (TARGET_EXC_ARITHMETIC, 147, "EXC_ARITHMETIC", "Arithmetic exception") |
SET (TARGET_EXC_EMULATION, 148, "EXC_EMULATION", "Emulation instruction") |
SET (TARGET_EXC_SOFTWARE, 149, "EXC_SOFTWARE", "Software generated exception") |
SET (TARGET_EXC_BREAKPOINT, 150, "EXC_BREAKPOINT", "Breakpoint") |
SET (GDB_EXC_ARITHMETIC, 147, "EXC_ARITHMETIC", "Arithmetic exception") |
SET (GDB_EXC_EMULATION, 148, "EXC_EMULATION", "Emulation instruction") |
SET (GDB_EXC_SOFTWARE, 149, "EXC_SOFTWARE", "Software generated exception") |
SET (GDB_EXC_BREAKPOINT, 150, "EXC_BREAKPOINT", "Breakpoint") |
/* If you are adding a new signal, add it just above this comment. */ |
/* Last and unused enum value, for sizing arrays, etc. */ |
SET (GDB_SIGNAL_LAST, 151, NULL, "GDB_SIGNAL_MAGIC") |
SET (GDB_SIGNAL_LAST, 151, NULL, "GDB_SIGNAL_LAST") |
/contrib/toolchain/binutils/include/gdb/signals.h |
---|
1,5 → 1,5 |
/* Target signal numbers for GDB and the GDB remote protocol. |
Copyright 1986-2013 Free Software Foundation, Inc. |
Copyright (C) 1986-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/gdb/sim-arm.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the Arm simulator and GDB. |
Copyright 2002-2013 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
/contrib/toolchain/binutils/include/gdb/sim-bfin.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the Blackfin simulator and GDB. |
Copyright (C) 2005-2013 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
Contributed by Analog Devices. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/gdb/sim-cr16.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the cr16 simulator and gdb. |
Copyright 2008-2013 Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
33,29 → 33,6 |
SIM_CR16_MEMORY_IMAP = 0x10000000 |
}; |
extern unsigned long sim_cr16_translate_dmap_addr |
(unsigned long offset, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*dmap_register) (void *regcache, int reg_nr)); |
extern unsigned long sim_cr16_translate_imap_addr |
(unsigned long offset, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*imap_register) (void *regcache, int reg_nr)); |
extern unsigned long sim_cr16_translate_addr |
(unsigned long vaddr, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*dmap_register) (void *regcache, int reg_nr), |
unsigned long (*imap_register) (void *regcache, int reg_nr)); |
/* The simulator makes use of the following register information. */ |
enum sim_cr16_regs |
/contrib/toolchain/binutils/include/gdb/sim-d10v.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the d10v simulator and gdb. |
Copyright 1999-2013 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
53,29 → 53,6 |
SIM_D10V_MEMORY_IMAP = 0x11000000 |
}; |
extern unsigned long sim_d10v_translate_dmap_addr |
(unsigned long offset, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*dmap_register) (void *regcache, int reg_nr)); |
extern unsigned long sim_d10v_translate_imap_addr |
(unsigned long offset, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*imap_register) (void *regcache, int reg_nr)); |
extern unsigned long sim_d10v_translate_addr |
(unsigned long vaddr, |
int nr_bytes, |
unsigned long *phys, |
void *regcache, |
unsigned long (*dmap_register) (void *regcache, int reg_nr), |
unsigned long (*imap_register) (void *regcache, int reg_nr)); |
/* The simulator makes use of the following register information. */ |
enum sim_d10v_regs |
/contrib/toolchain/binutils/include/gdb/sim-frv.h |
---|
1,6 → 1,6 |
/* This file defines the interface between the FR-V simulator and GDB. |
Copyright 2003-2013 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
/contrib/toolchain/binutils/include/gdb/sim-ft32.h |
---|
0,0 → 1,35 |
/* This file defines the interface between the FT32 simulator and GDB. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
Contributed by FTDI. |
This file is part of GDB. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
/* Register numbers of various important registers. */ |
enum ft32_regnum |
{ |
FT32_FP_REGNUM, /* Address of executing stack frame. */ |
FT32_SP_REGNUM, /* Address of top of stack. */ |
FT32_R0_REGNUM, |
FT32_R1_REGNUM, |
FT32_CC_REGNUM = 31, |
FT32_PC_REGNUM = 32 /* Program counter. */ |
}; |
/* Number of machine registers. */ |
#define FT32_NUM_REGS 33 /* 32 real registers + PC */ |
/contrib/toolchain/binutils/include/gdb/sim-h8300.h |
---|
1,5 → 1,5 |
/* This file defines the interface between the h8300 simulator and gdb. |
Copyright (C) 2002-2013 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/gdb/sim-lm32.h |
---|
1,7 → 1,7 |
/* This file defines the interface between the LM32 simulator and GDB. |
Contributed by Jon Beniston <jon@beniston.com> |
Copyright (C) 2009-2013 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/gdb/sim-m32c.h |
---|
1,5 → 1,5 |
/* This file defines the interface between the m32c simulator and gdb. |
Copyright (C) 2005-2013 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/gdb/sim-ppc.h |
---|
1,6 → 1,6 |
/* sim-ppc.h --- interface between PowerPC simulator and GDB. |
Copyright 2004-2013 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
/contrib/toolchain/binutils/include/gdb/sim-rl78.h |
---|
1,6 → 1,6 |
/* sim-rx.h --- interface between rl78 simulator and GDB. |
Copyright 2011-2013 Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
/contrib/toolchain/binutils/include/gdb/sim-rx.h |
---|
1,6 → 1,6 |
/* sim-rx.h --- interface between RX simulator and GDB. |
Copyright 2008-2013 Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
Contributed by Red Hat. |
/contrib/toolchain/binutils/include/gdb/sim-sh.h |
---|
1,5 → 1,5 |
/* This file defines the interface between the sh simulator and gdb. |
Copyright (C) 2000-2013 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/getopt.h |
---|
1,6 → 1,5 |
/* Declarations for getopt. |
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, |
2002 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
NOTE: The canonical source of this file is maintained with the GNU C Library. |
Bugs can be reported to bug-glibc@gnu.org. |
/contrib/toolchain/binutils/include/hashtab.h |
---|
1,6 → 1,5 |
/* An expandable hash tables datatype. |
Copyright (C) 1999, 2000, 2002, 2003, 2004, 2005, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
Contributed by Vladimir Makarov (vmakarov@cygnus.com). |
This program is free software; you can redistribute it and/or modify |
39,10 → 38,6 |
#include "ansidecl.h" |
#ifndef GTY |
#define GTY(X) |
#endif |
/* The type for a hash code. */ |
typedef unsigned int hashval_t; |
97,7 → 92,7 |
functions mentioned below. The size of this structure is subject to |
change. */ |
struct GTY(()) htab { |
struct htab { |
/* Pointer to hash function. */ |
htab_hash hash_f; |
108,7 → 103,7 |
htab_del del_f; |
/* Table itself. */ |
void ** GTY ((use_param, length ("%h.size"))) entries; |
void **entries; |
/* Current size (in entries) of the hash table. */ |
size_t size; |
132,7 → 127,7 |
htab_free free_f; |
/* Alternate allocate/free functions, which take an extra argument. */ |
void * GTY((skip)) alloc_arg; |
void *alloc_arg; |
htab_alloc_with_arg alloc_with_arg_f; |
htab_free_with_arg free_with_arg_f; |
/contrib/toolchain/binutils/include/hp-symtab.h |
---|
4,7 → 4,7 |
Written by the Center for Software Science at the University of Utah |
and by Cygnus Support. |
Copyright 1994, 1995, 1998, 1999, 2003 Free Software Foundation, Inc. |
Copyright (C) 1994-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/ieee.h |
---|
1,6 → 1,6 |
/* IEEE Standard 695-1980 "Universal Format for Object Modules" header file |
Copyright 2001 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/leb128.h |
---|
1,5 → 1,5 |
/* Utilities for reading leb128 values. |
Copyright (C) 2012 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This file is part of the libiberty library. |
Libiberty is free software; you can redistribute it and/or |
/contrib/toolchain/binutils/include/libiberty.h |
---|
1,7 → 1,6 |
/* Function declarations for libiberty. |
Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 1997-2015 Free Software Foundation, Inc. |
Note - certain prototypes declared in this header file are for |
functions whoes implementation copyright does not belong to the |
46,6 → 45,7 |
#include <stddef.h> |
/* Get a definition for va_list. */ |
#include <stdarg.h> |
#include <libgen.h> |
#include <stdio.h> |
85,11 → 85,11 |
/* Expand "@file" arguments in argv. */ |
extern void expandargv PARAMS ((int *, char ***)); |
extern void expandargv (int *, char ***); |
/* Write argv to an @-file, inserting necessary quoting. */ |
extern int writeargv PARAMS ((char **, FILE *)); |
extern int writeargv (char **, FILE *); |
/* Return the number of elements in argv. */ |
105,9 → 105,13 |
declaration without arguments. If it is 0, we checked and failed |
to find the declaration so provide a fully prototyped one. If it |
is 1, we found it so don't provide any declaration at all. */ |
#if !HAVE_DECL_BASENAME |
#if defined (__GNU_LIBRARY__ ) || defined (__linux__) || defined (__FreeBSD__) || defined (__OpenBSD__) || defined(__NetBSD__) || defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) || defined (HAVE_DECL_BASENAME) |
extern char *basename (const char *); |
#if defined (__GNU_LIBRARY__ ) || defined (__linux__) \ |
|| defined (__FreeBSD__) || defined (__OpenBSD__) || defined (__NetBSD__) \ |
|| defined (__CYGWIN__) || defined (__CYGWIN32__) || defined (__MINGW32__) \ |
|| defined (__DragonFly__) || defined (HAVE_DECL_BASENAME) |
extern char *basename (const char *) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_NONNULL(1); |
#else |
/* Do not allow basename to be used if there is no prototype seen. We |
either need to use the above prototype or have one from |
118,18 → 122,18 |
/* A well-defined basename () that is always compiled in. */ |
extern const char *lbasename (const char *); |
extern const char *lbasename (const char *) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_NONNULL(1); |
/* Same, but assumes DOS semantics (drive name, backslash is also a |
dir separator) regardless of host. */ |
extern const char *dos_lbasename (const char *); |
extern const char *dos_lbasename (const char *) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_NONNULL(1); |
/* Same, but assumes Unix semantics (absolute paths always start with |
a slash, only forward slash is accepted as dir separator) |
regardless of host. */ |
extern const char *unix_lbasename (const char *); |
extern const char *unix_lbasename (const char *) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_NONNULL(1); |
/* A well-defined realpath () that is always compiled in. */ |
139,7 → 143,7 |
the last argument of this function, to terminate the list of |
strings. Allocates memory using xmalloc. */ |
extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL; |
extern char *concat (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_SENTINEL; |
/* Concatenate an arbitrary number of strings. You must pass NULL as |
the last argument of this function, to terminate the list of |
148,7 → 152,7 |
pointer to be freed after the new string is created, similar to the |
way xrealloc works. */ |
extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_SENTINEL; |
extern char *reconcat (char *, const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_SENTINEL; |
/* Determine the length of concatenating an arbitrary number of |
strings. You must pass NULL as the last argument of this function, |
161,7 → 165,7 |
to terminate the list of strings. The supplied memory is assumed |
to be large enough. */ |
extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_SENTINEL; |
extern char *concat_copy (char *, const char *, ...) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_NONNULL(1) ATTRIBUTE_SENTINEL; |
/* Concatenate an arbitrary number of strings into a GLOBAL area of |
memory. You must pass NULL as the last argument of this function, |
168,7 → 172,7 |
to terminate the list of strings. The supplied memory is assumed |
to be large enough. */ |
extern char *concat_copy2 (const char *, ...) ATTRIBUTE_SENTINEL; |
extern char *concat_copy2 (const char *, ...) ATTRIBUTE_RETURNS_NONNULL ATTRIBUTE_SENTINEL; |
/* This is the global area used by concat_copy2. */ |
224,9 → 228,14 |
extern char *make_relative_prefix_ignore_links (const char *, const char *, |
const char *) ATTRIBUTE_MALLOC; |
/* Returns a pointer to a directory path suitable for creating temporary |
files in. */ |
extern const char *choose_tmpdir (void) ATTRIBUTE_RETURNS_NONNULL; |
/* Choose a temporary directory to use for scratch files. */ |
extern char *choose_temp_base (void) ATTRIBUTE_MALLOC; |
extern char *choose_temp_base (void) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Return a temporary file name or NULL if unable to create one. */ |
256,7 → 265,7 |
/* ANSI's strerror(), but more robust. */ |
extern char *xstrerror (int); |
extern char *xstrerror (int) ATTRIBUTE_RETURNS_NONNULL; |
/* Return the maximum signal number for which strsignal will return a |
string. */ |
298,30 → 307,30 |
message to stderr (using the name set by xmalloc_set_program_name, |
if any) and then call xexit. */ |
extern void *xmalloc (size_t) ATTRIBUTE_MALLOC; |
extern void *xmalloc (size_t) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Reallocate memory without fail. This works like xmalloc. Note, |
realloc type functions are not suitable for attribute malloc since |
they may return the same address across multiple calls. */ |
extern void *xrealloc (void *, size_t); |
extern void *xrealloc (void *, size_t) ATTRIBUTE_RETURNS_NONNULL; |
/* Allocate memory without fail and set it to zero. This works like |
xmalloc. */ |
extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC; |
extern void *xcalloc (size_t, size_t) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Copy a string into a memory buffer without fail. */ |
extern char *xstrdup (const char *) ATTRIBUTE_MALLOC; |
extern char *xstrdup (const char *) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Copy at most N characters from string into a buffer without fail. */ |
extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC; |
extern char *xstrndup (const char *, size_t) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Copy an existing memory buffer to a new memory buffer without fail. */ |
extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC; |
extern void *xmemdup (const void *, size_t, size_t) ATTRIBUTE_MALLOC ATTRIBUTE_RETURNS_NONNULL; |
/* Physical memory routines. Return values are in BYTES. */ |
extern double physmem_total (void); |
399,7 → 408,7 |
Returns NULL on error. */ |
extern struct pex_obj *pex_init (int flags, const char *pname, |
const char *tempbase); |
const char *tempbase) ATTRIBUTE_RETURNS_NONNULL; |
/* Flags for pex_run. These are bits to be or'ed together. */ |
442,7 → 451,12 |
on Unix. */ |
#define PEX_BINARY_ERROR 0x80 |
/* Append stdout to existing file instead of truncating it. */ |
#define PEX_STDOUT_APPEND 0x100 |
/* Thes same as PEX_STDOUT_APPEND, but for STDERR. */ |
#define PEX_STDERR_APPEND 0x200 |
/* Execute one program. Returns NULL on success. On error returns an |
error string (typically just the name of a system call); the error |
string is statically allocated. |
609,7 → 623,7 |
extern int pwait (int, int *, int); |
#if !HAVE_DECL_ASPRINTF |
#if defined(HAVE_DECL_ASPRINTF) && !HAVE_DECL_ASPRINTF |
/* Like sprintf but provides a pointer to malloc'd storage, which must |
be freed by the caller. */ |
616,6 → 630,11 |
extern int asprintf (char **, const char *, ...) ATTRIBUTE_PRINTF_2; |
#endif |
/* Like asprintf but allocates memory without fail. This works like |
xmalloc. */ |
extern char *xasprintf (const char *, ...) ATTRIBUTE_MALLOC ATTRIBUTE_PRINTF_1; |
#if !HAVE_DECL_VASPRINTF |
/* Like vsprintf but provides a pointer to malloc'd storage, which |
must be freed by the caller. */ |
623,6 → 642,11 |
extern int vasprintf (char **, const char *, va_list) ATTRIBUTE_PRINTF(2,0); |
#endif |
/* Like vasprintf but allocates memory without fail. This works like |
xmalloc. */ |
extern char *xvasprintf (const char *, va_list) ATTRIBUTE_MALLOC ATTRIBUTE_PRINTF(1,0); |
#if defined(HAVE_DECL_SNPRINTF) && !HAVE_DECL_SNPRINTF |
/* Like sprintf but prints at most N characters. */ |
extern int snprintf (char *, size_t, const char *, ...) ATTRIBUTE_PRINTF_3; |
633,11 → 657,42 |
extern int vsnprintf (char *, size_t, const char *, va_list) ATTRIBUTE_PRINTF(3,0); |
#endif |
#if defined (HAVE_DECL_STRNLEN) && !HAVE_DECL_STRNLEN |
extern size_t strnlen (const char *, size_t); |
#endif |
#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP |
/* Compare version strings. */ |
extern int strverscmp (const char *, const char *); |
#endif |
#if defined(HAVE_DECL_STRTOL) && !HAVE_DECL_STRTOL |
extern long int strtol (const char *nptr, |
char **endptr, int base); |
#endif |
#if defined(HAVE_DECL_STRTOUL) && !HAVE_DECL_STRTOUL |
extern unsigned long int strtoul (const char *nptr, |
char **endptr, int base); |
#endif |
#if defined(HAVE_LONG_LONG) && defined(HAVE_DECL_STRTOLL) && !HAVE_DECL_STRTOLL |
__extension__ |
extern long long int strtoll (const char *nptr, |
char **endptr, int base); |
#endif |
#if defined(HAVE_LONG_LONG) && defined(HAVE_DECL_STRTOULL) && !HAVE_DECL_STRTOULL |
__extension__ |
extern unsigned long long int strtoull (const char *nptr, |
char **endptr, int base); |
#endif |
#if defined(HAVE_DECL_STRVERSCMP) && !HAVE_DECL_STRVERSCMP |
/* Compare version strings. */ |
extern int strverscmp (const char *, const char *); |
#endif |
/* Set the title of a process */ |
extern void setproctitle (const char *name, ...); |
/contrib/toolchain/binutils/include/longlong.h |
---|
0,0 → 1,1745 |
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
This file is part of the GNU C Library. |
The GNU C Library is free software; you can redistribute it and/or |
modify it under the terms of the GNU Lesser General Public |
License as published by the Free Software Foundation; either |
version 2.1 of the License, or (at your option) any later version. |
In addition to the permissions in the GNU Lesser General Public |
License, the Free Software Foundation gives you unlimited |
permission to link the compiled version of this file into |
combinations with other programs, and to distribute those |
combinations without any restriction coming from the use of this |
file. (The Lesser General Public License restrictions do apply in |
other respects; for example, they cover modification of the file, |
and distribution when not linked into a combine executable.) |
The GNU C Library is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
Lesser General Public License for more details. |
You should have received a copy of the GNU Lesser General Public |
License along with the GNU C Library; if not, see |
<http://www.gnu.org/licenses/>. */ |
/* You have to define the following before including this file: |
UWtype -- An unsigned type, default type for operations (typically a "word") |
UHWtype -- An unsigned type, at least half the size of UWtype. |
UDWtype -- An unsigned type, at least twice as large a UWtype |
W_TYPE_SIZE -- size in bits of UWtype |
UQItype -- Unsigned 8 bit type. |
SItype, USItype -- Signed and unsigned 32 bit types. |
DItype, UDItype -- Signed and unsigned 64 bit types. |
On a 32 bit machine UWtype should typically be USItype; |
on a 64 bit machine, UWtype should typically be UDItype. */ |
#define __BITS4 (W_TYPE_SIZE / 4) |
#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) |
#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) |
#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2)) |
#ifndef W_TYPE_SIZE |
#define W_TYPE_SIZE 32 |
#define UWtype USItype |
#define UHWtype USItype |
#define UDWtype UDItype |
#endif |
/* Used in glibc only. */ |
#ifndef attribute_hidden |
#define attribute_hidden |
#endif |
extern const UQItype __clz_tab[256] attribute_hidden; |
/* Define auxiliary asm macros. |
1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two |
UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype |
word product in HIGH_PROD and LOW_PROD. |
2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a |
UDWtype product. This is just a variant of umul_ppmm. |
3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator, |
denominator) divides a UDWtype, composed by the UWtype integers |
HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient |
in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less |
than DENOMINATOR for correct operation. If, in addition, the most |
significant bit of DENOMINATOR must be 1, then the pre-processor symbol |
UDIV_NEEDS_NORMALIZATION is defined to 1. |
4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator, |
denominator). Like udiv_qrnnd but the numbers are signed. The quotient |
is rounded towards 0. |
5) count_leading_zeros(count, x) counts the number of zero-bits from the |
msb to the first nonzero bit in the UWtype X. This is the number of |
steps X needs to be shifted left to set the msb. Undefined for X == 0, |
unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value. |
6) count_trailing_zeros(count, x) like count_leading_zeros, but counts |
from the least significant end. |
7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1, |
high_addend_2, low_addend_2) adds two UWtype integers, composed by |
HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2 |
respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow |
(i.e. carry out) is not stored anywhere, and is lost. |
8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend, |
high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers, |
composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and |
LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE |
and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere, |
and is lost. |
If any of these macros are left undefined for a particular CPU, |
C macros are used. */ |
/* The CPUs come in alphabetical order below. |
Please add support for more CPUs here, or improve the current support |
for the CPUs below! |
(E.g. WE32100, IBM360.) */ |
#if defined (__GNUC__) && !defined (NO_ASM) |
/* We sometimes need to clobber "cc" with gcc2, but that would not be |
understood by gcc1. Use cpp to avoid major code duplication. */ |
#if __GNUC__ < 2 |
#define __CLOBBER_CC |
#define __AND_CLOBBER_CC |
#else /* __GNUC__ >= 2 */ |
#define __CLOBBER_CC : "cc" |
#define __AND_CLOBBER_CC , "cc" |
#endif /* __GNUC__ < 2 */ |
#if defined (__aarch64__) |
#if W_TYPE_SIZE == 32 |
#define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X)) |
#define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif /* W_TYPE_SIZE == 32 */ |
#if W_TYPE_SIZE == 64 |
#define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clzll (X)) |
#define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctzll (X)) |
#define COUNT_LEADING_ZEROS_0 64 |
#endif /* W_TYPE_SIZE == 64 */ |
#endif /* __aarch64__ */ |
#if defined (__alpha) && W_TYPE_SIZE == 64 |
/* There is a bug in g++ before version 5 that |
errors on __builtin_alpha_umulh. */ |
#if !defined(__cplusplus) || __GNUC__ >= 5 |
#define umul_ppmm(ph, pl, m0, m1) \ |
do { \ |
UDItype __m0 = (m0), __m1 = (m1); \ |
(ph) = __builtin_alpha_umulh (__m0, __m1); \ |
(pl) = __m0 * __m1; \ |
} while (0) |
#define UMUL_TIME 46 |
#endif /* !c++ */ |
#ifndef LONGLONG_STANDALONE |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
do { UDItype __r; \ |
(q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ |
(r) = __r; \ |
} while (0) |
extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype); |
#define UDIV_TIME 220 |
#endif /* LONGLONG_STANDALONE */ |
#ifdef __alpha_cix__ |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzl (X)) |
#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzl (X)) |
#define COUNT_LEADING_ZEROS_0 64 |
#else |
#define count_leading_zeros(COUNT,X) \ |
do { \ |
UDItype __xr = (X), __t, __a; \ |
__t = __builtin_alpha_cmpbge (0, __xr); \ |
__a = __clz_tab[__t ^ 0xff] - 1; \ |
__t = __builtin_alpha_extbl (__xr, __a); \ |
(COUNT) = 64 - (__clz_tab[__t] + __a*8); \ |
} while (0) |
#define count_trailing_zeros(COUNT,X) \ |
do { \ |
UDItype __xr = (X), __t, __a; \ |
__t = __builtin_alpha_cmpbge (0, __xr); \ |
__t = ~__t & -~__t; \ |
__a = ((__t & 0xCC) != 0) * 2; \ |
__a += ((__t & 0xF0) != 0) * 4; \ |
__a += ((__t & 0xAA) != 0); \ |
__t = __builtin_alpha_extbl (__xr, __a); \ |
__a <<= 3; \ |
__t &= -__t; \ |
__a += ((__t & 0xCC) != 0) * 2; \ |
__a += ((__t & 0xF0) != 0) * 4; \ |
__a += ((__t & 0xAA) != 0); \ |
(COUNT) = __a; \ |
} while (0) |
#endif /* __alpha_cix__ */ |
#endif /* __alpha */ |
#if defined (__arc__) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%r" ((USItype) (ah)), \ |
"rIJ" ((USItype) (bh)), \ |
"%r" ((USItype) (al)), \ |
"rIJ" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "r" ((USItype) (ah)), \ |
"rIJ" ((USItype) (bh)), \ |
"r" ((USItype) (al)), \ |
"rIJ" ((USItype) (bl))) |
#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v) |
#ifdef __ARC_NORM__ |
#define count_leading_zeros(count, x) \ |
do \ |
{ \ |
SItype c_; \ |
\ |
__asm__ ("norm.f\t%0,%1\n\tmov.mi\t%0,-1" : "=r" (c_) : "r" (x) : "cc");\ |
(count) = c_ + 1; \ |
} \ |
while (0) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif |
#endif |
#if defined (__arm__) && (defined (__thumb2__) || !defined (__thumb__)) \ |
&& W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%r" ((USItype) (ah)), \ |
"rI" ((USItype) (bh)), \ |
"%r" ((USItype) (al)), \ |
"rI" ((USItype) (bl)) __CLOBBER_CC) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "r" ((USItype) (ah)), \ |
"rI" ((USItype) (bh)), \ |
"r" ((USItype) (al)), \ |
"rI" ((USItype) (bl)) __CLOBBER_CC) |
# if defined(__ARM_ARCH_2__) || defined(__ARM_ARCH_2A__) \ |
|| defined(__ARM_ARCH_3__) |
# define umul_ppmm(xh, xl, a, b) \ |
do { \ |
register USItype __t0, __t1, __t2; \ |
__asm__ ("%@ Inlined umul_ppmm\n" \ |
" mov %2, %5, lsr #16\n" \ |
" mov %0, %6, lsr #16\n" \ |
" bic %3, %5, %2, lsl #16\n" \ |
" bic %4, %6, %0, lsl #16\n" \ |
" mul %1, %3, %4\n" \ |
" mul %4, %2, %4\n" \ |
" mul %3, %0, %3\n" \ |
" mul %0, %2, %0\n" \ |
" adds %3, %4, %3\n" \ |
" addcs %0, %0, #65536\n" \ |
" adds %1, %1, %3, lsl #16\n" \ |
" adc %0, %0, %3, lsr #16" \ |
: "=&r" ((USItype) (xh)), \ |
"=r" ((USItype) (xl)), \ |
"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ |
: "r" ((USItype) (a)), \ |
"r" ((USItype) (b)) __CLOBBER_CC ); \ |
} while (0) |
# define UMUL_TIME 20 |
# else |
# define umul_ppmm(xh, xl, a, b) \ |
do { \ |
/* Generate umull, under compiler control. */ \ |
register UDItype __t0 = (UDItype)(USItype)(a) * (USItype)(b); \ |
(xl) = (USItype)__t0; \ |
(xh) = (USItype)(__t0 >> 32); \ |
} while (0) |
# define UMUL_TIME 3 |
# endif |
# define UDIV_TIME 100 |
#endif /* __arm__ */ |
#if defined(__arm__) |
/* Let gcc decide how best to implement count_leading_zeros. */ |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X)) |
#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctz (X)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif |
#if defined (__AVR__) |
#if W_TYPE_SIZE == 16 |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X)) |
#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctz (X)) |
#define COUNT_LEADING_ZEROS_0 16 |
#endif /* W_TYPE_SIZE == 16 */ |
#if W_TYPE_SIZE == 32 |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzl (X)) |
#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzl (X)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif /* W_TYPE_SIZE == 32 */ |
#if W_TYPE_SIZE == 64 |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clzll (X)) |
#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctzll (X)) |
#define COUNT_LEADING_ZEROS_0 64 |
#endif /* W_TYPE_SIZE == 64 */ |
#endif /* defined (__AVR__) */ |
#if defined (__CRIS__) |
#if __CRIS_arch_version >= 3 |
#define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif /* __CRIS_arch_version >= 3 */ |
#if __CRIS_arch_version >= 8 |
#define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X)) |
#endif /* __CRIS_arch_version >= 8 */ |
#if __CRIS_arch_version >= 10 |
#define __umulsidi3(u,v) ((UDItype)(USItype) (u) * (UDItype)(USItype) (v)) |
#else |
#define __umulsidi3 __umulsidi3 |
extern UDItype __umulsidi3 (USItype, USItype); |
#endif /* __CRIS_arch_version >= 10 */ |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
UDItype __x = __umulsidi3 (u, v); \ |
(w0) = (USItype) (__x); \ |
(w1) = (USItype) (__x >> 32); \ |
} while (0) |
/* FIXME: defining add_ssaaaa and sub_ddmmss should be advantageous for |
DFmode ("double" intrinsics, avoiding two of the three insns handling |
carry), but defining them as open-code C composing and doing the |
operation in DImode (UDImode) shows that the DImode needs work: |
register pressure from requiring neighboring registers and the |
traffic to and from them come to dominate, in the 4.7 series. */ |
#endif /* defined (__CRIS__) */ |
#if defined (__hppa) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%rM" ((USItype) (ah)), \ |
"rM" ((USItype) (bh)), \ |
"%rM" ((USItype) (al)), \ |
"rM" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "rM" ((USItype) (ah)), \ |
"rM" ((USItype) (bh)), \ |
"rM" ((USItype) (al)), \ |
"rM" ((USItype) (bl))) |
#if defined (_PA_RISC1_1) |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
union \ |
{ \ |
UDItype __f; \ |
struct {USItype __w1, __w0;} __w1w0; \ |
} __t; \ |
__asm__ ("xmpyu %1,%2,%0" \ |
: "=x" (__t.__f) \ |
: "x" ((USItype) (u)), \ |
"x" ((USItype) (v))); \ |
(w1) = __t.__w1w0.__w1; \ |
(w0) = __t.__w1w0.__w0; \ |
} while (0) |
#define UMUL_TIME 8 |
#else |
#define UMUL_TIME 30 |
#endif |
#define UDIV_TIME 40 |
#define count_leading_zeros(count, x) \ |
do { \ |
USItype __tmp; \ |
__asm__ ( \ |
"ldi 1,%0\n" \ |
" extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n" \ |
" extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n"\ |
" ldo 16(%0),%0 ; Yes. Perform add.\n" \ |
" extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n" \ |
" extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n"\ |
" ldo 8(%0),%0 ; Yes. Perform add.\n" \ |
" extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n" \ |
" extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n"\ |
" ldo 4(%0),%0 ; Yes. Perform add.\n" \ |
" extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n" \ |
" extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n"\ |
" ldo 2(%0),%0 ; Yes. Perform add.\n" \ |
" extru %1,30,1,%1 ; Extract bit 1.\n" \ |
" sub %0,%1,%0 ; Subtract it.\n" \ |
: "=r" (count), "=r" (__tmp) : "1" (x)); \ |
} while (0) |
#endif |
#if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32 |
#if !defined (__zarch__) |
#define smul_ppmm(xh, xl, m0, m1) \ |
do { \ |
union {DItype __ll; \ |
struct {USItype __h, __l;} __i; \ |
} __x; \ |
__asm__ ("lr %N0,%1\n\tmr %0,%2" \ |
: "=&r" (__x.__ll) \ |
: "r" (m0), "r" (m1)); \ |
(xh) = __x.__i.__h; (xl) = __x.__i.__l; \ |
} while (0) |
#define sdiv_qrnnd(q, r, n1, n0, d) \ |
do { \ |
union {DItype __ll; \ |
struct {USItype __h, __l;} __i; \ |
} __x; \ |
__x.__i.__h = n1; __x.__i.__l = n0; \ |
__asm__ ("dr %0,%2" \ |
: "=r" (__x.__ll) \ |
: "0" (__x.__ll), "r" (d)); \ |
(q) = __x.__i.__l; (r) = __x.__i.__h; \ |
} while (0) |
#else |
#define smul_ppmm(xh, xl, m0, m1) \ |
do { \ |
register SItype __r0 __asm__ ("0"); \ |
register SItype __r1 __asm__ ("1") = (m0); \ |
\ |
__asm__ ("mr\t%%r0,%3" \ |
: "=r" (__r0), "=r" (__r1) \ |
: "r" (__r1), "r" (m1)); \ |
(xh) = __r0; (xl) = __r1; \ |
} while (0) |
#define sdiv_qrnnd(q, r, n1, n0, d) \ |
do { \ |
register SItype __r0 __asm__ ("0") = (n1); \ |
register SItype __r1 __asm__ ("1") = (n0); \ |
\ |
__asm__ ("dr\t%%r0,%4" \ |
: "=r" (__r0), "=r" (__r1) \ |
: "r" (__r0), "r" (__r1), "r" (d)); \ |
(q) = __r1; (r) = __r0; \ |
} while (0) |
#endif /* __zarch__ */ |
#endif |
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%0" ((USItype) (ah)), \ |
"g" ((USItype) (bh)), \ |
"%1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"g" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("mul{l} %3" \ |
: "=a" ((USItype) (w0)), \ |
"=d" ((USItype) (w1)) \ |
: "%0" ((USItype) (u)), \ |
"rm" ((USItype) (v))) |
#define udiv_qrnnd(q, r, n1, n0, dv) \ |
__asm__ ("div{l} %4" \ |
: "=a" ((USItype) (q)), \ |
"=d" ((USItype) (r)) \ |
: "0" ((USItype) (n0)), \ |
"1" ((USItype) (n1)), \ |
"rm" ((USItype) (dv))) |
#define count_leading_zeros(count, x) ((count) = __builtin_clz (x)) |
#define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x)) |
#define UMUL_TIME 40 |
#define UDIV_TIME 40 |
#endif /* 80x86 */ |
#if defined (__x86_64__) && W_TYPE_SIZE == 64 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \ |
: "=r" ((UDItype) (sh)), \ |
"=&r" ((UDItype) (sl)) \ |
: "%0" ((UDItype) (ah)), \ |
"rme" ((UDItype) (bh)), \ |
"%1" ((UDItype) (al)), \ |
"rme" ((UDItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \ |
: "=r" ((UDItype) (sh)), \ |
"=&r" ((UDItype) (sl)) \ |
: "0" ((UDItype) (ah)), \ |
"rme" ((UDItype) (bh)), \ |
"1" ((UDItype) (al)), \ |
"rme" ((UDItype) (bl))) |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("mul{q} %3" \ |
: "=a" ((UDItype) (w0)), \ |
"=d" ((UDItype) (w1)) \ |
: "%0" ((UDItype) (u)), \ |
"rm" ((UDItype) (v))) |
#define udiv_qrnnd(q, r, n1, n0, dv) \ |
__asm__ ("div{q} %4" \ |
: "=a" ((UDItype) (q)), \ |
"=d" ((UDItype) (r)) \ |
: "0" ((UDItype) (n0)), \ |
"1" ((UDItype) (n1)), \ |
"rm" ((UDItype) (dv))) |
#define count_leading_zeros(count, x) ((count) = __builtin_clzll (x)) |
#define count_trailing_zeros(count, x) ((count) = __builtin_ctzll (x)) |
#define UMUL_TIME 40 |
#define UDIV_TIME 40 |
#endif /* x86_64 */ |
#if defined (__i960__) && W_TYPE_SIZE == 32 |
#define umul_ppmm(w1, w0, u, v) \ |
({union {UDItype __ll; \ |
struct {USItype __l, __h;} __i; \ |
} __xx; \ |
__asm__ ("emul %2,%1,%0" \ |
: "=d" (__xx.__ll) \ |
: "%dI" ((USItype) (u)), \ |
"dI" ((USItype) (v))); \ |
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) |
#define __umulsidi3(u, v) \ |
({UDItype __w; \ |
__asm__ ("emul %2,%1,%0" \ |
: "=d" (__w) \ |
: "%dI" ((USItype) (u)), \ |
"dI" ((USItype) (v))); \ |
__w; }) |
#endif /* __i960__ */ |
#if defined (__ia64) && W_TYPE_SIZE == 64 |
/* This form encourages gcc (pre-release 3.4 at least) to emit predicated |
"sub r=r,r" and "sub r=r,r,1", giving a 2 cycle latency. The generic |
code using "al<bl" arithmetically comes out making an actual 0 or 1 in a |
register, which takes an extra cycle. */ |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
UWtype __x; \ |
__x = (al) - (bl); \ |
if ((al) < (bl)) \ |
(sh) = (ah) - (bh) - 1; \ |
else \ |
(sh) = (ah) - (bh); \ |
(sl) = __x; \ |
} while (0) |
/* Do both product parts in assembly, since that gives better code with |
all gcc versions. Some callers will just use the upper part, and in |
that situation we waste an instruction, but not any cycles. */ |
#define umul_ppmm(ph, pl, m0, m1) \ |
__asm__ ("xma.hu %0 = %2, %3, f0\n\txma.l %1 = %2, %3, f0" \ |
: "=&f" (ph), "=f" (pl) \ |
: "f" (m0), "f" (m1)) |
#define count_leading_zeros(count, x) \ |
do { \ |
UWtype _x = (x), _y, _a, _c; \ |
__asm__ ("mux1 %0 = %1, @rev" : "=r" (_y) : "r" (_x)); \ |
__asm__ ("czx1.l %0 = %1" : "=r" (_a) : "r" (-_y | _y)); \ |
_c = (_a - 1) << 3; \ |
_x >>= _c; \ |
if (_x >= 1 << 4) \ |
_x >>= 4, _c += 4; \ |
if (_x >= 1 << 2) \ |
_x >>= 2, _c += 2; \ |
_c += _x >> 1; \ |
(count) = W_TYPE_SIZE - 1 - _c; \ |
} while (0) |
/* similar to what gcc does for __builtin_ffs, but 0 based rather than 1 |
based, and we don't need a special case for x==0 here */ |
#define count_trailing_zeros(count, x) \ |
do { \ |
UWtype __ctz_x = (x); \ |
__asm__ ("popcnt %0 = %1" \ |
: "=r" (count) \ |
: "r" ((__ctz_x-1) & ~__ctz_x)); \ |
} while (0) |
#define UMUL_TIME 14 |
#endif |
#if defined (__M32R__) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
/* The cmp clears the condition bit. */ \ |
__asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"r" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"r" ((USItype) (bl)) \ |
: "cbit") |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
/* The cmp clears the condition bit. */ \ |
__asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"r" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"r" ((USItype) (bl)) \ |
: "cbit") |
#endif /* __M32R__ */ |
#if defined (__mc68000__) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \ |
: "=d" ((USItype) (sh)), \ |
"=&d" ((USItype) (sl)) \ |
: "%0" ((USItype) (ah)), \ |
"d" ((USItype) (bh)), \ |
"%1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \ |
: "=d" ((USItype) (sh)), \ |
"=&d" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"d" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
/* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r. */ |
#if (defined (__mc68020__) && !defined (__mc68060__)) |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("mulu%.l %3,%1:%0" \ |
: "=d" ((USItype) (w0)), \ |
"=d" ((USItype) (w1)) \ |
: "%0" ((USItype) (u)), \ |
"dmi" ((USItype) (v))) |
#define UMUL_TIME 45 |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
__asm__ ("divu%.l %4,%1:%0" \ |
: "=d" ((USItype) (q)), \ |
"=d" ((USItype) (r)) \ |
: "0" ((USItype) (n0)), \ |
"1" ((USItype) (n1)), \ |
"dmi" ((USItype) (d))) |
#define UDIV_TIME 90 |
#define sdiv_qrnnd(q, r, n1, n0, d) \ |
__asm__ ("divs%.l %4,%1:%0" \ |
: "=d" ((USItype) (q)), \ |
"=d" ((USItype) (r)) \ |
: "0" ((USItype) (n0)), \ |
"1" ((USItype) (n1)), \ |
"dmi" ((USItype) (d))) |
#elif defined (__mcoldfire__) /* not mc68020 */ |
#define umul_ppmm(xh, xl, a, b) \ |
__asm__ ("| Inlined umul_ppmm\n" \ |
" move%.l %2,%/d0\n" \ |
" move%.l %3,%/d1\n" \ |
" move%.l %/d0,%/d2\n" \ |
" swap %/d0\n" \ |
" move%.l %/d1,%/d3\n" \ |
" swap %/d1\n" \ |
" move%.w %/d2,%/d4\n" \ |
" mulu %/d3,%/d4\n" \ |
" mulu %/d1,%/d2\n" \ |
" mulu %/d0,%/d3\n" \ |
" mulu %/d0,%/d1\n" \ |
" move%.l %/d4,%/d0\n" \ |
" clr%.w %/d0\n" \ |
" swap %/d0\n" \ |
" add%.l %/d0,%/d2\n" \ |
" add%.l %/d3,%/d2\n" \ |
" jcc 1f\n" \ |
" add%.l %#65536,%/d1\n" \ |
"1: swap %/d2\n" \ |
" moveq %#0,%/d0\n" \ |
" move%.w %/d2,%/d0\n" \ |
" move%.w %/d4,%/d2\n" \ |
" move%.l %/d2,%1\n" \ |
" add%.l %/d1,%/d0\n" \ |
" move%.l %/d0,%0" \ |
: "=g" ((USItype) (xh)), \ |
"=g" ((USItype) (xl)) \ |
: "g" ((USItype) (a)), \ |
"g" ((USItype) (b)) \ |
: "d0", "d1", "d2", "d3", "d4") |
#define UMUL_TIME 100 |
#define UDIV_TIME 400 |
#else /* not ColdFire */ |
/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */ |
#define umul_ppmm(xh, xl, a, b) \ |
__asm__ ("| Inlined umul_ppmm\n" \ |
" move%.l %2,%/d0\n" \ |
" move%.l %3,%/d1\n" \ |
" move%.l %/d0,%/d2\n" \ |
" swap %/d0\n" \ |
" move%.l %/d1,%/d3\n" \ |
" swap %/d1\n" \ |
" move%.w %/d2,%/d4\n" \ |
" mulu %/d3,%/d4\n" \ |
" mulu %/d1,%/d2\n" \ |
" mulu %/d0,%/d3\n" \ |
" mulu %/d0,%/d1\n" \ |
" move%.l %/d4,%/d0\n" \ |
" eor%.w %/d0,%/d0\n" \ |
" swap %/d0\n" \ |
" add%.l %/d0,%/d2\n" \ |
" add%.l %/d3,%/d2\n" \ |
" jcc 1f\n" \ |
" add%.l %#65536,%/d1\n" \ |
"1: swap %/d2\n" \ |
" moveq %#0,%/d0\n" \ |
" move%.w %/d2,%/d0\n" \ |
" move%.w %/d4,%/d2\n" \ |
" move%.l %/d2,%1\n" \ |
" add%.l %/d1,%/d0\n" \ |
" move%.l %/d0,%0" \ |
: "=g" ((USItype) (xh)), \ |
"=g" ((USItype) (xl)) \ |
: "g" ((USItype) (a)), \ |
"g" ((USItype) (b)) \ |
: "d0", "d1", "d2", "d3", "d4") |
#define UMUL_TIME 100 |
#define UDIV_TIME 400 |
#endif /* not mc68020 */ |
/* The '020, '030, '040 and '060 have bitfield insns. |
cpu32 disguises as a 68020, but lacks them. */ |
#if defined (__mc68020__) && !defined (__mcpu32__) |
#define count_leading_zeros(count, x) \ |
__asm__ ("bfffo %1{%b2:%b2},%0" \ |
: "=d" ((USItype) (count)) \ |
: "od" ((USItype) (x)), "n" (0)) |
/* Some ColdFire architectures have a ff1 instruction supported via |
__builtin_clz. */ |
#elif defined (__mcfisaaplus__) || defined (__mcfisac__) |
#define count_leading_zeros(count,x) ((count) = __builtin_clz (x)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif |
#endif /* mc68000 */ |
#if defined (__m88000__) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%rJ" ((USItype) (ah)), \ |
"rJ" ((USItype) (bh)), \ |
"%rJ" ((USItype) (al)), \ |
"rJ" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "rJ" ((USItype) (ah)), \ |
"rJ" ((USItype) (bh)), \ |
"rJ" ((USItype) (al)), \ |
"rJ" ((USItype) (bl))) |
#define count_leading_zeros(count, x) \ |
do { \ |
USItype __cbtmp; \ |
__asm__ ("ff1 %0,%1" \ |
: "=r" (__cbtmp) \ |
: "r" ((USItype) (x))); \ |
(count) = __cbtmp ^ 31; \ |
} while (0) |
#define COUNT_LEADING_ZEROS_0 63 /* sic */ |
#if defined (__mc88110__) |
#define umul_ppmm(wh, wl, u, v) \ |
do { \ |
union {UDItype __ll; \ |
struct {USItype __h, __l;} __i; \ |
} __xx; \ |
__asm__ ("mulu.d %0,%1,%2" \ |
: "=r" (__xx.__ll) \ |
: "r" ((USItype) (u)), \ |
"r" ((USItype) (v))); \ |
(wh) = __xx.__i.__h; \ |
(wl) = __xx.__i.__l; \ |
} while (0) |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
({union {UDItype __ll; \ |
struct {USItype __h, __l;} __i; \ |
} __xx; \ |
USItype __q; \ |
__xx.__i.__h = (n1); __xx.__i.__l = (n0); \ |
__asm__ ("divu.d %0,%1,%2" \ |
: "=r" (__q) \ |
: "r" (__xx.__ll), \ |
"r" ((USItype) (d))); \ |
(r) = (n0) - __q * (d); (q) = __q; }) |
#define UMUL_TIME 5 |
#define UDIV_TIME 25 |
#else |
#define UMUL_TIME 17 |
#define UDIV_TIME 150 |
#endif /* __mc88110__ */ |
#endif /* __m88000__ */ |
#if defined (__mn10300__) |
# if defined (__AM33__) |
# define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X)) |
# define umul_ppmm(w1, w0, u, v) \ |
asm("mulu %3,%2,%1,%0" : "=r"(w0), "=r"(w1) : "r"(u), "r"(v)) |
# define smul_ppmm(w1, w0, u, v) \ |
asm("mul %3,%2,%1,%0" : "=r"(w0), "=r"(w1) : "r"(u), "r"(v)) |
# else |
# define umul_ppmm(w1, w0, u, v) \ |
asm("nop; nop; mulu %3,%0" : "=d"(w0), "=z"(w1) : "%0"(u), "d"(v)) |
# define smul_ppmm(w1, w0, u, v) \ |
asm("nop; nop; mul %3,%0" : "=d"(w0), "=z"(w1) : "%0"(u), "d"(v)) |
# endif |
# define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do { \ |
DWunion __s, __a, __b; \ |
__a.s.low = (al); __a.s.high = (ah); \ |
__b.s.low = (bl); __b.s.high = (bh); \ |
__s.ll = __a.ll + __b.ll; \ |
(sl) = __s.s.low; (sh) = __s.s.high; \ |
} while (0) |
# define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
DWunion __s, __a, __b; \ |
__a.s.low = (al); __a.s.high = (ah); \ |
__b.s.low = (bl); __b.s.high = (bh); \ |
__s.ll = __a.ll - __b.ll; \ |
(sl) = __s.s.low; (sh) = __s.s.high; \ |
} while (0) |
# define udiv_qrnnd(q, r, nh, nl, d) \ |
asm("divu %2,%0" : "=D"(q), "=z"(r) : "D"(d), "0"(nl), "1"(nh)) |
# define sdiv_qrnnd(q, r, nh, nl, d) \ |
asm("div %2,%0" : "=D"(q), "=z"(r) : "D"(d), "0"(nl), "1"(nh)) |
# define UMUL_TIME 3 |
# define UDIV_TIME 38 |
#endif |
#if defined (__mips__) && W_TYPE_SIZE == 32 |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
UDItype __x = (UDItype) (USItype) (u) * (USItype) (v); \ |
(w1) = (USItype) (__x >> 32); \ |
(w0) = (USItype) (__x); \ |
} while (0) |
#define UMUL_TIME 10 |
#define UDIV_TIME 100 |
#if (__mips == 32 || __mips == 64) && ! defined (__mips16) |
#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X)) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif |
#endif /* __mips__ */ |
#if defined (__ns32000__) && W_TYPE_SIZE == 32 |
#define umul_ppmm(w1, w0, u, v) \ |
({union {UDItype __ll; \ |
struct {USItype __l, __h;} __i; \ |
} __xx; \ |
__asm__ ("meid %2,%0" \ |
: "=g" (__xx.__ll) \ |
: "%0" ((USItype) (u)), \ |
"g" ((USItype) (v))); \ |
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) |
#define __umulsidi3(u, v) \ |
({UDItype __w; \ |
__asm__ ("meid %2,%0" \ |
: "=g" (__w) \ |
: "%0" ((USItype) (u)), \ |
"g" ((USItype) (v))); \ |
__w; }) |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
({union {UDItype __ll; \ |
struct {USItype __l, __h;} __i; \ |
} __xx; \ |
__xx.__i.__h = (n1); __xx.__i.__l = (n0); \ |
__asm__ ("deid %2,%0" \ |
: "=g" (__xx.__ll) \ |
: "0" (__xx.__ll), \ |
"g" ((USItype) (d))); \ |
(r) = __xx.__i.__l; (q) = __xx.__i.__h; }) |
#define count_trailing_zeros(count,x) \ |
do { \ |
__asm__ ("ffsd %2,%0" \ |
: "=r" ((USItype) (count)) \ |
: "0" ((USItype) 0), \ |
"r" ((USItype) (x))); \ |
} while (0) |
#endif /* __ns32000__ */ |
/* FIXME: We should test _IBMR2 here when we add assembly support for the |
system vendor compilers. |
FIXME: What's needed for gcc PowerPC VxWorks? __vxworks__ is not good |
enough, since that hits ARM and m68k too. */ |
#if (defined (_ARCH_PPC) /* AIX */ \ |
|| defined (__powerpc__) /* gcc */ \ |
|| defined (__POWERPC__) /* BEOS */ \ |
|| defined (__ppc__) /* Darwin */ \ |
|| (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */ \ |
|| (defined (PPC) && defined (CPU_FAMILY) /* VxWorks */ \ |
&& CPU_FAMILY == PPC) \ |
) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do { \ |
if (__builtin_constant_p (bh) && (bh) == 0) \ |
__asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ |
__asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ |
else \ |
__asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3" \ |
: "=r" (sh), "=&r" (sl) \ |
: "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ |
} while (0) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
if (__builtin_constant_p (ah) && (ah) == 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ |
else \ |
__asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2" \ |
: "=r" (sh), "=&r" (sl) \ |
: "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ |
} while (0) |
#define count_leading_zeros(count, x) \ |
__asm__ ("cntlzw %0,%1" : "=r" (count) : "r" (x)) |
#define COUNT_LEADING_ZEROS_0 32 |
#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \ |
|| defined (__ppc__) \ |
|| (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */ \ |
|| (defined (PPC) && defined (CPU_FAMILY) /* VxWorks */ \ |
&& CPU_FAMILY == PPC) |
#define umul_ppmm(ph, pl, m0, m1) \ |
do { \ |
USItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ |
(pl) = __m0 * __m1; \ |
} while (0) |
#define UMUL_TIME 15 |
#define smul_ppmm(ph, pl, m0, m1) \ |
do { \ |
SItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ |
(pl) = __m0 * __m1; \ |
} while (0) |
#define SMUL_TIME 14 |
#define UDIV_TIME 120 |
#endif |
#endif /* 32-bit POWER architecture variants. */ |
/* We should test _IBMR2 here when we add assembly support for the system |
vendor compilers. */ |
#if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do { \ |
if (__builtin_constant_p (bh) && (bh) == 0) \ |
__asm__ ("add%I4c %1,%3,%4\n\taddze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ |
__asm__ ("add%I4c %1,%3,%4\n\taddme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ |
else \ |
__asm__ ("add%I5c %1,%4,%5\n\tadde %0,%2,%3" \ |
: "=r" (sh), "=&r" (sl) \ |
: "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ |
} while (0) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
if (__builtin_constant_p (ah) && (ah) == 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\tsubfme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\taddme %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ |
else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ |
__asm__ ("subf%I3c %1,%4,%3\n\taddze %0,%2" \ |
: "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ |
else \ |
__asm__ ("subf%I4c %1,%5,%4\n\tsubfe %0,%3,%2" \ |
: "=r" (sh), "=&r" (sl) \ |
: "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ |
} while (0) |
#define count_leading_zeros(count, x) \ |
__asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x)) |
#define COUNT_LEADING_ZEROS_0 64 |
#define umul_ppmm(ph, pl, m0, m1) \ |
do { \ |
UDItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ |
(pl) = __m0 * __m1; \ |
} while (0) |
#define UMUL_TIME 15 |
#define smul_ppmm(ph, pl, m0, m1) \ |
do { \ |
DItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ |
(pl) = __m0 * __m1; \ |
} while (0) |
#define SMUL_TIME 14 /* ??? */ |
#define UDIV_TIME 120 /* ??? */ |
#endif /* 64-bit PowerPC. */ |
#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("a %1,%5\n\tae %0,%3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%0" ((USItype) (ah)), \ |
"r" ((USItype) (bh)), \ |
"%1" ((USItype) (al)), \ |
"r" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("s %1,%5\n\tse %0,%3" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"r" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"r" ((USItype) (bl))) |
#define umul_ppmm(ph, pl, m0, m1) \ |
do { \ |
USItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ( \ |
"s r2,r2\n" \ |
" mts r10,%2\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" m r2,%3\n" \ |
" cas %0,r2,r0\n" \ |
" mfs r10,%1" \ |
: "=r" ((USItype) (ph)), \ |
"=r" ((USItype) (pl)) \ |
: "%r" (__m0), \ |
"r" (__m1) \ |
: "r2"); \ |
(ph) += ((((SItype) __m0 >> 31) & __m1) \ |
+ (((SItype) __m1 >> 31) & __m0)); \ |
} while (0) |
#define UMUL_TIME 20 |
#define UDIV_TIME 200 |
#define count_leading_zeros(count, x) \ |
do { \ |
if ((x) >= 0x10000) \ |
__asm__ ("clz %0,%1" \ |
: "=r" ((USItype) (count)) \ |
: "r" ((USItype) (x) >> 16)); \ |
else \ |
{ \ |
__asm__ ("clz %0,%1" \ |
: "=r" ((USItype) (count)) \ |
: "r" ((USItype) (x))); \ |
(count) += 16; \ |
} \ |
} while (0) |
#endif |
#if defined(__sh__) && !__SHMEDIA__ && W_TYPE_SIZE == 32 |
#ifndef __sh1__ |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ( \ |
"dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0" \ |
: "=r<" ((USItype)(w1)), \ |
"=r<" ((USItype)(w0)) \ |
: "r" ((USItype)(u)), \ |
"r" ((USItype)(v)) \ |
: "macl", "mach") |
#define UMUL_TIME 5 |
#endif |
/* This is the same algorithm as __udiv_qrnnd_c. */ |
#define UDIV_NEEDS_NORMALIZATION 1 |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
do { \ |
extern UWtype __udiv_qrnnd_16 (UWtype, UWtype) \ |
__attribute__ ((visibility ("hidden"))); \ |
/* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */ \ |
__asm__ ( \ |
"mov%M4 %4,r5\n" \ |
" swap.w %3,r4\n" \ |
" swap.w r5,r6\n" \ |
" jsr @%5\n" \ |
" shll16 r6\n" \ |
" swap.w r4,r4\n" \ |
" jsr @%5\n" \ |
" swap.w r1,%0\n" \ |
" or r1,%0" \ |
: "=r" (q), "=&z" (r) \ |
: "1" (n1), "r" (n0), "rm" (d), "r" (&__udiv_qrnnd_16) \ |
: "r1", "r2", "r4", "r5", "r6", "pr", "t"); \ |
} while (0) |
#define UDIV_TIME 80 |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("clrt;subc %5,%1; subc %4,%0" \ |
: "=r" (sh), "=r" (sl) \ |
: "0" (ah), "1" (al), "r" (bh), "r" (bl) : "t") |
#endif /* __sh__ */ |
#if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32 |
#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v) |
#define count_leading_zeros(count, x) \ |
do \ |
{ \ |
UDItype x_ = (USItype)(x); \ |
SItype c_; \ |
\ |
__asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_)); \ |
(count) = c_ - 31; \ |
} \ |
while (0) |
#define COUNT_LEADING_ZEROS_0 32 |
#endif |
#if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \ |
&& W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "%rJ" ((USItype) (ah)), \ |
"rI" ((USItype) (bh)), \ |
"%rJ" ((USItype) (al)), \ |
"rI" ((USItype) (bl)) \ |
__CLOBBER_CC) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \ |
: "=r" ((USItype) (sh)), \ |
"=&r" ((USItype) (sl)) \ |
: "rJ" ((USItype) (ah)), \ |
"rI" ((USItype) (bh)), \ |
"rJ" ((USItype) (al)), \ |
"rI" ((USItype) (bl)) \ |
__CLOBBER_CC) |
#if defined (__sparc_v9__) |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
register USItype __g1 asm ("g1"); \ |
__asm__ ("umul\t%2,%3,%1\n\t" \ |
"srlx\t%1, 32, %0" \ |
: "=r" ((USItype) (w1)), \ |
"=r" (__g1) \ |
: "r" ((USItype) (u)), \ |
"r" ((USItype) (v))); \ |
(w0) = __g1; \ |
} while (0) |
#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ |
__asm__ ("mov\t%2,%%y\n\t" \ |
"udiv\t%3,%4,%0\n\t" \ |
"umul\t%0,%4,%1\n\t" \ |
"sub\t%3,%1,%1" \ |
: "=&r" ((USItype) (__q)), \ |
"=&r" ((USItype) (__r)) \ |
: "r" ((USItype) (__n1)), \ |
"r" ((USItype) (__n0)), \ |
"r" ((USItype) (__d))) |
#else |
#if defined (__sparc_v8__) |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("umul %2,%3,%1;rd %%y,%0" \ |
: "=r" ((USItype) (w1)), \ |
"=r" ((USItype) (w0)) \ |
: "r" ((USItype) (u)), \ |
"r" ((USItype) (v))) |
#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ |
__asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\ |
: "=&r" ((USItype) (__q)), \ |
"=&r" ((USItype) (__r)) \ |
: "r" ((USItype) (__n1)), \ |
"r" ((USItype) (__n0)), \ |
"r" ((USItype) (__d))) |
#else |
#if defined (__sparclite__) |
/* This has hardware multiply but not divide. It also has two additional |
instructions scan (ffs from high bit) and divscc. */ |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("umul %2,%3,%1;rd %%y,%0" \ |
: "=r" ((USItype) (w1)), \ |
"=r" ((USItype) (w0)) \ |
: "r" ((USItype) (u)), \ |
"r" ((USItype) (v))) |
#define udiv_qrnnd(q, r, n1, n0, d) \ |
__asm__ ("! Inlined udiv_qrnnd\n" \ |
" wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \ |
" tst %%g0\n" \ |
" divscc %3,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%%g1\n" \ |
" divscc %%g1,%4,%0\n" \ |
" rd %%y,%1\n" \ |
" bl,a 1f\n" \ |
" add %1,%4,%1\n" \ |
"1: ! End of inline udiv_qrnnd" \ |
: "=r" ((USItype) (q)), \ |
"=r" ((USItype) (r)) \ |
: "r" ((USItype) (n1)), \ |
"r" ((USItype) (n0)), \ |
"rI" ((USItype) (d)) \ |
: "g1" __AND_CLOBBER_CC) |
#define UDIV_TIME 37 |
#define count_leading_zeros(count, x) \ |
do { \ |
__asm__ ("scan %1,1,%0" \ |
: "=r" ((USItype) (count)) \ |
: "r" ((USItype) (x))); \ |
} while (0) |
/* Early sparclites return 63 for an argument of 0, but they warn that future |
implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0 |
undefined. */ |
#else |
/* SPARC without integer multiplication and divide instructions. |
(i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */ |
#define umul_ppmm(w1, w0, u, v) \ |
__asm__ ("! Inlined umul_ppmm\n" \ |
" wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n"\ |
" sra %3,31,%%o5 ! Don't move this insn\n" \ |
" and %2,%%o5,%%o5 ! Don't move this insn\n" \ |
" andcc %%g0,0,%%g1 ! Don't move this insn\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,%3,%%g1\n" \ |
" mulscc %%g1,0,%%g1\n" \ |
" add %%g1,%%o5,%0\n" \ |
" rd %%y,%1" \ |
: "=r" ((USItype) (w1)), \ |
"=r" ((USItype) (w0)) \ |
: "%rI" ((USItype) (u)), \ |
"r" ((USItype) (v)) \ |
: "g1", "o5" __AND_CLOBBER_CC) |
#define UMUL_TIME 39 /* 39 instructions */ |
/* It's quite necessary to add this much assembler for the sparc. |
The default udiv_qrnnd (in C) is more than 10 times slower! */ |
#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ |
__asm__ ("! Inlined udiv_qrnnd\n" \ |
" mov 32,%%g1\n" \ |
" subcc %1,%2,%%g0\n" \ |
"1: bcs 5f\n" \ |
" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ |
" sub %1,%2,%1 ! this kills msb of n\n" \ |
" addx %1,%1,%1 ! so this can't give carry\n" \ |
" subcc %%g1,1,%%g1\n" \ |
"2: bne 1b\n" \ |
" subcc %1,%2,%%g0\n" \ |
" bcs 3f\n" \ |
" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ |
" b 3f\n" \ |
" sub %1,%2,%1 ! this kills msb of n\n" \ |
"4: sub %1,%2,%1\n" \ |
"5: addxcc %1,%1,%1\n" \ |
" bcc 2b\n" \ |
" subcc %%g1,1,%%g1\n" \ |
"! Got carry from n. Subtract next step to cancel this carry.\n" \ |
" bne 4b\n" \ |
" addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n" \ |
" sub %1,%2,%1\n" \ |
"3: xnor %0,0,%0\n" \ |
" ! End of inline udiv_qrnnd" \ |
: "=&r" ((USItype) (__q)), \ |
"=&r" ((USItype) (__r)) \ |
: "r" ((USItype) (__d)), \ |
"1" ((USItype) (__n1)), \ |
"0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC) |
#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */ |
#endif /* __sparclite__ */ |
#endif /* __sparc_v8__ */ |
#endif /* __sparc_v9__ */ |
#endif /* sparc32 */ |
#if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \ |
&& W_TYPE_SIZE == 64 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do { \ |
UDItype __carry = 0; \ |
__asm__ ("addcc\t%r5,%6,%1\n\t" \ |
"add\t%r3,%4,%0\n\t" \ |
"movcs\t%%xcc, 1, %2\n\t" \ |
"add\t%0, %2, %0" \ |
: "=r" ((UDItype)(sh)), \ |
"=&r" ((UDItype)(sl)), \ |
"+r" (__carry) \ |
: "%rJ" ((UDItype)(ah)), \ |
"rI" ((UDItype)(bh)), \ |
"%rJ" ((UDItype)(al)), \ |
"rI" ((UDItype)(bl)) \ |
__CLOBBER_CC); \ |
} while (0) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
UDItype __carry = 0; \ |
__asm__ ("subcc\t%r5,%6,%1\n\t" \ |
"sub\t%r3,%4,%0\n\t" \ |
"movcs\t%%xcc, 1, %2\n\t" \ |
"sub\t%0, %2, %0" \ |
: "=r" ((UDItype)(sh)), \ |
"=&r" ((UDItype)(sl)), \ |
"+r" (__carry) \ |
: "%rJ" ((UDItype)(ah)), \ |
"rI" ((UDItype)(bh)), \ |
"%rJ" ((UDItype)(al)), \ |
"rI" ((UDItype)(bl)) \ |
__CLOBBER_CC); \ |
} while (0) |
#define umul_ppmm(wh, wl, u, v) \ |
do { \ |
UDItype tmp1, tmp2, tmp3, tmp4; \ |
__asm__ __volatile__ ( \ |
"srl %7,0,%3\n\t" \ |
"mulx %3,%6,%1\n\t" \ |
"srlx %6,32,%2\n\t" \ |
"mulx %2,%3,%4\n\t" \ |
"sllx %4,32,%5\n\t" \ |
"srl %6,0,%3\n\t" \ |
"sub %1,%5,%5\n\t" \ |
"srlx %5,32,%5\n\t" \ |
"addcc %4,%5,%4\n\t" \ |
"srlx %7,32,%5\n\t" \ |
"mulx %3,%5,%3\n\t" \ |
"mulx %2,%5,%5\n\t" \ |
"sethi %%hi(0x80000000),%2\n\t" \ |
"addcc %4,%3,%4\n\t" \ |
"srlx %4,32,%4\n\t" \ |
"add %2,%2,%2\n\t" \ |
"movcc %%xcc,%%g0,%2\n\t" \ |
"addcc %5,%4,%5\n\t" \ |
"sllx %3,32,%3\n\t" \ |
"add %1,%3,%1\n\t" \ |
"add %5,%2,%0" \ |
: "=r" ((UDItype)(wh)), \ |
"=&r" ((UDItype)(wl)), \ |
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \ |
: "r" ((UDItype)(u)), \ |
"r" ((UDItype)(v)) \ |
__CLOBBER_CC); \ |
} while (0) |
#define UMUL_TIME 96 |
#define UDIV_TIME 230 |
#endif /* sparc64 */ |
#if defined (__vax__) && W_TYPE_SIZE == 32 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("addl2 %5,%1\n\tadwc %3,%0" \ |
: "=g" ((USItype) (sh)), \ |
"=&g" ((USItype) (sl)) \ |
: "%0" ((USItype) (ah)), \ |
"g" ((USItype) (bh)), \ |
"%1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \ |
: "=g" ((USItype) (sh)), \ |
"=&g" ((USItype) (sl)) \ |
: "0" ((USItype) (ah)), \ |
"g" ((USItype) (bh)), \ |
"1" ((USItype) (al)), \ |
"g" ((USItype) (bl))) |
#define umul_ppmm(xh, xl, m0, m1) \ |
do { \ |
union { \ |
UDItype __ll; \ |
struct {USItype __l, __h;} __i; \ |
} __xx; \ |
USItype __m0 = (m0), __m1 = (m1); \ |
__asm__ ("emul %1,%2,$0,%0" \ |
: "=r" (__xx.__ll) \ |
: "g" (__m0), \ |
"g" (__m1)); \ |
(xh) = __xx.__i.__h; \ |
(xl) = __xx.__i.__l; \ |
(xh) += ((((SItype) __m0 >> 31) & __m1) \ |
+ (((SItype) __m1 >> 31) & __m0)); \ |
} while (0) |
#define sdiv_qrnnd(q, r, n1, n0, d) \ |
do { \ |
union {DItype __ll; \ |
struct {SItype __l, __h;} __i; \ |
} __xx; \ |
__xx.__i.__h = n1; __xx.__i.__l = n0; \ |
__asm__ ("ediv %3,%2,%0,%1" \ |
: "=g" (q), "=g" (r) \ |
: "g" (__xx.__ll), "g" (d)); \ |
} while (0) |
#endif /* __vax__ */ |
#ifdef _TMS320C6X |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do \ |
{ \ |
UDItype __ll; \ |
__asm__ ("addu .l1 %1, %2, %0" \ |
: "=a" (__ll) : "a" (al), "a" (bl)); \ |
(sl) = (USItype)__ll; \ |
(sh) = ((USItype)(__ll >> 32)) + (ah) + (bh); \ |
} \ |
while (0) |
#ifdef _TMS320C6400_PLUS |
#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v) |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
UDItype __x = (UDItype) (USItype) (u) * (USItype) (v); \ |
(w1) = (USItype) (__x >> 32); \ |
(w0) = (USItype) (__x); \ |
} while (0) |
#endif /* _TMS320C6400_PLUS */ |
#define count_leading_zeros(count, x) ((count) = __builtin_clz (x)) |
#ifdef _TMS320C6400 |
#define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x)) |
#endif |
#define UMUL_TIME 4 |
#define UDIV_TIME 40 |
#endif /* _TMS320C6X */ |
#if defined (__xtensa__) && W_TYPE_SIZE == 32 |
/* This code is not Xtensa-configuration-specific, so rely on the compiler |
to expand builtin functions depending on what configuration features |
are available. This avoids library calls when the operation can be |
performed in-line. */ |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
DWunion __w; \ |
__w.ll = __builtin_umulsidi3 (u, v); \ |
w1 = __w.s.high; \ |
w0 = __w.s.low; \ |
} while (0) |
#define __umulsidi3(u, v) __builtin_umulsidi3 (u, v) |
#define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X)) |
#define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X)) |
#endif /* __xtensa__ */ |
#if defined xstormy16 |
extern UHItype __stormy16_count_leading_zeros (UHItype); |
#define count_leading_zeros(count, x) \ |
do \ |
{ \ |
UHItype size; \ |
\ |
/* We assume that W_TYPE_SIZE is a multiple of 16... */ \ |
for ((count) = 0, size = W_TYPE_SIZE; size; size -= 16) \ |
{ \ |
UHItype c; \ |
\ |
c = __clzhi2 ((x) >> (size - 16)); \ |
(count) += c; \ |
if (c != 16) \ |
break; \ |
} \ |
} \ |
while (0) |
#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE |
#endif |
#if defined (__z8000__) && W_TYPE_SIZE == 16 |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
__asm__ ("add %H1,%H5\n\tadc %H0,%H3" \ |
: "=r" ((unsigned int)(sh)), \ |
"=&r" ((unsigned int)(sl)) \ |
: "%0" ((unsigned int)(ah)), \ |
"r" ((unsigned int)(bh)), \ |
"%1" ((unsigned int)(al)), \ |
"rQR" ((unsigned int)(bl))) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
__asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \ |
: "=r" ((unsigned int)(sh)), \ |
"=&r" ((unsigned int)(sl)) \ |
: "0" ((unsigned int)(ah)), \ |
"r" ((unsigned int)(bh)), \ |
"1" ((unsigned int)(al)), \ |
"rQR" ((unsigned int)(bl))) |
#define umul_ppmm(xh, xl, m0, m1) \ |
do { \ |
union {long int __ll; \ |
struct {unsigned int __h, __l;} __i; \ |
} __xx; \ |
unsigned int __m0 = (m0), __m1 = (m1); \ |
__asm__ ("mult %S0,%H3" \ |
: "=r" (__xx.__i.__h), \ |
"=r" (__xx.__i.__l) \ |
: "%1" (__m0), \ |
"rQR" (__m1)); \ |
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ |
(xh) += ((((signed int) __m0 >> 15) & __m1) \ |
+ (((signed int) __m1 >> 15) & __m0)); \ |
} while (0) |
#endif /* __z8000__ */ |
#endif /* __GNUC__ */ |
/* If this machine has no inline assembler, use C macros. */ |
#if !defined (add_ssaaaa) |
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ |
do { \ |
UWtype __x; \ |
__x = (al) + (bl); \ |
(sh) = (ah) + (bh) + (__x < (al)); \ |
(sl) = __x; \ |
} while (0) |
#endif |
#if !defined (sub_ddmmss) |
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ |
do { \ |
UWtype __x; \ |
__x = (al) - (bl); \ |
(sh) = (ah) - (bh) - (__x > (al)); \ |
(sl) = __x; \ |
} while (0) |
#endif |
/* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of |
smul_ppmm. */ |
#if !defined (umul_ppmm) && defined (smul_ppmm) |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
UWtype __w1; \ |
UWtype __xm0 = (u), __xm1 = (v); \ |
smul_ppmm (__w1, w0, __xm0, __xm1); \ |
(w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1) \ |
+ (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0); \ |
} while (0) |
#endif |
/* If we still don't have umul_ppmm, define it using plain C. */ |
#if !defined (umul_ppmm) |
#define umul_ppmm(w1, w0, u, v) \ |
do { \ |
UWtype __x0, __x1, __x2, __x3; \ |
UHWtype __ul, __vl, __uh, __vh; \ |
\ |
__ul = __ll_lowpart (u); \ |
__uh = __ll_highpart (u); \ |
__vl = __ll_lowpart (v); \ |
__vh = __ll_highpart (v); \ |
\ |
__x0 = (UWtype) __ul * __vl; \ |
__x1 = (UWtype) __ul * __vh; \ |
__x2 = (UWtype) __uh * __vl; \ |
__x3 = (UWtype) __uh * __vh; \ |
\ |
__x1 += __ll_highpart (__x0);/* this can't give carry */ \ |
__x1 += __x2; /* but this indeed can */ \ |
if (__x1 < __x2) /* did we get it? */ \ |
__x3 += __ll_B; /* yes, add it in the proper pos. */ \ |
\ |
(w1) = __x3 + __ll_highpart (__x1); \ |
(w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \ |
} while (0) |
#endif |
#if !defined (__umulsidi3) |
#define __umulsidi3(u, v) \ |
({DWunion __w; \ |
umul_ppmm (__w.s.high, __w.s.low, u, v); \ |
__w.ll; }) |
#endif |
/* Define this unconditionally, so it can be used for debugging. */ |
#define __udiv_qrnnd_c(q, r, n1, n0, d) \ |
do { \ |
UWtype __d1, __d0, __q1, __q0; \ |
UWtype __r1, __r0, __m; \ |
__d1 = __ll_highpart (d); \ |
__d0 = __ll_lowpart (d); \ |
\ |
__r1 = (n1) % __d1; \ |
__q1 = (n1) / __d1; \ |
__m = (UWtype) __q1 * __d0; \ |
__r1 = __r1 * __ll_B | __ll_highpart (n0); \ |
if (__r1 < __m) \ |
{ \ |
__q1--, __r1 += (d); \ |
if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\ |
if (__r1 < __m) \ |
__q1--, __r1 += (d); \ |
} \ |
__r1 -= __m; \ |
\ |
__r0 = __r1 % __d1; \ |
__q0 = __r1 / __d1; \ |
__m = (UWtype) __q0 * __d0; \ |
__r0 = __r0 * __ll_B | __ll_lowpart (n0); \ |
if (__r0 < __m) \ |
{ \ |
__q0--, __r0 += (d); \ |
if (__r0 >= (d)) \ |
if (__r0 < __m) \ |
__q0--, __r0 += (d); \ |
} \ |
__r0 -= __m; \ |
\ |
(q) = (UWtype) __q1 * __ll_B | __q0; \ |
(r) = __r0; \ |
} while (0) |
/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through |
__udiv_w_sdiv (defined in libgcc or elsewhere). */ |
#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd) |
#define udiv_qrnnd(q, r, nh, nl, d) \ |
do { \ |
extern UWtype __udiv_w_sdiv (UWtype *, UWtype, UWtype, UWtype); \ |
UWtype __r; \ |
(q) = __udiv_w_sdiv (&__r, nh, nl, d); \ |
(r) = __r; \ |
} while (0) |
#endif |
/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */ |
#if !defined (udiv_qrnnd) |
#define UDIV_NEEDS_NORMALIZATION 1 |
#define udiv_qrnnd __udiv_qrnnd_c |
#endif |
#if !defined (count_leading_zeros) |
#define count_leading_zeros(count, x) \ |
do { \ |
UWtype __xr = (x); \ |
UWtype __a; \ |
\ |
if (W_TYPE_SIZE <= 32) \ |
{ \ |
__a = __xr < ((UWtype)1<<2*__BITS4) \ |
? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4) \ |
: (__xr < ((UWtype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \ |
} \ |
else \ |
{ \ |
for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \ |
if (((__xr >> __a) & 0xff) != 0) \ |
break; \ |
} \ |
\ |
(count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \ |
} while (0) |
#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE |
#endif |
#if !defined (count_trailing_zeros) |
/* Define count_trailing_zeros using count_leading_zeros. The latter might be |
defined in asm, but if it is not, the C version above is good enough. */ |
#define count_trailing_zeros(count, x) \ |
do { \ |
UWtype __ctz_x = (x); \ |
UWtype __ctz_c; \ |
count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \ |
(count) = W_TYPE_SIZE - 1 - __ctz_c; \ |
} while (0) |
#endif |
#ifndef UDIV_NEEDS_NORMALIZATION |
#define UDIV_NEEDS_NORMALIZATION 0 |
#endif |
/contrib/toolchain/binutils/include/lto-symtab.h |
---|
1,5 → 1,5 |
/* Data types used in the IL symbol table. |
Copyright (C) 2009 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Contributed by Rafael Espindola <espindola@google.com> |
This file is part of GCC. |
/contrib/toolchain/binutils/include/mach-o/ChangeLog |
---|
1,3 → 1,38 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-04-16 Tristan Gingold <gingold@adacore.com> |
* loader.h: Add macros for rebase, bind and export constants. |
2014-04-16 Tristan Gingold <gingold@adacore.com> |
* loader.h (BFD_MACH_O_CPU_ARCH_MASK, BFD_MACH_O_CPU_ARCH_ABI64) |
(BFD_MACH_O_CPU_SUBTYPE_MASK, BFD_MACH_O_CPU_SUBTYPE_LIB64): Define. |
2014-04-03 Tristan Gingold <gingold@adacore.com> |
* unwind.h (mach_o_compact_unwind_64): Fix typo in personality. |
2014-04-02 Tristan Gingold <gingold@adacore.com> |
* external.h (mach_o_prebound_dylib_command_external) |
(mach_o_prebind_cksum_command_external) |
(mach_o_twolevel_hints_command_external): New types. |
2014-03-26 Tristan Gingold <gingold@adacore.com> |
* loader.h (bfd_mach_o_cpu_type): Add BFD_MACH_O_CPU_TYPE_ARM64. |
2014-03-17 Tristan Gingold <gingold@adacore.com> |
* unwind.h: New file. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2012-11-14 Tristan Gingold <gingold@adacore.com> |
* external.h (mach_o_entry_point_command_external) |
67,7 → 102,7 |
* loader.h: New file. |
Copyright (C) 2011-2012 Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/mach-o/arm.h |
---|
1,6 → 1,5 |
/* Mach-O arm declarations for BFD. |
Copyright 2012 |
Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/mach-o/codesign.h |
---|
1,6 → 1,5 |
/* Mach-O support for BFD. |
Copyright 2011 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/mach-o/external.h |
---|
1,6 → 1,5 |
/* Mach-O support for BFD. |
Copyright 2011, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
288,6 → 287,24 |
unsigned char export_size[4]; |
}; |
struct mach_o_prebound_dylib_command_external |
{ |
unsigned char name[4]; |
unsigned char nmodules[4]; |
unsigned char linked_modules[4]; |
}; |
struct mach_o_prebind_cksum_command_external |
{ |
unsigned char cksum[4]; |
}; |
struct mach_o_twolevel_hints_command_external |
{ |
unsigned char offset[4]; |
unsigned char nhints[4]; |
}; |
struct mach_o_version_min_command_external |
{ |
unsigned char version[4]; |
/contrib/toolchain/binutils/include/mach-o/loader.h |
---|
1,6 → 1,5 |
/* Mach-O support for BFD. |
Copyright 2011, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
33,7 → 32,10 |
} |
bfd_mach_o_mach_header_magic; |
#define BFD_MACH_O_CPU_IS64BIT 0x1000000 |
/* Capability bits in cpu type. */ |
#define BFD_MACH_O_CPU_ARCH_MASK 0xff000000 |
#define BFD_MACH_O_CPU_ARCH_ABI64 0x01000000 |
#define BFD_MACH_O_CPU_IS64BIT 0x01000000 |
typedef enum bfd_mach_o_cpu_type |
{ |
49,11 → 51,19 |
BFD_MACH_O_CPU_TYPE_I860 = 15, |
BFD_MACH_O_CPU_TYPE_ALPHA = 16, |
BFD_MACH_O_CPU_TYPE_POWERPC = 18, |
BFD_MACH_O_CPU_TYPE_POWERPC_64 = (BFD_MACH_O_CPU_TYPE_POWERPC | BFD_MACH_O_CPU_IS64BIT), |
BFD_MACH_O_CPU_TYPE_X86_64 = (BFD_MACH_O_CPU_TYPE_I386 | BFD_MACH_O_CPU_IS64BIT) |
BFD_MACH_O_CPU_TYPE_POWERPC_64 = |
(BFD_MACH_O_CPU_TYPE_POWERPC | BFD_MACH_O_CPU_IS64BIT), |
BFD_MACH_O_CPU_TYPE_X86_64 = |
(BFD_MACH_O_CPU_TYPE_I386 | BFD_MACH_O_CPU_IS64BIT), |
BFD_MACH_O_CPU_TYPE_ARM64 = |
(BFD_MACH_O_CPU_TYPE_ARM | BFD_MACH_O_CPU_IS64BIT) |
} |
bfd_mach_o_cpu_type; |
/* Capability bits in cpu subtype. */ |
#define BFD_MACH_O_CPU_SUBTYPE_MASK 0xff000000 |
#define BFD_MACH_O_CPU_SUBTYPE_LIB64 0x80000000 |
typedef enum bfd_mach_o_cpu_subtype |
{ |
/* i386. */ |
332,6 → 342,63 |
#define BFD_MACH_O_INDIRECT_SYM_LOCAL 0x80000000 |
#define BFD_MACH_O_INDIRECT_SYM_ABS 0x40000000 |
/* Constants for dyld info rebase. */ |
#define BFD_MACH_O_REBASE_OPCODE_MASK 0xf0 |
#define BFD_MACH_O_REBASE_IMMEDIATE_MASK 0x0f |
/* The rebase opcodes. */ |
#define BFD_MACH_O_REBASE_OPCODE_DONE 0x00 |
#define BFD_MACH_O_REBASE_OPCODE_SET_TYPE_IMM 0x10 |
#define BFD_MACH_O_REBASE_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB 0x20 |
#define BFD_MACH_O_REBASE_OPCODE_ADD_ADDR_ULEB 0x30 |
#define BFD_MACH_O_REBASE_OPCODE_ADD_ADDR_IMM_SCALED 0x40 |
#define BFD_MACH_O_REBASE_OPCODE_DO_REBASE_IMM_TIMES 0x50 |
#define BFD_MACH_O_REBASE_OPCODE_DO_REBASE_ULEB_TIMES 0x60 |
#define BFD_MACH_O_REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB 0x70 |
#define BFD_MACH_O_REBASE_OPCODE_DO_REBASE_ULEB_TIMES_SKIPPING_ULEB 0x80 |
/* The rebase type. */ |
#define BFD_MACH_O_REBASE_TYPE_POINTER 1 |
#define BFD_MACH_O_REBASE_TYPE_TEXT_ABSOLUTE32 2 |
#define BFD_MACH_O_REBASE_TYPE_TEXT_PCREL32 3 |
/* Constants for dyld info bind. */ |
#define BFD_MACH_O_BIND_OPCODE_MASK 0xf0 |
#define BFD_MACH_O_BIND_IMMEDIATE_MASK 0x0f |
/* The bind opcodes. */ |
#define BFD_MACH_O_BIND_OPCODE_DONE 0x00 |
#define BFD_MACH_O_BIND_OPCODE_SET_DYLIB_ORDINAL_IMM 0x10 |
#define BFD_MACH_O_BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB 0x20 |
#define BFD_MACH_O_BIND_OPCODE_SET_DYLIB_SPECIAL_IMM 0x30 |
#define BFD_MACH_O_BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM 0x40 |
#define BFD_MACH_O_BIND_OPCODE_SET_TYPE_IMM 0x50 |
#define BFD_MACH_O_BIND_OPCODE_SET_ADDEND_SLEB 0x60 |
#define BFD_MACH_O_BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB 0x70 |
#define BFD_MACH_O_BIND_OPCODE_ADD_ADDR_ULEB 0x80 |
#define BFD_MACH_O_BIND_OPCODE_DO_BIND 0x90 |
#define BFD_MACH_O_BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB 0xa0 |
#define BFD_MACH_O_BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED 0xb0 |
#define BFD_MACH_O_BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB 0xc0 |
/* The bind types. */ |
#define BFD_MACH_O_BIND_TYPE_POINTER 1 |
#define BFD_MACH_O_BIND_TYPE_TEXT_ABSOLUTE32 2 |
#define BFD_MACH_O_BIND_TYPE_TEXT_PCREL32 3 |
/* The special dylib. */ |
#define BFD_MACH_O_BIND_SPECIAL_DYLIB_SELF 0 |
#define BFD_MACH_O_BIND_SPECIAL_DYLIB_MAIN_EXECUTABLE -1 |
#define BFD_MACH_O_BIND_SPECIAL_DYLIB_FLAT_LOOKUP -2 |
/* Constants for dyld info export. */ |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_KIND_MASK 0x03 |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_KIND_REGULAR 0x00 |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_KIND_THREAD_LOCAL 0x01 |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_WEAK_DEFINITION 0x04 |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_REEXPORT 0x08 |
#define BFD_MACH_O_EXPORT_SYMBOL_FLAGS_STUB_AND_RESOLVER 0x10 |
/* Constants for DATA_IN_CODE entries. */ |
typedef enum bfd_mach_o_data_in_code_entry_kind |
{ |
/contrib/toolchain/binutils/include/mach-o/reloc.h |
---|
1,6 → 1,5 |
/* Mach-O support for BFD. |
Copyright 2011, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/mach-o/unwind.h |
---|
0,0 → 1,199 |
/* Mach-O compact unwind encoding. |
Copyright (C) 2014-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
MA 02110-1301, USA. */ |
#ifndef _MACH_O_UNWIND_H |
#define _MACH_O_UNWIND_H |
/* Encodings bits for all cpus. */ |
#define MACH_O_UNWIND_IS_NOT_FUNCTION_START 0x80000000 |
#define MACH_O_UNWIND_HAS_LSDA 0x40000000 |
#define MACH_O_UNWIND_PERSONALITY_MASK 0x30000000 |
#define MACH_O_UNWIND_PERSONALITY_SHIFT 28 |
/* Encodings for x86-64. */ |
/* Kind of encoding (4 bits). */ |
#define MACH_O_UNWIND_X86_64_MODE_MASK 0x0f000000 |
/* Frame is RBP based, using the standard sequence: push %rbp; mov %rsp, %rbp. |
Non-volatile registers must be saved in the stack starting at %rbp-8 to |
%rbp-2040 (offset is encoded in offset bits * 8). Registers saved are |
encoded in registers bits, 3 bits per register. */ |
#define MACH_O_UNWIND_X86_64_MODE_RBP_FRAME 0x01000000 |
#define MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS 0x00007FFF |
#define MACH_O_UNWIND_X86_64_RBP_FRAME_OFFSET 0x00FF0000 |
/* Frameless function, with a small stack size. */ |
#define MACH_O_UNWIND_X86_64_MODE_STACK_IMMD 0x02000000 |
#define MACH_O_UNWIND_X86_64_FRAMELESS_STACK_SIZE 0x00FF0000 |
#define MACH_O_UNWIND_X86_64_FRAMELESS_REG_COUNT 0x00001C00 |
#define MACH_O_UNWIND_X86_64_FRAMELESS_REG_PERMUTATION 0x000003FF |
/* Frameless function, with a larger stack size. The stack size is the sum |
of the X in subq $X,%rsp (address of X is at function + stack size bits) |
and stack adjust. */ |
#define MACH_O_UNWIND_X86_64_MODE_STACK_IND 0x03000000 |
#define MACH_O_UNWIND_X86_64_FRAMELESS_STACK_ADJUST 0x0000E000 |
/* Use dwarf. */ |
#define MACH_O_UNWIND_X86_64_MODE_DWARF 0x04000000 |
#define MACH_O_UNWIND_X86_64_DWARF_SECTION_OFFSET 0x00ffffff |
/* Registers. */ |
#define MACH_O_UNWIND_X86_64_REG_NONE 0 |
#define MACH_O_UNWIND_X86_64_REG_RBX 1 |
#define MACH_O_UNWIND_X86_64_REG_R12 2 |
#define MACH_O_UNWIND_X86_64_REG_R13 3 |
#define MACH_O_UNWIND_X86_64_REG_R14 4 |
#define MACH_O_UNWIND_X86_64_REG_R15 5 |
#define MACH_O_UNWIND_X86_64_REG_RBP 6 |
/* Encodings for x86 (almot the same as x86-64). */ |
/* Kind of encoding (4 bits). */ |
#define MACH_O_UNWIND_X86_MODE_MASK 0x0f000000 |
/* Frame is EBP based, using the standard sequence: push %ebp; mov %esp, %ebp. |
Non-volatile registers must be saved in the stack starting at %ebp-4 to |
%ebp-240 (offset is encoded in offset bits * 4). Registers saved are |
encoded in registers bits, 3 bits per register. */ |
#define MACH_O_UNWIND_X86_MODE_EBP_FRAME 0x01000000 |
#define MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS 0x00007FFF |
#define MACH_O_UNWIND_X86_EBP_FRAME_OFFSET 0x00FF0000 |
/* Frameless function, with a small stack size. */ |
#define MACH_O_UNWIND_X86_MODE_STACK_IMMD 0x02000000 |
#define MACH_O_UNWIND_X86_FRAMELESS_STACK_SIZE 0x00FF0000 |
#define MACH_O_UNWIND_X86_FRAMELESS_REG_COUNT 0x00001C00 |
#define MACH_O_UNWIND_X86_FRAMELESS_REG_PERMUTATION 0x000003FF |
/* Frameless function, with a larger stack size. The stack size is the sum |
of the X in subq $X,%esp (address of X is at function + stack size bits) |
and stack adjust. */ |
#define MACH_O_UNWIND_X86_MODE_STACK_IND 0x03000000 |
#define MACH_O_UNWIND_X86_FRAMELESS_STACK_ADJUST 0x0000E000 |
/* Use dwarf. */ |
#define MACH_O_UNWIND_X86_MODE_DWARF 0x04000000 |
#define MACH_O_UNWIND_X86_DWARF_SECTION_OFFSET 0x00ffffff |
/* Registers. */ |
#define MACH_O_UNWIND_X86_REG_NONE 0 |
#define MACH_O_UNWIND_X86_REG_EBX 1 |
#define MACH_O_UNWIND_X86_REG_ECX 2 |
#define MACH_O_UNWIND_X86_REG_EDX 3 |
#define MACH_O_UNWIND_X86_REG_EDI 4 |
#define MACH_O_UNWIND_X86_REG_ESI 5 |
#define MACH_O_UNWIND_X86_REG_EBP 6 |
/* Entry in object file (in __LD,__compact_unwind section). */ |
struct mach_o_compact_unwind_32 |
{ |
unsigned char start[4]; |
unsigned char length[4]; |
unsigned char encoding[4]; |
unsigned char personality[4]; |
unsigned char lsda[4]; |
}; |
struct mach_o_compact_unwind_64 |
{ |
unsigned char start[8]; |
unsigned char length[4]; |
unsigned char encoding[4]; |
unsigned char personality[8]; |
unsigned char lsda[8]; |
}; |
/* Header in images (in __TEXT,__unwind_info). */ |
#define MACH_O_UNWIND_SECTION_VERSION 1 /* Current verion in header. */ |
struct mach_o_unwind_info_header |
{ |
unsigned char version[4]; /* Currently MACH_O_UNWIND_SECTION_VERSION. */ |
unsigned char encodings_array_offset[4]; |
unsigned char encodings_array_count[4]; |
unsigned char personality_array_offset[4]; |
unsigned char personality_array_count[4]; |
unsigned char index_offset[4]; |
unsigned char index_count[4]; |
/* Followed by: |
- encodings array |
These are the encodings shared, for index < encoding_array_count |
- personality array |
count given by personality_array_count |
- index entries |
count given by index_count |
- lsda index entries |
last offset given by lsda offset of last index_entry. |
*/ |
}; |
struct mach_o_unwind_index_entry |
{ |
unsigned char function_offset[4]; |
unsigned char second_level_offset[4]; |
unsigned char lsda_index_offset[4]; |
}; |
struct mach_o_unwind_lsda_index_entry |
{ |
unsigned char function_offset[4]; |
unsigned char lsda_offset[4]; |
}; |
/* Second level index pages. */ |
#define MACH_O_UNWIND_SECOND_LEVEL_REGULAR 2 |
struct mach_o_unwind_regular_second_level_page_header |
{ |
unsigned char kind[4]; |
unsigned char entry_page_offset[2]; |
unsigned char entry_count[2]; |
/* Array of entries. */ |
}; |
struct mach_o_unwind_regular_second_level_entry |
{ |
unsigned char function_offset[4]; |
unsigned char encoding[4]; |
}; |
#define MACH_O_UNWIND_SECOND_LEVEL_COMPRESSED 3 |
struct mach_o_unwind_compressed_second_level_page_header |
{ |
unsigned char kind[4]; |
unsigned char entry_page_offset[2]; |
unsigned char entry_count[2]; |
unsigned char encodings_offset[2]; |
unsigned char encodings_count[2]; |
/* Followed by entries array (one word, see below). */ |
/* Followed by (non-common) encodings array. */ |
}; |
/* Compressed entries are one word, containing function offset and encoding |
index. */ |
#define MACH_O_UNWIND_INFO_COMPRESSED_ENTRY_FUNC_OFFSET(en) \ |
((en) & 0x00FFFFFF) |
#define MACH_O_UNWIND_INFO_COMPRESSED_ENTRY_ENCODING_INDEX(en) \ |
(((en) >> 24) & 0xFF) |
#endif /* _MACH_O_UNWIND_H */ |
/contrib/toolchain/binutils/include/mach-o/x86-64.h |
---|
1,6 → 1,5 |
/* Mach-O support for BFD. |
Copyright 2011 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/md5.h |
---|
1,6 → 1,6 |
/* md5.h - Declaration of functions and data types used for MD5 sum |
computing library functions. |
Copyright 1995, 1996, 2000 Free Software Foundation, Inc. |
Copyright (C) 1995-2015 Free Software Foundation, Inc. |
NOTE: The canonical source of this file is maintained with the GNU C |
Library. Bugs can be reported to bug-glibc@prep.ai.mit.edu. |
/contrib/toolchain/binutils/include/nlm/ChangeLog |
---|
1,3 → 1,11 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2010-04-15 Nick Clifton <nickc@redhat.com> |
* alpha-ext.h: Update copyright notice to use GPLv3. |
105,7 → 113,7 |
support. |
Copyright (C) 1993-2012 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/nlm/alpha-ext.h |
---|
1,5 → 1,5 |
/* Alpha NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
By Ian Lance Taylor, Cygnus Support |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/nlm/common.h |
---|
1,5 → 1,5 |
/* NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 2001, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support |
/contrib/toolchain/binutils/include/nlm/external.h |
---|
1,5 → 1,5 |
/* NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 1994, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support |
/contrib/toolchain/binutils/include/nlm/i386-ext.h |
---|
1,5 → 1,5 |
/* i386 NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/nlm/internal.h |
---|
1,5 → 1,5 |
/* NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 1994, 2003, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Written by Fred Fish @ Cygnus Support. |
/contrib/toolchain/binutils/include/nlm/ppc-ext.h |
---|
1,5 → 1,5 |
/* PowerPC NLM (NetWare Loadable Module) support for BFD. |
Copyright (C) 1994, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1994-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/nlm/sparc32-ext.h |
---|
1,5 → 1,5 |
/* SPARC NLM (NetWare Loadable Module) support for BFD. |
Copyright 1993, 2005, 2010 Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/oasys.h |
---|
1,6 → 1,6 |
/* Oasys object format header file for BFD. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/objalloc.h |
---|
1,5 → 1,5 |
/* objalloc.h -- routines to allocate memory for objects |
Copyright 1997-2012 Free Software Foundation, Inc. |
Copyright (C) 1997-2015 Free Software Foundation, Inc. |
Written by Ian Lance Taylor, Cygnus Solutions. |
This program is free software; you can redistribute it and/or modify it |
/contrib/toolchain/binutils/include/obstack.h |
---|
1,26 → 1,20 |
/* obstack.h - object stack macros |
Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1996, 1997, 1998, |
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2008 |
Free Software Foundation, Inc. |
Copyright (C) 1988-2015 Free Software Foundation, Inc. |
This file is part of the GNU C Library. |
The GNU C Library is free software; you can redistribute it and/or |
modify it under the terms of the GNU Lesser General Public |
License as published by the Free Software Foundation; either |
version 2.1 of the License, or (at your option) any later version. |
NOTE: The canonical source of this file is maintained with the GNU C Library. |
Bugs can be reported to bug-glibc@gnu.org. |
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the |
Free Software Foundation; either version 2, or (at your option) any |
later version. |
This program is distributed in the hope that it will be useful, |
The GNU C Library is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
Lesser General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, |
USA. */ |
You should have received a copy of the GNU Lesser General Public |
License along with the GNU C Library; if not, see |
<http://www.gnu.org/licenses/>. */ |
/* Summary: |
38,11 → 32,11 |
stack is of mature, fixed size and fixed address objects. |
These routines grab large chunks of memory, using a function you |
supply, called `obstack_chunk_alloc'. On occasion, they free chunks, |
by calling `obstack_chunk_free'. You must define them and declare |
supply, called 'obstack_chunk_alloc'. On occasion, they free chunks, |
by calling 'obstack_chunk_free'. You must define them and declare |
them before using any obstack macros. |
Each independent stack is represented by a `struct obstack'. |
Each independent stack is represented by a 'struct obstack'. |
Each of the obstack macros expects a pointer to such a structure |
as the first argument. |
99,7 → 93,7 |
Exactly one object is growing in an obstack at any one time. |
You can run one obstack per control block. |
You may have as many control blocks as you dare. |
Because of the way we do it, you can `unwind' an obstack |
Because of the way we do it, you can "unwind" an obstack |
back to a previous state. (You may remove objects much |
as you would with a stack.) |
*/ |
110,49 → 104,54 |
#ifndef _OBSTACK_H |
#define _OBSTACK_H 1 |
#ifdef __cplusplus |
extern "C" { |
#ifndef _OBSTACK_INTERFACE_VERSION |
# define _OBSTACK_INTERFACE_VERSION 2 |
#endif |
/* We use subtraction of (char *) 0 instead of casting to int |
because on word-addressable machines a simple cast to int |
may ignore the byte-within-word field of the pointer. */ |
#include <stddef.h> /* For size_t and ptrdiff_t. */ |
#include <string.h> /* For __GNU_LIBRARY__, and memcpy. */ |
#ifndef __PTR_TO_INT |
# define __PTR_TO_INT(P) ((P) - (char *) 0) |
#if _OBSTACK_INTERFACE_VERSION == 1 |
/* For binary compatibility with obstack version 1, which used "int" |
and "long" for these two types. */ |
# define _OBSTACK_SIZE_T unsigned int |
# define _CHUNK_SIZE_T unsigned long |
# define _OBSTACK_CAST(type, expr) ((type) (expr)) |
#else |
/* Version 2 with sane types, especially for 64-bit hosts. */ |
# define _OBSTACK_SIZE_T size_t |
# define _CHUNK_SIZE_T size_t |
# define _OBSTACK_CAST(type, expr) (expr) |
#endif |
#ifndef __INT_TO_PTR |
# define __INT_TO_PTR(P) ((P) + (char *) 0) |
#endif |
/* If B is the base of an object addressed by P, return the result of |
aligning P to the next multiple of A + 1. B and P must be of type |
char *. A + 1 must be a power of 2. */ |
/* We need the type of the resulting object. If __PTRDIFF_TYPE__ is |
defined, as with GNU C, use that; that way we don't pollute the |
namespace with <stddef.h>'s symbols. Otherwise, if <stddef.h> is |
available, include it and use ptrdiff_t. In traditional C, long is |
the best that we can do. */ |
#define __BPTR_ALIGN(B, P, A) ((B) + (((P) - (B) + (A)) & ~(A))) |
#ifdef __PTRDIFF_TYPE__ |
# define PTR_INT_TYPE __PTRDIFF_TYPE__ |
/* Similar to __BPTR_ALIGN (B, P, A), except optimize the common case |
where pointers can be converted to integers, aligned as integers, |
and converted back again. If ptrdiff_t is narrower than a |
pointer (e.g., the AS/400), play it safe and compute the alignment |
relative to B. Otherwise, use the faster strategy of computing the |
alignment relative to 0. */ |
#define __PTR_ALIGN(B, P, A) \ |
__BPTR_ALIGN (sizeof (ptrdiff_t) < sizeof (void *) ? (B) : (char *) 0, \ |
P, A) |
#ifndef __attribute_pure__ |
# if defined __GNUC_MINOR__ && __GNUC__ * 1000 + __GNUC_MINOR__ >= 2096 |
# define __attribute_pure__ __attribute__ ((__pure__)) |
#else |
# ifdef HAVE_STDDEF_H |
# include <stddef.h> |
# define PTR_INT_TYPE ptrdiff_t |
# else |
# define PTR_INT_TYPE long |
# define __attribute_pure__ |
# endif |
#endif |
#if defined _LIBC || defined HAVE_STRING_H |
# include <string.h> |
# define _obstack_memcpy(To, From, N) memcpy ((To), (From), (N)) |
#else |
# ifdef memcpy |
# define _obstack_memcpy(To, From, N) memcpy ((To), (char *)(From), (N)) |
# else |
# define _obstack_memcpy(To, From, N) bcopy ((char *)(From), (To), (N)) |
#ifdef __cplusplus |
extern "C" { |
# endif |
#endif |
struct _obstack_chunk /* Lives at front of each chunk. */ |
{ |
163,18 → 162,30 |
struct obstack /* control current object in current chunk */ |
{ |
long chunk_size; /* preferred size to allocate chunks in */ |
_CHUNK_SIZE_T chunk_size; /* preferred size to allocate chunks in */ |
struct _obstack_chunk *chunk; /* address of current struct obstack_chunk */ |
char *object_base; /* address of object we are building */ |
char *next_free; /* where to add next char to current object */ |
char *chunk_limit; /* address of char after current chunk */ |
PTR_INT_TYPE temp; /* Temporary for some macros. */ |
int alignment_mask; /* Mask of alignment for each object. */ |
/* These prototypes vary based on `use_extra_arg', and we use |
casts to the prototypeless function type in all assignments, |
but having prototypes here quiets -Wstrict-prototypes. */ |
struct _obstack_chunk *(*chunkfun) (void *, long); |
void (*freefun) (void *, struct _obstack_chunk *); |
union |
{ |
_OBSTACK_SIZE_T i; |
void *p; |
} temp; /* Temporary for some macros. */ |
_OBSTACK_SIZE_T alignment_mask; /* Mask of alignment for each object. */ |
/* These prototypes vary based on 'use_extra_arg'. */ |
union |
{ |
void *(*plain) (size_t); |
void *(*extra) (void *, size_t); |
} chunkfun; |
union |
{ |
void (*plain) (void *); |
void (*extra) (void *, void *); |
} freefun; |
void *extra_arg; /* first arg for chunk alloc/dealloc funcs */ |
unsigned use_extra_arg:1; /* chunk alloc/dealloc funcs take extra arg */ |
unsigned maybe_empty_object:1;/* There is a possibility that the current |
188,59 → 199,26 |
/* Declare the external functions we use; they are in obstack.c. */ |
extern void _obstack_newchunk (struct obstack *, int); |
extern void _obstack_newchunk (struct obstack *, _OBSTACK_SIZE_T); |
extern void _obstack_free (struct obstack *, void *); |
extern int _obstack_begin (struct obstack *, int, int, |
void *(*) (long), void (*) (void *)); |
extern int _obstack_begin_1 (struct obstack *, int, int, |
void *(*) (void *, long), |
extern int _obstack_begin (struct obstack *, |
_OBSTACK_SIZE_T, _OBSTACK_SIZE_T, |
void *(*) (size_t), void (*) (void *)); |
extern int _obstack_begin_1 (struct obstack *, |
_OBSTACK_SIZE_T, _OBSTACK_SIZE_T, |
void *(*) (void *, size_t), |
void (*) (void *, void *), void *); |
extern int _obstack_memory_used (struct obstack *); |
extern _OBSTACK_SIZE_T _obstack_memory_used (struct obstack *) |
__attribute_pure__; |
/* Do the function-declarations after the structs |
but before defining the macros. */ |
void obstack_init (struct obstack *obstack); |
void * obstack_alloc (struct obstack *obstack, int size); |
void * obstack_copy (struct obstack *obstack, void *address, int size); |
void * obstack_copy0 (struct obstack *obstack, void *address, int size); |
void obstack_free (struct obstack *obstack, void *block); |
void obstack_blank (struct obstack *obstack, int size); |
void obstack_grow (struct obstack *obstack, void *data, int size); |
void obstack_grow0 (struct obstack *obstack, void *data, int size); |
void obstack_1grow (struct obstack *obstack, int data_char); |
void obstack_ptr_grow (struct obstack *obstack, void *data); |
void obstack_int_grow (struct obstack *obstack, int data); |
void * obstack_finish (struct obstack *obstack); |
int obstack_object_size (struct obstack *obstack); |
int obstack_room (struct obstack *obstack); |
void obstack_make_room (struct obstack *obstack, int size); |
void obstack_1grow_fast (struct obstack *obstack, int data_char); |
void obstack_ptr_grow_fast (struct obstack *obstack, void *data); |
void obstack_int_grow_fast (struct obstack *obstack, int data); |
void obstack_blank_fast (struct obstack *obstack, int size); |
void * obstack_base (struct obstack *obstack); |
void * obstack_next_free (struct obstack *obstack); |
int obstack_alignment_mask (struct obstack *obstack); |
int obstack_chunk_size (struct obstack *obstack); |
int obstack_memory_used (struct obstack *obstack); |
/* Error handler called when `obstack_chunk_alloc' failed to allocate |
more memory. This can be set to a user defined function. The |
default action is to print a message and abort. */ |
/* Error handler called when 'obstack_chunk_alloc' failed to allocate |
more memory. This can be set to a user defined function which |
should either abort gracefully or use longjump - but shouldn't |
return. The default action is to print a message and abort. */ |
extern void (*obstack_alloc_failed_handler) (void); |
/* Exit value used when `print_and_abort' is used. */ |
/* Exit value used when 'print_and_abort' is used. */ |
extern int obstack_exit_failure; |
/* Pointer to beginning of object being allocated or to be allocated next. |
247,7 → 225,7 |
Note that this might not be the final address of the object |
because a new chunk might be needed to hold the final size. */ |
#define obstack_base(h) ((h)->object_base) |
#define obstack_base(h) ((void *) (h)->object_base) |
/* Size for allocating ordinary chunks. */ |
255,48 → 233,47 |
/* Pointer to next byte not yet allocated in current chunk. */ |
#define obstack_next_free(h) ((h)->next_free) |
#define obstack_next_free(h) ((void *) (h)->next_free) |
/* Mask specifying low bits that should be clear in address of an object. */ |
#define obstack_alignment_mask(h) ((h)->alignment_mask) |
/* To prevent prototype warnings provide complete argument list in |
standard C version. */ |
/* To prevent prototype warnings provide complete argument list. */ |
# define obstack_init(h) \ |
_obstack_begin ((h), 0, 0, \ |
(void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free) |
_OBSTACK_CAST (void *(*) (size_t), obstack_chunk_alloc), \ |
_OBSTACK_CAST (void (*) (void *), obstack_chunk_free)) |
# define obstack_begin(h, size) \ |
_obstack_begin ((h), (size), 0, \ |
(void *(*) (long)) obstack_chunk_alloc, (void (*) (void *)) obstack_chunk_free) |
_OBSTACK_CAST (void *(*) (size_t), obstack_chunk_alloc), \ |
_OBSTACK_CAST (void (*) (void *), obstack_chunk_free)) |
# define obstack_specify_allocation(h, size, alignment, chunkfun, freefun) \ |
_obstack_begin ((h), (size), (alignment), \ |
(void *(*) (long)) (chunkfun), (void (*) (void *)) (freefun)) |
_OBSTACK_CAST (void *(*) (size_t), chunkfun), \ |
_OBSTACK_CAST (void (*) (void *), freefun)) |
# define obstack_specify_allocation_with_arg(h, size, alignment, chunkfun, freefun, arg) \ |
_obstack_begin_1 ((h), (size), (alignment), \ |
(void *(*) (void *, long)) (chunkfun), \ |
(void (*) (void *, void *)) (freefun), (arg)) |
_OBSTACK_CAST (void *(*) (void *, size_t), chunkfun), \ |
_OBSTACK_CAST (void (*) (void *, void *), freefun), arg) |
# define obstack_chunkfun(h, newchunkfun) \ |
((h) -> chunkfun = (struct _obstack_chunk *(*)(void *, long)) (newchunkfun)) |
((void) ((h)->chunkfun.extra = (void *(*) (void *, size_t)) (newchunkfun))) |
# define obstack_freefun(h, newfreefun) \ |
((h) -> freefun = (void (*)(void *, struct _obstack_chunk *)) (newfreefun)) |
((void) ((h)->freefun.extra = (void *(*) (void *, void *)) (newfreefun))) |
#define obstack_1grow_fast(h,achar) (*((h)->next_free)++ = (achar)) |
#define obstack_1grow_fast(h, achar) ((void) (*((h)->next_free)++ = (achar))) |
#define obstack_blank_fast(h,n) ((h)->next_free += (n)) |
#define obstack_blank_fast(h, n) ((void) ((h)->next_free += (n))) |
#define obstack_memory_used(h) _obstack_memory_used (h) |
#if defined __GNUC__ && defined __STDC__ && __STDC__ |
/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and |
does not implement __extension__. But that compiler doesn't define |
__GNUC_MINOR__. */ |
# if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__) |
#if defined __GNUC__ |
# if !defined __GNUC_MINOR__ || __GNUC__ * 1000 + __GNUC_MINOR__ < 2008 |
# define __extension__ |
# endif |
303,38 → 280,43 |
/* For GNU C, if not -traditional, |
we can define these macros to compute all args only once |
without using a global variable. |
Also, we can avoid using the `temp' slot, to make faster code. */ |
Also, we can avoid using the 'temp' slot, to make faster code. */ |
# define obstack_object_size(OBSTACK) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
(unsigned) (__o->next_free - __o->object_base); }) |
({ struct obstack const *__o = (OBSTACK); \ |
(_OBSTACK_SIZE_T) (__o->next_free - __o->object_base); }) |
/* The local variable is named __o1 to avoid a shadowed variable |
warning when invoked from other obstack macros. */ |
# define obstack_room(OBSTACK) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
(unsigned) (__o->chunk_limit - __o->next_free); }) |
({ struct obstack const *__o1 = (OBSTACK); \ |
(_OBSTACK_SIZE_T) (__o1->chunk_limit - __o1->next_free); }) |
# define obstack_make_room(OBSTACK,length) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
int __len = (length); \ |
if (__o->chunk_limit - __o->next_free < __len) \ |
_OBSTACK_SIZE_T __len = (length); \ |
if (obstack_room (__o) < __len) \ |
_obstack_newchunk (__o, __len); \ |
(void) 0; }) |
# define obstack_empty_p(OBSTACK) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
(__o->chunk->prev == 0 && __o->next_free - __o->chunk->contents == 0); }) |
({ struct obstack const *__o = (OBSTACK); \ |
(__o->chunk->prev == 0 \ |
&& __o->next_free == __PTR_ALIGN ((char *) __o->chunk, \ |
__o->chunk->contents, \ |
__o->alignment_mask)); }) |
# define obstack_grow(OBSTACK,where,length) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
int __len = (length); \ |
if (__o->next_free + __len > __o->chunk_limit) \ |
_OBSTACK_SIZE_T __len = (length); \ |
if (obstack_room (__o) < __len) \ |
_obstack_newchunk (__o, __len); \ |
_obstack_memcpy (__o->next_free, (where), __len); \ |
memcpy (__o->next_free, where, __len); \ |
__o->next_free += __len; \ |
(void) 0; }) |
341,10 → 323,10 |
# define obstack_grow0(OBSTACK,where,length) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
int __len = (length); \ |
if (__o->next_free + __len + 1 > __o->chunk_limit) \ |
_OBSTACK_SIZE_T __len = (length); \ |
if (obstack_room (__o) < __len + 1) \ |
_obstack_newchunk (__o, __len + 1); \ |
_obstack_memcpy (__o->next_free, (where), __len); \ |
memcpy (__o->next_free, where, __len); \ |
__o->next_free += __len; \ |
*(__o->next_free)++ = 0; \ |
(void) 0; }) |
352,19 → 334,18 |
# define obstack_1grow(OBSTACK,datum) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
if (__o->next_free + 1 > __o->chunk_limit) \ |
if (obstack_room (__o) < 1) \ |
_obstack_newchunk (__o, 1); \ |
obstack_1grow_fast (__o, datum); \ |
(void) 0; }) |
obstack_1grow_fast (__o, datum); }) |
/* These assume that the obstack alignment is good enough for pointers or ints, |
and that the data added so far to the current object |
/* These assume that the obstack alignment is good enough for pointers |
or ints, and that the data added so far to the current object |
shares that much alignment. */ |
# define obstack_ptr_grow(OBSTACK,datum) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
if (__o->next_free + sizeof (void *) > __o->chunk_limit) \ |
if (obstack_room (__o) < sizeof (void *)) \ |
_obstack_newchunk (__o, sizeof (void *)); \ |
obstack_ptr_grow_fast (__o, datum); }) |
371,7 → 352,7 |
# define obstack_int_grow(OBSTACK,datum) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
if (__o->next_free + sizeof (int) > __o->chunk_limit) \ |
if (obstack_room (__o) < sizeof (int)) \ |
_obstack_newchunk (__o, sizeof (int)); \ |
obstack_int_grow_fast (__o, datum); }) |
378,7 → 359,8 |
# define obstack_ptr_grow_fast(OBSTACK,aptr) \ |
__extension__ \ |
({ struct obstack *__o1 = (OBSTACK); \ |
*(const void **) __o1->next_free = (aptr); \ |
void *__p1 = __o1->next_free; \ |
*(const void **) __p1 = (aptr); \ |
__o1->next_free += sizeof (const void *); \ |
(void) 0; }) |
385,7 → 367,8 |
# define obstack_int_grow_fast(OBSTACK,aint) \ |
__extension__ \ |
({ struct obstack *__o1 = (OBSTACK); \ |
*(int *) __o1->next_free = (aint); \ |
void *__p1 = __o1->next_free; \ |
*(int *) __p1 = (aint); \ |
__o1->next_free += sizeof (int); \ |
(void) 0; }) |
392,11 → 375,10 |
# define obstack_blank(OBSTACK,length) \ |
__extension__ \ |
({ struct obstack *__o = (OBSTACK); \ |
int __len = (length); \ |
if (__o->chunk_limit - __o->next_free < __len) \ |
_OBSTACK_SIZE_T __len = (length); \ |
if (obstack_room (__o) < __len) \ |
_obstack_newchunk (__o, __len); \ |
obstack_blank_fast (__o, __len); \ |
(void) 0; }) |
obstack_blank_fast (__o, __len); }) |
# define obstack_alloc(OBSTACK,length) \ |
__extension__ \ |
416,23 → 398,22 |
obstack_grow0 (__h, (where), (length)); \ |
obstack_finish (__h); }) |
/* The local variable is named __o1 to avoid a name conflict |
when obstack_blank is called. */ |
/* The local variable is named __o1 to avoid a shadowed variable |
warning when invoked from other obstack macros, typically obstack_free. */ |
# define obstack_finish(OBSTACK) \ |
__extension__ \ |
({ struct obstack *__o1 = (OBSTACK); \ |
void *value; \ |
value = (void *) __o1->object_base; \ |
if (__o1->next_free == value) \ |
void *__value = (void *) __o1->object_base; \ |
if (__o1->next_free == __value) \ |
__o1->maybe_empty_object = 1; \ |
__o1->next_free \ |
= __INT_TO_PTR ((__PTR_TO_INT (__o1->next_free)+__o1->alignment_mask)\ |
& ~ (__o1->alignment_mask)); \ |
if (__o1->next_free - (char *)__o1->chunk \ |
> __o1->chunk_limit - (char *)__o1->chunk) \ |
= __PTR_ALIGN (__o1->object_base, __o1->next_free, \ |
__o1->alignment_mask); \ |
if ((size_t) (__o1->next_free - (char *) __o1->chunk) \ |
> (size_t) (__o1->chunk_limit - (char *) __o1->chunk)) \ |
__o1->next_free = __o1->chunk_limit; \ |
__o1->object_base = __o1->next_free; \ |
value; }) |
__value; }) |
# define obstack_free(OBSTACK, OBJ) \ |
__extension__ \ |
440,18 → 421,22 |
void *__obj = (void *) (OBJ); \ |
if (__obj > (void *)__o->chunk && __obj < (void *)__o->chunk_limit) \ |
__o->next_free = __o->object_base = (char *) __obj; \ |
else (obstack_free) (__o, __obj); }) |
else \ |
_obstack_free (__o, __obj); }) |
#else /* not __GNUC__ or not __STDC__ */ |
#else /* not __GNUC__ */ |
# define obstack_object_size(h) \ |
(unsigned) ((h)->next_free - (h)->object_base) |
((_OBSTACK_SIZE_T) ((h)->next_free - (h)->object_base)) |
# define obstack_room(h) \ |
(unsigned) ((h)->chunk_limit - (h)->next_free) |
((_OBSTACK_SIZE_T) ((h)->chunk_limit - (h)->next_free)) |
# define obstack_empty_p(h) \ |
((h)->chunk->prev == 0 && (h)->next_free - (h)->chunk->contents == 0) |
((h)->chunk->prev == 0 \ |
&& (h)->next_free == __PTR_ALIGN ((char *) (h)->chunk, \ |
(h)->chunk->contents, \ |
(h)->alignment_mask)) |
/* Note that the call to _obstack_newchunk is enclosed in (..., 0) |
so that we can avoid having void expressions |
460,51 → 445,56 |
but some compilers won't accept it. */ |
# define obstack_make_room(h,length) \ |
( (h)->temp = (length), \ |
(((h)->next_free + (h)->temp > (h)->chunk_limit) \ |
? (_obstack_newchunk ((h), (h)->temp), 0) : 0)) |
((h)->temp.i = (length), \ |
((obstack_room (h) < (h)->temp.i) \ |
? (_obstack_newchunk (h, (h)->temp.i), 0) : 0), \ |
(void) 0) |
# define obstack_grow(h,where,length) \ |
( (h)->temp = (length), \ |
(((h)->next_free + (h)->temp > (h)->chunk_limit) \ |
? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \ |
_obstack_memcpy ((h)->next_free, (where), (h)->temp), \ |
(h)->next_free += (h)->temp) |
((h)->temp.i = (length), \ |
((obstack_room (h) < (h)->temp.i) \ |
? (_obstack_newchunk ((h), (h)->temp.i), 0) : 0), \ |
memcpy ((h)->next_free, where, (h)->temp.i), \ |
(h)->next_free += (h)->temp.i, \ |
(void) 0) |
# define obstack_grow0(h,where,length) \ |
( (h)->temp = (length), \ |
(((h)->next_free + (h)->temp + 1 > (h)->chunk_limit) \ |
? (_obstack_newchunk ((h), (h)->temp + 1), 0) : 0), \ |
_obstack_memcpy ((h)->next_free, (where), (h)->temp), \ |
(h)->next_free += (h)->temp, \ |
*((h)->next_free)++ = 0) |
((h)->temp.i = (length), \ |
((obstack_room (h) < (h)->temp.i + 1) \ |
? (_obstack_newchunk ((h), (h)->temp.i + 1), 0) : 0), \ |
memcpy ((h)->next_free, where, (h)->temp.i), \ |
(h)->next_free += (h)->temp.i, \ |
*((h)->next_free)++ = 0, \ |
(void) 0) |
# define obstack_1grow(h,datum) \ |
( (((h)->next_free + 1 > (h)->chunk_limit) \ |
(((obstack_room (h) < 1) \ |
? (_obstack_newchunk ((h), 1), 0) : 0), \ |
obstack_1grow_fast (h, datum)) |
# define obstack_ptr_grow(h,datum) \ |
( (((h)->next_free + sizeof (char *) > (h)->chunk_limit) \ |
(((obstack_room (h) < sizeof (char *)) \ |
? (_obstack_newchunk ((h), sizeof (char *)), 0) : 0), \ |
obstack_ptr_grow_fast (h, datum)) |
# define obstack_int_grow(h,datum) \ |
( (((h)->next_free + sizeof (int) > (h)->chunk_limit) \ |
(((obstack_room (h) < sizeof (int)) \ |
? (_obstack_newchunk ((h), sizeof (int)), 0) : 0), \ |
obstack_int_grow_fast (h, datum)) |
# define obstack_ptr_grow_fast(h,aptr) \ |
(((const void **) ((h)->next_free += sizeof (void *)))[-1] = (aptr)) |
(((const void **) ((h)->next_free += sizeof (void *)))[-1] = (aptr), \ |
(void) 0) |
# define obstack_int_grow_fast(h,aint) \ |
(((int *) ((h)->next_free += sizeof (int)))[-1] = (aptr)) |
(((int *) ((h)->next_free += sizeof (int)))[-1] = (aint), \ |
(void) 0) |
# define obstack_blank(h,length) \ |
( (h)->temp = (length), \ |
(((h)->chunk_limit - (h)->next_free < (h)->temp) \ |
? (_obstack_newchunk ((h), (h)->temp), 0) : 0), \ |
obstack_blank_fast (h, (h)->temp)) |
((h)->temp.i = (length), \ |
((obstack_room (h) < (h)->temp.i) \ |
? (_obstack_newchunk ((h), (h)->temp.i), 0) : 0), \ |
obstack_blank_fast (h, (h)->temp.i)) |
# define obstack_alloc(h,length) \ |
(obstack_blank ((h), (length)), obstack_finish ((h))) |
519,27 → 509,27 |
( ((h)->next_free == (h)->object_base \ |
? (((h)->maybe_empty_object = 1), 0) \ |
: 0), \ |
(h)->temp = __PTR_TO_INT ((h)->object_base), \ |
(h)->temp.p = (h)->object_base, \ |
(h)->next_free \ |
= __INT_TO_PTR ((__PTR_TO_INT ((h)->next_free)+(h)->alignment_mask) \ |
& ~ ((h)->alignment_mask)), \ |
(((h)->next_free - (char *) (h)->chunk \ |
> (h)->chunk_limit - (char *) (h)->chunk) \ |
= __PTR_ALIGN ((h)->object_base, (h)->next_free, \ |
(h)->alignment_mask), \ |
(((size_t) ((h)->next_free - (char *) (h)->chunk) \ |
> (size_t) ((h)->chunk_limit - (char *) (h)->chunk)) \ |
? ((h)->next_free = (h)->chunk_limit) : 0), \ |
(h)->object_base = (h)->next_free, \ |
(void *) __INT_TO_PTR ((h)->temp)) |
(h)->temp.p) |
# define obstack_free(h,obj) \ |
( (h)->temp = (char *) (obj) - (char *) (h)->chunk, \ |
(((h)->temp > 0 && (h)->temp < (h)->chunk_limit - (char *) (h)->chunk)\ |
? (((h)->next_free = (h)->object_base \ |
= (h)->temp + (char *) (h)->chunk), 0) \ |
: ((obstack_free) ((h), (h)->temp + (char *) (h)->chunk), 0))) |
((h)->temp.p = (void *) (obj), \ |
(((h)->temp.p > (void *) (h)->chunk \ |
&& (h)->temp.p < (void *) (h)->chunk_limit) \ |
? (void) ((h)->next_free = (h)->object_base = (char *) (h)->temp.p) \ |
: _obstack_free ((h), (h)->temp.p))) |
#endif /* not __GNUC__ or not __STDC__ */ |
#endif /* not __GNUC__ */ |
#ifdef __cplusplus |
} /* C++ */ |
#endif |
#endif /* obstack.h */ |
#endif /* _OBSTACK_H */ |
/contrib/toolchain/binutils/include/opcode/ChangeLog |
---|
1,3 → 1,452 |
2015-12-15 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (enum aarch64_opnd_qualifier): Add |
AARCH64_OPND_QLF_V_2H. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (aarch64_opnd): Add AARCH64_OPND_BARRIER_PSB. |
* aarch64-asm-2.c: Regenerate. |
* aarch64-dis-2.c: Regenerate. |
* aarch64-opc-2.c: Regenerate. |
* aarch64-opc.c (aarch64_hint_options): Add "csync". |
(aarch64_print_operands): Handle AARCH64_OPND_BARRIER_PSB. |
* aarch64-tbl.h (aarch64_feature_stat_profile): New. |
(STAT_PROFILE): New. |
(aarch64_opcode_table): Add "psb". |
(AARCH64_OPERANDS): Add "BARRIER_PSB". |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (aarch64_hint_options): Declare. |
(aarch64_opnd_info): Add field hint_option. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_PROFILE): New. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (aarch64_sys_ins_reg_supported_p): Declare. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (aarch64_sys_ins_reg): Replace has_xt with flags. |
(aarch64_sys_ins_reg_has_xt): Declare. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_RAS): New. |
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_F16): Fix clash with |
AARCH64_FEATURE_V8_1. |
(AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC. |
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and |
AARCH64_FEATURE_V8_1. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_F16): New. |
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2 |
features. |
2015-12-14 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (aarch64_op): Add OP_BFC. |
2015-12-09 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_V8_2): New. |
(AARCH64_ARCH_V8_2): New. |
2015-12-08 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_V8_1): New. |
(AARCH64_ARCH_v8_1): Add AARCH64_FEATURE_V8_1. |
2015-11-11 Alan Modra <amodra@gmail.com> |
Peter Bergner <bergner@vnet.ibm.com> |
* ppc.h (PPC_OPCODE_POWER9): New define. |
(PPC_OPCODE_VSX3): Likewise. |
2015-11-02 Nick Clifton <nickc@redhat.com> |
* rx.h (enum RX_Opcode_ID): Add more NOP opcodes. |
2015-11-02 Nick Clifton <nickc@redhat.com> |
* rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect. |
2015-10-28 Yao Qi <yao.qi@linaro.org> |
* aarch64.h (aarch64_decode_insn): Update declaration. |
2015-10-07 Yao Qi <yao.qi@linaro.org> |
* aarch64.h (aarch64_sys_ins_reg) <template>: Removed. |
<name>: New field. |
2015-10-07 Yao Qi <yao.qi@linaro.org> |
* aarch64.h [__cplusplus]: Wrap in extern "C". |
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> |
Cupertino Miranda <cmiranda@synopsys.com> |
* arc-func.h: New file. |
* arc.h: Likewise. |
2015-10-02 Yao Qi <yao.qi@linaro.org> |
* aarch64.h (aarch64_zero_register_p): Move the declaration |
to column one. |
2015-10-02 Yao Qi <yao.qi@linaro.org> |
* aarch64.h (aarch64_decode_insn): Declare it. |
2015-09-29 Dominik Vogt <vogt@linux.vnet.ibm.com> |
* s390.h (S390_INSTR_FLAG_HTM): New flag. |
(S390_INSTR_FLAG_VX): New flag. |
(S390_INSTR_FLAG_FACILITY_MASK): New flag mask. |
2015-09-23 Nick Clifton <nickc@redhat.com> |
* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left |
shifting. |
2015-09-22 Nick Clifton <nickc@redhat.com> |
* rx.h (enum RX_Size): Add RX_Bad_Size entry. |
2015-09-09 Daniel Santos <daniel.santos@pobox.com> |
* visium.h (gen_reg_table): Make static. |
(fp_reg_table): Likewise. |
(cc_table): Likewise. |
2015-07-20 Matthew Wahab <matthew.wahab@arm.com> |
* arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ. |
(ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2. |
(ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ. |
(ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2. |
2015-07-03 Alan Modra <amodra@gmail.com> |
* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. |
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> |
Cesar Philippidis <cesar@codesourcery.com> |
* nios2.h (enum iw_format_type): Add R2 formats. |
(enum overflow_type): Add signed_immed12_overflow and |
enumeration_overflow for R2. |
(struct nios2_opcode): Document new argument letters for R2. |
(REG_3BIT, REG_LDWM, REG_POP): Define. |
(includes): Include nios2r2.h. |
(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. |
(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. |
(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. |
(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. |
(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. |
(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): |
Declare. |
* nios2r2.h: New file. |
2015-06-19 Peter Bergner <bergner@vnet.ibm.com> |
* ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. |
(ppc_optional_operand_value): New inline function. |
2015-06-04 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_V8_1): New. |
2015-06-03 Matthew Wahab <matthew.wahab@arm.com> |
* arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. |
(ARM_ARCH_V8_1A): New. |
(ARM_ARCH_V8_1A_FP): New. |
(ARM_ARCH_V8_1A_SIMD): New. |
(ARM_ARCH_V8_1A_CRYPTOV1): New. |
(ARM_FEATURE_CORE): New. |
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> |
* arm.h (ARM_EXT2_PAN): New. |
(ARM_FEATURE_CORE_HIGH): New. |
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> |
* arm.h (ARM_FEATURE_ALL): New. |
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_RDMA): New. |
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_LOR): New. |
2015-06-01 Matthew Wahab <matthew.wahab@arm.com> |
* aarch64.h (AARCH64_FEATURE_PAN): New. |
(aarch64_sys_reg_supported_p): Declare. |
(aarch64_pstatefield_supported_p): Declare. |
2015-04-30 DJ Delorie <dj@redhat.com> |
* rl78.h (RL78_Dis_Isa): New. |
(rl78_decode_opcode): Add ISA parameter. |
2015-03-24 Terry Guo <terry.guo@arm.com> |
* arm.h (arm_feature_set): Extended to provide more available bits. |
(ARM_ANY): Updated to follow above new definition. |
(ARM_CPU_HAS_FEATURE): Likewise. |
(ARM_CPU_IS_ANY): Likewise. |
(ARM_MERGE_FEATURE_SETS): Likewise. |
(ARM_CLEAR_FEATURE): Likewise. |
(ARM_FEATURE): Likewise. |
(ARM_FEATURE_COPY): New macro. |
(ARM_FEATURE_EQUAL): Likewise. |
(ARM_FEATURE_ZERO): Likewise. |
(ARM_FEATURE_CORE_EQUAL): Likewise. |
(ARM_FEATURE_LOW): Likewise. |
(ARM_FEATURE_CORE_LOW): Likewise. |
(ARM_FEATURE_CORE_COPROC): Likewise. |
2015-02-19 Pedro Alves <palves@redhat.com> |
* cgen.h [__cplusplus]: Wrap in extern "C". |
* msp430-decode.h [__cplusplus]: Likewise. |
* nios2.h [__cplusplus]: Likewise. |
* rl78.h [__cplusplus]: Likewise. |
* rx.h [__cplusplus]: Likewise. |
* tilegx.h [__cplusplus]: Likewise. |
2015-01-28 James Bowman <james.bowman@ftdichip.com> |
* ft32.h: New file. |
2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-12-27 Anthony Green <green@moxielogic.com> |
* moxie.h (MOXIE_F1_AiB2, MOXIE_F1_ABi2): Renamed from |
MOXIE_F1_AiB4 and MOXIE_F1_ABi2. |
2014-12-06 Eric Botcazou <ebotcazou@adacore.com> |
* visium.h: New file. |
2014-11-28 Sandra Loosemore <sandra@codesourcery.com> |
* nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete. |
(NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. |
(NIOS2_INSN_OPTARG): Renumber. |
2014-11-06 Sandra Loosemore <sandra@codesourcery.com> |
* nios2.h (nios2_find_opcode_hash): Add mach parameter to |
declaration. Fix obsolete comment. |
2014-10-23 Sandra Loosemore <sandra@codesourcery.com> |
* nios2.h (enum iw_format_type): New. |
(struct nios2_opcode): Update comments. Add size and format fields. |
(NIOS2_INSN_OPTARG): New. |
(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New. |
(struct nios2_reg): Add regtype field. |
(GET_INSN_FIELD, SET_INSN_FIELD): Delete. |
(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete. |
(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete. |
(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete. |
(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete. |
(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete. |
(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete. |
(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete. |
(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete. |
(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete. |
(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete. |
(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete. |
(OP_MASK_OP, OP_SH_OP): Delete. |
(OP_MASK_IOP, OP_SH_IOP): Delete. |
(OP_MASK_IRD, OP_SH_IRD): Delete. |
(OP_MASK_IRT, OP_SH_IRT): Delete. |
(OP_MASK_IRS, OP_SH_IRS): Delete. |
(OP_MASK_ROP, OP_SH_ROP): Delete. |
(OP_MASK_RRD, OP_SH_RRD): Delete. |
(OP_MASK_RRT, OP_SH_RRT): Delete. |
(OP_MASK_RRS, OP_SH_RRS): Delete. |
(OP_MASK_JOP, OP_SH_JOP): Delete. |
(OP_MASK_IMM26, OP_SH_IMM26): Delete. |
(OP_MASK_RCTL, OP_SH_RCTL): Delete. |
(OP_MASK_IMM5, OP_SH_IMM5): Delete. |
(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete. |
(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete. |
(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete. |
(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete. |
(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete. |
(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete. |
(OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete. |
(OP_MASK_<insn>, OP_MASK): Delete. |
(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete. |
(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete. |
Include nios2r1.h to define new instruction opcode constants |
and accessors. |
(nios2_builtin_opcodes): Rename to nios2_r1_opcodes. |
(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. |
(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. |
(NUMOPCODES, NUMREGISTERS): Delete. |
* nios2r1.h: New file. |
2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> |
* sparc.h (HWCAP2_VIS3B): Documentation improved. |
2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> |
* sparc.h (sparc_opcode): new field `hwcaps2'. |
(HWCAP2_FJATHPLUS): New define. |
(HWCAP2_VIS3B): Likewise. |
(HWCAP2_ADP): Likewise. |
(HWCAP2_SPARC5): Likewise. |
(HWCAP2_MWAIT): Likewise. |
(HWCAP2_XMPMUL): Likewise. |
(HWCAP2_XMONT): Likewise. |
(HWCAP2_NSEC): Likewise. |
(HWCAP2_FJATHHPC): Likewise. |
(HWCAP2_FJDES): Likewise. |
(HWCAP2_FJAES): Likewise. |
Document the new operand kind `{', corresponding to the mcdper |
ancillary state register. |
Document the new operand kind }, which represents frsd floating |
point registers (double precision) which must be the same than |
frs1 in its containing instruction. |
2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
* nds32.h: Add new opcode declaration. |
2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com> |
Matthew Fortune <matthew.fortune@imgtec.com> |
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, |
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 |
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, |
+I, +O, +R, +:, +\, +", +; |
(mips_check_prev_operand): New struct. |
(INSN2_FORBIDDEN_SLOT): New define. |
(INSN_ISA32R6): New define. |
(INSN_ISA64R6): New define. |
(INSN_UPTO32R6): New define. |
(INSN_UPTO64R6): New define. |
(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. |
(ISA_MIPS32R6): New define. |
(ISA_MIPS64R6): New define. |
(CPU_MIPS32R6): New define. |
(CPU_MIPS64R6): New define. |
(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. |
2014-09-03 Jiong Wang <jiong.wang@arm.com> |
* aarch64.h (AARCH64_FEATURE_LSE): New feature added. |
(aarch64_opnd): Add AARCH64_OPND_PAIRREG. |
(aarch64_insn_class): Add lse_atomic. |
(F_LSE_SZ): New field added. |
(opcode_has_special_coder): Recognize F_LSE_SZ. |
2014-08-26 Maciej W. Rozycki <macro@codesourcery.com> |
* mips.h: Document the move of `MICROMIPSOP_*_CODE10' from `B' |
over to `+J'. |
2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> |
* mips.h (INSN_LOAD_COPROC_DELAY): Rename to... |
(INSN_LOAD_COPROC): New define. |
(INSN_COPROC_MOVE_DELAY): Rename to... |
(INSN_COPROC_MOVE): New define. |
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm> |
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
Pitchumani Sivanupandi <pitchumani.s@atmel.com> |
Soundararajan <Sounderarajan.D@atmel.com> |
* avr.h (AVR_ISA_TINY): Define avrtiny specific ISA. |
(AVR_ISA_2xxxa): Define ISA without LPM. |
(AVR_ISA_AVRTINY): Define avrtiny arch ISA. |
Add doc for contraint used in 16 bit lds/sts. |
Adjust ISA group for icall, ijmp, pop and push. |
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. |
2014-05-19 Nick Clifton <nickc@redhat.com> |
* msp430.h (struct msp430_operand_s): Add vshift field. |
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> |
* mips.h (INSN_ISA_MASK): Updated. |
(INSN_ISA32R3): New define. |
(INSN_ISA32R5): New define. |
(INSN_ISA64R3): New define. |
(INSN_ISA64R5): New define. |
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 |
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. |
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and |
mips64r5. |
(INSN_UPTO32R3): New define. |
(INSN_UPTO32R5): New define. |
(INSN_UPTO64R3): New define. |
(INSN_UPTO64R5): New define. |
(ISA_MIPS32R3): New define. |
(ISA_MIPS32R5): New define. |
(ISA_MIPS64R3): New define. |
(ISA_MIPS64R5): New define. |
(CPU_MIPS32R3): New define. |
(CPU_MIPS32R5): New define. |
(CPU_MIPS64R3): New define. |
(CPU_MIPS64R5): New define. |
2014-05-01 Richard Sandiford <rdsandiford@googlemail.com> |
* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values. |
2014-04-22 Christian Svensson <blue@cmd.nu> |
* or32.h: Delete. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com> |
* mips.h: Updated description of +o, +u, +v and +w for MIPS and |
microMIPS. |
2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
Wei-Cheng Wang <cole945@gmail.com> |
* nds32.h: New file for Andes NDS32. |
2013-12-07 Mike Frysinger <vapier@gentoo.org> |
* bfin.h: Remove +x file mode. |
2013-11-20 Yufeng Zhang <yufeng.zhang@arm.com> |
* aarch64.h (aarch64_pstatefields): Change element type to |
34,6 → 483,19 |
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. |
(enum aarch64_opnd): Add AARCH64_OPND_COND1. |
2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
* mips.h (mips_operand_type): Add OP_IMM_INDEX and OP_REG_INDEX. |
(mips_reg_operand_type): Add OP_REG_MSA and OP_REG_MSA_CTRL. |
For MIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w, |
+T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +|. |
For MIPS, update extension character sequences after +. |
(ASE_MSA): New define. |
(ASE_MSA64): New define. |
For microMIPS, add comments for +d, +e, +h, +k, +l, +n, +o, +u, +v, +w, |
+x, +T, +U, +V, +W, +~, +!, +@, +#, +$, +%, +^, +&, +*, +|. |
For microMIPS, update extension character sequences after +. |
2013-08-23 Yuri Chornoivan <yurchor@ukr.net> |
PR binutils/15834 |
1925,7 → 2387,7 |
For older changes see ChangeLog-9103 |
Copyright (C) 2004-2012 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/opcode/aarch64.h |
---|
1,6 → 1,6 |
/* AArch64 assembler/disassembler support. |
Copyright 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Contributed by ARM Ltd. |
This file is part of GNU Binutils. |
27,6 → 27,10 |
#include <assert.h> |
#include <stdlib.h> |
#ifdef __cplusplus |
extern "C" { |
#endif |
/* The offset for pc-relative addressing is currently defined to be 0. */ |
#define AARCH64_PCREL_OFFSET 0 |
34,15 → 38,46 |
/* The following bitmasks control CPU features. */ |
#define AARCH64_FEATURE_V8 0x00000001 /* All processors. */ |
#define AARCH64_FEATURE_V8_2 0x00000020 /* ARMv8.2 processors. */ |
#define AARCH64_FEATURE_CRYPTO 0x00010000 /* Crypto instructions. */ |
#define AARCH64_FEATURE_FP 0x00020000 /* FP instructions. */ |
#define AARCH64_FEATURE_SIMD 0x00040000 /* SIMD instructions. */ |
#define AARCH64_FEATURE_CRC 0x00080000 /* CRC instructions. */ |
#define AARCH64_FEATURE_LSE 0x00100000 /* LSE instructions. */ |
#define AARCH64_FEATURE_PAN 0x00200000 /* PAN instructions. */ |
#define AARCH64_FEATURE_LOR 0x00400000 /* LOR instructions. */ |
#define AARCH64_FEATURE_RDMA 0x00800000 /* v8.1 SIMD instructions. */ |
#define AARCH64_FEATURE_V8_1 0x01000000 /* v8.1 features. */ |
#define AARCH64_FEATURE_F16 0x02000000 /* v8.2 FP16 instructions. */ |
#define AARCH64_FEATURE_RAS 0x04000000 /* RAS Extensions. */ |
#define AARCH64_FEATURE_PROFILE 0x08000000 /* Statistical Profiling. */ |
/* Architectures are the sum of the base and extensions. */ |
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ |
AARCH64_FEATURE_FP \ |
| AARCH64_FEATURE_SIMD) |
#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ |
AARCH64_FEATURE_FP \ |
| AARCH64_FEATURE_SIMD \ |
| AARCH64_FEATURE_CRC \ |
| AARCH64_FEATURE_V8_1 \ |
| AARCH64_FEATURE_LSE \ |
| AARCH64_FEATURE_PAN \ |
| AARCH64_FEATURE_LOR \ |
| AARCH64_FEATURE_RDMA) |
#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ |
AARCH64_FEATURE_V8_2 \ |
| AARCH64_FEATURE_F16 \ |
| AARCH64_FEATURE_RAS \ |
| AARCH64_FEATURE_FP \ |
| AARCH64_FEATURE_SIMD \ |
| AARCH64_FEATURE_CRC \ |
| AARCH64_FEATURE_V8_1 \ |
| AARCH64_FEATURE_LSE \ |
| AARCH64_FEATURE_PAN \ |
| AARCH64_FEATURE_LOR \ |
| AARCH64_FEATURE_RDMA) |
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) |
#define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */ |
106,6 → 141,7 |
AARCH64_OPND_Rd_SP, /* Integer Rd or SP. */ |
AARCH64_OPND_Rn_SP, /* Integer Rn or SP. */ |
AARCH64_OPND_PAIRREG, /* Paired register operand. */ |
AARCH64_OPND_Rm_EXT, /* Integer Rm extended. */ |
AARCH64_OPND_Rm_SFT, /* Integer Rm shifted. */ |
201,6 → 237,7 |
AARCH64_OPND_BARRIER, /* Barrier operand. */ |
AARCH64_OPND_BARRIER_ISB, /* Barrier operand for ISB. */ |
AARCH64_OPND_PRFOP, /* Prefetch operation. */ |
AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */ |
}; |
/* Qualifier constrains an operand. It either specifies a variant of an |
245,6 → 282,7 |
constraint qualifiers for immediate operands wherever possible. */ |
AARCH64_OPND_QLF_V_8B, |
AARCH64_OPND_QLF_V_16B, |
AARCH64_OPND_QLF_V_2H, |
AARCH64_OPND_QLF_V_4H, |
AARCH64_OPND_QLF_V_8H, |
AARCH64_OPND_QLF_V_2S, |
340,6 → 378,7 |
loadlit, |
log_imm, |
log_shift, |
lse_atomic, |
movewide, |
pcreladdr, |
ic_system, |
407,6 → 446,7 |
OP_SBFX, |
OP_SBFIZ, |
OP_BFI, |
OP_BFC, /* ARMv8.2. */ |
OP_UBFIZ, |
OP_UXTB, |
OP_UXTH, |
550,7 → 590,9 |
#define F_N (1 << 23) |
/* Opcode dependent field. */ |
#define F_OD(X) (((X) & 0x7) << 24) |
/* Next bit is 27. */ |
/* Instruction has the field of 'sz'. */ |
#define F_LSE_SZ (1 << 27) |
/* Next bit is 28. */ |
static inline bfd_boolean |
alias_opcode_p (const aarch64_opcode *opcode) |
599,7 → 641,7 |
static inline bfd_boolean |
opcode_has_special_coder (const aarch64_opcode *opcode) |
{ |
return (opcode->flags & (F_SF | F_SIZEQ | F_FPTYPE | F_SSIZE | F_T |
return (opcode->flags & (F_SF | F_LSE_SZ | F_SIZEQ | F_FPTYPE | F_SSIZE | F_T |
| F_GPRSIZE_IN_Q | F_LDS_SIZE | F_MISC | F_N | F_COND)) ? TRUE |
: FALSE; |
} |
613,6 → 655,7 |
extern const struct aarch64_name_value_pair aarch64_operand_modifiers []; |
extern const struct aarch64_name_value_pair aarch64_barrier_options [16]; |
extern const struct aarch64_name_value_pair aarch64_prfops [32]; |
extern const struct aarch64_name_value_pair aarch64_hint_options []; |
typedef struct |
{ |
624,14 → 667,23 |
extern const aarch64_sys_reg aarch64_sys_regs []; |
extern const aarch64_sys_reg aarch64_pstatefields []; |
extern bfd_boolean aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *); |
extern bfd_boolean aarch64_sys_reg_supported_p (const aarch64_feature_set, |
const aarch64_sys_reg *); |
extern bfd_boolean aarch64_pstatefield_supported_p (const aarch64_feature_set, |
const aarch64_sys_reg *); |
typedef struct |
{ |
const char *template; |
const char *name; |
uint32_t value; |
int has_xt; |
uint32_t flags ; |
} aarch64_sys_ins_reg; |
extern bfd_boolean aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *); |
extern bfd_boolean |
aarch64_sys_ins_reg_supported_p (const aarch64_feature_set, |
const aarch64_sys_ins_reg *); |
extern const aarch64_sys_ins_reg aarch64_sys_regs_ic []; |
extern const aarch64_sys_ins_reg aarch64_sys_regs_dc []; |
extern const aarch64_sys_ins_reg aarch64_sys_regs_at []; |
737,6 → 789,7 |
aarch64_insn pstatefield; |
const aarch64_sys_ins_reg *sysins_op; |
const struct aarch64_name_value_pair *barrier; |
const struct aarch64_name_value_pair *hint_option; |
const struct aarch64_name_value_pair *prfop; |
}; |
901,9 → 954,12 |
extern int |
aarch64_stack_pointer_p (const aarch64_opnd_info *); |
extern |
int aarch64_zero_register_p (const aarch64_opnd_info *); |
extern int |
aarch64_zero_register_p (const aarch64_opnd_info *); |
extern int |
aarch64_decode_insn (aarch64_insn, aarch64_inst *, bfd_boolean); |
/* Given an operand qualifier, return the expected data element size |
of a qualified operand. */ |
extern unsigned char |
940,4 → 996,8 |
#define DEBUG_TRACE_IF(C, M, ...) ; |
#endif /* DEBUG_AARCH64 */ |
#ifdef __cplusplus |
} |
#endif |
#endif /* OPCODE_AARCH64_H */ |
/contrib/toolchain/binutils/include/opcode/alpha.h |
---|
1,5 → 1,5 |
/* alpha.h -- Header file for Alpha opcode table |
Copyright 1996, 1999, 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Contributed by Richard Henderson <rth@tamu.edu>, |
patterned after the PPC opcode table written by Ian Lance Taylor. |
/contrib/toolchain/binutils/include/opcode/arc-func.h |
---|
0,0 → 1,236 |
/* Replace functions for the ARC relocs. |
Copyright 2015 |
Free Software Foundation, Inc. |
This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and |
the GNU Binutils. |
GAS/GDB is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3, or (at your option) |
any later version. |
GAS/GDB is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with GAS or GDB; see the file COPYING3. If not, write to |
the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
MA 02110-1301, USA. */ |
/* mask = 00000000000000000000000000000000. */ |
#ifndef REPLACE_none |
#define REPLACE_none |
ATTRIBUTE_UNUSED static unsigned |
replace_none (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
return insn; |
} |
#endif /* REPLACE_none */ |
/* mask = 11111111. */ |
#ifndef REPLACE_bits8 |
#define REPLACE_bits8 |
ATTRIBUTE_UNUSED static unsigned |
replace_bits8 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x00ff) << 0; |
return insn; |
} |
#endif /* REPLACE_bits8 */ |
/* mask = 1111111111111111. */ |
#ifndef REPLACE_bits16 |
#define REPLACE_bits16 |
ATTRIBUTE_UNUSED static unsigned |
replace_bits16 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0xffff) << 0; |
return insn; |
} |
#endif /* REPLACE_bits16 */ |
/* mask = 111111111111111111111111. */ |
#ifndef REPLACE_bits24 |
#define REPLACE_bits24 |
ATTRIBUTE_UNUSED static unsigned |
replace_bits24 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0xffffff) << 0; |
return insn; |
} |
#endif /* REPLACE_bits24 */ |
/* mask = 11111111111111111111111111111111. */ |
#ifndef REPLACE_word32 |
#define REPLACE_word32 |
ATTRIBUTE_UNUSED static unsigned |
replace_word32 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0xffffffff) << 0; |
return insn; |
} |
#endif /* REPLACE_word32 */ |
/* mask = 0000000000000000000000000000000011111111111111111111111111111111. */ |
#ifndef REPLACE_limm |
#define REPLACE_limm |
ATTRIBUTE_UNUSED static unsigned |
replace_limm (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0xffffffff) << 0; |
return insn; |
} |
#endif /* REPLACE_limm */ |
/* mask = 000000000000000011111111111111111111111111111111. */ |
#ifndef REPLACE_limms |
#define REPLACE_limms |
ATTRIBUTE_UNUSED static unsigned |
replace_limms (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0xffffffff) << 0; |
return insn; |
} |
#endif /* REPLACE_limms */ |
/* mask = 00000111111111102222222222000000. */ |
#ifndef REPLACE_disp21h |
#define REPLACE_disp21h |
ATTRIBUTE_UNUSED static unsigned |
replace_disp21h (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x03ff) << 17; |
insn |= ((value >> 10) & 0x03ff) << 6; |
return insn; |
} |
#endif /* REPLACE_disp21h */ |
/* mask = 00000111111111002222222222000000. */ |
#ifndef REPLACE_disp21w |
#define REPLACE_disp21w |
ATTRIBUTE_UNUSED static unsigned |
replace_disp21w (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x01ff) << 18; |
insn |= ((value >> 9) & 0x03ff) << 6; |
return insn; |
} |
#endif /* REPLACE_disp21w */ |
/* mask = 00000111111111102222222222003333. */ |
#ifndef REPLACE_disp25h |
#define REPLACE_disp25h |
ATTRIBUTE_UNUSED static unsigned |
replace_disp25h (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x03ff) << 17; |
insn |= ((value >> 10) & 0x03ff) << 6; |
insn |= ((value >> 20) & 0x000f) << 0; |
return insn; |
} |
#endif /* REPLACE_disp25h */ |
/* mask = 00000111111111002222222222003333. */ |
#ifndef REPLACE_disp25w |
#define REPLACE_disp25w |
ATTRIBUTE_UNUSED static unsigned |
replace_disp25w (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x01ff) << 18; |
insn |= ((value >> 9) & 0x03ff) << 6; |
insn |= ((value >> 19) & 0x000f) << 0; |
return insn; |
} |
#endif /* REPLACE_disp25w */ |
/* mask = 00000000000000000000000111111111. */ |
#ifndef REPLACE_disp9 |
#define REPLACE_disp9 |
ATTRIBUTE_UNUSED static unsigned |
replace_disp9 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x01ff) << 0; |
return insn; |
} |
#endif /* REPLACE_disp9 */ |
/* mask = 00000000111111112000000000000000. */ |
#ifndef REPLACE_disp9ls |
#define REPLACE_disp9ls |
ATTRIBUTE_UNUSED static unsigned |
replace_disp9ls (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x00ff) << 16; |
insn |= ((value >> 8) & 0x0001) << 15; |
return insn; |
} |
#endif /* REPLACE_disp9ls */ |
/* mask = 0000000111111111. */ |
#ifndef REPLACE_disp9s |
#define REPLACE_disp9s |
ATTRIBUTE_UNUSED static unsigned |
replace_disp9s (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x01ff) << 0; |
return insn; |
} |
#endif /* REPLACE_disp9s */ |
/* mask = 0000011111111111. */ |
#ifndef REPLACE_disp13s |
#define REPLACE_disp13s |
ATTRIBUTE_UNUSED static unsigned |
replace_disp13s (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x07ff) << 0; |
return insn; |
} |
#endif /* REPLACE_disp13s */ |
/* mask = 0000022222200111. */ |
#ifndef REPLACE_disp9s1 |
#define REPLACE_disp9s1 |
ATTRIBUTE_UNUSED static unsigned |
replace_disp9s1 (unsigned insn, int value ATTRIBUTE_UNUSED) |
{ |
insn |= ((value >> 0) & 0x0007) << 0; |
insn |= ((value >> 3) & 0x003f) << 5; |
return insn; |
} |
#endif /* REPLACE_disp9s1 */ |
/contrib/toolchain/binutils/include/opcode/arc.h |
---|
1,8 → 1,8 |
/* Opcode table for the ARC. |
Copyright 1994, 1995, 1997, 2001, 2002, 2003, 2010 |
Free Software Foundation, Inc. |
Contributed by Doug Evans (dje@cygnus.com). |
Copyright 1994-2015 Free Software Foundation, Inc. |
Contributed by Claudiu Zissulescu (claziss@synopsys.com) |
This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and |
the GNU Binutils. |
21,201 → 21,182 |
the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
MA 02110-1301, USA. */ |
/* List of the various cpu types. |
The tables currently use bit masks to say whether the instruction or |
whatever is supported by a particular cpu. This lets us have one entry |
apply to several cpus. |
#ifndef OPCODE_ARC_H |
#define OPCODE_ARC_H |
The `base' cpu must be 0. The cpu type is treated independently of |
endianness. The complete `mach' number includes endianness. |
These values are internal to opcodes/bfd/binutils/gas. */ |
#define ARC_MACH_5 0 |
#define ARC_MACH_6 1 |
#define ARC_MACH_7 2 |
#define ARC_MACH_8 4 |
#define MAX_INSN_ARGS 6 |
#define MAX_INSN_FLGS 3 |
/* Additional cpu values can be inserted here and ARC_MACH_BIG moved down. */ |
#define ARC_MACH_BIG 16 |
/* Instruction Class. */ |
typedef enum |
{ |
ARITH, |
AUXREG, |
BRANCH, |
CONTROL, |
DSP, |
FLOAT, |
INVALID, |
JUMP, |
KERNEL, |
LOGICAL, |
MEMORY, |
} insn_class_t; |
/* Mask of number of bits necessary to record cpu type. */ |
#define ARC_MACH_CPU_MASK (ARC_MACH_BIG - 1) |
/* Instruction Subclass. */ |
typedef enum |
{ |
NONE, |
CVT, |
BTSCN, |
CD1, |
CD2, |
DIV, |
DP, |
MPY1E, |
MPY6E, |
MPY7E, |
MPY8E, |
MPY9E, |
SHFT1, |
SHFT2, |
SWAP, |
SP |
} insn_subclass_t; |
/* Mask of number of bits necessary to record cpu type + endianness. */ |
#define ARC_MACH_MASK ((ARC_MACH_BIG << 1) - 1) |
/* Flags class. */ |
typedef enum |
{ |
FNONE, |
CND, /* Conditional flags. */ |
WBM, /* Write-back modes. */ |
FLG, /* F Flag. */ |
SBP, /* Static branch prediction. */ |
DLY, /* Delay slot. */ |
DIF, /* Bypass caches. */ |
SGX, /* Sign extend modes. */ |
SZM /* Data size modes. */ |
} flag_class_t; |
/* Type to denote an ARC instruction (at least a 32 bit unsigned int). */ |
/* The opcode table is an array of struct arc_opcode. */ |
struct arc_opcode |
{ |
/* The opcode name. */ |
const char *name; |
typedef unsigned int arc_insn; |
/* The opcode itself. Those bits which will be filled in with |
operands are zeroes. */ |
unsigned opcode; |
struct arc_opcode { |
char *syntax; /* syntax of insn */ |
unsigned long mask, value; /* recognize insn if (op&mask) == value */ |
int flags; /* various flag bits */ |
/* The opcode mask. This is used by the disassembler. This is a |
mask containing ones indicating those bits which must match the |
opcode field, and zeroes indicating those bits which need not |
match (and are presumably filled in by operands). */ |
unsigned mask; |
/* Values for `flags'. */ |
/* One bit flags for the opcode. These are primarily used to |
indicate specific processors and environments support the |
instructions. The defined values are listed below. */ |
unsigned cpu; |
/* Return CPU number, given flag bits. */ |
#define ARC_OPCODE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) |
/* The instruction class. This is used by gdb. */ |
insn_class_t class; |
/* Return MACH number, given flag bits. */ |
#define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK) |
/* The instruction subclass. */ |
insn_subclass_t subclass; |
/* First opcode flag bit available after machine mask. */ |
#define ARC_OPCODE_FLAG_START (ARC_MACH_MASK + 1) |
/* An array of operand codes. Each code is an index into the |
operand table. They appear in the order which the operands must |
appear in assembly code, and are terminated by a zero. */ |
unsigned char operands[MAX_INSN_ARGS + 1]; |
/* This insn is a conditional branch. */ |
#define ARC_OPCODE_COND_BRANCH (ARC_OPCODE_FLAG_START) |
#define SYNTAX_3OP (ARC_OPCODE_COND_BRANCH << 1) |
#define SYNTAX_LENGTH (SYNTAX_3OP ) |
#define SYNTAX_2OP (SYNTAX_3OP << 1) |
#define OP1_MUST_BE_IMM (SYNTAX_2OP << 1) |
#define OP1_IMM_IMPLIED (OP1_MUST_BE_IMM << 1) |
#define SYNTAX_VALID (OP1_IMM_IMPLIED << 1) |
#define I(x) (((x) & 31) << 27) |
#define A(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGA) |
#define B(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGB) |
#define C(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGC) |
#define R(x,b,m) (((x) & (m)) << (b)) /* value X, mask M, at bit B */ |
/* These values are used to optimize assembly and disassembly. Each insn |
is on a list of related insns (same first letter for assembly, same |
insn code for disassembly). */ |
struct arc_opcode *next_asm; /* Next instr to try during assembly. */ |
struct arc_opcode *next_dis; /* Next instr to try during disassembly. */ |
/* Macros to create the hash values for the lists. */ |
#define ARC_HASH_OPCODE(string) \ |
((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26) |
#define ARC_HASH_ICODE(insn) \ |
((unsigned int) (insn) >> 27) |
/* Macros to access `next_asm', `next_dis' so users needn't care about the |
underlying mechanism. */ |
#define ARC_OPCODE_NEXT_ASM(op) ((op)->next_asm) |
#define ARC_OPCODE_NEXT_DIS(op) ((op)->next_dis) |
/* An array of flag codes. Each code is an index into the flag |
table. They appear in the order which the flags must appear in |
assembly code, and are terminated by a zero. */ |
unsigned char flags[MAX_INSN_FLGS + 1]; |
}; |
/* this is an "insert at front" linked list per Metaware spec |
that new definitions override older ones. */ |
extern struct arc_opcode *arc_ext_opcodes; |
/* The table itself is sorted by major opcode number, and is otherwise |
in the order in which the disassembler should consider |
instructions. */ |
extern const struct arc_opcode arc_opcodes[]; |
extern const unsigned arc_num_opcodes; |
struct arc_operand_value { |
char *name; /* eg: "eq" */ |
short value; /* eg: 1 */ |
unsigned char type; /* index into `arc_operands' */ |
unsigned char flags; /* various flag bits */ |
/* CPU Availability. */ |
#define ARC_OPCODE_ARC600 0x0001 /* ARC 600 specific insns. */ |
#define ARC_OPCODE_ARC700 0x0002 /* ARC 700 specific insns. */ |
#define ARC_OPCODE_ARCv2EM 0x0004 /* ARCv2 EM specific insns. */ |
#define ARC_OPCODE_ARCv2HS 0x0008 /* ARCv2 HS specific insns. */ |
/* Values for `flags'. */ |
/* CPU extensions. */ |
#define ARC_EA 0x0001 |
#define ARC_CD 0x0001 /* Mutual exclusive with EA. */ |
#define ARC_LLOCK 0x0002 |
#define ARC_ATOMIC 0x0002 /* Mutual exclusive with LLOCK. */ |
#define ARC_MPY 0x0004 |
#define ARC_MULT 0x0004 |
/* Return CPU number, given flag bits. */ |
#define ARC_OPVAL_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) |
/* Return MACH number, given flag bits. */ |
#define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK) |
}; |
/* Floating point support. */ |
#define ARC_DPFP 0x0010 |
#define ARC_SPFP 0x0020 |
#define ARC_FPU 0x0030 |
struct arc_ext_operand_value { |
struct arc_ext_operand_value *next; |
struct arc_operand_value operand; |
}; |
/* NORM & SWAP. */ |
#define ARC_SWAP 0x0100 |
#define ARC_NORM 0x0200 |
#define ARC_BSCAN 0x0200 |
extern struct arc_ext_operand_value *arc_ext_operands; |
/* A7 specific. */ |
#define ARC_UIX 0x1000 |
#define ARC_TSTAMP 0x1000 |
struct arc_operand { |
/* One of the insn format chars. */ |
unsigned char fmt; |
/* A6 specific. */ |
#define ARC_VBFDW 0x1000 |
#define ARC_BARREL 0x1000 |
#define ARC_DSPA 0x1000 |
/* The number of bits in the operand (may be unused for a modifier). */ |
unsigned char bits; |
/* EM specific. */ |
#define ARC_SHIFT 0x1000 |
/* How far the operand is left shifted in the instruction, or |
the modifier's flag bit (may be unused for a modifier. */ |
unsigned char shift; |
/* V2 specific. */ |
#define ARC_INTR 0x1000 |
#define ARC_DIV 0x1000 |
/* Various flag bits. */ |
int flags; |
/* V1 specific. */ |
#define ARC_XMAC 0x1000 |
#define ARC_CRC 0x1000 |
/* Values for `flags'. */ |
/* Base architecture -- all cpus. */ |
#define ARC_OPCODE_BASE \ |
(ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 \ |
| ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) |
/* This operand is a suffix to the opcode. */ |
#define ARC_OPERAND_SUFFIX 1 |
/* A macro to check for short instructions. */ |
#define ARC_SHORT(mask) \ |
(((mask) & 0xFFFF0000) ? 0 : 1) |
/* This operand is a relative branch displacement. The disassembler |
prints these symbolically if possible. */ |
#define ARC_OPERAND_RELATIVE_BRANCH 2 |
/* The operands table is an array of struct arc_operand. */ |
struct arc_operand |
{ |
/* The number of bits in the operand. */ |
unsigned int bits; |
/* This operand is an absolute branch address. The disassembler |
prints these symbolically if possible. */ |
#define ARC_OPERAND_ABSOLUTE_BRANCH 4 |
/* How far the operand is left shifted in the instruction. */ |
unsigned int shift; |
/* This operand is an address. The disassembler |
prints these symbolically if possible. */ |
#define ARC_OPERAND_ADDRESS 8 |
/* The default relocation type for this operand. */ |
signed int default_reloc; |
/* This operand is a long immediate value. */ |
#define ARC_OPERAND_LIMM 0x10 |
/* One bit syntax flags. */ |
unsigned int flags; |
/* This operand takes signed values. */ |
#define ARC_OPERAND_SIGNED 0x20 |
/* This operand takes signed values, but also accepts a full positive |
range of values. That is, if bits is 16, it takes any value from |
-0x8000 to 0xffff. */ |
#define ARC_OPERAND_SIGNOPT 0x40 |
/* This operand should be regarded as a negative number for the |
purposes of overflow checking (i.e., the normal most negative |
number is disallowed and one more than the normal most positive |
number is allowed). This flag will only be set for a signed |
operand. */ |
#define ARC_OPERAND_NEGATIVE 0x80 |
/* This operand doesn't really exist. The program uses these operands |
in special ways. */ |
#define ARC_OPERAND_FAKE 0x100 |
/* separate flags operand for j and jl instructions */ |
#define ARC_OPERAND_JUMPFLAGS 0x200 |
/* allow warnings and errors to be issued after call to insert_xxxxxx */ |
#define ARC_OPERAND_WARN 0x400 |
#define ARC_OPERAND_ERROR 0x800 |
/* this is a load operand */ |
#define ARC_OPERAND_LOAD 0x8000 |
/* this is a store operand */ |
#define ARC_OPERAND_STORE 0x10000 |
/* Modifier values. */ |
/* A dot is required before a suffix. Eg: .le */ |
#define ARC_MOD_DOT 0x1000 |
/* A normal register is allowed (not used, but here for completeness). */ |
#define ARC_MOD_REG 0x2000 |
/* An auxiliary register name is expected. */ |
#define ARC_MOD_AUXREG 0x4000 |
/* Sum of all ARC_MOD_XXX bits. */ |
#define ARC_MOD_BITS 0x7000 |
/* Non-zero if the operand type is really a modifier. */ |
#define ARC_MOD_P(X) ((X) & ARC_MOD_BITS) |
/* enforce read/write only register restrictions */ |
#define ARC_REGISTER_READONLY 0x01 |
#define ARC_REGISTER_WRITEONLY 0x02 |
#define ARC_REGISTER_NOSHORT_CUT 0x04 |
/* Insertion function. This is used by the assembler. To insert an |
operand value into an instruction, check this field. |
If it is NULL, execute |
i |= (p & ((1 << o->bits) - 1)) << o->shift; |
(I is the instruction which we are filling in, O is a pointer to |
this structure, and OP is the opcode value; this assumes twos |
i |= (op & ((1 << o->bits) - 1)) << o->shift; |
(i is the instruction which we are filling in, o is a pointer to |
this structure, and op is the opcode value; this assumes twos |
complement arithmetic). |
If this field is not NULL, then simply call it with the |
223,14 → 204,10 |
of the instruction. If the ERRMSG argument is not NULL, then if |
the operand value is illegal, *ERRMSG will be set to a warning |
string (the operand will be inserted in any case). If the |
operand value is legal, *ERRMSG will be unchanged. |
operand value is legal, *ERRMSG will be unchanged (most operands |
can accept any value). */ |
unsigned (*insert) (unsigned instruction, int op, const char **errmsg); |
REG is non-NULL when inserting a register value. */ |
arc_insn (*insert) |
(arc_insn insn, const struct arc_operand *operand, int mods, |
const struct arc_operand_value *reg, long value, const char **errmsg); |
/* Extraction function. This is used by the disassembler. To |
extract this operand type from an instruction, check this field. |
239,84 → 216,198 |
if ((o->flags & ARC_OPERAND_SIGNED) != 0 |
&& (op & (1 << (o->bits - 1))) != 0) |
op -= 1 << o->bits; |
(I is the instruction, O is a pointer to this structure, and OP |
(i is the instruction, o is a pointer to this structure, and op |
is the result; this assumes twos complement arithmetic). |
If this field is not NULL, then simply call it with the |
instruction value. It will return the value of the operand. If |
the INVALID argument is not NULL, *INVALID will be set to |
non-zero if this operand type can not actually be extracted from |
TRUE if this operand type can not actually be extracted from |
this operand (i.e., the instruction does not match). If the |
operand is valid, *INVALID will not be changed. |
operand is valid, *INVALID will not be changed. */ |
int (*extract) (unsigned instruction, bfd_boolean *invalid); |
}; |
INSN is a pointer to an array of two `arc_insn's. The first element is |
the insn, the second is the limm if present. |
/* Elements in the table are retrieved by indexing with values from |
the operands field of the arc_opcodes table. */ |
extern const struct arc_operand arc_operands[]; |
extern const unsigned arc_num_operands; |
extern const unsigned arc_Toperand; |
extern const unsigned arc_NToperand; |
Operands that have a printable form like registers and suffixes have |
their struct arc_operand_value pointer stored in OPVAL. */ |
/* Values defined for the flags field of a struct arc_operand. */ |
long (*extract) |
(arc_insn *insn, const struct arc_operand *operand, int mods, |
const struct arc_operand_value **opval, int *invalid); |
/* This operand does not actually exist in the assembler input. This |
is used to support extended mnemonics, for which two operands fields |
are identical. The assembler should call the insert function with |
any op value. The disassembler should call the extract function, |
ignore the return value, and check the value placed in the invalid |
argument. */ |
#define ARC_OPERAND_FAKE 0x0001 |
/* This operand names an integer register. */ |
#define ARC_OPERAND_IR 0x0002 |
/* This operand takes signed values. */ |
#define ARC_OPERAND_SIGNED 0x0004 |
/* This operand takes unsigned values. This exists primarily so that |
a flags value of 0 can be treated as end-of-arguments. */ |
#define ARC_OPERAND_UNSIGNED 0x0008 |
/* This operand takes long immediate values. */ |
#define ARC_OPERAND_LIMM 0x0010 |
/* This operand is identical like the previous one. */ |
#define ARC_OPERAND_DUPLICATE 0x0020 |
/* This operand is PC relative. Used for internal relocs. */ |
#define ARC_OPERAND_PCREL 0x0040 |
/* This operand is truncated. The truncation is done accordingly to |
operand alignment attribute. */ |
#define ARC_OPERAND_TRUNCATE 0x0080 |
/* This operand is 16bit aligned. */ |
#define ARC_OPERAND_ALIGNED16 0x0100 |
/* This operand is 32bit aligned. */ |
#define ARC_OPERAND_ALIGNED32 0x0200 |
/* This operand can be ignored by matching process if it is not |
present. */ |
#define ARC_OPERAND_IGNORE 0x0400 |
/* Don't check the range when matching. */ |
#define ARC_OPERAND_NCHK 0x0800 |
/* Mark the braket possition. */ |
#define ARC_OPERAND_BRAKET 0x1000 |
/* Mask for selecting the type for typecheck purposes. */ |
#define ARC_OPERAND_TYPECHECK_MASK \ |
(ARC_OPERAND_IR | \ |
ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED | \ |
ARC_OPERAND_UNSIGNED | ARC_OPERAND_BRAKET) |
/* The flags structure. */ |
struct arc_flag_operand |
{ |
/* The flag name. */ |
const char *name; |
/* The flag code. */ |
unsigned code; |
/* The number of bits in the operand. */ |
unsigned int bits; |
/* How far the operand is left shifted in the instruction. */ |
unsigned int shift; |
/* Available for disassembler. */ |
unsigned char favail; |
}; |
/* Bits that say what version of cpu we have. These should be passed to |
arc_init_opcode_tables. At present, all there is is the cpu type. */ |
/* The flag operands table. */ |
extern const struct arc_flag_operand arc_flag_operands[]; |
extern const unsigned arc_num_flag_operands; |
/* CPU number, given value passed to `arc_init_opcode_tables'. */ |
#define ARC_HAVE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) |
/* MACH number, given value passed to `arc_init_opcode_tables'. */ |
#define ARC_HAVE_MACH(bits) ((bits) & ARC_MACH_MASK) |
/* The flag's class structure. */ |
struct arc_flag_class |
{ |
/* Flag class. */ |
flag_class_t class; |
/* Special register values: */ |
#define ARC_REG_SHIMM_UPDATE 61 |
#define ARC_REG_SHIMM 63 |
#define ARC_REG_LIMM 62 |
/* List of valid flags (codes). */ |
unsigned flags[256]; |
}; |
/* Non-zero if REG is a constant marker. */ |
#define ARC_REG_CONSTANT_P(REG) ((REG) >= 61) |
extern const struct arc_flag_class arc_flag_classes[]; |
/* Positions and masks of various fields: */ |
#define ARC_SHIFT_REGA 21 |
#define ARC_SHIFT_REGB 15 |
#define ARC_SHIFT_REGC 9 |
#define ARC_MASK_REG 63 |
/* Structure for special cases. */ |
struct arc_flag_special |
{ |
/* Name of special case instruction. */ |
const char *name; |
/* Delay slot types. */ |
#define ARC_DELAY_NONE 0 /* no delay slot */ |
#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */ |
#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */ |
/* List of flags applicable for special case instruction. */ |
unsigned flags[32]; |
}; |
/* Non-zero if X will fit in a signed 9 bit field. */ |
#define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255) |
extern const struct arc_flag_special arc_flag_special_cases[]; |
extern const unsigned arc_num_flag_special; |
extern const struct arc_operand arc_operands[]; |
extern const int arc_operand_count; |
extern struct arc_opcode arc_opcodes[]; |
extern const int arc_opcodes_count; |
extern const struct arc_operand_value arc_suffixes[]; |
extern const int arc_suffixes_count; |
extern const struct arc_operand_value arc_reg_names[]; |
extern const int arc_reg_names_count; |
extern unsigned char arc_operand_map[]; |
/* Relocation equivalence structure. */ |
struct arc_reloc_equiv_tab |
{ |
const char * name; /* String to lookup. */ |
const char * mnemonic; /* Extra matching condition. */ |
unsigned flagcode; /* Extra matching condition. */ |
signed int oldreloc; /* Old relocation. */ |
signed int newreloc; /* New relocation. */ |
}; |
/* Utility fns in arc-opc.c. */ |
int arc_get_opcode_mach (int, int); |
extern const struct arc_reloc_equiv_tab arc_reloc_equiv[]; |
extern const unsigned arc_num_equiv_tab; |
/* `arc_opcode_init_tables' must be called before `arc_xxx_supported'. */ |
void arc_opcode_init_tables (int); |
void arc_opcode_init_insert (void); |
void arc_opcode_init_extract (void); |
const struct arc_opcode *arc_opcode_lookup_asm (const char *); |
const struct arc_opcode *arc_opcode_lookup_dis (unsigned int); |
int arc_opcode_limm_p (long *); |
const struct arc_operand_value *arc_opcode_lookup_suffix |
(const struct arc_operand *type, int value); |
int arc_opcode_supported (const struct arc_opcode *); |
int arc_opval_supported (const struct arc_operand_value *); |
int arc_limm_fixup_adjust (arc_insn); |
int arc_insn_is_j (arc_insn); |
int arc_insn_not_jl (arc_insn); |
int arc_operand_type (int); |
struct arc_operand_value *get_ext_suffix (char *); |
int arc_get_noshortcut_flag (void); |
/* Structure for operand operations for pseudo/alias instructions. */ |
struct arc_operand_operation |
{ |
/* The index for operand from operand array. */ |
unsigned operand_idx; |
/* Defines if it needs the operand inserted by the assembler or |
whether this operand comes from the pseudo instruction's |
operands. */ |
unsigned char needs_insert; |
/* Count we have to add to the operand. Use negative number to |
subtract from the operand. Also use this number to add to 0 if |
the operand needs to be inserted (i.e. needs_insert == 1). */ |
int count; |
/* Index of the operand to swap with. To be done AFTER applying |
inc_count. */ |
unsigned swap_operand_idx; |
}; |
/* Structure for pseudo/alias instructions. */ |
struct arc_pseudo_insn |
{ |
/* Mnemonic for pseudo/alias insn. */ |
const char *mnemonic_p; |
/* Mnemonic for real instruction. */ |
const char *mnemonic_r; |
/* Flag that will have to be added (if any). */ |
const char *flag_r; |
/* Amount of operands. */ |
unsigned operand_cnt; |
/* Array of operand operations. */ |
struct arc_operand_operation operand[6]; |
}; |
extern const struct arc_pseudo_insn arc_pseudo_insns[]; |
extern const unsigned arc_num_pseudo_insn; |
/* Structure for AUXILIARY registers. */ |
struct arc_aux_reg |
{ |
/* Register address. */ |
int address; |
/* Register name. */ |
const char *name; |
/* Size of the string. */ |
size_t length; |
}; |
extern const struct arc_aux_reg arc_aux_regs[]; |
extern const unsigned arc_num_aux_regs; |
#endif /* OPCODE_ARC_H */ |
/contrib/toolchain/binutils/include/opcode/arm.h |
---|
1,5 → 1,5 |
/* ARM assembler/disassembler support. |
Copyright 2004, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
This file is part of GDB and GAS. |
57,6 → 57,8 |
state. */ |
#define ARM_EXT_VIRT 0x80000000 /* Virtualization extensions. */ |
#define ARM_EXT2_PAN 0x00000001 /* PAN extension. */ |
/* Co-processor space extensions. */ |
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ |
#define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */ |
78,10 → 80,12 |
#define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */ |
#define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add */ |
#define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add */ |
#define FPU_VFP_EXT_ARMV8 0x00020000 /* FP for ARMv8. */ |
#define FPU_VFP_EXT_ARMV8 0x00020000 /* Double-precision FP for ARMv8. */ |
#define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */ |
#define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */ |
#define CRC_EXT_ARMV8 0x00004000 /* CRC32 for ARMv8. */ |
#define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */ |
#define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */ |
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E) |
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T, |
107,13 → 111,13 |
#define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6) |
#define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K) |
#define ARM_AEXT_V6Z (ARM_AEXT_V6K | ARM_EXT_SEC) |
#define ARM_AEXT_V6ZK (ARM_AEXT_V6K | ARM_EXT_SEC) |
#define ARM_AEXT_V6KZ (ARM_AEXT_V6K | ARM_EXT_SEC) |
#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \ |
| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \ |
| ARM_EXT_V6_DSP ) |
#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K) |
#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC) |
#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC) |
#define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC) |
#define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER) |
#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A) |
#define ARM_AEXT_V7VE (ARM_AEXT_V7A | ARM_EXT_DIV | ARM_EXT_ADIV \ |
138,11 → 142,12 |
| ARM_EXT_VIRT | ARM_EXT_V8) |
/* Processors with specific extensions in the co-processor space. */ |
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE) |
#define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE) |
#define ARM_ARCH_IWMMXT \ |
ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT) |
ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT) |
#define ARM_ARCH_IWMMXT2 \ |
ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2) |
ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \ |
| ARM_CEXT_IWMMXT2) |
#define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE) |
#define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1) |
153,7 → 158,9 |
#define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA) |
#define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA) |
#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA) |
#define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8) |
#define FPU_VFP_V5D16 (FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD | FPU_VFP_EXT_ARMV8) |
#define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD) |
#define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD) |
#define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8) |
#define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8) |
#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \ |
162,126 → 169,183 |
#define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2) |
/* Deprecated. */ |
#define FPU_ARCH_VFP ARM_FEATURE (0, FPU_ENDIAN_PURE) |
#define FPU_ARCH_VFP ARM_FEATURE_COPROC (FPU_ENDIAN_PURE) |
#define FPU_ARCH_FPE ARM_FEATURE (0, FPU_FPA_EXT_V1) |
#define FPU_ARCH_FPA ARM_FEATURE (0, FPU_FPA) |
#define FPU_ARCH_FPE ARM_FEATURE_COPROC (FPU_FPA_EXT_V1) |
#define FPU_ARCH_FPA ARM_FEATURE_COPROC (FPU_FPA) |
#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD) |
#define FPU_ARCH_VFP_V1 ARM_FEATURE (0, FPU_VFP_V1) |
#define FPU_ARCH_VFP_V2 ARM_FEATURE (0, FPU_VFP_V2) |
#define FPU_ARCH_VFP_V3D16 ARM_FEATURE (0, FPU_VFP_V3D16) |
#define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD) |
#define FPU_ARCH_VFP_V1 ARM_FEATURE_COPROC (FPU_VFP_V1) |
#define FPU_ARCH_VFP_V2 ARM_FEATURE_COPROC (FPU_VFP_V2) |
#define FPU_ARCH_VFP_V3D16 ARM_FEATURE_COPROC (FPU_VFP_V3D16) |
#define FPU_ARCH_VFP_V3D16_FP16 \ |
ARM_FEATURE (0, FPU_VFP_V3D16 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_V3 ARM_FEATURE (0, FPU_VFP_V3) |
#define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE (0, FPU_VFP_V3 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_V3xD ARM_FEATURE (0, FPU_VFP_V3xD) |
#define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE (0, FPU_VFP_V3xD | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_NEON_V1 ARM_FEATURE (0, FPU_NEON_EXT_V1) |
ARM_FEATURE_COPROC (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_V3 ARM_FEATURE_COPROC (FPU_VFP_V3) |
#define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_V3xD ARM_FEATURE_COPROC (FPU_VFP_V3xD) |
#define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3xD \ |
| FPU_VFP_EXT_FP16) |
#define FPU_ARCH_NEON_V1 ARM_FEATURE_COPROC (FPU_NEON_EXT_V1) |
#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \ |
ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1) |
ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1) |
#define FPU_ARCH_NEON_FP16 \ |
ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD) |
#define FPU_ARCH_VFP_V4 ARM_FEATURE(0, FPU_VFP_V4) |
#define FPU_ARCH_VFP_V4D16 ARM_FEATURE(0, FPU_VFP_V4D16) |
#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16) |
ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16) |
#define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD) |
#define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4) |
#define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16) |
#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16) |
#define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16) |
#define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16) |
#define FPU_ARCH_NEON_VFP_V4 \ |
ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA) |
#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE(0, FPU_VFP_ARMV8) |
#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE(0, FPU_NEON_ARMV8 | FPU_VFP_ARMV8) |
ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA) |
#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8) |
#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \ |
| FPU_VFP_ARMV8) |
#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \ |
ARM_FEATURE(0, FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8) |
#define ARCH_CRC_ARMV8 ARM_FEATURE(0, CRC_EXT_ARMV8) |
ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8) |
#define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8) |
#define FPU_ARCH_NEON_VFP_ARMV8_1 \ |
ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \ |
| FPU_VFP_ARMV8 \ |
| FPU_NEON_EXT_RDMA) |
#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \ |
ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 \ |
| FPU_NEON_EXT_RDMA) |
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE) |
#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK) |
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE) |
#define ARM_ARCH_V1 ARM_FEATURE (ARM_AEXT_V1, 0) |
#define ARM_ARCH_V2 ARM_FEATURE (ARM_AEXT_V2, 0) |
#define ARM_ARCH_V2S ARM_FEATURE (ARM_AEXT_V2S, 0) |
#define ARM_ARCH_V3 ARM_FEATURE (ARM_AEXT_V3, 0) |
#define ARM_ARCH_V3M ARM_FEATURE (ARM_AEXT_V3M, 0) |
#define ARM_ARCH_V4xM ARM_FEATURE (ARM_AEXT_V4xM, 0) |
#define ARM_ARCH_V4 ARM_FEATURE (ARM_AEXT_V4, 0) |
#define ARM_ARCH_V4TxM ARM_FEATURE (ARM_AEXT_V4TxM, 0) |
#define ARM_ARCH_V4T ARM_FEATURE (ARM_AEXT_V4T, 0) |
#define ARM_ARCH_V5xM ARM_FEATURE (ARM_AEXT_V5xM, 0) |
#define ARM_ARCH_V5 ARM_FEATURE (ARM_AEXT_V5, 0) |
#define ARM_ARCH_V5TxM ARM_FEATURE (ARM_AEXT_V5TxM, 0) |
#define ARM_ARCH_V5T ARM_FEATURE (ARM_AEXT_V5T, 0) |
#define ARM_ARCH_V5TExP ARM_FEATURE (ARM_AEXT_V5TExP, 0) |
#define ARM_ARCH_V5TE ARM_FEATURE (ARM_AEXT_V5TE, 0) |
#define ARM_ARCH_V5TEJ ARM_FEATURE (ARM_AEXT_V5TEJ, 0) |
#define ARM_ARCH_V6 ARM_FEATURE (ARM_AEXT_V6, 0) |
#define ARM_ARCH_V6K ARM_FEATURE (ARM_AEXT_V6K, 0) |
#define ARM_ARCH_V6Z ARM_FEATURE (ARM_AEXT_V6Z, 0) |
#define ARM_ARCH_V6ZK ARM_FEATURE (ARM_AEXT_V6ZK, 0) |
#define ARM_ARCH_V6T2 ARM_FEATURE (ARM_AEXT_V6T2, 0) |
#define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0) |
#define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0) |
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0) |
#define ARM_ARCH_V6M ARM_FEATURE (ARM_AEXT_V6M, 0) |
#define ARM_ARCH_V6SM ARM_FEATURE (ARM_AEXT_V6SM, 0) |
#define ARM_ARCH_V7 ARM_FEATURE (ARM_AEXT_V7, 0) |
#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0) |
#define ARM_ARCH_V7VE ARM_FEATURE (ARM_AEXT_V7VE, 0) |
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0) |
#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0) |
#define ARM_ARCH_V7EM ARM_FEATURE (ARM_AEXT_V7EM, 0) |
#define ARM_ARCH_V8A ARM_FEATURE (ARM_AEXT_V8A, 0) |
#define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK) |
#define ARM_ARCH_V1 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1) |
#define ARM_ARCH_V2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2) |
#define ARM_ARCH_V2S ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S) |
#define ARM_ARCH_V3 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3) |
#define ARM_ARCH_V3M ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M) |
#define ARM_ARCH_V4xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM) |
#define ARM_ARCH_V4 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4) |
#define ARM_ARCH_V4TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM) |
#define ARM_ARCH_V4T ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T) |
#define ARM_ARCH_V5xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM) |
#define ARM_ARCH_V5 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5) |
#define ARM_ARCH_V5TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM) |
#define ARM_ARCH_V5T ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T) |
#define ARM_ARCH_V5TExP ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP) |
#define ARM_ARCH_V5TE ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE) |
#define ARM_ARCH_V5TEJ ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ) |
#define ARM_ARCH_V6 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6) |
#define ARM_ARCH_V6K ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K) |
#define ARM_ARCH_V6Z ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z) |
#define ARM_ARCH_V6KZ ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ) |
#define ARM_ARCH_V6T2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6T2) |
#define ARM_ARCH_V6KT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KT2) |
#define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6ZT2) |
#define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZT2) |
#define ARM_ARCH_V6M ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M) |
#define ARM_ARCH_V6SM ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM) |
#define ARM_ARCH_V7 ARM_FEATURE_CORE_LOW (ARM_AEXT_V7) |
#define ARM_ARCH_V7A ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A) |
#define ARM_ARCH_V7VE ARM_FEATURE_CORE_LOW (ARM_AEXT_V7VE) |
#define ARM_ARCH_V7R ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R) |
#define ARM_ARCH_V7M ARM_FEATURE_CORE_LOW (ARM_AEXT_V7M) |
#define ARM_ARCH_V7EM ARM_FEATURE_CORE_LOW (ARM_AEXT_V7EM) |
#define ARM_ARCH_V8A ARM_FEATURE_CORE_LOW (ARM_AEXT_V8A) |
#define ARM_ARCH_V8_1A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_EXT2_PAN) |
/* Some useful combinations: */ |
#define ARM_ARCH_NONE ARM_FEATURE (0, 0) |
#define FPU_NONE ARM_FEATURE (0, 0) |
#define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */ |
#define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) |
#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0) |
#define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0) |
#define FPU_NONE ARM_FEATURE_LOW (0, 0) |
#define ARM_ANY ARM_FEATURE (-1, -1, 0) /* Any basic core. */ |
#define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features. */ |
#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) |
#define ARM_ARCH_THUMB2 ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2 | ARM_EXT_V7 \ |
| ARM_EXT_V7A | ARM_EXT_V7R \ |
| ARM_EXT_V7M | ARM_EXT_DIV \ |
| ARM_EXT_V8) |
/* v7-a+sec. */ |
#define ARM_ARCH_V7A_SEC ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_SEC, 0) |
#define ARM_ARCH_V7A_SEC ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_SEC) |
/* v7-a+mp+sec. */ |
#define ARM_ARCH_V7A_MP_SEC \ |
ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, \ |
0) |
ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC) |
/* v7-r+idiv. */ |
#define ARM_ARCH_V7R_IDIV ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0) |
#define ARM_ARCH_V7R_IDIV ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R | ARM_EXT_ADIV) |
/* Features that are present in v6M and v6S-M but not other v6 cores. */ |
#define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0) |
#define ARM_ARCH_V6M_ONLY ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M_ONLY) |
/* v8-a+fp. */ |
#define ARM_ARCH_V8A_FP ARM_FEATURE (ARM_AEXT_V8A, FPU_ARCH_VFP_ARMV8) |
#define ARM_ARCH_V8A_FP ARM_FEATURE_LOW (ARM_AEXT_V8A, FPU_ARCH_VFP_ARMV8) |
/* v8-a+simd (implies fp). */ |
#define ARM_ARCH_V8A_SIMD ARM_FEATURE (ARM_AEXT_V8A, \ |
#define ARM_ARCH_V8A_SIMD ARM_FEATURE_LOW (ARM_AEXT_V8A, \ |
FPU_ARCH_NEON_VFP_ARMV8) |
/* v8-a+crypto (implies simd+fp). */ |
#define ARM_ARCH_V8A_CRYPTOV1 ARM_FEATURE (ARM_AEXT_V8A, \ |
#define ARM_ARCH_V8A_CRYPTOV1 ARM_FEATURE_LOW (ARM_AEXT_V8A, \ |
FPU_ARCH_CRYPTO_NEON_VFP_ARMV8) |
/* v8.1-a+fp. */ |
#define ARM_ARCH_V8_1A_FP ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_PAN, \ |
FPU_ARCH_VFP_ARMV8) |
/* v8.1-a+simd (implies fp). */ |
#define ARM_ARCH_V8_1A_SIMD ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_PAN, \ |
FPU_ARCH_NEON_VFP_ARMV8_1) |
/* v8.1-a+crypto (implies simd+fp). */ |
#define ARM_ARCH_V8_1A_CRYPTOV1 ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_PAN, \ |
FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1) |
/* There are too many feature bits to fit in a single word, so use a |
structure. For simplicity we put all core features in one word and |
everything else in the other. */ |
structure. For simplicity we put all core features in array CORE |
and everything else in the other. All the bits in element core[0] |
have been occupied, so new feature should use bit in element core[1] |
and use macro ARM_FEATURE to initialize the feature set variable. */ |
typedef struct |
{ |
unsigned long core; |
unsigned long core[2]; |
unsigned long coproc; |
} arm_feature_set; |
#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \ |
(((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0) |
(((CPU).core[0] & (FEAT).core[0]) != 0 \ |
|| ((CPU).core[1] & (FEAT).core[1]) != 0 \ |
|| ((CPU).coproc & (FEAT).coproc) != 0) |
#define ARM_CPU_IS_ANY(CPU) \ |
((CPU).core == ((arm_feature_set)ARM_ANY).core) |
((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \ |
&& (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1]) |
#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \ |
do { \ |
(TARG).core = (F1).core | (F2).core; \ |
(TARG).core[0] = (F1).core[0] | (F2).core[0];\ |
(TARG).core[1] = (F1).core[1] | (F2).core[1];\ |
(TARG).coproc = (F1).coproc | (F2).coproc; \ |
} while (0) |
#define ARM_CLEAR_FEATURE(TARG,F1,F2) \ |
do { \ |
(TARG).core = (F1).core &~ (F2).core; \ |
(TARG).core[0] = (F1).core[0] &~ (F2).core[0];\ |
(TARG).core[1] = (F1).core[1] &~ (F2).core[1];\ |
(TARG).coproc = (F1).coproc &~ (F2).coproc; \ |
} while (0) |
#define ARM_FEATURE(core, coproc) {(core), (coproc)} |
#define ARM_FEATURE_COPY(F1, F2) \ |
do { \ |
(F1).core[0] = (F2).core[0]; \ |
(F1).core[1] = (F2).core[1]; \ |
(F1).coproc = (F2).coproc; \ |
} while (0) |
#define ARM_FEATURE_EQUAL(T1,T2) \ |
((T1).core[0] == (T2).core[0] \ |
&& (T1).core[1] == (T2).core[1] \ |
&& (T1).coproc == (T2).coproc) |
#define ARM_FEATURE_ZERO(T) \ |
((T).core[0] == 0 && (T).core[1] == 0 && (T).coproc == 0) |
#define ARM_FEATURE_CORE_EQUAL(T1, T2) \ |
((T1).core[0] == (T2).core[0] && (T1).core[1] == (T2).core[1]) |
#define ARM_FEATURE_LOW(core, coproc) {{(core), 0}, (coproc)} |
#define ARM_FEATURE_CORE(core1, core2) {{(core1), (core2)}, 0} |
#define ARM_FEATURE_CORE_LOW(core) {{(core), 0}, 0} |
#define ARM_FEATURE_CORE_HIGH(core) {{0, (core)}, 0} |
#define ARM_FEATURE_COPROC(coproc) {{0, 0}, (coproc)} |
#define ARM_FEATURE(core1, core2, coproc) {{(core1), (core2)}, (coproc)} |
/contrib/toolchain/binutils/include/opcode/avr.h |
---|
1,6 → 1,6 |
/* Opcode table for the Atmel AVR micro controllers. |
Copyright 2000, 2001, 2004, 2006, 2008, 2010, 2012 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Denis Chertykov <denisc@overta.ru> |
This program is free software; you can redistribute it and/or modify |
22,6 → 22,7 |
#define AVR_ISA_LPM 0x0002 /* device has LPM */ |
#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */ |
#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */ |
#define AVR_ISA_TINY 0x0010 /* device has Tiny core specific encodings */ |
#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL |
supported, no 8K wrap on RJMP and RCALL) */ |
#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */ |
37,6 → 38,7 |
#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) |
#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) |
#define AVR_ISA_2xxxa (AVR_ISA_1200 | AVR_ISA_SRAM) |
/* For the attiny26 which is missing LPM Rd,Z+. */ |
#define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX) |
#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX) |
72,6 → 74,9 |
AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \ |
AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW) |
#define AVR_ISA_AVRTINY (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM | \ |
AVR_ISA_TINY) |
#define REGISTER_P(x) ((x) == 'r' \ |
|| (x) == 'd' \ |
|| (x) == 'w' \ |
94,7 → 99,7 |
`ld r,b' or `st b,r' respectively - next opcode entry)? */ |
#define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000) |
/* constraint letters |
/* Constraint letters: |
r - any register |
d - `ldi' register (r16-r31) |
v - `movw' even register (r0, r2, ..., r28, r30) |
110,6 → 115,7 |
p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis) |
K - immediate value from 0 to 63 (used in `adiw', `sbiw') |
i - immediate value |
j - 7 bit immediate value from 0x40 to 0xBF (for 16-bit 'lds'/'sts') |
l - signed pc relative offset from -64 to 63 |
L - signed pc relative offset from -2048 to 2047 |
h - absolute code address (call, jmp) |
160,8 → 166,8 |
AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488) |
AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408) |
AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509) |
AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409) |
AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxxa,0x9509) |
AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxxa,0x9409) |
AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8) |
AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004) |
261,8 → 267,8 |
AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403) |
AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406) |
AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401) |
AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f) |
AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f) |
AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxxa,0x900f) |
AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxxa,0x920f) |
AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407) |
AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402) |
280,7 → 286,9 |
AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380) |
AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388) |
AVR_INSN (sts, "j,d", "10101kkkddddkkkk", 1, AVR_ISA_TINY, 0xA800) |
AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200) |
AVR_INSN (lds, "d,j", "10100kkkddddkkkk", 1, AVR_ISA_TINY, 0xA000) |
AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000) |
/* Special case for b+0, `e' must be next entry after `b', |
295,6 → 303,6 |
AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519) |
AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419) |
/* DES instruction for encryption and decryption */ |
/* DES instruction for encryption and decryption. */ |
AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B) |
/contrib/toolchain/binutils/include/opcode/bfin.h |
---|
1,5 → 1,5 |
/* bfin.h -- Header file for ADI Blackfin opcode table |
Copyright 2005, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 2005-2015 Free Software Foundation, Inc. |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/cgen.h |
---|
1,7 → 1,6 |
/* Header file for targets using CGEN: Cpu tools GENerator. |
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
This file is part of GDB, the GNU debugger, and the GNU Binutils. |
28,6 → 27,10 |
/* ??? IWBN to replace bfd in the name. */ |
#include "bfd_stdint.h" |
#ifdef __cplusplus |
extern "C" { |
#endif |
/* ??? This file requires bfd.h but only to get bfd_vma. |
Seems like an awful lot to require just to get such a fundamental type. |
Perhaps the definition of bfd_vma can be moved outside of bfd.h. |
1477,4 → 1480,8 |
/* Will an error message be generated if a signed field in an instruction overflows ? */ |
extern unsigned int cgen_signed_overflow_ok_p (CGEN_CPU_DESC); |
#ifdef __cplusplus |
} |
#endif |
#endif /* OPCODE_CGEN_H */ |
/contrib/toolchain/binutils/include/opcode/convex.h |
---|
1,5 → 1,5 |
/* Information for instruction disassembly on the Convex. |
Copyright 1989, 1993, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/opcode/cr16.h |
---|
1,5 → 1,5 |
/* cr16.h -- Header file for CR16 opcode and register tables. |
Copyright 2007, 2008, 2010, 2013 Free Software Foundation, Inc. |
Copyright (C) 2007-2015 Free Software Foundation, Inc. |
Contributed by M R Swami Reddy |
This file is part of GAS, GDB and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/cris.h |
---|
1,5 → 1,5 |
/* cris.h -- Header file for CRIS opcode and register tables. |
Copyright (C) 2000, 2001, 2004, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Axis Communications AB, Lund, Sweden. |
Originally written for GAS 1.38.1 by Mikael Asker. |
Updated, BFDized and GNUified by Hans-Peter Nilsson. |
/contrib/toolchain/binutils/include/opcode/crx.h |
---|
1,5 → 1,5 |
/* crx.h -- Header file for CRX opcode and register tables. |
Copyright 2004, 2010, 2012 Free Software Foundation, Inc. |
Copyright (C) 2004-2015 Free Software Foundation, Inc. |
Contributed by Tomer Levi, NSC, Israel. |
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel. |
Updates, BFDizing, GNUifying and ELF support by Tomer Levi. |
/contrib/toolchain/binutils/include/opcode/d10v.h |
---|
1,6 → 1,5 |
/* d10v.h -- Header file for D10V opcode table |
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Written by Martin Hunt (hunt@cygnus.com), Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/d30v.h |
---|
1,6 → 1,5 |
/* d30v.h -- Header file for D30V opcode table |
Copyright 1997, 1998, 1999, 2000, 2001, 2003, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1997-2015 Free Software Foundation, Inc. |
Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/dlx.h |
---|
1,5 → 1,5 |
/* Table of opcodes for the DLX microprocess. |
Copyright 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
This file is part of GDB and GAS. |
/contrib/toolchain/binutils/include/opcode/ft32.h |
---|
0,0 → 1,106 |
/* Definitions for decoding the ft32 opcode table. |
Copyright (C) 2013-2015 Free Software Foundation, Inc. |
Contributed by FTDI (support@ftdichip.com) |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 2 of the License, or |
(at your option) any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
02110-1301, USA. */ |
typedef struct ft32_opc_info_t |
{ |
const char *name; |
int dw; |
unsigned int mask; |
unsigned int bits; |
int fields; |
} ft32_opc_info_t; |
#define FT32_PAT_ALUOP 0x08 |
#define FT32_PAT_LDA 0x18 |
#define FT32_PAT_TOCI 0x01 |
#define FT32_PAT_CMPOP 0x0b |
#define FT32_PAT_STA 0x17 |
#define FT32_PAT_EXA 0x07 |
#define FT32_PAT_LDK 0x0c |
#define FT32_PAT_FFUOP 0x1e |
#define FT32_PAT_LDI 0x15 |
#define FT32_PAT_STI 0x16 |
#define FT32_PAT_EXI 0x1d |
#define FT32_PAT_POP 0x11 |
#define FT32_PAT_LPM 0x0d |
#define FT32_PAT_LINK 0x12 |
#define FT32_PAT_TOC 0x00 |
#define FT32_PAT_PUSH 0x10 |
#define FT32_PAT_RETURN 0x14 |
#define FT32_PAT_UNLINK 0x13 |
#define FT32_PAT_LPMI 0x19 |
#define FT32_FLD_CBCRCV (1 << 0) |
#define FT32_FLD_INT (1 << 1) |
#define FT32_FLD_INT_BIT 26 |
#define FT32_FLD_INT_SIZ 1 |
#define FT32_FLD_DW (1 << 2) |
#define FT32_FLD_DW_BIT 25 |
#define FT32_FLD_DW_SIZ 2 |
#define FT32_FLD_CB (1 << 3) |
#define FT32_FLD_CB_BIT 22 |
#define FT32_FLD_CB_SIZ 5 |
#define FT32_FLD_R_D (1 << 4) |
#define FT32_FLD_R_D_BIT 20 |
#define FT32_FLD_R_D_SIZ 5 |
#define FT32_FLD_CR (1 << 5) |
#define FT32_FLD_CR_BIT 20 |
#define FT32_FLD_CR_SIZ 2 |
#define FT32_FLD_CV (1 << 6) |
#define FT32_FLD_CV_BIT 19 |
#define FT32_FLD_CV_SIZ 1 |
#define FT32_FLD_BT (1 << 7) |
#define FT32_FLD_BT_BIT 18 |
#define FT32_FLD_BT_SIZ 1 |
#define FT32_FLD_R_1 (1 << 8) |
#define FT32_FLD_R_1_BIT 15 |
#define FT32_FLD_R_1_SIZ 5 |
#define FT32_FLD_RIMM (1 << 9) |
#define FT32_FLD_RIMM_BIT 4 |
#define FT32_FLD_RIMM_SIZ 11 |
#define FT32_FLD_R_2 (1 << 10) |
#define FT32_FLD_R_2_BIT 4 |
#define FT32_FLD_R_2_SIZ 5 |
#define FT32_FLD_K20 (1 << 11) |
#define FT32_FLD_K20_BIT 0 |
#define FT32_FLD_K20_SIZ 20 |
#define FT32_FLD_PA (1 << 12) |
#define FT32_FLD_PA_BIT 0 |
#define FT32_FLD_PA_SIZ 18 |
#define FT32_FLD_AA (1 << 13) |
#define FT32_FLD_AA_BIT 0 |
#define FT32_FLD_AA_SIZ 17 |
#define FT32_FLD_K16 (1 << 14) |
#define FT32_FLD_K16_BIT 0 |
#define FT32_FLD_K16_SIZ 16 |
#define FT32_FLD_K8 (1 << 15) |
#define FT32_FLD_K8_BIT 0 |
#define FT32_FLD_K8_SIZ 8 |
#define FT32_FLD_AL (1 << 16) |
#define FT32_FLD_AL_BIT 0 |
#define FT32_FLD_AL_SIZ 4 |
#define FT32_IS_CALL(inst) (((inst) & 0xfffc0000) == 0x00340000) |
#define FT32_IS_PUSH(inst) (((inst) & 0xfff00000) == 0x84000000) |
#define FT32_PUSH_REG(inst) (((inst) >> 15) & 0x1f) |
#define FT32_IS_LINK(inst) (((inst) & 0xffff0000) == 0x95d00000) |
#define FT32_LINK_SIZE(inst) ((inst) & 0xffff) |
#define FT32_FLD_R_D_POST (1 << 17) |
#define FT32_FLD_R_1_POST (1 << 18) |
/contrib/toolchain/binutils/include/opcode/h8300.h |
---|
1,5 → 1,5 |
/* Opcode table for the H8/300 |
Copyright 1991-2013 Free Software Foundation, Inc. |
Copyright (C) 1991-2015 Free Software Foundation, Inc. |
Written by Steve Chamberlain <sac@cygnus.com>. |
This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. |
/contrib/toolchain/binutils/include/opcode/hppa.h |
---|
1,7 → 1,5 |
/* Table of opcodes for the PA-RISC. |
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, |
2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1990-2015 Free Software Foundation, Inc. |
Contributed by the Center for Software Science at the |
University of Utah (pa-gdb-bugs@cs.utah.edu). |
/contrib/toolchain/binutils/include/opcode/i370.h |
---|
1,6 → 1,5 |
/* i370.h -- Header file for S/390 opcode table |
Copyright 1994, 1995, 1998, 1999, 2000, 2003, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1994-2015 Free Software Foundation, Inc. |
PowerPC version written by Ian Lance Taylor, Cygnus Support |
Rewritten for i370 ESA/390 support, Linas Vepstas <linas@linas.org> |
/contrib/toolchain/binutils/include/opcode/i386.h |
---|
1,7 → 1,5 |
/* opcode/i386.h -- Intel 80386 opcode macros |
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. |
/contrib/toolchain/binutils/include/opcode/i860.h |
---|
1,6 → 1,5 |
/* Table of opcodes for the i860. |
Copyright 1989, 1991, 2000, 2002, 2003, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. |
/contrib/toolchain/binutils/include/opcode/i960.h |
---|
1,6 → 1,6 |
/* Basic 80960 instruction formats. |
Copyright 2001-2013 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/ia64.h |
---|
1,6 → 1,5 |
/* ia64.h -- Header file for ia64 opcode table |
Copyright (C) 1998, 1999, 2000, 2002, 2005, 2006, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/opcode/m68hc11.h |
---|
1,6 → 1,5 |
/* m68hc11.h -- Header file for Motorola 68HC11 & 68HC12 opcode table |
Copyright 1999, 2000, 2002, 2003, 2010, 2012 |
Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
Written by Stephane Carrez (stcarrez@nerim.fr) |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/m68k.h |
---|
1,6 → 1,5 |
/* Opcode table header for m680[01234]0/m6888[12]/m68851. |
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001, |
2003, 2004, 2006, 2010 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/m88k.h |
---|
1,6 → 1,5 |
/* Table of opcodes for the Motorola M88k family. |
Copyright 1989, 1990, 1991, 1993, 2001, 2002, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GDB and GAS. |
/contrib/toolchain/binutils/include/opcode/metag.h |
---|
1,5 → 1,5 |
/* Imagination Technologies Meta opcode table. |
Copyright (C) 2013 Free Software Foundation, Inc. |
Copyright (C) 2013-2015 Free Software Foundation, Inc. |
Contributed by Imagination Technologies Ltd. |
This file is part of GDB and GAS. |
/contrib/toolchain/binutils/include/opcode/mips.h |
---|
1,7 → 1,5 |
/* mips.h. Mips opcode list for GDB, the GNU debugger. |
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
2003, 2004, 2005, 2008, 2009, 2010, 2013 |
Free Software Foundation, Inc. |
Copyright (C) 1993-2015 Free Software Foundation, Inc. |
Contributed by Ralph Campbell and OSF |
Commented and modified by Ian Lance Taylor, Cygnus Support |
413,7 → 411,23 |
/* Like OP_VU0_SUFFIX, but used when the operand's value has already |
been set. Any suffix used here must match the previous value. */ |
OP_VU0_MATCH_SUFFIX |
OP_VU0_MATCH_SUFFIX, |
/* An index selected by an integer, e.g. [1]. */ |
OP_IMM_INDEX, |
/* An index selected by a register, e.g. [$2]. */ |
OP_REG_INDEX, |
/* The operand spans two 5-bit register fields, both of which must be set to |
the source register. */ |
OP_SAME_RS_RT, |
/* Described by mips_prev_operand. */ |
OP_CHECK_PREV, |
/* A register operand that must not be zero. */ |
OP_NON_ZERO_REG |
}; |
/* Enumerates the types of MIPS register. */ |
454,7 → 468,13 |
OP_REG_R5900_I, |
OP_REG_R5900_Q, |
OP_REG_R5900_R, |
OP_REG_R5900_ACC |
OP_REG_R5900_ACC, |
/* MSA registers $w0-$w31. */ |
OP_REG_MSA, |
/* MSA control registers $0-$31. */ |
OP_REG_MSA_CTRL |
}; |
/* Base class for all operands. */ |
543,6 → 563,18 |
const unsigned char *reg_map; |
}; |
/* Describes an operand that which must match a condition based on the |
previous operand. */ |
struct mips_check_prev_operand |
{ |
struct mips_operand root; |
bfd_boolean greater_than_ok; |
bfd_boolean less_than_ok; |
bfd_boolean equal_ok; |
bfd_boolean zero_ok; |
}; |
/* Describes an operand that encodes a pair of registers. */ |
struct mips_reg_pair_operand |
{ |
891,6 → 923,54 |
Enhanced VA Scheme: |
"+j" 9-bit signed offset in bit 7 (OP_*_EVAOFFSET) |
MSA Extension: |
"+d" 5-bit MSA register (FD) |
"+e" 5-bit MSA register (FS) |
"+h" 5-bit MSA register (FT) |
"+k" 5-bit GPR at bit 6 |
"+l" 5-bit MSA control register at bit 6 |
"+n" 5-bit MSA control register at bit 11 |
"+o" 4-bit vector element index at bit 16 |
"+u" 3-bit vector element index at bit 16 |
"+v" 2-bit vector element index at bit 16 |
"+w" 1-bit vector element index at bit 16 |
"+T" (-512 .. 511) << 0 at bit 16 |
"+U" (-512 .. 511) << 1 at bit 16 |
"+V" (-512 .. 511) << 2 at bit 16 |
"+W" (-512 .. 511) << 3 at bit 16 |
"+~" 2 bit LSA/DLSA shift amount from 1 to 4 at bit 6 |
"+!" 3 bit unsigned bit position at bit 16 |
"+@" 4 bit unsigned bit position at bit 16 |
"+#" 6 bit unsigned bit position at bit 16 |
"+$" 5 bit unsigned immediate at bit 16 |
"+%" 5 bit signed immediate at bit 16 |
"+^" 10 bit signed immediate at bit 11 |
"+&" 0 vector element index |
"+*" 5-bit register vector element index at bit 16 |
"+|" 8-bit mask at bit 16 |
MIPS R6: |
"+:" 11-bit mask at bit 0 |
"+'" 26 bit PC relative branch target address |
"+"" 21 bit PC relative branch target address |
"+;" 5 bit same register in both OP_*_RS and OP_*_RT |
"+I" 2bit unsigned bit position at bit 6 |
"+O" 3bit unsigned bit position at bit 6 |
"+R" must be program counter |
"-a" (-262144 .. 262143) << 2 at bit 0 |
"-b" (-131072 .. 131071) << 3 at bit 0 |
"-d" Same as destination register GP |
"-s" 5 bit source register specifier (OP_*_RS) not $0 |
"-t" 5 bit source register specifier (OP_*_RT) not $0 |
"-u" 5 bit source register specifier (OP_*_RT) greater than OP_*_RS |
"-v" 5 bit source register specifier (OP_*_RT) not $0 not OP_*_RS |
"-w" 5 bit source register specifier (OP_*_RT) less than or equal to OP_*_RS |
"-x" 5 bit source register specifier (OP_*_RT) greater than or |
equal to OP_*_RS |
"-y" 5 bit source register specifier (OP_*_RT) not $0 less than OP_*_RS |
"-A" symbolic offset (-262144 .. 262143) << 2 at bit 0 |
"-B" symbolic offset (-131072 .. 131071) << 3 at bit 0 |
Other: |
"()" parens surrounding optional value |
"," separates operands |
898,7 → 978,7 |
Characters used so far, for quick reference when adding more: |
"1234567890" |
"%[]<>(),+:'@!#$*&\~" |
"%[]<>(),+-:'@!#$*&\~" |
"ABCDEFGHIJKLMNOPQRSTUVWXYZ" |
"abcdefghijklopqrstuvwxz" |
905,8 → 985,14 |
Extension character sequences used so far ("+" followed by the |
following), for quick reference when adding more: |
"1234567890" |
"ABCEFGHJKLMNPQSXZ" |
"abcfgijmpqrstxyz" |
"~!@#$%^&*|:'";" |
"ABCEFGHIJKLMNOPQRSTUVWXZ" |
"abcdefghijklmnopqrstuvwxyz" |
Extension character sequences used so far ("-" followed by the |
following), for quick reference when adding more: |
"AB" |
"abdstuvwxy" |
*/ |
/* These are the bits which may be set in the pinfo field of an |
934,10 → 1020,10 |
#define INSN_TLB 0x00000200 |
/* Reads coprocessor register other than floating point register. */ |
#define INSN_COP 0x00000400 |
/* Instruction loads value from memory, requiring delay. */ |
#define INSN_LOAD_MEMORY_DELAY 0x00000800 |
/* Instruction loads value from coprocessor, requiring delay. */ |
#define INSN_LOAD_COPROC_DELAY 0x00001000 |
/* Instruction loads value from memory. */ |
#define INSN_LOAD_MEMORY 0x00000800 |
/* Instruction loads value from coprocessor, (may require delay). */ |
#define INSN_LOAD_COPROC 0x00001000 |
/* Instruction has unconditional branch delay slot. */ |
#define INSN_UNCOND_BRANCH_DELAY 0x00002000 |
/* Instruction has conditional branch delay slot. */ |
944,8 → 1030,8 |
#define INSN_COND_BRANCH_DELAY 0x00004000 |
/* Conditional branch likely: if branch not taken, insn nullified. */ |
#define INSN_COND_BRANCH_LIKELY 0x00008000 |
/* Moves to coprocessor register, requiring delay. */ |
#define INSN_COPROC_MOVE_DELAY 0x00010000 |
/* Moves to coprocessor register, (may require delay). */ |
#define INSN_COPROC_MOVE 0x00010000 |
/* Loads coprocessor register from memory, requiring delay. */ |
#define INSN_COPROC_MEMORY_DELAY 0x00020000 |
/* Reads the HI register. */ |
1014,6 → 1100,8 |
#define INSN2_READ_GPR_16 0x00002000 |
/* Has an "\.x?y?z?w?" suffix based on mips_vu0_channel_mask. */ |
#define INSN2_VU0_CHANNEL_SUFFIX 0x00004000 |
/* Instruction has a forbidden slot. */ |
#define INSN2_FORBIDDEN_SLOT 0x00008000 |
/* Masks used to mark instructions to indicate which MIPS ISA level |
they were introduced in. INSN_ISA_MASK masks an enumeration that |
1021,7 → 1109,7 |
word constructed using these macros is a bitmask of the remaining |
INSN_* values below. */ |
#define INSN_ISA_MASK 0x0000000ful |
#define INSN_ISA_MASK 0x0000001ful |
/* We cannot start at zero due to ISA_UNKNOWN below. */ |
#define INSN_ISA1 1 |
1031,29 → 1119,76 |
#define INSN_ISA5 5 |
#define INSN_ISA32 6 |
#define INSN_ISA32R2 7 |
#define INSN_ISA64 8 |
#define INSN_ISA64R2 9 |
#define INSN_ISA32R3 8 |
#define INSN_ISA32R5 9 |
#define INSN_ISA32R6 10 |
#define INSN_ISA64 11 |
#define INSN_ISA64R2 12 |
#define INSN_ISA64R3 13 |
#define INSN_ISA64R5 14 |
#define INSN_ISA64R6 15 |
/* Below this point the INSN_* values correspond to combinations of ISAs. |
They are only for use in the opcodes table to indicate membership of |
a combination of ISAs that cannot be expressed using the usual inclusion |
ordering on the above INSN_* values. */ |
#define INSN_ISA3_32 10 |
#define INSN_ISA3_32R2 11 |
#define INSN_ISA4_32 12 |
#define INSN_ISA4_32R2 13 |
#define INSN_ISA5_32R2 14 |
#define INSN_ISA3_32 16 |
#define INSN_ISA3_32R2 17 |
#define INSN_ISA4_32 18 |
#define INSN_ISA4_32R2 19 |
#define INSN_ISA5_32R2 20 |
/* Given INSN_ISA* values X and Y, where X ranges over INSN_ISA1 through |
INSN_ISA5_32R2 and Y ranges over INSN_ISA1 through INSN_ISA64R2, |
this table describes whether at least one of the ISAs described by X |
is/are implemented by ISA Y. (Think of Y as the ISA level supported by |
a particular core and X as the ISA level(s) at which a certain instruction |
is defined.) The ISA(s) described by X is/are implemented by Y iff |
(mips_isa_table[(Y & INSN_ISA_MASK) - 1] >> ((X & INSN_ISA_MASK) - 1)) & 1 |
is non-zero. */ |
static const unsigned int mips_isa_table[] = |
{ 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff }; |
/* The R6 definitions shown below state that they support all previous ISAs. |
This is not actually true as some instructions are removed in R6. |
The problem is that the removed instructions in R6 come from different |
ISAs. One approach to solve this would be to describe in the membership |
field of the opcode table the different ISAs an instruction belongs to. |
This would require us to create a large amount of different ISA |
combinations which is hard to manage. A cleaner approach (which is |
implemented here) is to say that R6 is an extension of R5 and then to |
deal with the removed instructions by adding instruction exclusions |
for R6 in the opcode table. */ |
/* Bit INSN_ISA<X> - 1 of INSN_UPTO<Y> is set if ISA Y includes ISA X. */ |
#define ISAF(X) (1 << (INSN_ISA##X - 1)) |
#define INSN_UPTO1 ISAF(1) |
#define INSN_UPTO2 INSN_UPTO1 | ISAF(2) |
#define INSN_UPTO3 INSN_UPTO2 | ISAF(3) | ISAF(3_32) | ISAF(3_32R2) |
#define INSN_UPTO4 INSN_UPTO3 | ISAF(4) | ISAF(4_32) | ISAF(4_32R2) |
#define INSN_UPTO5 INSN_UPTO4 | ISAF(5) | ISAF(5_32R2) |
#define INSN_UPTO32 INSN_UPTO2 | ISAF(32) | ISAF(3_32) | ISAF(4_32) |
#define INSN_UPTO32R2 INSN_UPTO32 | ISAF(32R2) \ |
| ISAF(3_32R2) | ISAF(4_32R2) | ISAF(5_32R2) |
#define INSN_UPTO32R3 INSN_UPTO32R2 | ISAF(32R3) |
#define INSN_UPTO32R5 INSN_UPTO32R3 | ISAF(32R5) |
#define INSN_UPTO32R6 INSN_UPTO32R5 | ISAF(32R6) |
#define INSN_UPTO64 INSN_UPTO5 | ISAF(64) | ISAF(32) |
#define INSN_UPTO64R2 INSN_UPTO64 | ISAF(64R2) | ISAF(32R2) |
#define INSN_UPTO64R3 INSN_UPTO64R2 | ISAF(64R3) | ISAF(32R3) |
#define INSN_UPTO64R5 INSN_UPTO64R3 | ISAF(64R5) | ISAF(32R5) |
#define INSN_UPTO64R6 INSN_UPTO64R5 | ISAF(64R6) | ISAF(32R6) |
/* The same information in table form: bit INSN_ISA<X> - 1 of index |
INSN_UPTO<Y> - 1 is set if ISA Y includes ISA X. */ |
static const unsigned int mips_isa_table[] = { |
INSN_UPTO1, |
INSN_UPTO2, |
INSN_UPTO3, |
INSN_UPTO4, |
INSN_UPTO5, |
INSN_UPTO32, |
INSN_UPTO32R2, |
INSN_UPTO32R3, |
INSN_UPTO32R5, |
INSN_UPTO32R6, |
INSN_UPTO64, |
INSN_UPTO64R2, |
INSN_UPTO64R3, |
INSN_UPTO64R5, |
INSN_UPTO64R6 |
}; |
#undef ISAF |
/* Masks used for Chip specific instructions. */ |
#define INSN_CHIP_MASK 0xc3ff0f20 |
1061,6 → 1196,7 |
#define INSN_OCTEON 0x00000800 |
#define INSN_OCTEONP 0x00000200 |
#define INSN_OCTEON2 0x00000100 |
#define INSN_OCTEON3 0x00000040 |
/* MIPS R5900 instruction */ |
#define INSN_5900 0x00004000 |
1115,6 → 1251,11 |
/* Virtualization ASE */ |
#define ASE_VIRT 0x00000200 |
#define ASE_VIRT64 0x00000400 |
/* MSA Extension */ |
#define ASE_MSA 0x00000800 |
#define ASE_MSA64 0x00001000 |
/* eXtended Physical Address (XPA) Extension. */ |
#define ASE_XPA 0x00002000 |
/* MIPS ISA defines, use instead of hardcoding ISA level. */ |
1129,8 → 1270,14 |
#define ISA_MIPS64 INSN_ISA64 |
#define ISA_MIPS32R2 INSN_ISA32R2 |
#define ISA_MIPS32R3 INSN_ISA32R3 |
#define ISA_MIPS32R5 INSN_ISA32R5 |
#define ISA_MIPS64R2 INSN_ISA64R2 |
#define ISA_MIPS64R3 INSN_ISA64R3 |
#define ISA_MIPS64R5 INSN_ISA64R5 |
#define ISA_MIPS32R6 INSN_ISA32R6 |
#define ISA_MIPS64R6 INSN_ISA64R6 |
/* CPU defines, use instead of hardcoding processor number. Keep this |
in sync with bfd/archures.c in order for machine selection to work. */ |
1161,9 → 1308,15 |
#define CPU_MIPS16 16 |
#define CPU_MIPS32 32 |
#define CPU_MIPS32R2 33 |
#define CPU_MIPS32R3 34 |
#define CPU_MIPS32R5 36 |
#define CPU_MIPS32R6 37 |
#define CPU_MIPS5 5 |
#define CPU_MIPS64 64 |
#define CPU_MIPS64R2 65 |
#define CPU_MIPS64R3 66 |
#define CPU_MIPS64R5 68 |
#define CPU_MIPS64R6 69 |
#define CPU_SB1 12310201 /* octal 'SB', 01. */ |
#define CPU_LOONGSON_2E 3001 |
#define CPU_LOONGSON_2F 3002 |
1171,6 → 1324,7 |
#define CPU_OCTEON 6501 |
#define CPU_OCTEONP 6601 |
#define CPU_OCTEON2 6502 |
#define CPU_OCTEON3 6503 |
#define CPU_XLR 887682 /* decimal 'XLR' */ |
/* Return true if the given CPU is included in INSN_* mask MASK. */ |
1236,9 → 1390,19 |
case CPU_OCTEON2: |
return (mask & INSN_OCTEON2) != 0; |
case CPU_OCTEON3: |
return (mask & INSN_OCTEON3) != 0; |
case CPU_XLR: |
return (mask & INSN_XLR) != 0; |
case CPU_MIPS32R6: |
return (mask & INSN_ISA_MASK) == INSN_ISA32R6; |
case CPU_MIPS64R6: |
return ((mask & INSN_ISA_MASK) == INSN_ISA32R6) |
|| ((mask & INSN_ISA_MASK) == INSN_ISA64R6); |
default: |
return FALSE; |
} |
1976,7 → 2140,6 |
"y" 5-bit source 3 register for ALNV.PS (MICROMIPSOP_*_RS3) |
"z" must be zero register |
"C" 23-bit coprocessor function code (MICROMIPSOP_*_COPZ) |
"B" 10-bit syscall/wait function code (MICROMIPSOP_*_CODE10) |
"K" 5-bit Hardware Register (RDHWR instruction) (MICROMIPSOP_*_RS) |
"+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position, which becomes |
2001,6 → 2164,8 |
"+H" 5-bit DEXTU size, which becomes MSBD (MICROMIPSOP_*_EXTMSBD). |
Requires that "+A" or "+E" occur first to set position. |
Enforces: 32 < (pos+size) <= 64. |
"+J" 10-bit SYSCALL/WAIT/SDBBP/HYPCALL function code |
(MICROMIPSOP_*_CODE10) |
PC-relative addition (ADDIUPC) instruction: |
"mQ" 23-bit offset (-4194304 .. 4194303) << 2 (MICROMIPSOP_*_IMMQ) |
2044,6 → 2209,33 |
microMIPS Enhanced VA Scheme: |
"+j" 9-bit signed offset in bit 0 (OP_*_EVAOFFSET) |
MSA Extension: |
"+d" 5-bit MSA register (FD) |
"+e" 5-bit MSA register (FS) |
"+h" 5-bit MSA register (FT) |
"+k" 5-bit GPR at bit 6 |
"+l" 5-bit MSA control register at bit 6 |
"+n" 5-bit MSA control register at bit 11 |
"+o" 4-bit vector element index at bit 16 |
"+u" 3-bit vector element index at bit 16 |
"+v" 2-bit vector element index at bit 16 |
"+w" 1-bit vector element index at bit 16 |
"+x" 5-bit shift amount at bit 16 |
"+T" (-512 .. 511) << 0 at bit 16 |
"+U" (-512 .. 511) << 1 at bit 16 |
"+V" (-512 .. 511) << 2 at bit 16 |
"+W" (-512 .. 511) << 3 at bit 16 |
"+~" 2 bit LSA/DLSA shift amount from 1 to 4 at bit 6 |
"+!" 3 bit unsigned bit position at bit 16 |
"+@" 4 bit unsigned bit position at bit 16 |
"+#" 6 bit unsigned bit position at bit 16 |
"+$" 5 bit unsigned immediate at bit 16 |
"+%" 5 bit signed immediate at bit 16 |
"+^" 10 bit signed immediate at bit 11 |
"+&" 0 vector element index |
"+*" 5-bit register vector element index at bit 16 |
"+|" 8-bit mask at bit 16 |
Other: |
"()" parens surrounding optional value |
"," separates operands |
2052,7 → 2244,7 |
Characters used so far, for quick reference when adding more: |
"12345678 0" |
"<>(),+.@\^|~" |
"<>(),+-.@\^|~" |
"ABCDEFGHI KLMN RST V " |
"abcd f hijklmnopqrstuvw yz" |
2059,9 → 2251,9 |
Extension character sequences used so far ("+" followed by the |
following), for quick reference when adding more: |
"" |
"" |
"ABCEFGH" |
"ij" |
"~!@#$%^&*|" |
"ABCEFGHJTUVW" |
"dehijklnouvwx" |
Extension character sequences used so far ("m" followed by the |
following), for quick reference when adding more: |
2069,6 → 2261,12 |
"" |
" BCDEFGHIJ LMNOPQ U WXYZ" |
" bcdefghij lmn pq st xyz" |
Extension character sequences used so far ("-" followed by the |
following), for quick reference when adding more: |
"" |
"" |
<none so far> |
*/ |
extern const struct mips_operand *decode_micromips_operand (const char *); |
/contrib/toolchain/binutils/include/opcode/mmix.h |
---|
1,5 → 1,5 |
/* mmix.h -- Header file for MMIX opcode table |
Copyright (C) 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
Written by Hans-Peter Nilsson (hp@bitrange.com) |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/mn10200.h |
---|
1,5 → 1,5 |
/* mn10200.h -- Header file for Matsushita 10200 opcode table |
Copyright 1996, 1997, 2010 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Written by Jeff Law, Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/mn10300.h |
---|
1,5 → 1,5 |
/* mn10300.h -- Header file for Matsushita 10300 opcode table |
Copyright 1996, 1997, 1998, 1999, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Written by Jeff Law, Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/moxie.h |
---|
1,5 → 1,5 |
/* Definitions for decoding the moxie opcode table. |
Copyright 2009 Free Software Foundation, Inc. |
Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Contributed by Anthony Green (green@moxielogic.com). |
This program is free software; you can redistribute it and/or modify |
28,8 → 28,8 |
Some use B and an indirect A (MOXIE_F1_AiB) |
Some use A and an indirect B (MOXIE_F1_ABi) |
Some consume a 4 byte immediate value and use X (MOXIE_F1_4A) |
Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4) |
Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4) |
Some use B and an indirect A plus 2 byte offset (MOXIE_F1_AiB2) |
Some use A and an indirect B plus 2 byte offset (MOXIE_F1_ABi2) |
Form 2 instructions also come in different flavors: |
50,8 → 50,8 |
#define MOXIE_F1_AiB 0x106 |
#define MOXIE_F1_ABi 0x107 |
#define MOXIE_F1_4A 0x108 |
#define MOXIE_F1_AiB4 0x109 |
#define MOXIE_F1_ABi4 0x10a |
#define MOXIE_F1_AiB2 0x109 |
#define MOXIE_F1_ABi2 0x10a |
#define MOXIE_F1_M 0x10b |
#define MOXIE_F2_NARG 0x200 |
/contrib/toolchain/binutils/include/opcode/msp430-decode.h |
---|
1,5 → 1,5 |
/* Opcode decoder for the TI MSP430 |
Copyright 2012-2013 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Written by DJ Delorie <dj@redhat.com> |
This file is part of GDB, the GNU Debugger. |
19,6 → 19,10 |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
02110-1301, USA. */ |
#ifdef __cplusplus |
extern "C" { |
#endif |
typedef enum |
{ |
MSO_unknown, |
128,3 → 132,7 |
} MSP430_Opcode_Decoded; |
int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *); |
#ifdef __cplusplus |
} |
#endif |
/contrib/toolchain/binutils/include/opcode/msp430.h |
---|
1,6 → 1,6 |
/* Opcode table for the TI MSP430 microcontrollers |
Copyright 2002-2013 Free Software Foundation, Inc. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Contributed by Dmitry Diky <diwil@mail.ru> |
This program is free software; you can redistribute it and/or modify |
26,7 → 26,8 |
int ol; /* Operand length words. */ |
int am; /* Addr mode. */ |
int reg; /* Register. */ |
int mode; /* Pperand mode. */ |
int mode; /* Operand mode. */ |
int vshift; /* Number of bytes to shift operand down. */ |
#define OP_REG 0 |
#define OP_EXP 1 |
#ifndef DASM_SECTION |
/contrib/toolchain/binutils/include/opcode/nds32.h |
---|
0,0 → 1,831 |
/* nds32.h -- Header file for nds32 opcode table |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Contributed by Andes Technology Corporation. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3, or (at your option) |
any later version. |
This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
02110-1301, USA. */ |
#ifndef OPCODE_NDS32_H |
#define OPCODE_NDS32_H |
/* Registers. */ |
#define REG_R5 5 |
#define REG_R8 8 |
#define REG_R10 10 |
#define REG_R12 12 |
#define REG_R15 15 |
#define REG_R16 16 |
#define REG_R20 20 |
#define REG_TA 15 |
#define REG_TP 27 |
#define REG_FP 28 |
#define REG_GP 29 |
#define REG_LP 30 |
#define REG_SP 31 |
/* Macros for extracting fields or making an instruction. */ |
static const int nds32_r45map[] = |
{ |
0, 1, 2, 3, 4, 5, 6, 7, |
8, 9, 10, 11, 16, 17, 18, 19 |
}; |
static const int nds32_r54map[] = |
{ |
0, 1, 2, 3, 4, 5, 6, 7, |
8, 9, 10, 11, -1, -1, -1, -1, |
12, 13, 14, 15, -1, -1, -1, -1, |
-1, -1, -1, -1, -1, -1, -1, -1 |
}; |
#define __BIT(n) (1 << (n)) |
#define __MASK(n) (__BIT (n) - 1) |
#define __MF(v, off, bs) (((v) & __MASK (bs)) << (off)) |
#define __GF(v, off, bs) (((v) >> off) & __MASK (bs)) |
#define __SEXT(v, bs) ((((v) & ((1 << (bs)) - 1)) ^ (1 << ((bs) - 1))) - (1 << ((bs) - 1))) |
/* Make nds32 instructions. */ |
#define N32_TYPE4(op6, rt5, ra5, rb5, rd5, sub5) \ |
(__MF (N32_OP6_##op6, 25, 6) | __MF (rt5, 20, 5) \ |
| __MF (ra5, 15, 5) | __MF (rb5, 10, 5) \ |
| __MF (rd5, 5, 5) | __MF (sub5, 0, 5)) |
#define N32_TYPE3(op6, rt5, ra5, rb5, sub10) \ |
(N32_TYPE4 (op6, rt5, ra5, rb5, 0, 0) \ |
| __MF (sub10, 0, 10)) |
#define N32_TYPE2(op6, rt5, ra5, imm15) \ |
(N32_TYPE3 (op6, rt5, ra5, 0, 0) | __MF (imm15, 0, 15)) |
#define N32_TYPE1(op6, rt5, imm20) \ |
(N32_TYPE2 (op6, rt5, 0, 0) | __MF (imm20, 0, 20)) |
#define N32_TYPE0(op6, imm25) \ |
(N32_TYPE1 (op6, 0, 0) | __MF (imm25, 0, 25)) |
#define N32_ALU1(sub, rt, ra, rb) \ |
N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub) |
#define N32_ALU1_SH(sub, rt, ra, rb, rd) \ |
N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub) |
#define N32_ALU2(sub, rt, ra, rb) \ |
N32_TYPE3 (ALU2, rt, ra, rb, N32_ALU2_##sub) |
#define N32_BR1(sub, rt, ra, imm14s) \ |
N32_TYPE2 (BR1, rt, ra, (N32_BR1_##sub << 14) | (imm14s & __MASK (14))) |
#define N32_BR2(sub, rt, imm16s) \ |
N32_TYPE1 (BR2, rt, (N32_BR2_##sub << 16) | (imm16s & __MASK (16))) |
#define N32_BR3(sub, rt, imm11s, imm8s) \ |
N32_TYPE1 (BR3, rt, (N32_BR3_##sub << 19) \ |
| ((imm11s & __MASK (11)) << 8) \ |
| (imm8s & __MASK (8))) |
#define N32_JI(sub, imm24s) \ |
N32_TYPE0 (JI, (N32_JI_##sub << 24) | (imm24s & __MASK (24))) |
#define N32_JREG(sub, rt, rb, dtit, hint) \ |
N32_TYPE4(JREG, rt, 0, rb, (dtit << 3) | (hint & 7), N32_JREG_##sub) |
#define N32_MEM(sub, rt, ra, rb, sv) \ |
N32_TYPE3 (MEM, rt, ra, rb, (sv << 8) | N32_MEM_##sub) |
#define N16_TYPE55(op5, rt5, ra5) \ |
(0x8000 | __MF (N16_T55_##op5, 10, 5) | __MF (rt5, 5, 5) \ |
| __MF (ra5, 0, 5)) |
#define N16_TYPE45(op6, rt4, ra5) \ |
(0x8000 | __MF (N16_T45_##op6, 9, 6) | __MF (rt4, 5, 4) \ |
| __MF (ra5, 0, 5)) |
#define N16_TYPE333(op6, rt3, ra3, rb3) \ |
(0x8000 | __MF (N16_T333_##op6, 9, 6) | __MF (rt3, 6, 3) \ |
| __MF (ra3, 3, 3) | __MF (rb3, 0, 3)) |
#define N16_TYPE36(op6, rt3, imm6) \ |
(0x8000 | __MF (N16_T36_##op6, 9, 6) | __MF (rt3, 6, 3) \ |
| __MF (imm6, 0, 6)) |
#define N16_TYPE38(op4, rt3, imm8) \ |
(0x8000 | __MF (N16_T38_##op4, 11, 4) | __MF (rt3, 8, 3) \ |
| __MF (imm8, 0, 8)) |
#define N16_TYPE37(op4, rt3, ls, imm7) \ |
(0x8000 | __MF (N16_T37_##op4, 11, 4) | __MF (rt3, 8, 3) \ |
| __MF (imm7, 0, 7) | __MF (ls, 7, 1)) |
#define N16_TYPE5(op10, imm5) \ |
(0x8000 | __MF (N16_T5_##op10, 5, 10) | __MF (imm5, 0, 5)) |
#define N16_TYPE8(op7, imm8) \ |
(0x8000 | __MF (N16_T8_##op7, 8, 7) | __MF (imm8, 0, 8)) |
#define N16_TYPE9(op6, imm9) \ |
(0x8000 | __MF (N16_T9_##op6, 9, 6) | __MF (imm9, 0, 9)) |
#define N16_TYPE10(op5, imm10) \ |
(0x8000 | __MF (N16_T10_##op5, 10, 5) | __MF (imm10, 0, 10)) |
#define N16_TYPE25(op8, re, imm5) \ |
(0x8000 | __MF (N16_T25_##op8, 7, 8) | __MF (re, 5, 2) \ |
| __MF (imm5, 0, 5)) |
#define N16_MISC33(sub, rt, ra) \ |
N16_TYPE333 (MISC33, rt, ra, N16_MISC33_##sub) |
#define N16_BFMI333(sub, rt, ra) \ |
N16_TYPE333 (BFMI333, rt, ra, N16_BFMI333_##sub) |
/* Get instruction fields. |
Macros used for handling 32-bit and 16-bit instructions are |
prefixed with N32_ and N16_ respectively. */ |
#define N32_OP6(insn) (((insn) >> 25) & 0x3f) |
#define N32_RT5(insn) (((insn) >> 20) & 0x1f) |
#define N32_RT53(insn) (N32_RT5 (insn) & 0x7) |
#define N32_RT54(insn) nds32_r54map[N32_RT5 (insn)] |
#define N32_RA5(insn) (((insn) >> 15) & 0x1f) |
#define N32_RA53(insn) (N32_RA5 (insn) & 0x7) |
#define N32_RA54(insn) nds32_r54map[N32_RA5 (insn)] |
#define N32_RB5(insn) (((insn) >> 10) & 0x1f) |
#define N32_UB5(insn) (((insn) >> 10) & 0x1f) |
#define N32_RB53(insn) (N32_RB5 (insn) & 0x7) |
#define N32_RB54(insn) nds32_r54map[N32_RB5 (insn)] |
#define N32_RD5(insn) (((insn) >> 5) & 0x1f) |
#define N32_SH5(insn) (((insn) >> 5) & 0x1f) |
#define N32_SUB5(insn) (((insn) >> 0) & 0x1f) |
#define N32_SWID(insn) (((insn) >> 5) & 0x3ff) |
#define N32_IMMU(insn, bs) ((insn) & __MASK (bs)) |
#define N32_IMMS(insn, bs) ((signed) __SEXT (((insn) & __MASK (bs)), bs)) |
#define N32_IMM5U(insn) N32_IMMU (insn, 5) |
#define N32_IMM12S(insn) N32_IMMS (insn, 12) |
#define N32_IMM14S(insn) N32_IMMS (insn, 14) |
#define N32_IMM15U(insn) N32_IMMU (insn, 15) |
#define N32_IMM15S(insn) N32_IMMS (insn, 15) |
#define N32_IMM16S(insn) N32_IMMS (insn, 16) |
#define N32_IMM17S(insn) N32_IMMS (insn, 17) |
#define N32_IMM20S(insn) N32_IMMS (insn, 20) |
#define N32_IMM20U(insn) N32_IMMU (insn, 20) |
#define N32_IMM24S(insn) N32_IMMS (insn, 24) |
#define N16_RT5(insn) (((insn) >> 5) & 0x1f) |
#define N16_RT4(insn) nds32_r45map[(((insn) >> 5) & 0xf)] |
#define N16_RT3(insn) (((insn) >> 6) & 0x7) |
#define N16_RT38(insn) (((insn) >> 8) & 0x7) |
#define N16_RT8(insn) (((insn) >> 8) & 0x7) |
#define N16_RA5(insn) ((insn) & 0x1f) |
#define N16_RA3(insn) (((insn) >> 3) & 0x7) |
#define N16_RB3(insn) ((insn) & 0x7) |
#define N16_IMM3U(insn) N32_IMMU (insn, 3) |
#define N16_IMM5U(insn) N32_IMMU (insn, 5) |
#define N16_IMM5S(insn) N32_IMMS (insn, 5) |
#define N16_IMM6U(insn) N32_IMMU (insn, 6) |
#define N16_IMM7U(insn) N32_IMMU (insn, 7) |
#define N16_IMM8S(insn) N32_IMMS (insn, 8) |
#define N16_IMM9U(insn) N32_IMMU (insn, 9) |
#define N16_IMM10S(insn) N32_IMMS (insn, 10) |
#define IS_WITHIN_U(v, n) (((v) >> n) == 0) |
#define IS_WITHIN_S(v, n) IS_WITHIN_U ((v) + (1 << ((n) - 1)), n) |
/* Get fields for specific instruction. */ |
#define N32_JREG_T(insn) (((insn) >> 8) & 0x3) |
#define N32_JREG_HINT(insn) (((insn) >> 5) & 0x7) |
#define N32_BR2_SUB(insn) (((insn) >> 16) & 0xf) |
#define N32_COP_SUB(insn) ((insn) & 0xf) |
#define N32_COP_CP(insn) (((insn) >> 4) & 0x3) |
/* Check fields. */ |
#define N32_IS_RT3(insn) (N32_RT5 (insn) < 8) |
#define N32_IS_RA3(insn) (N32_RA5 (insn) < 8) |
#define N32_IS_RB3(insn) (N32_RB5 (insn) < 8) |
#define N32_IS_RT4(insn) (nds32_r54map[N32_RT5 (insn)] != -1) |
#define N32_IS_RA4(insn) (nds32_r54map[N32_RA5 (insn)] != -1) |
#define N32_IS_RB4(insn) (nds32_r54map[N32_RB5 (insn)] != -1) |
/* These are opcodes for Nxx_TYPE macros. |
They are prefixed by corresponding TYPE to avoid misusing. */ |
enum n32_opcodes |
{ |
/* Main opcodes (OP6). */ |
N32_OP6_LBI = 0x0, |
N32_OP6_LHI, |
N32_OP6_LWI, |
N32_OP6_LDI, |
N32_OP6_LBI_BI, |
N32_OP6_LHI_BI, |
N32_OP6_LWI_BI, |
N32_OP6_LDI_BI, |
N32_OP6_SBI = 0x8, |
N32_OP6_SHI, |
N32_OP6_SWI, |
N32_OP6_SDI, |
N32_OP6_SBI_BI, |
N32_OP6_SHI_BI, |
N32_OP6_SWI_BI, |
N32_OP6_SDI_BI, |
N32_OP6_LBSI = 0x10, |
N32_OP6_LHSI, |
N32_OP6_LWSI, |
N32_OP6_DPREFI, |
N32_OP6_LBSI_BI, |
N32_OP6_LHSI_BI, |
N32_OP6_LWSI_BI, |
N32_OP6_LBGP, |
N32_OP6_LWC = 0x18, |
N32_OP6_SWC, |
N32_OP6_LDC, |
N32_OP6_SDC, |
N32_OP6_MEM, |
N32_OP6_LSMW, |
N32_OP6_HWGP, |
N32_OP6_SBGP, |
N32_OP6_ALU1 = 0x20, |
N32_OP6_ALU2, |
N32_OP6_MOVI, |
N32_OP6_SETHI, |
N32_OP6_JI, |
N32_OP6_JREG, |
N32_OP6_BR1, |
N32_OP6_BR2, |
N32_OP6_ADDI = 0x28, |
N32_OP6_SUBRI, |
N32_OP6_ANDI, |
N32_OP6_XORI, |
N32_OP6_ORI, |
N32_OP6_BR3, |
N32_OP6_SLTI, |
N32_OP6_SLTSI, |
N32_OP6_AEXT = 0x30, |
N32_OP6_CEXT, |
N32_OP6_MISC, |
N32_OP6_BITCI, |
N32_OP6_0x34, |
N32_OP6_COP, |
N32_OP6_0x36, |
N32_OP6_0x37, |
N32_OP6_SIMD = 0x38, |
/* Sub-opcodes of specific opcode. */ |
/* bit-24 */ |
N32_BR1_BEQ = 0, |
N32_BR1_BNE = 1, |
/* bit[16:19] */ |
N32_BR2_IFCALL = 0, |
N32_BR2_BEQZ = 2, |
N32_BR2_BNEZ = 3, |
N32_BR2_BGEZ = 4, |
N32_BR2_BLTZ = 5, |
N32_BR2_BGTZ = 6, |
N32_BR2_BLEZ = 7, |
N32_BR2_BGEZAL = 0xc, |
N32_BR2_BLTZAL = 0xd, |
/* bit-19 */ |
N32_BR3_BEQC = 0, |
N32_BR3_BNEC = 1, |
/* bit-24 */ |
N32_JI_J = 0, |
N32_JI_JAL = 1, |
/* bit[0:4] */ |
N32_JREG_JR = 0, |
N32_JREG_JRAL = 1, |
N32_JREG_JRNEZ = 2, |
N32_JREG_JRALNEZ = 3, |
/* bit[0:4] */ |
N32_ALU1_ADD_SLLI = 0x0, |
N32_ALU1_SUB_SLLI, |
N32_ALU1_AND_SLLI, |
N32_ALU1_XOR_SLLI, |
N32_ALU1_OR_SLLI, |
N32_ALU1_ADD = 0x0, |
N32_ALU1_SUB, |
N32_ALU1_AND, |
N32_ALU1_XOR, |
N32_ALU1_OR, |
N32_ALU1_NOR, |
N32_ALU1_SLT, |
N32_ALU1_SLTS, |
N32_ALU1_SLLI = 0x8, |
N32_ALU1_SRLI, |
N32_ALU1_SRAI, |
N32_ALU1_ROTRI, |
N32_ALU1_SLL, |
N32_ALU1_SRL, |
N32_ALU1_SRA, |
N32_ALU1_ROTR, |
N32_ALU1_SEB = 0x10, |
N32_ALU1_SEH, |
N32_ALU1_BITC, |
N32_ALU1_ZEH, |
N32_ALU1_WSBH, |
N32_ALU1_OR_SRLI, |
N32_ALU1_DIVSR, |
N32_ALU1_DIVR, |
N32_ALU1_SVA = 0x18, |
N32_ALU1_SVS, |
N32_ALU1_CMOVZ, |
N32_ALU1_CMOVN, |
N32_ALU1_ADD_SRLI, |
N32_ALU1_SUB_SRLI, |
N32_ALU1_AND_SRLI, |
N32_ALU1_XOR_SRLI, |
/* bit[0:5], where bit[6:9] == 0 */ |
N32_ALU2_MAX = 0, |
N32_ALU2_MIN, |
N32_ALU2_AVE, |
N32_ALU2_ABS, |
N32_ALU2_CLIPS, |
N32_ALU2_CLIP, |
N32_ALU2_CLO, |
N32_ALU2_CLZ, |
N32_ALU2_BSET = 0x8, |
N32_ALU2_BCLR, |
N32_ALU2_BTGL, |
N32_ALU2_BTST, |
N32_ALU2_BSE, |
N32_ALU2_BSP, |
N32_ALU2_FFB, |
N32_ALU2_FFMISM, |
N32_ALU2_ADD_SC = 0x10, |
N32_ALU2_SUB_SC, |
N32_ALU2_ADD_WC, |
N32_ALU2_SUB_WC, |
N32_ALU2_KMxy, |
N32_ALU2_0x15, |
N32_ALU2_0x16, |
N32_ALU2_FFZMISM, |
N32_ALU2_KADD = 0x18, |
N32_ALU2_KSUB, |
N32_ALU2_KSLRA, |
N32_ALU2_MFUSR = 0x20, |
N32_ALU2_MTUSR, |
N32_ALU2_0x22, |
N32_ALU2_0x23, |
N32_ALU2_MUL, |
N32_ALU2_0x25, |
N32_ALU2_0x26, |
N32_ALU2_MULTS64 = 0x28, |
N32_ALU2_MULT64, |
N32_ALU2_MADDS64, |
N32_ALU2_MADD64, |
N32_ALU2_MSUBS64, |
N32_ALU2_MSUB64, |
N32_ALU2_DIVS, |
N32_ALU2_DIV, |
N32_ALU2_0x30 = 0x30, |
N32_ALU2_MULT32, |
N32_ALU2_0x32, |
N32_ALU2_MADD32, |
N32_ALU2_0x34, |
N32_ALU2_MSUB32, |
/* bit[0:5], where bit[6:9] != 0 */ |
N32_ALU2_FFBI = 0xe, |
N32_ALU2_FLMISM = 0xf, |
N32_ALU2_MULSR64 = 0x28, |
N32_ALU2_MULR64 = 0x29, |
N32_ALU2_MADDR32 = 0x33, |
N32_ALU2_MSUBR32 = 0x35, |
/* bit[0:5] */ |
N32_MEM_LB = 0, |
N32_MEM_LH, |
N32_MEM_LW, |
N32_MEM_LD, |
N32_MEM_LB_BI, |
N32_MEM_LH_BI, |
N32_MEM_LW_BI, |
N32_MEM_LD_BI, |
N32_MEM_SB, |
N32_MEM_SH, |
N32_MEM_SW, |
N32_MEM_SD, |
N32_MEM_SB_BI, |
N32_MEM_SH_BI, |
N32_MEM_SW_BI, |
N32_MEM_SD_BI, |
N32_MEM_LBS, |
N32_MEM_LHS, |
N32_MEM_LWS, /* Not used. */ |
N32_MEM_DPREF, |
N32_MEM_LBS_BI, |
N32_MEM_LHS_BI, |
N32_MEM_LWS_BI, /* Not used. */ |
N32_MEM_0x17, /* Not used. */ |
N32_MEM_LLW, |
N32_MEM_SCW, |
N32_MEM_LBUP = 0x20, |
N32_MEM_LWUP = 0x22, |
N32_MEM_SBUP = 0x28, |
N32_MEM_SWUP = 0x2a, |
/* bit[0:1] */ |
N32_LSMW_LSMW = 0, |
N32_LSMW_LSMWA, |
N32_LSMW_LSMWZB, |
/* bit[2:4] */ |
N32_LSMW_BI = 0, |
N32_LSMW_BIM, |
N32_LSMW_BD, |
N32_LSMW_BDM, |
N32_LSMW_AI, |
N32_LSMW_AIM, |
N32_LSMW_AD, |
N32_LSMW_ADM, |
/* bit[0:4] */ |
N32_MISC_STANDBY = 0, |
N32_MISC_CCTL, |
N32_MISC_MFSR, |
N32_MISC_MTSR, |
N32_MISC_IRET, |
N32_MISC_TRAP, |
N32_MISC_TEQZ, |
N32_MISC_TNEZ, |
N32_MISC_DSB = 0x8, |
N32_MISC_ISB, |
N32_MISC_BREAK, |
N32_MISC_SYSCALL, |
N32_MISC_MSYNC, |
N32_MISC_ISYNC, |
N32_MISC_TLBOP, |
N32_MISC_0xf, |
/* bit[0:4] */ |
N32_SIMD_PBSAD = 0, |
N32_SIMD_PBSADA = 1, |
/* bit[0:3] */ |
N32_COP_CPE1 = 0, |
N32_COP_MFCP, |
N32_COP_CPLW, |
N32_COP_CPLD, |
N32_COP_CPE2, |
N32_COP_CPE3 = 8, |
N32_COP_MTCP, |
N32_COP_CPSW, |
N32_COP_CPSD, |
N32_COP_CPE4, |
/* cop/0 b[3:0] */ |
N32_FPU_FS1 = 0, |
N32_FPU_MFCP, |
N32_FPU_FLS, |
N32_FPU_FLD, |
N32_FPU_FS2, |
N32_FPU_FD1 = 8, |
N32_FPU_MTCP, |
N32_FPU_FSS, |
N32_FPU_FSD, |
N32_FPU_FD2, |
/* FS1 b[9:6] */ |
N32_FPU_FS1_FADDS = 0, |
N32_FPU_FS1_FSUBS, |
N32_FPU_FS1_FCPYNSS, |
N32_FPU_FS1_FCPYSS, |
N32_FPU_FS1_FMADDS, |
N32_FPU_FS1_FMSUBS, |
N32_FPU_FS1_FCMOVNS, |
N32_FPU_FS1_FCMOVZS, |
N32_FPU_FS1_FNMADDS, |
N32_FPU_FS1_FNMSUBS, |
N32_FPU_FS1_10, |
N32_FPU_FS1_11, |
N32_FPU_FS1_FMULS = 12, |
N32_FPU_FS1_FDIVS, |
N32_FPU_FS1_14, |
N32_FPU_FS1_F2OP = 15, |
/* FS1/F2OP b[14:10] */ |
N32_FPU_FS1_F2OP_FS2D = 0x00, |
N32_FPU_FS1_F2OP_FSQRTS = 0x01, |
N32_FPU_FS1_F2OP_FABSS = 0x05, |
N32_FPU_FS1_F2OP_FUI2S = 0x08, |
N32_FPU_FS1_F2OP_FSI2S = 0x0c, |
N32_FPU_FS1_F2OP_FS2UI = 0x10, |
N32_FPU_FS1_F2OP_FS2UI_Z = 0x14, |
N32_FPU_FS1_F2OP_FS2SI = 0x18, |
N32_FPU_FS1_F2OP_FS2SI_Z = 0x1c, |
/* FS2 b[9:6] */ |
N32_FPU_FS2_FCMPEQS = 0x0, |
N32_FPU_FS2_FCMPLTS = 0x2, |
N32_FPU_FS2_FCMPLES = 0x4, |
N32_FPU_FS2_FCMPUNS = 0x6, |
N32_FPU_FS2_FCMPEQS_E = 0x1, |
N32_FPU_FS2_FCMPLTS_E = 0x3, |
N32_FPU_FS2_FCMPLES_E = 0x5, |
N32_FPU_FS2_FCMPUNS_E = 0x7, |
/* FD1 b[9:6] */ |
N32_FPU_FD1_FADDD = 0, |
N32_FPU_FD1_FSUBD, |
N32_FPU_FD1_FCPYNSD, |
N32_FPU_FD1_FCPYSD, |
N32_FPU_FD1_FMADDD, |
N32_FPU_FD1_FMSUBD, |
N32_FPU_FD1_FCMOVND, |
N32_FPU_FD1_FCMOVZD, |
N32_FPU_FD1_FNMADDD, |
N32_FPU_FD1_FNMSUBD, |
N32_FPU_FD1_10, |
N32_FPU_FD1_11, |
N32_FPU_FD1_FMULD = 12, |
N32_FPU_FD1_FDIVD, |
N32_FPU_FD1_14, |
N32_FPU_FD1_F2OP = 15, |
/* FD1/F2OP b[14:10] */ |
N32_FPU_FD1_F2OP_FD2S = 0x00, |
N32_FPU_FD1_F2OP_FSQRTD = 0x01, |
N32_FPU_FD1_F2OP_FABSD = 0x05, |
N32_FPU_FD1_F2OP_FUI2D = 0x08, |
N32_FPU_FD1_F2OP_FSI2D = 0x0c, |
N32_FPU_FD1_F2OP_FD2UI = 0x10, |
N32_FPU_FD1_F2OP_FD2UI_Z = 0x14, |
N32_FPU_FD1_F2OP_FD2SI = 0x18, |
N32_FPU_FD1_F2OP_FD2SI_Z = 0x1c, |
/* FD2 b[9:6] */ |
N32_FPU_FD2_FCMPEQD = 0x0, |
N32_FPU_FD2_FCMPLTD = 0x2, |
N32_FPU_FD2_FCMPLED = 0x4, |
N32_FPU_FD2_FCMPUND = 0x6, |
N32_FPU_FD2_FCMPEQD_E = 0x1, |
N32_FPU_FD2_FCMPLTD_E = 0x3, |
N32_FPU_FD2_FCMPLED_E = 0x5, |
N32_FPU_FD2_FCMPUND_E = 0x7, |
/* MFCP b[9:6] */ |
N32_FPU_MFCP_FMFSR = 0x0, |
N32_FPU_MFCP_FMFDR = 0x1, |
N32_FPU_MFCP_XR = 0xc, |
/* MFCP/XR b[14:10] */ |
N32_FPU_MFCP_XR_FMFCFG = 0x0, |
N32_FPU_MFCP_XR_FMFCSR = 0x1, |
/* MTCP b[9:6] */ |
N32_FPU_MTCP_FMTSR = 0x0, |
N32_FPU_MTCP_FMTDR = 0x1, |
N32_FPU_MTCP_XR = 0xc, |
/* MTCP/XR b[14:10] */ |
N32_FPU_MTCP_XR_FMTCSR = 0x1 |
}; |
enum n16_opcodes |
{ |
N16_T55_MOV55 = 0x0, |
N16_T55_MOVI55 = 0x1, |
N16_T45_0 = 0, |
N16_T45_ADD45 = 0x4, |
N16_T45_SUB45 = 0x5, |
N16_T45_ADDI45 = 0x6, |
N16_T45_SUBI45 = 0x7, |
N16_T45_SRAI45 = 0x8, |
N16_T45_SRLI45 = 0x9, |
N16_T45_LWI45_FE = 0x19, |
N16_T45_LWI450 = 0x1a, |
N16_T45_SWI450 = 0x1b, |
N16_T45_SLTS45 = 0x30, |
N16_T45_SLT45 = 0x31, |
N16_T45_SLTSI45 = 0x32, |
N16_T45_SLTI45 = 0x33, |
N16_T45_MOVPI45 = 0x3d, |
N15_T44_MOVD44 = 0x7d, |
N16_T333_0 = 0, |
N16_T333_SLLI333 = 0xa, |
N16_T333_BFMI333 = 0xb, |
N16_T333_ADD333 = 0xc, |
N16_T333_SUB333 = 0xd, |
N16_T333_ADDI333 = 0xe, |
N16_T333_SUBI333 = 0xf, |
N16_T333_LWI333 = 0x10, |
N16_T333_LWI333_BI = 0x11, |
N16_T333_LHI333 = 0x12, |
N16_T333_LBI333 = 0x13, |
N16_T333_SWI333 = 0x14, |
N16_T333_SWI333_BI = 0x15, |
N16_T333_SHI333 = 0x16, |
N16_T333_SBI333 = 0x17, |
N16_T333_MISC33 = 0x3f, |
N16_T36_ADDRI36_SP = 0x18, |
N16_T37_XWI37 = 0x7, |
N16_T37_XWI37SP = 0xe, |
N16_T38_BEQZ38 = 0x8, |
N16_T38_BNEZ38 = 0x9, |
N16_T38_BEQS38 = 0xa, |
N16_T38_BNES38 = 0xb, |
N16_T5_JR5 = 0x2e8, |
N16_T5_JRAL5 = 0x2e9, |
N16_T5_EX9IT = 0x2ea, |
/* 0x2eb reserved. */ |
N16_T5_RET5 = 0x2ec, |
N16_T5_ADD5PC = 0x2ed, |
/* 0x2e[ef] reserved. */ |
N16_T5_BREAK16 = 0x350, |
N16_T8_J8 = 0x55, |
N16_T8_BEQZS8 = 0x68, |
N16_T8_BNEZS8 = 0x69, |
/* N16_T9_BREAK16 = 0x35 |
Since v3, SWID of BREAK16 above 32 are used for encoding EX9.IT. */ |
N16_T9_EX9IT = 0x35, |
N16_T9_IFCALL9 = 0x3c, |
N16_T10_ADDI10S = 0x1b, |
N16_T25_PUSH25 = 0xf8, |
N16_T25_POP25 = 0xf9, |
/* Sub-opcodes. */ |
N16_MISC33_0 = 0, |
N16_MISC33_1 = 1, |
N16_MISC33_NEG33 = 2, |
N16_MISC33_NOT33 = 3, |
N16_MISC33_MUL33 = 4, |
N16_MISC33_XOR33 = 5, |
N16_MISC33_AND33 = 6, |
N16_MISC33_OR33 = 7, |
N16_BFMI333_ZEB33 = 0, |
N16_BFMI333_ZEH33 = 1, |
N16_BFMI333_SEB33 = 2, |
N16_BFMI333_SEH33 = 3, |
N16_BFMI333_XLSB33 = 4, |
N16_BFMI333_X11B33 = 5, |
N16_BFMI333_BMSKI33 = 6, |
N16_BFMI333_FEXTI33 = 7 |
}; |
/* These macros a deprecated. DO NOT use them anymore. |
And please help rewrite code used them. */ |
/* 32-bit instructions without operands. */ |
#define INSN_SETHI 0x46000000 |
#define INSN_ORI 0x58000000 |
#define INSN_JR 0x4a000000 |
#define INSN_RET 0x4a000020 |
#define INSN_JAL 0x49000000 |
#define INSN_J 0x48000000 |
#define INSN_JRAL 0x4a000001 |
#define INSN_BGEZAL 0x4e0c0000 |
#define INSN_BLTZAL 0x4e0d0000 |
#define INSN_BEQ 0x4c000000 |
#define INSN_BNE 0x4c004000 |
#define INSN_BEQZ 0x4e020000 |
#define INSN_BNEZ 0x4e030000 |
#define INSN_BGEZ 0x4e040000 |
#define INSN_BLTZ 0x4e050000 |
#define INSN_BGTZ 0x4e060000 |
#define INSN_BLEZ 0x4e070000 |
#define INSN_MOVI 0x44000000 |
#define INSN_ADDI 0x50000000 |
#define INSN_ANDI 0x54000000 |
#define INSN_LDI 0x06000000 |
#define INSN_SDI 0x16000000 |
#define INSN_LWI 0x04000000 |
#define INSN_LWSI 0x24000000 |
#define INSN_LWIP 0x0c000000 |
#define INSN_LHI 0x02000000 |
#define INSN_LHSI 0x22000000 |
#define INSN_LBI 0x00000000 |
#define INSN_LBSI 0x20000000 |
#define INSN_SWI 0x14000000 |
#define INSN_SWIP 0x1c000000 |
#define INSN_SHI 0x12000000 |
#define INSN_SBI 0x10000000 |
#define INSN_SLTI 0x5c000000 |
#define INSN_SLTSI 0x5e000000 |
#define INSN_ADD 0x40000000 |
#define INSN_SUB 0x40000001 |
#define INSN_SLT 0x40000006 |
#define INSN_SLTS 0x40000007 |
#define INSN_SLLI 0x40000008 |
#define INSN_SRLI 0x40000009 |
#define INSN_SRAI 0x4000000a |
#define INSN_SEB 0x40000010 |
#define INSN_SEH 0x40000011 |
#define INSN_ZEB INSN_ANDI + 0xFF |
#define INSN_ZEH 0x40000013 |
#define INSN_BREAK 0x6400000a |
#define INSN_NOP 0x40000009 |
#define INSN_FLSI 0x30000000 |
#define INSN_FSSI 0x32000000 |
#define INSN_FLDI 0x34000000 |
#define INSN_FSDI 0x36000000 |
#define INSN_BEQC 0x5a000000 |
#define INSN_BNEC 0x5a080000 |
#define INSN_DSB 0x64000008 |
#define INSN_IFCALL 0x4e000000 |
#define INSN_IFRET 0x4a000060 |
#define INSN_BR1 0x4c000000 |
#define INSN_BR2 0x4e000000 |
/* 16-bit instructions without operand. */ |
#define INSN_MOV55 0x8000 |
#define INSN_MOVI55 0x8400 |
#define INSN_ADD45 0x8800 |
#define INSN_SUB45 0x8a00 |
#define INSN_ADDI45 0x8c00 |
#define INSN_SUBI45 0x8e00 |
#define INSN_SRAI45 0x9000 |
#define INSN_SRLI45 0x9200 |
#define INSN_SLLI333 0x9400 |
#define INSN_BFMI333 0x9600 |
#define INSN_ADD333 0x9800 |
#define INSN_SUB333 0x9a00 |
#define INSN_ADDI333 0x9c00 |
#define INSN_SUBI333 0x9e00 |
#define INSN_LWI333 0xa000 |
#define INSN_LWI333P 0xa200 |
#define INSN_LHI333 0xa400 |
#define INSN_LBI333 0xa600 |
#define INSN_SWI333 0xa800 |
#define INSN_SWI333P 0xaa00 |
#define INSN_SHI333 0xac00 |
#define INSN_SBI333 0xae00 |
#define INSN_RSV01 0xb000 |
#define INSN_RSV02 0xb200 |
#define INSN_LWI450 0xb400 |
#define INSN_SWI450 0xb600 |
#define INSN_LWI37 0xb800 |
#define INSN_SWI37 0xb880 |
#define INSN_BEQZ38 0xc000 |
#define INSN_BNEZ38 0xc800 |
#define INSN_BEQS38 0xd000 |
#define INSN_J8 0xd500 |
#define INSN_BNES38 0xd800 |
#define INSN_JR5 0xdd00 |
#define INSN_RET5 0xdd80 |
#define INSN_JRAL5 0xdd20 |
#define INSN_EX9_IT_2 0xdd40 |
#define INSN_SLTS45 0xe000 |
#define INSN_SLT45 0xe200 |
#define INSN_SLTSI45 0xe400 |
#define INSN_SLTI45 0xe600 |
#define INSN_BEQZS8 0xe800 |
#define INSN_BNEZS8 0xe900 |
#define INSN_BREAK16 0xea00 |
#define INSN_EX9_IT_1 0xea00 |
#define INSN_NOP16 0x9200 |
/* 16-bit version 2. */ |
#define INSN_ADDI10_SP 0xec00 |
#define INSN_LWI37SP 0xf000 |
#define INSN_SWI37SP 0xf080 |
/* 16-bit version 3. */ |
#define INSN_IFRET16 0x83ff |
#define INSN_ADDRI36_SP 0xb000 |
#define INSN_LWI45_FE 0xb200 |
#define INSN_IFCALL9 0xf800 |
#define INSN_MISC33 0xfe00 |
/* Instruction with specific operands. */ |
#define INSN_ADDI_GP_TO_FP 0x51cd8000 /* BASELINE_V1. */ |
#define INSN_ADDIGP_TO_FP 0x3fc80000 /* BASELINE_V2. */ |
#define INSN_MOVI_TO_FP 0x45c00000 |
#define INSN_MFUSR_PC 0x420F8020 |
#define INSN_MFUSR_PC_MASK 0xFE0FFFFF |
/* Instructions use $ta register as operand. */ |
#define INSN_SETHI_TA (INSN_SETHI | (REG_TA << 20)) |
#define INSN_ORI_TA (INSN_ORI | (REG_TA << 20) | (REG_TA << 15)) |
#define INSN_ADD_TA (INSN_ADD | (REG_TA << 20)) |
#define INSN_ADD45_TA (INSN_ADD45 | (REG_TA << 5)) |
#define INSN_JR5_TA (INSN_JR5 | (REG_TA << 0)) |
#define INSN_RET5_TA (INSN_RET5 | (REG_TA << 0)) |
#define INSN_JR_TA (INSN_JR | (REG_TA << 10)) |
#define INSN_RET_TA (INSN_RET | (REG_TA << 10)) |
#define INSN_JRAL_TA (INSN_JRAL | (REG_LP << 20) | (REG_TA << 10)) |
#define INSN_JRAL5_TA (INSN_JRAL5 | (REG_TA << 0)) |
#define INSN_BEQZ_TA (INSN_BEQZ | (REG_TA << 20)) |
#define INSN_BNEZ_TA (INSN_BNEZ | (REG_TA << 20)) |
#define INSN_MOVI_TA (INSN_MOVI | (REG_TA << 20)) |
#define INSN_BEQ_TA (INSN_BEQ | (REG_TA << 15)) |
#define INSN_BNE_TA (INSN_BNE | (REG_TA << 15)) |
/* Instructions use $r5 register as operand. */ |
#define INSN_BNE_R5 (INSN_BNE | (REG_R5 << 15)) |
#define INSN_BEQ_R5 (INSN_BEQ | (REG_R5 << 15)) |
#endif |
/contrib/toolchain/binutils/include/opcode/nios2.h |
---|
1,5 → 1,5 |
/* Nios II opcode list for GAS, the GNU assembler. |
Copyright (C) 2012, 2013 Free Software Foundation, Inc. |
Copyright (C) 2012-2015 Free Software Foundation, Inc. |
Contributed by Nigel Gray (ngray@altera.com). |
Contributed by Mentor Graphics, Inc. |
25,6 → 25,10 |
#include "bfd.h" |
#ifdef __cplusplus |
extern "C" { |
#endif |
/**************************************************************************** |
* This file contains structures, bit masks and shift counts used |
* by the GNU toolchain to define the Nios II instruction set and |
31,6 → 35,42 |
* access various opcode fields. |
****************************************************************************/ |
/* Instruction encoding formats. */ |
enum iw_format_type { |
/* R1 formats. */ |
iw_i_type, |
iw_r_type, |
iw_j_type, |
iw_custom_type, |
/* 32-bit R2 formats. */ |
iw_L26_type, |
iw_F2I16_type, |
iw_F2X4I12_type, |
iw_F1X4I12_type, |
iw_F1X4L17_type, |
iw_F3X6L5_type, |
iw_F2X6L10_type, |
iw_F3X6_type, |
iw_F3X8_type, |
/* 16-bit R2 formats. */ |
iw_I10_type, |
iw_T1I7_type, |
iw_T2I4_type, |
iw_T1X1I6_type, |
iw_X1I7_type, |
iw_L5I4X1_type, |
iw_T2X1L3_type, |
iw_T2X1I3_type, |
iw_T3X1_type, |
iw_T2X3_type, |
iw_F1X1_type, |
iw_X2L5_type, |
iw_F1I5_type, |
iw_F2_type |
}; |
/* Identify different overflow situations for error messages. */ |
enum overflow_type |
{ |
40,7 → 80,9 |
signed_immed16_overflow, |
unsigned_immed16_overflow, |
unsigned_immed5_overflow, |
signed_immed12_overflow, |
custom_opcode_overflow, |
enumeration_overflow, |
no_overflow |
}; |
52,16 → 94,38 |
d - a 5-bit destination register index |
s - a 5-bit left source register index |
t - a 5-bit right source register index |
D - a 3-bit encoded destination register |
S - a 3-bit encoded left source register |
T - a 3-bit encoded right source register |
i - a 16-bit signed immediate |
u - a 16-bit unsigned immediate |
o - a 16-bit signed program counter relative offset |
j - a 5-bit unsigned immediate |
b - a 5-bit break instruction constant |
k - a (second) 5-bit unsigned immediate |
l - a 8-bit custom instruction constant |
m - a 26-bit unsigned immediate |
o - a 16-bit signed pc-relative offset |
u - a 16-bit unsigned immediate |
I - a 12-bit signed immediate |
M - a 6-bit unsigned immediate |
N - a 6-bit unsigned immediate with 2-bit shift |
O - a 10-bit signed pc-relative offset with 1-bit shift |
P - a 7-bit signed pc-relative offset with 1-bit shift |
U - a 7-bit unsigned immediate with 2-bit shift |
V - a 5-bit unsigned immediate with 2-bit shift |
W - a 4-bit unsigned immediate with 2-bit shift |
X - a 4-bit unsigned immediate with 1-bit shift |
Y - a 4-bit unsigned immediate |
e - an immediate coded as an enumeration for addi.n/subi.n |
f - an immediate coded as an enumeration for slli.n/srli.n |
g - an immediate coded as an enumeration for andi.n |
h - an immediate coded as an enumeration for movi.n |
R - a reglist for ldwm/stwm or push.n/pop.n |
B - a base register specifier and option list for ldwm/stwm |
Literal ',', '(', and ')' characters may also appear in the args as |
delimiters. |
Note that the args describe the semantics and assembly-language syntax |
of the operands, not their encoding into the instruction word. |
The pinfo field is INSN_MACRO for a macro. Otherwise, it is a collection |
of bits describing the instruction, notably any relevant hazard |
information. |
84,6 → 148,8 |
the expected opcode. */ |
unsigned long num_args; /* The number of arguments the instruction |
takes. */ |
unsigned size; /* Size in bytes of the instruction. */ |
enum iw_format_type format; /* Instruction format. */ |
unsigned long match; /* The basic opcode for the instruction. */ |
unsigned long mask; /* Mask for the opcode field of the |
instruction. */ |
107,403 → 173,34 |
#define NIOS2_INSN_CBRANCH 0x00000020 |
#define NIOS2_INSN_CALL 0x00000040 |
#define NIOS2_INSN_ADDI 0x00000080 |
#define NIOS2_INSN_ANDI 0x00000100 |
#define NIOS2_INSN_ORI 0x00000200 |
#define NIOS2_INSN_XORI 0x00000400 |
#define NIOS2_INSN_OPTARG 0x00000080 |
/* Register attributes. */ |
#define REG_NORMAL (1<<0) /* Normal registers. */ |
#define REG_CONTROL (1<<1) /* Control registers. */ |
#define REG_COPROCESSOR (1<<2) /* For custom instructions. */ |
#define REG_3BIT (1<<3) /* For R2 CDX instructions. */ |
#define REG_LDWM (1<<4) /* For R2 ldwm/stwm. */ |
#define REG_POP (1<<5) /* For R2 pop.n/push.n. */ |
/* Associates a register name ($6) with a 5-bit index (eg 6). */ |
struct nios2_reg |
{ |
const char *name; |
const int index; |
unsigned long regtype; |
}; |
/* Pull in the instruction field accessors, opcodes, and masks. */ |
#include "nios2r1.h" |
#include "nios2r2.h" |
/* These are bit masks and shift counts for accessing the various |
fields of a Nios II instruction. */ |
/* Macros for getting and setting an instruction field. */ |
#define GET_INSN_FIELD(X, i) \ |
(((i) & OP_MASK_##X) >> OP_SH_##X) |
#define SET_INSN_FIELD(X, i, j) \ |
((i) = (((i) & ~OP_MASK_##X) | (((j) << OP_SH_##X) & OP_MASK_##X))) |
/* Instruction field definitions. */ |
#define IW_A_LSB 27 |
#define IW_A_MSB 31 |
#define IW_A_SZ 5 |
#define IW_A_MASK 0x1f |
#define IW_B_LSB 22 |
#define IW_B_MSB 26 |
#define IW_B_SZ 5 |
#define IW_B_MASK 0x1f |
#define IW_C_LSB 17 |
#define IW_C_MSB 21 |
#define IW_C_SZ 5 |
#define IW_C_MASK 0x1f |
#define IW_IMM16_LSB 6 |
#define IW_IMM16_MSB 21 |
#define IW_IMM16_SZ 16 |
#define IW_IMM16_MASK 0xffff |
#define IW_IMM26_LSB 6 |
#define IW_IMM26_MSB 31 |
#define IW_IMM26_SZ 26 |
#define IW_IMM26_MASK 0x3ffffff |
#define IW_OP_LSB 0 |
#define IW_OP_MSB 5 |
#define IW_OP_SZ 6 |
#define IW_OP_MASK 0x3f |
#define IW_OPX_LSB 11 |
#define IW_OPX_MSB 16 |
#define IW_OPX_SZ 6 |
#define IW_OPX_MASK 0x3f |
#define IW_SHIFT_IMM5_LSB 6 |
#define IW_SHIFT_IMM5_MSB 10 |
#define IW_SHIFT_IMM5_SZ 5 |
#define IW_SHIFT_IMM5_MASK 0x1f |
#define IW_CONTROL_REGNUM_LSB 6 |
#define IW_CONTROL_REGNUM_MSB 9 |
#define IW_CONTROL_REGNUM_SZ 4 |
#define IW_CONTROL_REGNUM_MASK 0xf |
/* Operator mask and shift. */ |
#define OP_MASK_OP (IW_OP_MASK << IW_OP_LSB) |
#define OP_SH_OP IW_OP_LSB |
/* Masks and shifts for I-type instructions. */ |
#define OP_MASK_IOP (IW_OP_MASK << IW_OP_LSB) |
#define OP_SH_IOP IW_OP_LSB |
#define OP_MASK_IMM16 (IW_IMM16_MASK << IW_IMM16_LSB) |
#define OP_SH_IMM16 IW_IMM16_LSB |
#define OP_MASK_IRD (IW_B_MASK << IW_B_LSB) |
#define OP_SH_IRD IW_B_LSB /* The same as T for I-type. */ |
#define OP_MASK_IRT (IW_B_MASK << IW_B_LSB) |
#define OP_SH_IRT IW_B_LSB |
#define OP_MASK_IRS (IW_A_MASK << IW_A_LSB) |
#define OP_SH_IRS IW_A_LSB |
/* Masks and shifts for R-type instructions. */ |
#define OP_MASK_ROP (IW_OP_MASK << IW_OP_LSB) |
#define OP_SH_ROP IW_OP_LSB |
#define OP_MASK_ROPX (IW_OPX_MASK << IW_OPX_LSB) |
#define OP_SH_ROPX IW_OPX_LSB |
#define OP_MASK_RRD (IW_C_MASK << IW_C_LSB) |
#define OP_SH_RRD IW_C_LSB |
#define OP_MASK_RRT (IW_B_MASK << IW_B_LSB) |
#define OP_SH_RRT IW_B_LSB |
#define OP_MASK_RRS (IW_A_MASK << IW_A_LSB) |
#define OP_SH_RRS IW_A_LSB |
/* Masks and shifts for J-type instructions. */ |
#define OP_MASK_JOP (IW_OP_MASK << IW_OP_LSB) |
#define OP_SH_JOP IW_OP_LSB |
#define OP_MASK_IMM26 (IW_IMM26_MASK << IW_IMM26_LSB) |
#define OP_SH_IMM26 IW_IMM26_LSB |
/* Masks and shifts for CTL instructions. */ |
#define OP_MASK_RCTL 0x000007c0 |
#define OP_SH_RCTL 6 |
/* Break instruction imm5 field. */ |
#define OP_MASK_TRAP_IMM5 0x000007c0 |
#define OP_SH_TRAP_IMM5 6 |
/* Instruction imm5 field. */ |
#define OP_MASK_IMM5 (IW_SHIFT_IMM5_MASK << IW_SHIFT_IMM5_LSB) |
#define OP_SH_IMM5 IW_SHIFT_IMM5_LSB |
/* Cache operation fields (type j,i(s)). */ |
#define OP_MASK_CACHE_OPX (IW_B_MASK << IW_B_LSB) |
#define OP_SH_CACHE_OPX IW_B_LSB |
#define OP_MASK_CACHE_RRS (IW_A_MASK << IW_A_LSB) |
#define OP_SH_CACHE_RRS IW_A_LSB |
/* Custom instruction masks. */ |
#define OP_MASK_CUSTOM_A 0x00010000 |
#define OP_SH_CUSTOM_A 16 |
#define OP_MASK_CUSTOM_B 0x00008000 |
#define OP_SH_CUSTOM_B 15 |
#define OP_MASK_CUSTOM_C 0x00004000 |
#define OP_SH_CUSTOM_C 14 |
#define OP_MASK_CUSTOM_N 0x00003fc0 |
#define OP_SH_CUSTOM_N 6 |
#define OP_MAX_CUSTOM_N 255 |
/* OP instruction values. */ |
#define OP_ADDI 4 |
#define OP_ANDHI 44 |
#define OP_ANDI 12 |
#define OP_BEQ 38 |
#define OP_BGE 14 |
#define OP_BGEU 46 |
#define OP_BLT 22 |
#define OP_BLTU 54 |
#define OP_BNE 30 |
#define OP_BR 6 |
#define OP_CALL 0 |
#define OP_CMPEQI 32 |
#define OP_CMPGEI 8 |
#define OP_CMPGEUI 40 |
#define OP_CMPLTI 16 |
#define OP_CMPLTUI 48 |
#define OP_CMPNEI 24 |
#define OP_CUSTOM 50 |
#define OP_FLUSHD 59 |
#define OP_FLUSHDA 27 |
#define OP_INITD 51 |
#define OP_INITDA 19 |
#define OP_JMPI 1 |
#define OP_LDB 7 |
#define OP_LDBIO 39 |
#define OP_LDBU 3 |
#define OP_LDBUIO 35 |
#define OP_LDH 15 |
#define OP_LDHIO 47 |
#define OP_LDHU 11 |
#define OP_LDHUIO 43 |
#define OP_LDL 31 |
#define OP_LDW 23 |
#define OP_LDWIO 55 |
#define OP_MULI 36 |
#define OP_OPX 58 |
#define OP_ORHI 52 |
#define OP_ORI 20 |
#define OP_RDPRS 56 |
#define OP_STB 5 |
#define OP_STBIO 37 |
#define OP_STC 29 |
#define OP_STH 13 |
#define OP_STHIO 45 |
#define OP_STW 21 |
#define OP_STWIO 53 |
#define OP_XORHI 60 |
#define OP_XORI 28 |
/* OPX instruction values. */ |
#define OPX_ADD 49 |
#define OPX_AND 14 |
#define OPX_BREAK 52 |
#define OPX_BRET 9 |
#define OPX_CALLR 29 |
#define OPX_CMPEQ 32 |
#define OPX_CMPGE 8 |
#define OPX_CMPGEU 40 |
#define OPX_CMPLT 16 |
#define OPX_CMPLTU 48 |
#define OPX_CMPNE 24 |
#define OPX_CRST 62 |
#define OPX_DIV 37 |
#define OPX_DIVU 36 |
#define OPX_ERET 1 |
#define OPX_FLUSHI 12 |
#define OPX_FLUSHP 4 |
#define OPX_HBREAK 53 |
#define OPX_INITI 41 |
#define OPX_INTR 61 |
#define OPX_JMP 13 |
#define OPX_MUL 39 |
#define OPX_MULXSS 31 |
#define OPX_MULXSU 23 |
#define OPX_MULXUU 7 |
#define OPX_NEXTPC 28 |
#define OPX_NOR 6 |
#define OPX_OR 22 |
#define OPX_RDCTL 38 |
#define OPX_RET 5 |
#define OPX_ROL 3 |
#define OPX_ROLI 2 |
#define OPX_ROR 11 |
#define OPX_SLL 19 |
#define OPX_SLLI 18 |
#define OPX_SRA 59 |
#define OPX_SRAI 58 |
#define OPX_SRL 27 |
#define OPX_SRLI 26 |
#define OPX_SUB 57 |
#define OPX_SYNC 54 |
#define OPX_TRAP 45 |
#define OPX_WRCTL 46 |
#define OPX_WRPRS 20 |
#define OPX_XOR 30 |
/* The following macros define the opcode matches for each |
instruction code & OP_MASK_INST == OP_MATCH_INST. */ |
/* OP instruction matches. */ |
#define OP_MATCH_ADDI OP_ADDI |
#define OP_MATCH_ANDHI OP_ANDHI |
#define OP_MATCH_ANDI OP_ANDI |
#define OP_MATCH_BEQ OP_BEQ |
#define OP_MATCH_BGE OP_BGE |
#define OP_MATCH_BGEU OP_BGEU |
#define OP_MATCH_BLT OP_BLT |
#define OP_MATCH_BLTU OP_BLTU |
#define OP_MATCH_BNE OP_BNE |
#define OP_MATCH_BR OP_BR |
#define OP_MATCH_FLUSHD OP_FLUSHD |
#define OP_MATCH_FLUSHDA OP_FLUSHDA |
#define OP_MATCH_INITD OP_INITD |
#define OP_MATCH_INITDA OP_INITDA |
#define OP_MATCH_CALL OP_CALL |
#define OP_MATCH_CMPEQI OP_CMPEQI |
#define OP_MATCH_CMPGEI OP_CMPGEI |
#define OP_MATCH_CMPGEUI OP_CMPGEUI |
#define OP_MATCH_CMPLTI OP_CMPLTI |
#define OP_MATCH_CMPLTUI OP_CMPLTUI |
#define OP_MATCH_CMPNEI OP_CMPNEI |
#define OP_MATCH_JMPI OP_JMPI |
#define OP_MATCH_LDB OP_LDB |
#define OP_MATCH_LDBIO OP_LDBIO |
#define OP_MATCH_LDBU OP_LDBU |
#define OP_MATCH_LDBUIO OP_LDBUIO |
#define OP_MATCH_LDH OP_LDH |
#define OP_MATCH_LDHIO OP_LDHIO |
#define OP_MATCH_LDHU OP_LDHU |
#define OP_MATCH_LDHUIO OP_LDHUIO |
#define OP_MATCH_LDL OP_LDL |
#define OP_MATCH_LDW OP_LDW |
#define OP_MATCH_LDWIO OP_LDWIO |
#define OP_MATCH_MULI OP_MULI |
#define OP_MATCH_OPX OP_OPX |
#define OP_MATCH_ORHI OP_ORHI |
#define OP_MATCH_ORI OP_ORI |
#define OP_MATCH_RDPRS OP_RDPRS |
#define OP_MATCH_STB OP_STB |
#define OP_MATCH_STBIO OP_STBIO |
#define OP_MATCH_STC OP_STC |
#define OP_MATCH_STH OP_STH |
#define OP_MATCH_STHIO OP_STHIO |
#define OP_MATCH_STW OP_STW |
#define OP_MATCH_STWIO OP_STWIO |
#define OP_MATCH_CUSTOM OP_CUSTOM |
#define OP_MATCH_XORHI OP_XORHI |
#define OP_MATCH_XORI OP_XORI |
#define OP_MATCH_OPX OP_OPX |
/* OPX instruction values. */ |
#define OPX_MATCH(code) ((code << IW_OPX_LSB) | OP_OPX) |
#define OP_MATCH_ADD OPX_MATCH (OPX_ADD) |
#define OP_MATCH_AND OPX_MATCH (OPX_AND) |
#define OP_MATCH_BREAK ((0x1e << 17) | OPX_MATCH (OPX_BREAK)) |
#define OP_MATCH_BRET (0xf0000000 | OPX_MATCH (OPX_BRET)) |
#define OP_MATCH_CALLR ((0x1f << 17) | OPX_MATCH (OPX_CALLR)) |
#define OP_MATCH_CMPEQ OPX_MATCH (OPX_CMPEQ) |
#define OP_MATCH_CMPGE OPX_MATCH (OPX_CMPGE) |
#define OP_MATCH_CMPGEU OPX_MATCH (OPX_CMPGEU) |
#define OP_MATCH_CMPLT OPX_MATCH (OPX_CMPLT) |
#define OP_MATCH_CMPLTU OPX_MATCH (OPX_CMPLTU) |
#define OP_MATCH_CMPNE OPX_MATCH (OPX_CMPNE) |
#define OP_MATCH_DIV OPX_MATCH (OPX_DIV) |
#define OP_MATCH_DIVU OPX_MATCH (OPX_DIVU) |
#define OP_MATCH_JMP OPX_MATCH (OPX_JMP) |
#define OP_MATCH_MUL OPX_MATCH (OPX_MUL) |
#define OP_MATCH_MULXSS OPX_MATCH (OPX_MULXSS) |
#define OP_MATCH_MULXSU OPX_MATCH (OPX_MULXSU) |
#define OP_MATCH_MULXUU OPX_MATCH (OPX_MULXUU) |
#define OP_MATCH_NEXTPC OPX_MATCH (OPX_NEXTPC) |
#define OP_MATCH_NOR OPX_MATCH (OPX_NOR) |
#define OP_MATCH_OR OPX_MATCH (OPX_OR) |
#define OP_MATCH_RDCTL OPX_MATCH (OPX_RDCTL) |
#define OP_MATCH_RET (0xf8000000 | OPX_MATCH (OPX_RET)) |
#define OP_MATCH_ROL OPX_MATCH (OPX_ROL) |
#define OP_MATCH_ROLI OPX_MATCH (OPX_ROLI) |
#define OP_MATCH_ROR OPX_MATCH (OPX_ROR) |
#define OP_MATCH_SLL OPX_MATCH (OPX_SLL) |
#define OP_MATCH_SLLI OPX_MATCH (OPX_SLLI) |
#define OP_MATCH_SRA OPX_MATCH (OPX_SRA) |
#define OP_MATCH_SRAI OPX_MATCH (OPX_SRAI) |
#define OP_MATCH_SRL OPX_MATCH (OPX_SRL) |
#define OP_MATCH_SRLI OPX_MATCH (OPX_SRLI) |
#define OP_MATCH_SUB OPX_MATCH (OPX_SUB) |
#define OP_MATCH_SYNC OPX_MATCH (OPX_SYNC) |
#define OP_MATCH_TRAP ((0x1d << 17) | OPX_MATCH (OPX_TRAP)) |
#define OP_MATCH_ERET (0xef800000 | OPX_MATCH (OPX_ERET)) |
#define OP_MATCH_WRCTL OPX_MATCH (OPX_WRCTL) |
#define OP_MATCH_WRPRS OPX_MATCH (OPX_WRPRS) |
#define OP_MATCH_XOR OPX_MATCH (OPX_XOR) |
#define OP_MATCH_FLUSHI OPX_MATCH (OPX_FLUSHI) |
#define OP_MATCH_FLUSHP OPX_MATCH (OPX_FLUSHP) |
#define OP_MATCH_INITI OPX_MATCH (OPX_INITI) |
/* Some unusual op masks. */ |
#define OP_MASK_BREAK ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_RRD \ |
| OP_MASK_ROPX | OP_MASK_OP) \ |
& 0xfffff03f) |
#define OP_MASK_CALLR ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_JMP ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_SYNC ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_TRAP ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_RRD \ |
| OP_MASK_ROPX | OP_MASK_OP) \ |
& 0xfffff83f) |
#define OP_MASK_WRCTL ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) /*& 0xfffff83f */ |
#define OP_MASK_NEXTPC ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_FLUSHI ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_INITI ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX \ |
| OP_MASK_OP)) |
#define OP_MASK_ROLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP)) |
#define OP_MASK_SLLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP)) |
#define OP_MASK_SRAI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP)) |
#define OP_MASK_SRLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP)) |
#define OP_MASK_RDCTL ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_ROPX \ |
| OP_MASK_OP)) /*& 0xfffff83f */ |
#ifndef OP_MASK |
#define OP_MASK 0xffffffff |
#endif |
/* These convenience macros to extract instruction fields are used by GDB. */ |
#define GET_IW_A(Iw) \ |
(((Iw) >> IW_A_LSB) & IW_A_MASK) |
#define GET_IW_B(Iw) \ |
(((Iw) >> IW_B_LSB) & IW_B_MASK) |
#define GET_IW_C(Iw) \ |
(((Iw) >> IW_C_LSB) & IW_C_MASK) |
#define GET_IW_CONTROL_REGNUM(Iw) \ |
(((Iw) >> IW_CONTROL_REGNUM_LSB) & IW_CONTROL_REGNUM_MASK) |
#define GET_IW_IMM16(Iw) \ |
(((Iw) >> IW_IMM16_LSB) & IW_IMM16_MASK) |
#define GET_IW_IMM26(Iw) \ |
(((Iw) >> IW_IMM26_LSB) & IW_IMM26_MASK) |
#define GET_IW_OP(Iw) \ |
(((Iw) >> IW_OP_LSB) & IW_OP_MASK) |
#define GET_IW_OPX(Iw) \ |
(((Iw) >> IW_OPX_LSB) & IW_OPX_MASK) |
/* These are the data structures we use to hold the instruction information. */ |
extern const struct nios2_opcode nios2_builtin_opcodes[]; |
extern const int bfd_nios2_num_builtin_opcodes; |
/* These are the data structures used to hold the instruction information. */ |
extern const struct nios2_opcode nios2_r1_opcodes[]; |
extern const int nios2_num_r1_opcodes; |
extern const struct nios2_opcode nios2_r2_opcodes[]; |
extern const int nios2_num_r2_opcodes; |
extern struct nios2_opcode *nios2_opcodes; |
extern int bfd_nios2_num_opcodes; |
extern int nios2_num_opcodes; |
/* These are the data structures used to hold the register information. */ |
extern const struct nios2_reg nios2_builtin_regs[]; |
511,12 → 208,28 |
extern const int nios2_num_builtin_regs; |
extern int nios2_num_regs; |
/* Machine-independent macro for number of opcodes. */ |
#define NUMOPCODES bfd_nios2_num_opcodes |
#define NUMREGISTERS nios2_num_regs; |
/* Return the opcode descriptor for a single instruction. */ |
extern const struct nios2_opcode * |
nios2_find_opcode_hash (unsigned long, unsigned long); |
/* This is made extern so that the assembler can use it to find out |
what instruction caused an error. */ |
extern const struct nios2_opcode *nios2_find_opcode_hash (unsigned long); |
/* Lookup tables for R2 immediate decodings. */ |
extern unsigned int nios2_r2_asi_n_mappings[]; |
extern const int nios2_num_r2_asi_n_mappings; |
extern unsigned int nios2_r2_shi_n_mappings[]; |
extern const int nios2_num_r2_shi_n_mappings; |
extern unsigned int nios2_r2_andi_n_mappings[]; |
extern const int nios2_num_r2_andi_n_mappings; |
/* Lookup table for 3-bit register decodings. */ |
extern int nios2_r2_reg3_mappings[]; |
extern const int nios2_num_r2_reg3_mappings; |
/* Lookup table for REG_RANGE value list decodings. */ |
extern unsigned long nios2_r2_reg_range_mappings[]; |
extern const int nios2_num_r2_reg_range_mappings; |
#ifdef __cplusplus |
} |
#endif |
#endif /* _NIOS2_H */ |
/contrib/toolchain/binutils/include/opcode/nios2r1.h |
---|
0,0 → 1,474 |
/* Nios II R1 opcode list for GAS, the GNU assembler. |
Copyright (C) 2013-2015 Free Software Foundation, Inc. |
Contributed by Mentor Graphics, Inc. |
This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. |
GAS/GDB is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3, or (at your option) |
any later version. |
GAS/GDB is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with GAS or GDB; see the file COPYING3. If not, write to |
the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
Boston, MA 02110-1301, USA. */ |
#ifndef _NIOS2R1_H_ |
#define _NIOS2R1_H_ |
/* R1 fields. */ |
#define IW_R1_OP_LSB 0 |
#define IW_R1_OP_SIZE 6 |
#define IW_R1_OP_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R1_OP_SIZE)) |
#define IW_R1_OP_SHIFTED_MASK (IW_R1_OP_UNSHIFTED_MASK << IW_R1_OP_LSB) |
#define GET_IW_R1_OP(W) (((W) >> IW_R1_OP_LSB) & IW_R1_OP_UNSHIFTED_MASK) |
#define SET_IW_R1_OP(V) (((V) & IW_R1_OP_UNSHIFTED_MASK) << IW_R1_OP_LSB) |
#define IW_I_A_LSB 27 |
#define IW_I_A_SIZE 5 |
#define IW_I_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_A_SIZE)) |
#define IW_I_A_SHIFTED_MASK (IW_I_A_UNSHIFTED_MASK << IW_I_A_LSB) |
#define GET_IW_I_A(W) (((W) >> IW_I_A_LSB) & IW_I_A_UNSHIFTED_MASK) |
#define SET_IW_I_A(V) (((V) & IW_I_A_UNSHIFTED_MASK) << IW_I_A_LSB) |
#define IW_I_B_LSB 22 |
#define IW_I_B_SIZE 5 |
#define IW_I_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_B_SIZE)) |
#define IW_I_B_SHIFTED_MASK (IW_I_B_UNSHIFTED_MASK << IW_I_B_LSB) |
#define GET_IW_I_B(W) (((W) >> IW_I_B_LSB) & IW_I_B_UNSHIFTED_MASK) |
#define SET_IW_I_B(V) (((V) & IW_I_B_UNSHIFTED_MASK) << IW_I_B_LSB) |
#define IW_I_IMM16_LSB 6 |
#define IW_I_IMM16_SIZE 16 |
#define IW_I_IMM16_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_IMM16_SIZE)) |
#define IW_I_IMM16_SHIFTED_MASK (IW_I_IMM16_UNSHIFTED_MASK << IW_I_IMM16_LSB) |
#define GET_IW_I_IMM16(W) (((W) >> IW_I_IMM16_LSB) & IW_I_IMM16_UNSHIFTED_MASK) |
#define SET_IW_I_IMM16(V) (((V) & IW_I_IMM16_UNSHIFTED_MASK) << IW_I_IMM16_LSB) |
#define IW_R_A_LSB 27 |
#define IW_R_A_SIZE 5 |
#define IW_R_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_A_SIZE)) |
#define IW_R_A_SHIFTED_MASK (IW_R_A_UNSHIFTED_MASK << IW_R_A_LSB) |
#define GET_IW_R_A(W) (((W) >> IW_R_A_LSB) & IW_R_A_UNSHIFTED_MASK) |
#define SET_IW_R_A(V) (((V) & IW_R_A_UNSHIFTED_MASK) << IW_R_A_LSB) |
#define IW_R_B_LSB 22 |
#define IW_R_B_SIZE 5 |
#define IW_R_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_B_SIZE)) |
#define IW_R_B_SHIFTED_MASK (IW_R_B_UNSHIFTED_MASK << IW_R_B_LSB) |
#define GET_IW_R_B(W) (((W) >> IW_R_B_LSB) & IW_R_B_UNSHIFTED_MASK) |
#define SET_IW_R_B(V) (((V) & IW_R_B_UNSHIFTED_MASK) << IW_R_B_LSB) |
#define IW_R_C_LSB 17 |
#define IW_R_C_SIZE 5 |
#define IW_R_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_C_SIZE)) |
#define IW_R_C_SHIFTED_MASK (IW_R_C_UNSHIFTED_MASK << IW_R_C_LSB) |
#define GET_IW_R_C(W) (((W) >> IW_R_C_LSB) & IW_R_C_UNSHIFTED_MASK) |
#define SET_IW_R_C(V) (((V) & IW_R_C_UNSHIFTED_MASK) << IW_R_C_LSB) |
#define IW_R_OPX_LSB 11 |
#define IW_R_OPX_SIZE 6 |
#define IW_R_OPX_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_OPX_SIZE)) |
#define IW_R_OPX_SHIFTED_MASK (IW_R_OPX_UNSHIFTED_MASK << IW_R_OPX_LSB) |
#define GET_IW_R_OPX(W) (((W) >> IW_R_OPX_LSB) & IW_R_OPX_UNSHIFTED_MASK) |
#define SET_IW_R_OPX(V) (((V) & IW_R_OPX_UNSHIFTED_MASK) << IW_R_OPX_LSB) |
#define IW_R_IMM5_LSB 6 |
#define IW_R_IMM5_SIZE 5 |
#define IW_R_IMM5_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_IMM5_SIZE)) |
#define IW_R_IMM5_SHIFTED_MASK (IW_R_IMM5_UNSHIFTED_MASK << IW_R_IMM5_LSB) |
#define GET_IW_R_IMM5(W) (((W) >> IW_R_IMM5_LSB) & IW_R_IMM5_UNSHIFTED_MASK) |
#define SET_IW_R_IMM5(V) (((V) & IW_R_IMM5_UNSHIFTED_MASK) << IW_R_IMM5_LSB) |
#define IW_J_IMM26_LSB 6 |
#define IW_J_IMM26_SIZE 26 |
#define IW_J_IMM26_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_J_IMM26_SIZE)) |
#define IW_J_IMM26_SHIFTED_MASK (IW_J_IMM26_UNSHIFTED_MASK << IW_J_IMM26_LSB) |
#define GET_IW_J_IMM26(W) (((W) >> IW_J_IMM26_LSB) & IW_J_IMM26_UNSHIFTED_MASK) |
#define SET_IW_J_IMM26(V) (((V) & IW_J_IMM26_UNSHIFTED_MASK) << IW_J_IMM26_LSB) |
#define IW_CUSTOM_A_LSB 27 |
#define IW_CUSTOM_A_SIZE 5 |
#define IW_CUSTOM_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_A_SIZE)) |
#define IW_CUSTOM_A_SHIFTED_MASK (IW_CUSTOM_A_UNSHIFTED_MASK << IW_CUSTOM_A_LSB) |
#define GET_IW_CUSTOM_A(W) (((W) >> IW_CUSTOM_A_LSB) & IW_CUSTOM_A_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_A(V) (((V) & IW_CUSTOM_A_UNSHIFTED_MASK) << IW_CUSTOM_A_LSB) |
#define IW_CUSTOM_B_LSB 22 |
#define IW_CUSTOM_B_SIZE 5 |
#define IW_CUSTOM_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_B_SIZE)) |
#define IW_CUSTOM_B_SHIFTED_MASK (IW_CUSTOM_B_UNSHIFTED_MASK << IW_CUSTOM_B_LSB) |
#define GET_IW_CUSTOM_B(W) (((W) >> IW_CUSTOM_B_LSB) & IW_CUSTOM_B_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_B(V) (((V) & IW_CUSTOM_B_UNSHIFTED_MASK) << IW_CUSTOM_B_LSB) |
#define IW_CUSTOM_C_LSB 17 |
#define IW_CUSTOM_C_SIZE 5 |
#define IW_CUSTOM_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_C_SIZE)) |
#define IW_CUSTOM_C_SHIFTED_MASK (IW_CUSTOM_C_UNSHIFTED_MASK << IW_CUSTOM_C_LSB) |
#define GET_IW_CUSTOM_C(W) (((W) >> IW_CUSTOM_C_LSB) & IW_CUSTOM_C_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_C(V) (((V) & IW_CUSTOM_C_UNSHIFTED_MASK) << IW_CUSTOM_C_LSB) |
#define IW_CUSTOM_READA_LSB 16 |
#define IW_CUSTOM_READA_SIZE 1 |
#define IW_CUSTOM_READA_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READA_SIZE)) |
#define IW_CUSTOM_READA_SHIFTED_MASK (IW_CUSTOM_READA_UNSHIFTED_MASK << IW_CUSTOM_READA_LSB) |
#define GET_IW_CUSTOM_READA(W) (((W) >> IW_CUSTOM_READA_LSB) & IW_CUSTOM_READA_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_READA(V) (((V) & IW_CUSTOM_READA_UNSHIFTED_MASK) << IW_CUSTOM_READA_LSB) |
#define IW_CUSTOM_READB_LSB 15 |
#define IW_CUSTOM_READB_SIZE 1 |
#define IW_CUSTOM_READB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READB_SIZE)) |
#define IW_CUSTOM_READB_SHIFTED_MASK (IW_CUSTOM_READB_UNSHIFTED_MASK << IW_CUSTOM_READB_LSB) |
#define GET_IW_CUSTOM_READB(W) (((W) >> IW_CUSTOM_READB_LSB) & IW_CUSTOM_READB_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_READB(V) (((V) & IW_CUSTOM_READB_UNSHIFTED_MASK) << IW_CUSTOM_READB_LSB) |
#define IW_CUSTOM_READC_LSB 14 |
#define IW_CUSTOM_READC_SIZE 1 |
#define IW_CUSTOM_READC_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READC_SIZE)) |
#define IW_CUSTOM_READC_SHIFTED_MASK (IW_CUSTOM_READC_UNSHIFTED_MASK << IW_CUSTOM_READC_LSB) |
#define GET_IW_CUSTOM_READC(W) (((W) >> IW_CUSTOM_READC_LSB) & IW_CUSTOM_READC_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_READC(V) (((V) & IW_CUSTOM_READC_UNSHIFTED_MASK) << IW_CUSTOM_READC_LSB) |
#define IW_CUSTOM_N_LSB 6 |
#define IW_CUSTOM_N_SIZE 8 |
#define IW_CUSTOM_N_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_N_SIZE)) |
#define IW_CUSTOM_N_SHIFTED_MASK (IW_CUSTOM_N_UNSHIFTED_MASK << IW_CUSTOM_N_LSB) |
#define GET_IW_CUSTOM_N(W) (((W) >> IW_CUSTOM_N_LSB) & IW_CUSTOM_N_UNSHIFTED_MASK) |
#define SET_IW_CUSTOM_N(V) (((V) & IW_CUSTOM_N_UNSHIFTED_MASK) << IW_CUSTOM_N_LSB) |
/* R1 opcodes. */ |
#define R1_OP_CALL 0 |
#define R1_OP_JMPI 1 |
#define R1_OP_LDBU 3 |
#define R1_OP_ADDI 4 |
#define R1_OP_STB 5 |
#define R1_OP_BR 6 |
#define R1_OP_LDB 7 |
#define R1_OP_CMPGEI 8 |
#define R1_OP_LDHU 11 |
#define R1_OP_ANDI 12 |
#define R1_OP_STH 13 |
#define R1_OP_BGE 14 |
#define R1_OP_LDH 15 |
#define R1_OP_CMPLTI 16 |
#define R1_OP_INITDA 19 |
#define R1_OP_ORI 20 |
#define R1_OP_STW 21 |
#define R1_OP_BLT 22 |
#define R1_OP_LDW 23 |
#define R1_OP_CMPNEI 24 |
#define R1_OP_FLUSHDA 27 |
#define R1_OP_XORI 28 |
#define R1_OP_BNE 30 |
#define R1_OP_CMPEQI 32 |
#define R1_OP_LDBUIO 35 |
#define R1_OP_MULI 36 |
#define R1_OP_STBIO 37 |
#define R1_OP_BEQ 38 |
#define R1_OP_LDBIO 39 |
#define R1_OP_CMPGEUI 40 |
#define R1_OP_LDHUIO 43 |
#define R1_OP_ANDHI 44 |
#define R1_OP_STHIO 45 |
#define R1_OP_BGEU 46 |
#define R1_OP_LDHIO 47 |
#define R1_OP_CMPLTUI 48 |
#define R1_OP_CUSTOM 50 |
#define R1_OP_INITD 51 |
#define R1_OP_ORHI 52 |
#define R1_OP_STWIO 53 |
#define R1_OP_BLTU 54 |
#define R1_OP_LDWIO 55 |
#define R1_OP_RDPRS 56 |
#define R1_OP_OPX 58 |
#define R1_OP_FLUSHD 59 |
#define R1_OP_XORHI 60 |
#define R1_OPX_ERET 1 |
#define R1_OPX_ROLI 2 |
#define R1_OPX_ROL 3 |
#define R1_OPX_FLUSHP 4 |
#define R1_OPX_RET 5 |
#define R1_OPX_NOR 6 |
#define R1_OPX_MULXUU 7 |
#define R1_OPX_CMPGE 8 |
#define R1_OPX_BRET 9 |
#define R1_OPX_ROR 11 |
#define R1_OPX_FLUSHI 12 |
#define R1_OPX_JMP 13 |
#define R1_OPX_AND 14 |
#define R1_OPX_CMPLT 16 |
#define R1_OPX_SLLI 18 |
#define R1_OPX_SLL 19 |
#define R1_OPX_WRPRS 20 |
#define R1_OPX_OR 22 |
#define R1_OPX_MULXSU 23 |
#define R1_OPX_CMPNE 24 |
#define R1_OPX_SRLI 26 |
#define R1_OPX_SRL 27 |
#define R1_OPX_NEXTPC 28 |
#define R1_OPX_CALLR 29 |
#define R1_OPX_XOR 30 |
#define R1_OPX_MULXSS 31 |
#define R1_OPX_CMPEQ 32 |
#define R1_OPX_DIVU 36 |
#define R1_OPX_DIV 37 |
#define R1_OPX_RDCTL 38 |
#define R1_OPX_MUL 39 |
#define R1_OPX_CMPGEU 40 |
#define R1_OPX_INITI 41 |
#define R1_OPX_TRAP 45 |
#define R1_OPX_WRCTL 46 |
#define R1_OPX_CMPLTU 48 |
#define R1_OPX_ADD 49 |
#define R1_OPX_BREAK 52 |
#define R1_OPX_SYNC 54 |
#define R1_OPX_SUB 57 |
#define R1_OPX_SRAI 58 |
#define R1_OPX_SRA 59 |
/* Some convenience macros for R1 encodings, for use in instruction tables. |
MATCH_R1_OPX0(NAME) and MASK_R1_OPX0 are used for R-type instructions |
with 3 register operands and constant 0 in the immediate field. |
The general forms are MATCH_R1_OPX(NAME, A, B, C) where the arguments specify |
constant values and MASK_R1_OPX(A, B, C, N) where the arguments are booleans |
that are true if the field should be included in the mask. |
*/ |
#define MATCH_R1_OP(NAME) \ |
(SET_IW_R1_OP (R1_OP_##NAME)) |
#define MASK_R1_OP \ |
IW_R1_OP_SHIFTED_MASK |
#define MATCH_R1_OPX0(NAME) \ |
(SET_IW_R1_OP (R1_OP_OPX) | SET_IW_R_OPX (R1_OPX_##NAME)) |
#define MASK_R1_OPX0 \ |
(IW_R1_OP_SHIFTED_MASK | IW_R_OPX_SHIFTED_MASK | IW_R_IMM5_SHIFTED_MASK) |
#define MATCH_R1_OPX(NAME, A, B, C) \ |
(MATCH_R1_OPX0 (NAME) | SET_IW_R_A (A) | SET_IW_R_B (B) | SET_IW_R_C (C)) |
#define MASK_R1_OPX(A, B, C, N) \ |
(IW_R1_OP_SHIFTED_MASK | IW_R_OPX_SHIFTED_MASK \ |
| (A ? IW_R_A_SHIFTED_MASK : 0) \ |
| (B ? IW_R_B_SHIFTED_MASK : 0) \ |
| (C ? IW_R_C_SHIFTED_MASK : 0) \ |
| (N ? IW_R_IMM5_SHIFTED_MASK : 0)) |
/* And here's the match/mask macros for the R1 instruction set. */ |
#define MATCH_R1_ADD MATCH_R1_OPX0 (ADD) |
#define MASK_R1_ADD MASK_R1_OPX0 |
#define MATCH_R1_ADDI MATCH_R1_OP (ADDI) |
#define MASK_R1_ADDI MASK_R1_OP |
#define MATCH_R1_AND MATCH_R1_OPX0 (AND) |
#define MASK_R1_AND MASK_R1_OPX0 |
#define MATCH_R1_ANDHI MATCH_R1_OP (ANDHI) |
#define MASK_R1_ANDHI MASK_R1_OP |
#define MATCH_R1_ANDI MATCH_R1_OP (ANDI) |
#define MASK_R1_ANDI MASK_R1_OP |
#define MATCH_R1_BEQ MATCH_R1_OP (BEQ) |
#define MASK_R1_BEQ MASK_R1_OP |
#define MATCH_R1_BGE MATCH_R1_OP (BGE) |
#define MASK_R1_BGE MASK_R1_OP |
#define MATCH_R1_BGEU MATCH_R1_OP (BGEU) |
#define MASK_R1_BGEU MASK_R1_OP |
#define MATCH_R1_BGT MATCH_R1_OP (BLT) |
#define MASK_R1_BGT MASK_R1_OP |
#define MATCH_R1_BGTU MATCH_R1_OP (BLTU) |
#define MASK_R1_BGTU MASK_R1_OP |
#define MATCH_R1_BLE MATCH_R1_OP (BGE) |
#define MASK_R1_BLE MASK_R1_OP |
#define MATCH_R1_BLEU MATCH_R1_OP (BGEU) |
#define MASK_R1_BLEU MASK_R1_OP |
#define MATCH_R1_BLT MATCH_R1_OP (BLT) |
#define MASK_R1_BLT MASK_R1_OP |
#define MATCH_R1_BLTU MATCH_R1_OP (BLTU) |
#define MASK_R1_BLTU MASK_R1_OP |
#define MATCH_R1_BNE MATCH_R1_OP (BNE) |
#define MASK_R1_BNE MASK_R1_OP |
#define MATCH_R1_BR MATCH_R1_OP (BR) |
#define MASK_R1_BR MASK_R1_OP | IW_I_A_SHIFTED_MASK | IW_I_B_SHIFTED_MASK |
#define MATCH_R1_BREAK MATCH_R1_OPX (BREAK, 0, 0, 0x1e) |
#define MASK_R1_BREAK MASK_R1_OPX (1, 1, 1, 0) |
#define MATCH_R1_BRET MATCH_R1_OPX (BRET, 0x1e, 0, 0) |
#define MASK_R1_BRET MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_CALL MATCH_R1_OP (CALL) |
#define MASK_R1_CALL MASK_R1_OP |
#define MATCH_R1_CALLR MATCH_R1_OPX (CALLR, 0, 0, 0x1f) |
#define MASK_R1_CALLR MASK_R1_OPX (0, 1, 1, 1) |
#define MATCH_R1_CMPEQ MATCH_R1_OPX0 (CMPEQ) |
#define MASK_R1_CMPEQ MASK_R1_OPX0 |
#define MATCH_R1_CMPEQI MATCH_R1_OP (CMPEQI) |
#define MASK_R1_CMPEQI MASK_R1_OP |
#define MATCH_R1_CMPGE MATCH_R1_OPX0 (CMPGE) |
#define MASK_R1_CMPGE MASK_R1_OPX0 |
#define MATCH_R1_CMPGEI MATCH_R1_OP (CMPGEI) |
#define MASK_R1_CMPGEI MASK_R1_OP |
#define MATCH_R1_CMPGEU MATCH_R1_OPX0 (CMPGEU) |
#define MASK_R1_CMPGEU MASK_R1_OPX0 |
#define MATCH_R1_CMPGEUI MATCH_R1_OP (CMPGEUI) |
#define MASK_R1_CMPGEUI MASK_R1_OP |
#define MATCH_R1_CMPGT MATCH_R1_OPX0 (CMPLT) |
#define MASK_R1_CMPGT MASK_R1_OPX0 |
#define MATCH_R1_CMPGTI MATCH_R1_OP (CMPGEI) |
#define MASK_R1_CMPGTI MASK_R1_OP |
#define MATCH_R1_CMPGTU MATCH_R1_OPX0 (CMPLTU) |
#define MASK_R1_CMPGTU MASK_R1_OPX0 |
#define MATCH_R1_CMPGTUI MATCH_R1_OP (CMPGEUI) |
#define MASK_R1_CMPGTUI MASK_R1_OP |
#define MATCH_R1_CMPLE MATCH_R1_OPX0 (CMPGE) |
#define MASK_R1_CMPLE MASK_R1_OPX0 |
#define MATCH_R1_CMPLEI MATCH_R1_OP (CMPLTI) |
#define MASK_R1_CMPLEI MASK_R1_OP |
#define MATCH_R1_CMPLEU MATCH_R1_OPX0 (CMPGEU) |
#define MASK_R1_CMPLEU MASK_R1_OPX0 |
#define MATCH_R1_CMPLEUI MATCH_R1_OP (CMPLTUI) |
#define MASK_R1_CMPLEUI MASK_R1_OP |
#define MATCH_R1_CMPLT MATCH_R1_OPX0 (CMPLT) |
#define MASK_R1_CMPLT MASK_R1_OPX0 |
#define MATCH_R1_CMPLTI MATCH_R1_OP (CMPLTI) |
#define MASK_R1_CMPLTI MASK_R1_OP |
#define MATCH_R1_CMPLTU MATCH_R1_OPX0 (CMPLTU) |
#define MASK_R1_CMPLTU MASK_R1_OPX0 |
#define MATCH_R1_CMPLTUI MATCH_R1_OP (CMPLTUI) |
#define MASK_R1_CMPLTUI MASK_R1_OP |
#define MATCH_R1_CMPNE MATCH_R1_OPX0 (CMPNE) |
#define MASK_R1_CMPNE MASK_R1_OPX0 |
#define MATCH_R1_CMPNEI MATCH_R1_OP (CMPNEI) |
#define MASK_R1_CMPNEI MASK_R1_OP |
#define MATCH_R1_CUSTOM MATCH_R1_OP (CUSTOM) |
#define MASK_R1_CUSTOM MASK_R1_OP |
#define MATCH_R1_DIV MATCH_R1_OPX0 (DIV) |
#define MASK_R1_DIV MASK_R1_OPX0 |
#define MATCH_R1_DIVU MATCH_R1_OPX0 (DIVU) |
#define MASK_R1_DIVU MASK_R1_OPX0 |
#define MATCH_R1_ERET MATCH_R1_OPX (ERET, 0x1d, 0x1e, 0) |
#define MASK_R1_ERET MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_FLUSHD MATCH_R1_OP (FLUSHD) | SET_IW_I_B (0) |
#define MASK_R1_FLUSHD MASK_R1_OP | IW_I_B_SHIFTED_MASK |
#define MATCH_R1_FLUSHDA MATCH_R1_OP (FLUSHDA) | SET_IW_I_B (0) |
#define MASK_R1_FLUSHDA MASK_R1_OP | IW_I_B_SHIFTED_MASK |
#define MATCH_R1_FLUSHI MATCH_R1_OPX (FLUSHI, 0, 0, 0) |
#define MASK_R1_FLUSHI MASK_R1_OPX (0, 1, 1, 1) |
#define MATCH_R1_FLUSHP MATCH_R1_OPX (FLUSHP, 0, 0, 0) |
#define MASK_R1_FLUSHP MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_INITD MATCH_R1_OP (INITD) | SET_IW_I_B (0) |
#define MASK_R1_INITD MASK_R1_OP | IW_I_B_SHIFTED_MASK |
#define MATCH_R1_INITDA MATCH_R1_OP (INITDA) | SET_IW_I_B (0) |
#define MASK_R1_INITDA MASK_R1_OP | IW_I_B_SHIFTED_MASK |
#define MATCH_R1_INITI MATCH_R1_OPX (INITI, 0, 0, 0) |
#define MASK_R1_INITI MASK_R1_OPX (0, 1, 1, 1) |
#define MATCH_R1_JMP MATCH_R1_OPX (JMP, 0, 0, 0) |
#define MASK_R1_JMP MASK_R1_OPX (0, 1, 1, 1) |
#define MATCH_R1_JMPI MATCH_R1_OP (JMPI) |
#define MASK_R1_JMPI MASK_R1_OP |
#define MATCH_R1_LDB MATCH_R1_OP (LDB) |
#define MASK_R1_LDB MASK_R1_OP |
#define MATCH_R1_LDBIO MATCH_R1_OP (LDBIO) |
#define MASK_R1_LDBIO MASK_R1_OP |
#define MATCH_R1_LDBU MATCH_R1_OP (LDBU) |
#define MASK_R1_LDBU MASK_R1_OP |
#define MATCH_R1_LDBUIO MATCH_R1_OP (LDBUIO) |
#define MASK_R1_LDBUIO MASK_R1_OP |
#define MATCH_R1_LDH MATCH_R1_OP (LDH) |
#define MASK_R1_LDH MASK_R1_OP |
#define MATCH_R1_LDHIO MATCH_R1_OP (LDHIO) |
#define MASK_R1_LDHIO MASK_R1_OP |
#define MATCH_R1_LDHU MATCH_R1_OP (LDHU) |
#define MASK_R1_LDHU MASK_R1_OP |
#define MATCH_R1_LDHUIO MATCH_R1_OP (LDHUIO) |
#define MASK_R1_LDHUIO MASK_R1_OP |
#define MATCH_R1_LDW MATCH_R1_OP (LDW) |
#define MASK_R1_LDW MASK_R1_OP |
#define MATCH_R1_LDWIO MATCH_R1_OP (LDWIO) |
#define MASK_R1_LDWIO MASK_R1_OP |
#define MATCH_R1_MOV MATCH_R1_OPX (ADD, 0, 0, 0) |
#define MASK_R1_MOV MASK_R1_OPX (0, 1, 0, 1) |
#define MATCH_R1_MOVHI MATCH_R1_OP (ORHI) | SET_IW_I_A (0) |
#define MASK_R1_MOVHI MASK_R1_OP | IW_I_A_SHIFTED_MASK |
#define MATCH_R1_MOVI MATCH_R1_OP (ADDI) | SET_IW_I_A (0) |
#define MASK_R1_MOVI MASK_R1_OP | IW_I_A_SHIFTED_MASK |
#define MATCH_R1_MOVUI MATCH_R1_OP (ORI) | SET_IW_I_A (0) |
#define MASK_R1_MOVUI MASK_R1_OP | IW_I_A_SHIFTED_MASK |
#define MATCH_R1_MUL MATCH_R1_OPX0 (MUL) |
#define MASK_R1_MUL MASK_R1_OPX0 |
#define MATCH_R1_MULI MATCH_R1_OP (MULI) |
#define MASK_R1_MULI MASK_R1_OP |
#define MATCH_R1_MULXSS MATCH_R1_OPX0 (MULXSS) |
#define MASK_R1_MULXSS MASK_R1_OPX0 |
#define MATCH_R1_MULXSU MATCH_R1_OPX0 (MULXSU) |
#define MASK_R1_MULXSU MASK_R1_OPX0 |
#define MATCH_R1_MULXUU MATCH_R1_OPX0 (MULXUU) |
#define MASK_R1_MULXUU MASK_R1_OPX0 |
#define MATCH_R1_NEXTPC MATCH_R1_OPX (NEXTPC, 0, 0, 0) |
#define MASK_R1_NEXTPC MASK_R1_OPX (1, 1, 0, 1) |
#define MATCH_R1_NOP MATCH_R1_OPX (ADD, 0, 0, 0) |
#define MASK_R1_NOP MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_NOR MATCH_R1_OPX0 (NOR) |
#define MASK_R1_NOR MASK_R1_OPX0 |
#define MATCH_R1_OR MATCH_R1_OPX0 (OR) |
#define MASK_R1_OR MASK_R1_OPX0 |
#define MATCH_R1_ORHI MATCH_R1_OP (ORHI) |
#define MASK_R1_ORHI MASK_R1_OP |
#define MATCH_R1_ORI MATCH_R1_OP (ORI) |
#define MASK_R1_ORI MASK_R1_OP |
#define MATCH_R1_RDCTL MATCH_R1_OPX (RDCTL, 0, 0, 0) |
#define MASK_R1_RDCTL MASK_R1_OPX (1, 1, 0, 0) |
#define MATCH_R1_RDPRS MATCH_R1_OP (RDPRS) |
#define MASK_R1_RDPRS MASK_R1_OP |
#define MATCH_R1_RET MATCH_R1_OPX (RET, 0x1f, 0, 0) |
#define MASK_R1_RET MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_ROL MATCH_R1_OPX0 (ROL) |
#define MASK_R1_ROL MASK_R1_OPX0 |
#define MATCH_R1_ROLI MATCH_R1_OPX (ROLI, 0, 0, 0) |
#define MASK_R1_ROLI MASK_R1_OPX (0, 1, 0, 0) |
#define MATCH_R1_ROR MATCH_R1_OPX0 (ROR) |
#define MASK_R1_ROR MASK_R1_OPX0 |
#define MATCH_R1_SLL MATCH_R1_OPX0 (SLL) |
#define MASK_R1_SLL MASK_R1_OPX0 |
#define MATCH_R1_SLLI MATCH_R1_OPX (SLLI, 0, 0, 0) |
#define MASK_R1_SLLI MASK_R1_OPX (0, 1, 0, 0) |
#define MATCH_R1_SRA MATCH_R1_OPX0 (SRA) |
#define MASK_R1_SRA MASK_R1_OPX0 |
#define MATCH_R1_SRAI MATCH_R1_OPX (SRAI, 0, 0, 0) |
#define MASK_R1_SRAI MASK_R1_OPX (0, 1, 0, 0) |
#define MATCH_R1_SRL MATCH_R1_OPX0 (SRL) |
#define MASK_R1_SRL MASK_R1_OPX0 |
#define MATCH_R1_SRLI MATCH_R1_OPX (SRLI, 0, 0, 0) |
#define MASK_R1_SRLI MASK_R1_OPX (0, 1, 0, 0) |
#define MATCH_R1_STB MATCH_R1_OP (STB) |
#define MASK_R1_STB MASK_R1_OP |
#define MATCH_R1_STBIO MATCH_R1_OP (STBIO) |
#define MASK_R1_STBIO MASK_R1_OP |
#define MATCH_R1_STH MATCH_R1_OP (STH) |
#define MASK_R1_STH MASK_R1_OP |
#define MATCH_R1_STHIO MATCH_R1_OP (STHIO) |
#define MASK_R1_STHIO MASK_R1_OP |
#define MATCH_R1_STW MATCH_R1_OP (STW) |
#define MASK_R1_STW MASK_R1_OP |
#define MATCH_R1_STWIO MATCH_R1_OP (STWIO) |
#define MASK_R1_STWIO MASK_R1_OP |
#define MATCH_R1_SUB MATCH_R1_OPX0 (SUB) |
#define MASK_R1_SUB MASK_R1_OPX0 |
#define MATCH_R1_SUBI MATCH_R1_OP (ADDI) |
#define MASK_R1_SUBI MASK_R1_OP |
#define MATCH_R1_SYNC MATCH_R1_OPX (SYNC, 0, 0, 0) |
#define MASK_R1_SYNC MASK_R1_OPX (1, 1, 1, 1) |
#define MATCH_R1_TRAP MATCH_R1_OPX (TRAP, 0, 0, 0x1d) |
#define MASK_R1_TRAP MASK_R1_OPX (1, 1, 1, 0) |
#define MATCH_R1_WRCTL MATCH_R1_OPX (WRCTL, 0, 0, 0) |
#define MASK_R1_WRCTL MASK_R1_OPX (0, 1, 1, 0) |
#define MATCH_R1_WRPRS MATCH_R1_OPX (WRPRS, 0, 0, 0) |
#define MASK_R1_WRPRS MASK_R1_OPX (0, 1, 0, 1) |
#define MATCH_R1_XOR MATCH_R1_OPX0 (XOR) |
#define MASK_R1_XOR MASK_R1_OPX0 |
#define MATCH_R1_XORHI MATCH_R1_OP (XORHI) |
#define MASK_R1_XORHI MASK_R1_OP |
#define MATCH_R1_XORI MATCH_R1_OP (XORI) |
#define MASK_R1_XORI MASK_R1_OP |
#endif /* _NIOS2R1_H */ |
/contrib/toolchain/binutils/include/opcode/nios2r2.h |
---|
0,0 → 1,1081 |
/* Nios II R2 opcode list for GAS, the GNU assembler. |
Copyright (C) 2013-2015 Free Software Foundation, Inc. |
Contributed by Mentor Graphics, Inc. |
This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. |
GAS/GDB is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 3, or (at your option) |
any later version. |
GAS/GDB is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with GAS or GDB; see the file COPYING3. If not, write to |
the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
Boston, MA 02110-1301, USA. */ |
#ifndef _NIOS2R2_H_ |
#define _NIOS2R2_H_ |
/* Fields for 32-bit R2 instructions. */ |
#define IW_R2_OP_LSB 0 |
#define IW_R2_OP_SIZE 6 |
#define IW_R2_OP_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R2_OP_SIZE)) |
#define IW_R2_OP_SHIFTED_MASK (IW_R2_OP_UNSHIFTED_MASK << IW_R2_OP_LSB) |
#define GET_IW_R2_OP(W) (((W) >> IW_R2_OP_LSB) & IW_R2_OP_UNSHIFTED_MASK) |
#define SET_IW_R2_OP(V) (((V) & IW_R2_OP_UNSHIFTED_MASK) << IW_R2_OP_LSB) |
#define IW_L26_IMM26_LSB 6 |
#define IW_L26_IMM26_SIZE 26 |
#define IW_L26_IMM26_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L26_IMM26_SIZE)) |
#define IW_L26_IMM26_SHIFTED_MASK (IW_L26_IMM26_UNSHIFTED_MASK << IW_L26_IMM26_LSB) |
#define GET_IW_L26_IMM26(W) (((W) >> IW_L26_IMM26_LSB) & IW_L26_IMM26_UNSHIFTED_MASK) |
#define SET_IW_L26_IMM26(V) (((V) & IW_L26_IMM26_UNSHIFTED_MASK) << IW_L26_IMM26_LSB) |
#define IW_F2I16_A_LSB 6 |
#define IW_F2I16_A_SIZE 5 |
#define IW_F2I16_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2I16_A_SIZE)) |
#define IW_F2I16_A_SHIFTED_MASK (IW_F2I16_A_UNSHIFTED_MASK << IW_F2I16_A_LSB) |
#define GET_IW_F2I16_A(W) (((W) >> IW_F2I16_A_LSB) & IW_F2I16_A_UNSHIFTED_MASK) |
#define SET_IW_F2I16_A(V) (((V) & IW_F2I16_A_UNSHIFTED_MASK) << IW_F2I16_A_LSB) |
#define IW_F2I16_B_LSB 11 |
#define IW_F2I16_B_SIZE 5 |
#define IW_F2I16_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2I16_B_SIZE)) |
#define IW_F2I16_B_SHIFTED_MASK (IW_F2I16_B_UNSHIFTED_MASK << IW_F2I16_B_LSB) |
#define GET_IW_F2I16_B(W) (((W) >> IW_F2I16_B_LSB) & IW_F2I16_B_UNSHIFTED_MASK) |
#define SET_IW_F2I16_B(V) (((V) & IW_F2I16_B_UNSHIFTED_MASK) << IW_F2I16_B_LSB) |
#define IW_F2I16_IMM16_LSB 16 |
#define IW_F2I16_IMM16_SIZE 16 |
#define IW_F2I16_IMM16_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2I16_IMM16_SIZE)) |
#define IW_F2I16_IMM16_SHIFTED_MASK (IW_F2I16_IMM16_UNSHIFTED_MASK << IW_F2I16_IMM16_LSB) |
#define GET_IW_F2I16_IMM16(W) (((W) >> IW_F2I16_IMM16_LSB) & IW_F2I16_IMM16_UNSHIFTED_MASK) |
#define SET_IW_F2I16_IMM16(V) (((V) & IW_F2I16_IMM16_UNSHIFTED_MASK) << IW_F2I16_IMM16_LSB) |
/* Common to all three I12-group formats F2X4I12, F1X4I12, F1X4L17. */ |
#define IW_I12_X_LSB 28 |
#define IW_I12_X_SIZE 4 |
#define IW_I12_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I12_X_SIZE)) |
#define IW_I12_X_SHIFTED_MASK (IW_I12_X_UNSHIFTED_MASK << IW_I12_X_LSB) |
#define GET_IW_I12_X(W) (((W) >> IW_I12_X_LSB) & IW_I12_X_UNSHIFTED_MASK) |
#define SET_IW_I12_X(V) (((V) & IW_I12_X_UNSHIFTED_MASK) << IW_I12_X_LSB) |
#define IW_F2X4I12_A_LSB 6 |
#define IW_F2X4I12_A_SIZE 5 |
#define IW_F2X4I12_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X4I12_A_SIZE)) |
#define IW_F2X4I12_A_SHIFTED_MASK (IW_F2X4I12_A_UNSHIFTED_MASK << IW_F2X4I12_A_LSB) |
#define GET_IW_F2X4I12_A(W) (((W) >> IW_F2X4I12_A_LSB) & IW_F2X4I12_A_UNSHIFTED_MASK) |
#define SET_IW_F2X4I12_A(V) (((V) & IW_F2X4I12_A_UNSHIFTED_MASK) << IW_F2X4I12_A_LSB) |
#define IW_F2X4I12_B_LSB 11 |
#define IW_F2X4I12_B_SIZE 5 |
#define IW_F2X4I12_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X4I12_B_SIZE)) |
#define IW_F2X4I12_B_SHIFTED_MASK (IW_F2X4I12_B_UNSHIFTED_MASK << IW_F2X4I12_B_LSB) |
#define GET_IW_F2X4I12_B(W) (((W) >> IW_F2X4I12_B_LSB) & IW_F2X4I12_B_UNSHIFTED_MASK) |
#define SET_IW_F2X4I12_B(V) (((V) & IW_F2X4I12_B_UNSHIFTED_MASK) << IW_F2X4I12_B_LSB) |
#define IW_F2X4I12_IMM12_LSB 16 |
#define IW_F2X4I12_IMM12_SIZE 12 |
#define IW_F2X4I12_IMM12_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X4I12_IMM12_SIZE)) |
#define IW_F2X4I12_IMM12_SHIFTED_MASK (IW_F2X4I12_IMM12_UNSHIFTED_MASK << IW_F2X4I12_IMM12_LSB) |
#define GET_IW_F2X4I12_IMM12(W) (((W) >> IW_F2X4I12_IMM12_LSB) & IW_F2X4I12_IMM12_UNSHIFTED_MASK) |
#define SET_IW_F2X4I12_IMM12(V) (((V) & IW_F2X4I12_IMM12_UNSHIFTED_MASK) << IW_F2X4I12_IMM12_LSB) |
#define IW_F1X4I12_A_LSB 6 |
#define IW_F1X4I12_A_SIZE 5 |
#define IW_F1X4I12_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4I12_A_SIZE)) |
#define IW_F1X4I12_A_SHIFTED_MASK (IW_F1X4I12_A_UNSHIFTED_MASK << IW_F1X4I12_A_LSB) |
#define GET_IW_F1X4I12_A(W) (((W) >> IW_F1X4I12_A_LSB) & IW_F1X4I12_A_UNSHIFTED_MASK) |
#define SET_IW_F1X4I12_A(V) (((V) & IW_F1X4I12_A_UNSHIFTED_MASK) << IW_F1X4I12_A_LSB) |
#define IW_F1X4I12_X_LSB 11 |
#define IW_F1X4I12_X_SIZE 5 |
#define IW_F1X4I12_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4I12_X_SIZE)) |
#define IW_F1X4I12_X_SHIFTED_MASK (IW_F1X4I12_X_UNSHIFTED_MASK << IW_F1X4I12_X_LSB) |
#define GET_IW_F1X4I12_X(W) (((W) >> IW_F1X4I12_X_LSB) & IW_F1X4I12_X_UNSHIFTED_MASK) |
#define SET_IW_F1X4I12_X(V) (((V) & IW_F1X4I12_X_UNSHIFTED_MASK) << IW_F1X4I12_X_LSB) |
#define IW_F1X4I12_IMM12_LSB 16 |
#define IW_F1X4I12_IMM12_SIZE 12 |
#define IW_F1X4I12_IMM12_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4I12_IMM12_SIZE)) |
#define IW_F1X4I12_IMM12_SHIFTED_MASK (IW_F1X4I12_IMM12_UNSHIFTED_MASK << IW_F1X4I12_IMM12_LSB) |
#define GET_IW_F1X4I12_IMM12(W) (((W) >> IW_F1X4I12_IMM12_LSB) & IW_F1X4I12_IMM12_UNSHIFTED_MASK) |
#define SET_IW_F1X4I12_IMM12(V) (((V) & IW_F1X4I12_IMM12_UNSHIFTED_MASK) << IW_F1X4I12_IMM12_LSB) |
#define IW_F1X4L17_A_LSB 6 |
#define IW_F1X4L17_A_SIZE 5 |
#define IW_F1X4L17_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_A_SIZE)) |
#define IW_F1X4L17_A_SHIFTED_MASK (IW_F1X4L17_A_UNSHIFTED_MASK << IW_F1X4L17_A_LSB) |
#define GET_IW_F1X4L17_A(W) (((W) >> IW_F1X4L17_A_LSB) & IW_F1X4L17_A_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_A(V) (((V) & IW_F1X4L17_A_UNSHIFTED_MASK) << IW_F1X4L17_A_LSB) |
#define IW_F1X4L17_ID_LSB 11 |
#define IW_F1X4L17_ID_SIZE 1 |
#define IW_F1X4L17_ID_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_ID_SIZE)) |
#define IW_F1X4L17_ID_SHIFTED_MASK (IW_F1X4L17_ID_UNSHIFTED_MASK << IW_F1X4L17_ID_LSB) |
#define GET_IW_F1X4L17_ID(W) (((W) >> IW_F1X4L17_ID_LSB) & IW_F1X4L17_ID_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_ID(V) (((V) & IW_F1X4L17_ID_UNSHIFTED_MASK) << IW_F1X4L17_ID_LSB) |
#define IW_F1X4L17_WB_LSB 12 |
#define IW_F1X4L17_WB_SIZE 1 |
#define IW_F1X4L17_WB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_WB_SIZE)) |
#define IW_F1X4L17_WB_SHIFTED_MASK (IW_F1X4L17_WB_UNSHIFTED_MASK << IW_F1X4L17_WB_LSB) |
#define GET_IW_F1X4L17_WB(W) (((W) >> IW_F1X4L17_WB_LSB) & IW_F1X4L17_WB_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_WB(V) (((V) & IW_F1X4L17_WB_UNSHIFTED_MASK) << IW_F1X4L17_WB_LSB) |
#define IW_F1X4L17_RS_LSB 13 |
#define IW_F1X4L17_RS_SIZE 1 |
#define IW_F1X4L17_RS_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_RS_SIZE)) |
#define IW_F1X4L17_RS_SHIFTED_MASK (IW_F1X4L17_RS_UNSHIFTED_MASK << IW_F1X4L17_RS_LSB) |
#define GET_IW_F1X4L17_RS(W) (((W) >> IW_F1X4L17_RS_LSB) & IW_F1X4L17_RS_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_RS(V) (((V) & IW_F1X4L17_RS_UNSHIFTED_MASK) << IW_F1X4L17_RS_LSB) |
#define IW_F1X4L17_PC_LSB 14 |
#define IW_F1X4L17_PC_SIZE 1 |
#define IW_F1X4L17_PC_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_PC_SIZE)) |
#define IW_F1X4L17_PC_SHIFTED_MASK (IW_F1X4L17_PC_UNSHIFTED_MASK << IW_F1X4L17_PC_LSB) |
#define GET_IW_F1X4L17_PC(W) (((W) >> IW_F1X4L17_PC_LSB) & IW_F1X4L17_PC_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_PC(V) (((V) & IW_F1X4L17_PC_UNSHIFTED_MASK) << IW_F1X4L17_PC_LSB) |
#define IW_F1X4L17_RSV_LSB 15 |
#define IW_F1X4L17_RSV_SIZE 1 |
#define IW_F1X4L17_RSV_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_RSV_SIZE)) |
#define IW_F1X4L17_RSV_SHIFTED_MASK (IW_F1X4L17_RSV_UNSHIFTED_MASK << IW_F1X4L17_RSV_LSB) |
#define GET_IW_F1X4L17_RSV(W) (((W) >> IW_F1X4L17_RSV_LSB) & IW_F1X4L17_RSV_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_RSV(V) (((V) & IW_F1X4L17_RSV_UNSHIFTED_MASK) << IW_F1X4L17_RSV_LSB) |
#define IW_F1X4L17_REGMASK_LSB 16 |
#define IW_F1X4L17_REGMASK_SIZE 12 |
#define IW_F1X4L17_REGMASK_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X4L17_REGMASK_SIZE)) |
#define IW_F1X4L17_REGMASK_SHIFTED_MASK (IW_F1X4L17_REGMASK_UNSHIFTED_MASK << IW_F1X4L17_REGMASK_LSB) |
#define GET_IW_F1X4L17_REGMASK(W) (((W) >> IW_F1X4L17_REGMASK_LSB) & IW_F1X4L17_REGMASK_UNSHIFTED_MASK) |
#define SET_IW_F1X4L17_REGMASK(V) (((V) & IW_F1X4L17_REGMASK_UNSHIFTED_MASK) << IW_F1X4L17_REGMASK_LSB) |
/* Shared by OPX-group formats F3X6L5, F2X6L10, F3X6. */ |
#define IW_OPX_X_LSB 26 |
#define IW_OPX_X_SIZE 6 |
#define IW_OPX_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_OPX_X_SIZE)) |
#define IW_OPX_X_SHIFTED_MASK (IW_OPX_X_UNSHIFTED_MASK << IW_OPX_X_LSB) |
#define GET_IW_OPX_X(W) (((W) >> IW_OPX_X_LSB) & IW_OPX_X_UNSHIFTED_MASK) |
#define SET_IW_OPX_X(V) (((V) & IW_OPX_X_UNSHIFTED_MASK) << IW_OPX_X_LSB) |
/* F3X6L5 accessors are also used for F3X6 formats. */ |
#define IW_F3X6L5_A_LSB 6 |
#define IW_F3X6L5_A_SIZE 5 |
#define IW_F3X6L5_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X6L5_A_SIZE)) |
#define IW_F3X6L5_A_SHIFTED_MASK (IW_F3X6L5_A_UNSHIFTED_MASK << IW_F3X6L5_A_LSB) |
#define GET_IW_F3X6L5_A(W) (((W) >> IW_F3X6L5_A_LSB) & IW_F3X6L5_A_UNSHIFTED_MASK) |
#define SET_IW_F3X6L5_A(V) (((V) & IW_F3X6L5_A_UNSHIFTED_MASK) << IW_F3X6L5_A_LSB) |
#define IW_F3X6L5_B_LSB 11 |
#define IW_F3X6L5_B_SIZE 5 |
#define IW_F3X6L5_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X6L5_B_SIZE)) |
#define IW_F3X6L5_B_SHIFTED_MASK (IW_F3X6L5_B_UNSHIFTED_MASK << IW_F3X6L5_B_LSB) |
#define GET_IW_F3X6L5_B(W) (((W) >> IW_F3X6L5_B_LSB) & IW_F3X6L5_B_UNSHIFTED_MASK) |
#define SET_IW_F3X6L5_B(V) (((V) & IW_F3X6L5_B_UNSHIFTED_MASK) << IW_F3X6L5_B_LSB) |
#define IW_F3X6L5_C_LSB 16 |
#define IW_F3X6L5_C_SIZE 5 |
#define IW_F3X6L5_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X6L5_C_SIZE)) |
#define IW_F3X6L5_C_SHIFTED_MASK (IW_F3X6L5_C_UNSHIFTED_MASK << IW_F3X6L5_C_LSB) |
#define GET_IW_F3X6L5_C(W) (((W) >> IW_F3X6L5_C_LSB) & IW_F3X6L5_C_UNSHIFTED_MASK) |
#define SET_IW_F3X6L5_C(V) (((V) & IW_F3X6L5_C_UNSHIFTED_MASK) << IW_F3X6L5_C_LSB) |
#define IW_F3X6L5_IMM5_LSB 21 |
#define IW_F3X6L5_IMM5_SIZE 5 |
#define IW_F3X6L5_IMM5_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X6L5_IMM5_SIZE)) |
#define IW_F3X6L5_IMM5_SHIFTED_MASK (IW_F3X6L5_IMM5_UNSHIFTED_MASK << IW_F3X6L5_IMM5_LSB) |
#define GET_IW_F3X6L5_IMM5(W) (((W) >> IW_F3X6L5_IMM5_LSB) & IW_F3X6L5_IMM5_UNSHIFTED_MASK) |
#define SET_IW_F3X6L5_IMM5(V) (((V) & IW_F3X6L5_IMM5_UNSHIFTED_MASK) << IW_F3X6L5_IMM5_LSB) |
#define IW_F2X6L10_A_LSB 6 |
#define IW_F2X6L10_A_SIZE 5 |
#define IW_F2X6L10_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X6L10_A_SIZE)) |
#define IW_F2X6L10_A_SHIFTED_MASK (IW_F2X6L10_A_UNSHIFTED_MASK << IW_F2X6L10_A_LSB) |
#define GET_IW_F2X6L10_A(W) (((W) >> IW_F2X6L10_A_LSB) & IW_F2X6L10_A_UNSHIFTED_MASK) |
#define SET_IW_F2X6L10_A(V) (((V) & IW_F2X6L10_A_UNSHIFTED_MASK) << IW_F2X6L10_A_LSB) |
#define IW_F2X6L10_B_LSB 11 |
#define IW_F2X6L10_B_SIZE 5 |
#define IW_F2X6L10_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X6L10_B_SIZE)) |
#define IW_F2X6L10_B_SHIFTED_MASK (IW_F2X6L10_B_UNSHIFTED_MASK << IW_F2X6L10_B_LSB) |
#define GET_IW_F2X6L10_B(W) (((W) >> IW_F2X6L10_B_LSB) & IW_F2X6L10_B_UNSHIFTED_MASK) |
#define SET_IW_F2X6L10_B(V) (((V) & IW_F2X6L10_B_UNSHIFTED_MASK) << IW_F2X6L10_B_LSB) |
#define IW_F2X6L10_LSB_LSB 16 |
#define IW_F2X6L10_LSB_SIZE 5 |
#define IW_F2X6L10_LSB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X6L10_LSB_SIZE)) |
#define IW_F2X6L10_LSB_SHIFTED_MASK (IW_F2X6L10_LSB_UNSHIFTED_MASK << IW_F2X6L10_LSB_LSB) |
#define GET_IW_F2X6L10_LSB(W) (((W) >> IW_F2X6L10_LSB_LSB) & IW_F2X6L10_LSB_UNSHIFTED_MASK) |
#define SET_IW_F2X6L10_LSB(V) (((V) & IW_F2X6L10_LSB_UNSHIFTED_MASK) << IW_F2X6L10_LSB_LSB) |
#define IW_F2X6L10_MSB_LSB 21 |
#define IW_F2X6L10_MSB_SIZE 5 |
#define IW_F2X6L10_MSB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2X6L10_MSB_SIZE)) |
#define IW_F2X6L10_MSB_SHIFTED_MASK (IW_F2X6L10_MSB_UNSHIFTED_MASK << IW_F2X6L10_MSB_LSB) |
#define GET_IW_F2X6L10_MSB(W) (((W) >> IW_F2X6L10_MSB_LSB) & IW_F2X6L10_MSB_UNSHIFTED_MASK) |
#define SET_IW_F2X6L10_MSB(V) (((V) & IW_F2X6L10_MSB_UNSHIFTED_MASK) << IW_F2X6L10_MSB_LSB) |
#define IW_F3X8_A_LSB 6 |
#define IW_F3X8_A_SIZE 5 |
#define IW_F3X8_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_A_SIZE)) |
#define IW_F3X8_A_SHIFTED_MASK (IW_F3X8_A_UNSHIFTED_MASK << IW_F3X8_A_LSB) |
#define GET_IW_F3X8_A(W) (((W) >> IW_F3X8_A_LSB) & IW_F3X8_A_UNSHIFTED_MASK) |
#define SET_IW_F3X8_A(V) (((V) & IW_F3X8_A_UNSHIFTED_MASK) << IW_F3X8_A_LSB) |
#define IW_F3X8_B_LSB 11 |
#define IW_F3X8_B_SIZE 5 |
#define IW_F3X8_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_B_SIZE)) |
#define IW_F3X8_B_SHIFTED_MASK (IW_F3X8_B_UNSHIFTED_MASK << IW_F3X8_B_LSB) |
#define GET_IW_F3X8_B(W) (((W) >> IW_F3X8_B_LSB) & IW_F3X8_B_UNSHIFTED_MASK) |
#define SET_IW_F3X8_B(V) (((V) & IW_F3X8_B_UNSHIFTED_MASK) << IW_F3X8_B_LSB) |
#define IW_F3X8_C_LSB 16 |
#define IW_F3X8_C_SIZE 5 |
#define IW_F3X8_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_C_SIZE)) |
#define IW_F3X8_C_SHIFTED_MASK (IW_F3X8_C_UNSHIFTED_MASK << IW_F3X8_C_LSB) |
#define GET_IW_F3X8_C(W) (((W) >> IW_F3X8_C_LSB) & IW_F3X8_C_UNSHIFTED_MASK) |
#define SET_IW_F3X8_C(V) (((V) & IW_F3X8_C_UNSHIFTED_MASK) << IW_F3X8_C_LSB) |
#define IW_F3X8_READA_LSB 21 |
#define IW_F3X8_READA_SIZE 1 |
#define IW_F3X8_READA_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_READA_SIZE)) |
#define IW_F3X8_READA_SHIFTED_MASK (IW_F3X8_READA_UNSHIFTED_MASK << IW_F3X8_READA_LSB) |
#define GET_IW_F3X8_READA(W) (((W) >> IW_F3X8_READA_LSB) & IW_F3X8_READA_UNSHIFTED_MASK) |
#define SET_IW_F3X8_READA(V) (((V) & IW_F3X8_READA_UNSHIFTED_MASK) << IW_F3X8_READA_LSB) |
#define IW_F3X8_READB_LSB 22 |
#define IW_F3X8_READB_SIZE 1 |
#define IW_F3X8_READB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_READB_SIZE)) |
#define IW_F3X8_READB_SHIFTED_MASK (IW_F3X8_READB_UNSHIFTED_MASK << IW_F3X8_READB_LSB) |
#define GET_IW_F3X8_READB(W) (((W) >> IW_F3X8_READB_LSB) & IW_F3X8_READB_UNSHIFTED_MASK) |
#define SET_IW_F3X8_READB(V) (((V) & IW_F3X8_READB_UNSHIFTED_MASK) << IW_F3X8_READB_LSB) |
#define IW_F3X8_READC_LSB 23 |
#define IW_F3X8_READC_SIZE 1 |
#define IW_F3X8_READC_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_READC_SIZE)) |
#define IW_F3X8_READC_SHIFTED_MASK (IW_F3X8_READC_UNSHIFTED_MASK << IW_F3X8_READC_LSB) |
#define GET_IW_F3X8_READC(W) (((W) >> IW_F3X8_READC_LSB) & IW_F3X8_READC_UNSHIFTED_MASK) |
#define SET_IW_F3X8_READC(V) (((V) & IW_F3X8_READC_UNSHIFTED_MASK) << IW_F3X8_READC_LSB) |
#define IW_F3X8_N_LSB 24 |
#define IW_F3X8_N_SIZE 8 |
#define IW_F3X8_N_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F3X8_N_SIZE)) |
#define IW_F3X8_N_SHIFTED_MASK (IW_F3X8_N_UNSHIFTED_MASK << IW_F3X8_N_LSB) |
#define GET_IW_F3X8_N(W) (((W) >> IW_F3X8_N_LSB) & IW_F3X8_N_UNSHIFTED_MASK) |
#define SET_IW_F3X8_N(V) (((V) & IW_F3X8_N_UNSHIFTED_MASK) << IW_F3X8_N_LSB) |
/* 16-bit R2 fields. */ |
#define IW_I10_IMM10_LSB 6 |
#define IW_I10_IMM10_SIZE 10 |
#define IW_I10_IMM10_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I10_IMM10_SIZE)) |
#define IW_I10_IMM10_SHIFTED_MASK (IW_I10_IMM10_UNSHIFTED_MASK << IW_I10_IMM10_LSB) |
#define GET_IW_I10_IMM10(W) (((W) >> IW_I10_IMM10_LSB) & IW_I10_IMM10_UNSHIFTED_MASK) |
#define SET_IW_I10_IMM10(V) (((V) & IW_I10_IMM10_UNSHIFTED_MASK) << IW_I10_IMM10_LSB) |
#define IW_T1I7_A3_LSB 6 |
#define IW_T1I7_A3_SIZE 3 |
#define IW_T1I7_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T1I7_A3_SIZE)) |
#define IW_T1I7_A3_SHIFTED_MASK (IW_T1I7_A3_UNSHIFTED_MASK << IW_T1I7_A3_LSB) |
#define GET_IW_T1I7_A3(W) (((W) >> IW_T1I7_A3_LSB) & IW_T1I7_A3_UNSHIFTED_MASK) |
#define SET_IW_T1I7_A3(V) (((V) & IW_T1I7_A3_UNSHIFTED_MASK) << IW_T1I7_A3_LSB) |
#define IW_T1I7_IMM7_LSB 9 |
#define IW_T1I7_IMM7_SIZE 7 |
#define IW_T1I7_IMM7_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T1I7_IMM7_SIZE)) |
#define IW_T1I7_IMM7_SHIFTED_MASK (IW_T1I7_IMM7_UNSHIFTED_MASK << IW_T1I7_IMM7_LSB) |
#define GET_IW_T1I7_IMM7(W) (((W) >> IW_T1I7_IMM7_LSB) & IW_T1I7_IMM7_UNSHIFTED_MASK) |
#define SET_IW_T1I7_IMM7(V) (((V) & IW_T1I7_IMM7_UNSHIFTED_MASK) << IW_T1I7_IMM7_LSB) |
#define IW_T2I4_A3_LSB 6 |
#define IW_T2I4_A3_SIZE 3 |
#define IW_T2I4_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2I4_A3_SIZE)) |
#define IW_T2I4_A3_SHIFTED_MASK (IW_T2I4_A3_UNSHIFTED_MASK << IW_T2I4_A3_LSB) |
#define GET_IW_T2I4_A3(W) (((W) >> IW_T2I4_A3_LSB) & IW_T2I4_A3_UNSHIFTED_MASK) |
#define SET_IW_T2I4_A3(V) (((V) & IW_T2I4_A3_UNSHIFTED_MASK) << IW_T2I4_A3_LSB) |
#define IW_T2I4_B3_LSB 9 |
#define IW_T2I4_B3_SIZE 3 |
#define IW_T2I4_B3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2I4_B3_SIZE)) |
#define IW_T2I4_B3_SHIFTED_MASK (IW_T2I4_B3_UNSHIFTED_MASK << IW_T2I4_B3_LSB) |
#define GET_IW_T2I4_B3(W) (((W) >> IW_T2I4_B3_LSB) & IW_T2I4_B3_UNSHIFTED_MASK) |
#define SET_IW_T2I4_B3(V) (((V) & IW_T2I4_B3_UNSHIFTED_MASK) << IW_T2I4_B3_LSB) |
#define IW_T2I4_IMM4_LSB 12 |
#define IW_T2I4_IMM4_SIZE 4 |
#define IW_T2I4_IMM4_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2I4_IMM4_SIZE)) |
#define IW_T2I4_IMM4_SHIFTED_MASK (IW_T2I4_IMM4_UNSHIFTED_MASK << IW_T2I4_IMM4_LSB) |
#define GET_IW_T2I4_IMM4(W) (((W) >> IW_T2I4_IMM4_LSB) & IW_T2I4_IMM4_UNSHIFTED_MASK) |
#define SET_IW_T2I4_IMM4(V) (((V) & IW_T2I4_IMM4_UNSHIFTED_MASK) << IW_T2I4_IMM4_LSB) |
#define IW_T1X1I6_A3_LSB 6 |
#define IW_T1X1I6_A3_SIZE 3 |
#define IW_T1X1I6_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T1X1I6_A3_SIZE)) |
#define IW_T1X1I6_A3_SHIFTED_MASK (IW_T1X1I6_A3_UNSHIFTED_MASK << IW_T1X1I6_A3_LSB) |
#define GET_IW_T1X1I6_A3(W) (((W) >> IW_T1X1I6_A3_LSB) & IW_T1X1I6_A3_UNSHIFTED_MASK) |
#define SET_IW_T1X1I6_A3(V) (((V) & IW_T1X1I6_A3_UNSHIFTED_MASK) << IW_T1X1I6_A3_LSB) |
#define IW_T1X1I6_IMM6_LSB 9 |
#define IW_T1X1I6_IMM6_SIZE 6 |
#define IW_T1X1I6_IMM6_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T1X1I6_IMM6_SIZE)) |
#define IW_T1X1I6_IMM6_SHIFTED_MASK (IW_T1X1I6_IMM6_UNSHIFTED_MASK << IW_T1X1I6_IMM6_LSB) |
#define GET_IW_T1X1I6_IMM6(W) (((W) >> IW_T1X1I6_IMM6_LSB) & IW_T1X1I6_IMM6_UNSHIFTED_MASK) |
#define SET_IW_T1X1I6_IMM6(V) (((V) & IW_T1X1I6_IMM6_UNSHIFTED_MASK) << IW_T1X1I6_IMM6_LSB) |
#define IW_T1X1I6_X_LSB 15 |
#define IW_T1X1I6_X_SIZE 1 |
#define IW_T1X1I6_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T1X1I6_X_SIZE)) |
#define IW_T1X1I6_X_SHIFTED_MASK (IW_T1X1I6_X_UNSHIFTED_MASK << IW_T1X1I6_X_LSB) |
#define GET_IW_T1X1I6_X(W) (((W) >> IW_T1X1I6_X_LSB) & IW_T1X1I6_X_UNSHIFTED_MASK) |
#define SET_IW_T1X1I6_X(V) (((V) & IW_T1X1I6_X_UNSHIFTED_MASK) << IW_T1X1I6_X_LSB) |
#define IW_X1I7_IMM7_LSB 6 |
#define IW_X1I7_IMM7_SIZE 7 |
#define IW_X1I7_IMM7_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_X1I7_IMM7_SIZE)) |
#define IW_X1I7_IMM7_SHIFTED_MASK (IW_X1I7_IMM7_UNSHIFTED_MASK << IW_X1I7_IMM7_LSB) |
#define GET_IW_X1I7_IMM7(W) (((W) >> IW_X1I7_IMM7_LSB) & IW_X1I7_IMM7_UNSHIFTED_MASK) |
#define SET_IW_X1I7_IMM7(V) (((V) & IW_X1I7_IMM7_UNSHIFTED_MASK) << IW_X1I7_IMM7_LSB) |
#define IW_X1I7_RSV_LSB 13 |
#define IW_X1I7_RSV_SIZE 2 |
#define IW_X1I7_RSV_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_X1I7_RSV_SIZE)) |
#define IW_X1I7_RSV_SHIFTED_MASK (IW_X1I7_RSV_UNSHIFTED_MASK << IW_X1I7_RSV_LSB) |
#define GET_IW_X1I7_RSV(W) (((W) >> IW_X1I7_RSV_LSB) & IW_X1I7_RSV_UNSHIFTED_MASK) |
#define SET_IW_X1I7_RSV(V) (((V) & IW_X1I7_RSV_UNSHIFTED_MASK) << IW_X1I7_RSV_LSB) |
#define IW_X1I7_X_LSB 15 |
#define IW_X1I7_X_SIZE 1 |
#define IW_X1I7_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_X1I7_X_SIZE)) |
#define IW_X1I7_X_SHIFTED_MASK (IW_X1I7_X_UNSHIFTED_MASK << IW_X1I7_X_LSB) |
#define GET_IW_X1I7_X(W) (((W) >> IW_X1I7_X_LSB) & IW_X1I7_X_UNSHIFTED_MASK) |
#define SET_IW_X1I7_X(V) (((V) & IW_X1I7_X_UNSHIFTED_MASK) << IW_X1I7_X_LSB) |
#define IW_L5I4X1_IMM4_LSB 6 |
#define IW_L5I4X1_IMM4_SIZE 4 |
#define IW_L5I4X1_IMM4_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L5I4X1_IMM4_SIZE)) |
#define IW_L5I4X1_IMM4_SHIFTED_MASK (IW_L5I4X1_IMM4_UNSHIFTED_MASK << IW_L5I4X1_IMM4_LSB) |
#define GET_IW_L5I4X1_IMM4(W) (((W) >> IW_L5I4X1_IMM4_LSB) & IW_L5I4X1_IMM4_UNSHIFTED_MASK) |
#define SET_IW_L5I4X1_IMM4(V) (((V) & IW_L5I4X1_IMM4_UNSHIFTED_MASK) << IW_L5I4X1_IMM4_LSB) |
#define IW_L5I4X1_REGRANGE_LSB 10 |
#define IW_L5I4X1_REGRANGE_SIZE 3 |
#define IW_L5I4X1_REGRANGE_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L5I4X1_REGRANGE_SIZE)) |
#define IW_L5I4X1_REGRANGE_SHIFTED_MASK (IW_L5I4X1_REGRANGE_UNSHIFTED_MASK << IW_L5I4X1_REGRANGE_LSB) |
#define GET_IW_L5I4X1_REGRANGE(W) (((W) >> IW_L5I4X1_REGRANGE_LSB) & IW_L5I4X1_REGRANGE_UNSHIFTED_MASK) |
#define SET_IW_L5I4X1_REGRANGE(V) (((V) & IW_L5I4X1_REGRANGE_UNSHIFTED_MASK) << IW_L5I4X1_REGRANGE_LSB) |
#define IW_L5I4X1_FP_LSB 13 |
#define IW_L5I4X1_FP_SIZE 1 |
#define IW_L5I4X1_FP_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L5I4X1_FP_SIZE)) |
#define IW_L5I4X1_FP_SHIFTED_MASK (IW_L5I4X1_FP_UNSHIFTED_MASK << IW_L5I4X1_FP_LSB) |
#define GET_IW_L5I4X1_FP(W) (((W) >> IW_L5I4X1_FP_LSB) & IW_L5I4X1_FP_UNSHIFTED_MASK) |
#define SET_IW_L5I4X1_FP(V) (((V) & IW_L5I4X1_FP_UNSHIFTED_MASK) << IW_L5I4X1_FP_LSB) |
#define IW_L5I4X1_CS_LSB 14 |
#define IW_L5I4X1_CS_SIZE 1 |
#define IW_L5I4X1_CS_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L5I4X1_CS_SIZE)) |
#define IW_L5I4X1_CS_SHIFTED_MASK (IW_L5I4X1_CS_UNSHIFTED_MASK << IW_L5I4X1_CS_LSB) |
#define GET_IW_L5I4X1_CS(W) (((W) >> IW_L5I4X1_CS_LSB) & IW_L5I4X1_CS_UNSHIFTED_MASK) |
#define SET_IW_L5I4X1_CS(V) (((V) & IW_L5I4X1_CS_UNSHIFTED_MASK) << IW_L5I4X1_CS_LSB) |
#define IW_L5I4X1_X_LSB 15 |
#define IW_L5I4X1_X_SIZE 1 |
#define IW_L5I4X1_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_L5I4X1_X_SIZE)) |
#define IW_L5I4X1_X_SHIFTED_MASK (IW_L5I4X1_X_UNSHIFTED_MASK << IW_L5I4X1_X_LSB) |
#define GET_IW_L5I4X1_X(W) (((W) >> IW_L5I4X1_X_LSB) & IW_L5I4X1_X_UNSHIFTED_MASK) |
#define SET_IW_L5I4X1_X(V) (((V) & IW_L5I4X1_X_UNSHIFTED_MASK) << IW_L5I4X1_X_LSB) |
#define IW_T2X1L3_A3_LSB 6 |
#define IW_T2X1L3_A3_SIZE 3 |
#define IW_T2X1L3_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1L3_A3_SIZE)) |
#define IW_T2X1L3_A3_SHIFTED_MASK (IW_T2X1L3_A3_UNSHIFTED_MASK << IW_T2X1L3_A3_LSB) |
#define GET_IW_T2X1L3_A3(W) (((W) >> IW_T2X1L3_A3_LSB) & IW_T2X1L3_A3_UNSHIFTED_MASK) |
#define SET_IW_T2X1L3_A3(V) (((V) & IW_T2X1L3_A3_UNSHIFTED_MASK) << IW_T2X1L3_A3_LSB) |
#define IW_T2X1L3_B3_LSB 9 |
#define IW_T2X1L3_B3_SIZE 3 |
#define IW_T2X1L3_B3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1L3_B3_SIZE)) |
#define IW_T2X1L3_B3_SHIFTED_MASK (IW_T2X1L3_B3_UNSHIFTED_MASK << IW_T2X1L3_B3_LSB) |
#define GET_IW_T2X1L3_B3(W) (((W) >> IW_T2X1L3_B3_LSB) & IW_T2X1L3_B3_UNSHIFTED_MASK) |
#define SET_IW_T2X1L3_B3(V) (((V) & IW_T2X1L3_B3_UNSHIFTED_MASK) << IW_T2X1L3_B3_LSB) |
#define IW_T2X1L3_SHAMT_LSB 12 |
#define IW_T2X1L3_SHAMT_SIZE 3 |
#define IW_T2X1L3_SHAMT_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1L3_SHAMT_SIZE)) |
#define IW_T2X1L3_SHAMT_SHIFTED_MASK (IW_T2X1L3_SHAMT_UNSHIFTED_MASK << IW_T2X1L3_SHAMT_LSB) |
#define GET_IW_T2X1L3_SHAMT(W) (((W) >> IW_T2X1L3_SHAMT_LSB) & IW_T2X1L3_SHAMT_UNSHIFTED_MASK) |
#define SET_IW_T2X1L3_SHAMT(V) (((V) & IW_T2X1L3_SHAMT_UNSHIFTED_MASK) << IW_T2X1L3_SHAMT_LSB) |
#define IW_T2X1L3_X_LSB 15 |
#define IW_T2X1L3_X_SIZE 1 |
#define IW_T2X1L3_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1L3_X_SIZE)) |
#define IW_T2X1L3_X_SHIFTED_MASK (IW_T2X1L3_X_UNSHIFTED_MASK << IW_T2X1L3_X_LSB) |
#define GET_IW_T2X1L3_X(W) (((W) >> IW_T2X1L3_X_LSB) & IW_T2X1L3_X_UNSHIFTED_MASK) |
#define SET_IW_T2X1L3_X(V) (((V) & IW_T2X1L3_X_UNSHIFTED_MASK) << IW_T2X1L3_X_LSB) |
#define IW_T2X1I3_A3_LSB 6 |
#define IW_T2X1I3_A3_SIZE 3 |
#define IW_T2X1I3_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1I3_A3_SIZE)) |
#define IW_T2X1I3_A3_SHIFTED_MASK (IW_T2X1I3_A3_UNSHIFTED_MASK << IW_T2X1I3_A3_LSB) |
#define GET_IW_T2X1I3_A3(W) (((W) >> IW_T2X1I3_A3_LSB) & IW_T2X1I3_A3_UNSHIFTED_MASK) |
#define SET_IW_T2X1I3_A3(V) (((V) & IW_T2X1I3_A3_UNSHIFTED_MASK) << IW_T2X1I3_A3_LSB) |
#define IW_T2X1I3_B3_LSB 9 |
#define IW_T2X1I3_B3_SIZE 3 |
#define IW_T2X1I3_B3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1I3_B3_SIZE)) |
#define IW_T2X1I3_B3_SHIFTED_MASK (IW_T2X1I3_B3_UNSHIFTED_MASK << IW_T2X1I3_B3_LSB) |
#define GET_IW_T2X1I3_B3(W) (((W) >> IW_T2X1I3_B3_LSB) & IW_T2X1I3_B3_UNSHIFTED_MASK) |
#define SET_IW_T2X1I3_B3(V) (((V) & IW_T2X1I3_B3_UNSHIFTED_MASK) << IW_T2X1I3_B3_LSB) |
#define IW_T2X1I3_IMM3_LSB 12 |
#define IW_T2X1I3_IMM3_SIZE 3 |
#define IW_T2X1I3_IMM3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1I3_IMM3_SIZE)) |
#define IW_T2X1I3_IMM3_SHIFTED_MASK (IW_T2X1I3_IMM3_UNSHIFTED_MASK << IW_T2X1I3_IMM3_LSB) |
#define GET_IW_T2X1I3_IMM3(W) (((W) >> IW_T2X1I3_IMM3_LSB) & IW_T2X1I3_IMM3_UNSHIFTED_MASK) |
#define SET_IW_T2X1I3_IMM3(V) (((V) & IW_T2X1I3_IMM3_UNSHIFTED_MASK) << IW_T2X1I3_IMM3_LSB) |
#define IW_T2X1I3_X_LSB 15 |
#define IW_T2X1I3_X_SIZE 1 |
#define IW_T2X1I3_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X1I3_X_SIZE)) |
#define IW_T2X1I3_X_SHIFTED_MASK (IW_T2X1I3_X_UNSHIFTED_MASK << IW_T2X1I3_X_LSB) |
#define GET_IW_T2X1I3_X(W) (((W) >> IW_T2X1I3_X_LSB) & IW_T2X1I3_X_UNSHIFTED_MASK) |
#define SET_IW_T2X1I3_X(V) (((V) & IW_T2X1I3_X_UNSHIFTED_MASK) << IW_T2X1I3_X_LSB) |
#define IW_T3X1_A3_LSB 6 |
#define IW_T3X1_A3_SIZE 3 |
#define IW_T3X1_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T3X1_A3_SIZE)) |
#define IW_T3X1_A3_SHIFTED_MASK (IW_T3X1_A3_UNSHIFTED_MASK << IW_T3X1_A3_LSB) |
#define GET_IW_T3X1_A3(W) (((W) >> IW_T3X1_A3_LSB) & IW_T3X1_A3_UNSHIFTED_MASK) |
#define SET_IW_T3X1_A3(V) (((V) & IW_T3X1_A3_UNSHIFTED_MASK) << IW_T3X1_A3_LSB) |
#define IW_T3X1_B3_LSB 9 |
#define IW_T3X1_B3_SIZE 3 |
#define IW_T3X1_B3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T3X1_B3_SIZE)) |
#define IW_T3X1_B3_SHIFTED_MASK (IW_T3X1_B3_UNSHIFTED_MASK << IW_T3X1_B3_LSB) |
#define GET_IW_T3X1_B3(W) (((W) >> IW_T3X1_B3_LSB) & IW_T3X1_B3_UNSHIFTED_MASK) |
#define SET_IW_T3X1_B3(V) (((V) & IW_T3X1_B3_UNSHIFTED_MASK) << IW_T3X1_B3_LSB) |
#define IW_T3X1_C3_LSB 12 |
#define IW_T3X1_C3_SIZE 3 |
#define IW_T3X1_C3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T3X1_C3_SIZE)) |
#define IW_T3X1_C3_SHIFTED_MASK (IW_T3X1_C3_UNSHIFTED_MASK << IW_T3X1_C3_LSB) |
#define GET_IW_T3X1_C3(W) (((W) >> IW_T3X1_C3_LSB) & IW_T3X1_C3_UNSHIFTED_MASK) |
#define SET_IW_T3X1_C3(V) (((V) & IW_T3X1_C3_UNSHIFTED_MASK) << IW_T3X1_C3_LSB) |
#define IW_T3X1_X_LSB 15 |
#define IW_T3X1_X_SIZE 1 |
#define IW_T3X1_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T3X1_X_SIZE)) |
#define IW_T3X1_X_SHIFTED_MASK (IW_T3X1_X_UNSHIFTED_MASK << IW_T3X1_X_LSB) |
#define GET_IW_T3X1_X(W) (((W) >> IW_T3X1_X_LSB) & IW_T3X1_X_UNSHIFTED_MASK) |
#define SET_IW_T3X1_X(V) (((V) & IW_T3X1_X_UNSHIFTED_MASK) << IW_T3X1_X_LSB) |
/* The X field for all three R.N-class instruction formats is represented |
here as 4 bits, including the bits defined as constant 0 or 1 that |
determine which of the formats T2X3, F1X1, or X2L5 it is. */ |
#define IW_R_N_X_LSB 12 |
#define IW_R_N_X_SIZE 4 |
#define IW_R_N_X_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_N_X_SIZE)) |
#define IW_R_N_X_SHIFTED_MASK (IW_R_N_X_UNSHIFTED_MASK << IW_R_N_X_LSB) |
#define GET_IW_R_N_X(W) (((W) >> IW_R_N_X_LSB) & IW_R_N_X_UNSHIFTED_MASK) |
#define SET_IW_R_N_X(V) (((V) & IW_R_N_X_UNSHIFTED_MASK) << IW_R_N_X_LSB) |
#define IW_T2X3_A3_LSB 6 |
#define IW_T2X3_A3_SIZE 3 |
#define IW_T2X3_A3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X3_A3_SIZE)) |
#define IW_T2X3_A3_SHIFTED_MASK (IW_T2X3_A3_UNSHIFTED_MASK << IW_T2X3_A3_LSB) |
#define GET_IW_T2X3_A3(W) (((W) >> IW_T2X3_A3_LSB) & IW_T2X3_A3_UNSHIFTED_MASK) |
#define SET_IW_T2X3_A3(V) (((V) & IW_T2X3_A3_UNSHIFTED_MASK) << IW_T2X3_A3_LSB) |
#define IW_T2X3_B3_LSB 9 |
#define IW_T2X3_B3_SIZE 3 |
#define IW_T2X3_B3_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_T2X3_B3_SIZE)) |
#define IW_T2X3_B3_SHIFTED_MASK (IW_T2X3_B3_UNSHIFTED_MASK << IW_T2X3_B3_LSB) |
#define GET_IW_T2X3_B3(W) (((W) >> IW_T2X3_B3_LSB) & IW_T2X3_B3_UNSHIFTED_MASK) |
#define SET_IW_T2X3_B3(V) (((V) & IW_T2X3_B3_UNSHIFTED_MASK) << IW_T2X3_B3_LSB) |
#define IW_F1X1_A_LSB 6 |
#define IW_F1X1_A_SIZE 5 |
#define IW_F1X1_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X1_A_SIZE)) |
#define IW_F1X1_A_SHIFTED_MASK (IW_F1X1_A_UNSHIFTED_MASK << IW_F1X1_A_LSB) |
#define GET_IW_F1X1_A(W) (((W) >> IW_F1X1_A_LSB) & IW_F1X1_A_UNSHIFTED_MASK) |
#define SET_IW_F1X1_A(V) (((V) & IW_F1X1_A_UNSHIFTED_MASK) << IW_F1X1_A_LSB) |
#define IW_F1X1_RSV_LSB 11 |
#define IW_F1X1_RSV_SIZE 1 |
#define IW_F1X1_RSV_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1X1_RSV_SIZE)) |
#define IW_F1X1_RSV_SHIFTED_MASK (IW_F1X1_RSV_UNSHIFTED_MASK << IW_F1X1_RSV_LSB) |
#define GET_IW_F1X1_RSV(W) (((W) >> IW_F1X1_RSV_LSB) & IW_F1X1_RSV_UNSHIFTED_MASK) |
#define SET_IW_F1X1_RSV(V) (((V) & IW_F1X1_RSV_UNSHIFTED_MASK) << IW_F1X1_RSV_LSB) |
#define IW_X2L5_IMM5_LSB 6 |
#define IW_X2L5_IMM5_SIZE 5 |
#define IW_X2L5_IMM5_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_X2L5_IMM5_SIZE)) |
#define IW_X2L5_IMM5_SHIFTED_MASK (IW_X2L5_IMM5_UNSHIFTED_MASK << IW_X2L5_IMM5_LSB) |
#define GET_IW_X2L5_IMM5(W) (((W) >> IW_X2L5_IMM5_LSB) & IW_X2L5_IMM5_UNSHIFTED_MASK) |
#define SET_IW_X2L5_IMM5(V) (((V) & IW_X2L5_IMM5_UNSHIFTED_MASK) << IW_X2L5_IMM5_LSB) |
#define IW_X2L5_RSV_LSB 11 |
#define IW_X2L5_RSV_SIZE 1 |
#define IW_X2L5_RSV_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_X2L5_RSV_SIZE)) |
#define IW_X2L5_RSV_SHIFTED_MASK (IW_X2L5_RSV_UNSHIFTED_MASK << IW_X2L5_RSV_LSB) |
#define GET_IW_X2L5_RSV(W) (((W) >> IW_X2L5_RSV_LSB) & IW_X2L5_RSV_UNSHIFTED_MASK) |
#define SET_IW_X2L5_RSV(V) (((V) & IW_X2L5_RSV_UNSHIFTED_MASK) << IW_X2L5_RSV_LSB) |
#define IW_F1I5_IMM5_LSB 6 |
#define IW_F1I5_IMM5_SIZE 5 |
#define IW_F1I5_IMM5_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1I5_IMM5_SIZE)) |
#define IW_F1I5_IMM5_SHIFTED_MASK (IW_F1I5_IMM5_UNSHIFTED_MASK << IW_F1I5_IMM5_LSB) |
#define GET_IW_F1I5_IMM5(W) (((W) >> IW_F1I5_IMM5_LSB) & IW_F1I5_IMM5_UNSHIFTED_MASK) |
#define SET_IW_F1I5_IMM5(V) (((V) & IW_F1I5_IMM5_UNSHIFTED_MASK) << IW_F1I5_IMM5_LSB) |
#define IW_F1I5_B_LSB 11 |
#define IW_F1I5_B_SIZE 5 |
#define IW_F1I5_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F1I5_B_SIZE)) |
#define IW_F1I5_B_SHIFTED_MASK (IW_F1I5_B_UNSHIFTED_MASK << IW_F1I5_B_LSB) |
#define GET_IW_F1I5_B(W) (((W) >> IW_F1I5_B_LSB) & IW_F1I5_B_UNSHIFTED_MASK) |
#define SET_IW_F1I5_B(V) (((V) & IW_F1I5_B_UNSHIFTED_MASK) << IW_F1I5_B_LSB) |
#define IW_F2_A_LSB 6 |
#define IW_F2_A_SIZE 5 |
#define IW_F2_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2_A_SIZE)) |
#define IW_F2_A_SHIFTED_MASK (IW_F2_A_UNSHIFTED_MASK << IW_F2_A_LSB) |
#define GET_IW_F2_A(W) (((W) >> IW_F2_A_LSB) & IW_F2_A_UNSHIFTED_MASK) |
#define SET_IW_F2_A(V) (((V) & IW_F2_A_UNSHIFTED_MASK) << IW_F2_A_LSB) |
#define IW_F2_B_LSB 11 |
#define IW_F2_B_SIZE 5 |
#define IW_F2_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_F2_B_SIZE)) |
#define IW_F2_B_SHIFTED_MASK (IW_F2_B_UNSHIFTED_MASK << IW_F2_B_LSB) |
#define GET_IW_F2_B(W) (((W) >> IW_F2_B_LSB) & IW_F2_B_UNSHIFTED_MASK) |
#define SET_IW_F2_B(V) (((V) & IW_F2_B_UNSHIFTED_MASK) << IW_F2_B_LSB) |
/* R2 opcodes. */ |
#define R2_OP_CALL 0 |
#define R2_OP_AS_N 1 |
#define R2_OP_BR 2 |
#define R2_OP_BR_N 3 |
#define R2_OP_ADDI 4 |
#define R2_OP_LDBU_N 5 |
#define R2_OP_LDBU 6 |
#define R2_OP_LDB 7 |
#define R2_OP_JMPI 8 |
#define R2_OP_R_N 9 |
#define R2_OP_ANDI_N 11 |
#define R2_OP_ANDI 12 |
#define R2_OP_LDHU_N 13 |
#define R2_OP_LDHU 14 |
#define R2_OP_LDH 15 |
#define R2_OP_ASI_N 17 |
#define R2_OP_BGE 18 |
#define R2_OP_LDWSP_N 19 |
#define R2_OP_ORI 20 |
#define R2_OP_LDW_N 21 |
#define R2_OP_CMPGEI 22 |
#define R2_OP_LDW 23 |
#define R2_OP_SHI_N 25 |
#define R2_OP_BLT 26 |
#define R2_OP_MOVI_N 27 |
#define R2_OP_XORI 28 |
#define R2_OP_STZ_N 29 |
#define R2_OP_CMPLTI 30 |
#define R2_OP_ANDCI 31 |
#define R2_OP_OPX 32 |
#define R2_OP_PP_N 33 |
#define R2_OP_BNE 34 |
#define R2_OP_BNEZ_N 35 |
#define R2_OP_MULI 36 |
#define R2_OP_STB_N 37 |
#define R2_OP_CMPNEI 38 |
#define R2_OP_STB 39 |
#define R2_OP_I12 40 |
#define R2_OP_SPI_N 41 |
#define R2_OP_BEQ 42 |
#define R2_OP_BEQZ_N 43 |
#define R2_OP_ANDHI 44 |
#define R2_OP_STH_N 45 |
#define R2_OP_CMPEQI 46 |
#define R2_OP_STH 47 |
#define R2_OP_CUSTOM 48 |
#define R2_OP_BGEU 50 |
#define R2_OP_STWSP_N 51 |
#define R2_OP_ORHI 52 |
#define R2_OP_STW_N 53 |
#define R2_OP_CMPGEUI 54 |
#define R2_OP_STW 55 |
#define R2_OP_BLTU 58 |
#define R2_OP_MOV_N 59 |
#define R2_OP_XORHI 60 |
#define R2_OP_SPADDI_N 61 |
#define R2_OP_CMPLTUI 62 |
#define R2_OP_ANDCHI 63 |
#define R2_OPX_WRPIE 0 |
#define R2_OPX_ERET 1 |
#define R2_OPX_ROLI 2 |
#define R2_OPX_ROL 3 |
#define R2_OPX_FLUSHP 4 |
#define R2_OPX_RET 5 |
#define R2_OPX_NOR 6 |
#define R2_OPX_MULXUU 7 |
#define R2_OPX_ENI 8 |
#define R2_OPX_BRET 9 |
#define R2_OPX_ROR 11 |
#define R2_OPX_FLUSHI 12 |
#define R2_OPX_JMP 13 |
#define R2_OPX_AND 14 |
#define R2_OPX_CMPGE 16 |
#define R2_OPX_SLLI 18 |
#define R2_OPX_SLL 19 |
#define R2_OPX_WRPRS 20 |
#define R2_OPX_OR 22 |
#define R2_OPX_MULXSU 23 |
#define R2_OPX_CMPLT 24 |
#define R2_OPX_SRLI 26 |
#define R2_OPX_SRL 27 |
#define R2_OPX_NEXTPC 28 |
#define R2_OPX_CALLR 29 |
#define R2_OPX_XOR 30 |
#define R2_OPX_MULXSS 31 |
#define R2_OPX_CMPNE 32 |
#define R2_OPX_INSERT 35 |
#define R2_OPX_DIVU 36 |
#define R2_OPX_DIV 37 |
#define R2_OPX_RDCTL 38 |
#define R2_OPX_MUL 39 |
#define R2_OPX_CMPEQ 40 |
#define R2_OPX_INITI 41 |
#define R2_OPX_MERGE 43 |
#define R2_OPX_HBREAK 44 |
#define R2_OPX_TRAP 45 |
#define R2_OPX_WRCTL 46 |
#define R2_OPX_CMPGEU 48 |
#define R2_OPX_ADD 49 |
#define R2_OPX_EXTRACT 51 |
#define R2_OPX_BREAK 52 |
#define R2_OPX_LDEX 53 |
#define R2_OPX_SYNC 54 |
#define R2_OPX_LDSEX 55 |
#define R2_OPX_CMPLTU 56 |
#define R2_OPX_SUB 57 |
#define R2_OPX_SRAI 58 |
#define R2_OPX_SRA 59 |
#define R2_OPX_STEX 61 |
#define R2_OPX_STSEX 63 |
#define R2_I12_LDBIO 0 |
#define R2_I12_STBIO 1 |
#define R2_I12_LDBUIO 2 |
#define R2_I12_DCACHE 3 |
#define R2_I12_LDHIO 4 |
#define R2_I12_STHIO 5 |
#define R2_I12_LDHUIO 6 |
#define R2_I12_RDPRS 7 |
#define R2_I12_LDWIO 8 |
#define R2_I12_STWIO 9 |
#define R2_I12_LDWM 12 |
#define R2_I12_STWM 13 |
#define R2_DCACHE_INITD 0 |
#define R2_DCACHE_INITDA 1 |
#define R2_DCACHE_FLUSHD 2 |
#define R2_DCACHE_FLUSHDA 3 |
#define R2_AS_N_ADD_N 0 |
#define R2_AS_N_SUB_N 1 |
#define R2_R_N_AND_N 0 |
#define R2_R_N_OR_N 2 |
#define R2_R_N_XOR_N 3 |
#define R2_R_N_SLL_N 4 |
#define R2_R_N_SRL_N 5 |
#define R2_R_N_NOT_N 6 |
#define R2_R_N_NEG_N 7 |
#define R2_R_N_CALLR_N 8 |
#define R2_R_N_JMPR_N 10 |
#define R2_R_N_BREAK_N 12 |
#define R2_R_N_TRAP_N 13 |
#define R2_R_N_RET_N 14 |
#define R2_SPI_N_SPINCI_N 0 |
#define R2_SPI_N_SPDECI_N 1 |
#define R2_ASI_N_ADDI_N 0 |
#define R2_ASI_N_SUBI_N 1 |
#define R2_SHI_N_SLLI_N 0 |
#define R2_SHI_N_SRLI_N 1 |
#define R2_PP_N_POP_N 0 |
#define R2_PP_N_PUSH_N 1 |
#define R2_STZ_N_STWZ_N 0 |
#define R2_STZ_N_STBZ_N 1 |
/* Convenience macros for R2 encodings. */ |
#define MATCH_R2_OP(NAME) \ |
(SET_IW_R2_OP (R2_OP_##NAME)) |
#define MASK_R2_OP \ |
IW_R2_OP_SHIFTED_MASK |
#define MATCH_R2_OPX0(NAME) \ |
(SET_IW_R2_OP (R2_OP_OPX) | SET_IW_OPX_X (R2_OPX_##NAME)) |
#define MASK_R2_OPX0 \ |
(IW_R2_OP_SHIFTED_MASK | IW_OPX_X_SHIFTED_MASK \ |
| IW_F3X6L5_IMM5_SHIFTED_MASK) |
#define MATCH_R2_OPX(NAME, A, B, C) \ |
(MATCH_R2_OPX0 (NAME) | SET_IW_F3X6L5_A (A) | SET_IW_F3X6L5_B (B) \ |
| SET_IW_F3X6L5_C (C)) |
#define MASK_R2_OPX(A, B, C, N) \ |
(IW_R2_OP_SHIFTED_MASK | IW_OPX_X_SHIFTED_MASK \ |
| (A ? IW_F3X6L5_A_SHIFTED_MASK : 0) \ |
| (B ? IW_F3X6L5_B_SHIFTED_MASK : 0) \ |
| (C ? IW_F3X6L5_C_SHIFTED_MASK : 0) \ |
| (N ? IW_F3X6L5_IMM5_SHIFTED_MASK : 0)) |
#define MATCH_R2_I12(NAME) \ |
(SET_IW_R2_OP (R2_OP_I12) | SET_IW_I12_X (R2_I12_##NAME)) |
#define MASK_R2_I12 \ |
(IW_R2_OP_SHIFTED_MASK | IW_I12_X_SHIFTED_MASK ) |
#define MATCH_R2_DCACHE(NAME) \ |
(MATCH_R2_I12(DCACHE) | SET_IW_F1X4I12_X (R2_DCACHE_##NAME)) |
#define MASK_R2_DCACHE \ |
(MASK_R2_I12 | IW_F1X4I12_X_SHIFTED_MASK) |
#define MATCH_R2_R_N(NAME) \ |
(SET_IW_R2_OP (R2_OP_R_N) | SET_IW_R_N_X (R2_R_N_##NAME)) |
#define MASK_R2_R_N \ |
(IW_R2_OP_SHIFTED_MASK | IW_R_N_X_SHIFTED_MASK ) |
/* Match/mask macros for R2 instructions. */ |
#define MATCH_R2_ADD MATCH_R2_OPX0 (ADD) |
#define MASK_R2_ADD MASK_R2_OPX0 |
#define MATCH_R2_ADDI MATCH_R2_OP (ADDI) |
#define MASK_R2_ADDI MASK_R2_OP |
#define MATCH_R2_ADD_N (MATCH_R2_OP (AS_N) | SET_IW_T3X1_X (R2_AS_N_ADD_N)) |
#define MASK_R2_ADD_N (MASK_R2_OP | IW_T3X1_X_SHIFTED_MASK) |
#define MATCH_R2_ADDI_N (MATCH_R2_OP (ASI_N) | SET_IW_T2X1I3_X (R2_ASI_N_ADDI_N)) |
#define MASK_R2_ADDI_N (MASK_R2_OP | IW_T2X1I3_X_SHIFTED_MASK) |
#define MATCH_R2_AND MATCH_R2_OPX0 (AND) |
#define MASK_R2_AND MASK_R2_OPX0 |
#define MATCH_R2_ANDCHI MATCH_R2_OP (ANDCHI) |
#define MASK_R2_ANDCHI MASK_R2_OP |
#define MATCH_R2_ANDCI MATCH_R2_OP (ANDCI) |
#define MASK_R2_ANDCI MASK_R2_OP |
#define MATCH_R2_ANDHI MATCH_R2_OP (ANDHI) |
#define MASK_R2_ANDHI MASK_R2_OP |
#define MATCH_R2_ANDI MATCH_R2_OP (ANDI) |
#define MASK_R2_ANDI MASK_R2_OP |
#define MATCH_R2_ANDI_N MATCH_R2_OP (ANDI_N) |
#define MASK_R2_ANDI_N MASK_R2_OP |
#define MATCH_R2_AND_N MATCH_R2_R_N (AND_N) |
#define MASK_R2_AND_N MASK_R2_R_N |
#define MATCH_R2_BEQ MATCH_R2_OP (BEQ) |
#define MASK_R2_BEQ MASK_R2_OP |
#define MATCH_R2_BEQZ_N MATCH_R2_OP (BEQZ_N) |
#define MASK_R2_BEQZ_N MASK_R2_OP |
#define MATCH_R2_BGE MATCH_R2_OP (BGE) |
#define MASK_R2_BGE MASK_R2_OP |
#define MATCH_R2_BGEU MATCH_R2_OP (BGEU) |
#define MASK_R2_BGEU MASK_R2_OP |
#define MATCH_R2_BGT MATCH_R2_OP (BLT) |
#define MASK_R2_BGT MASK_R2_OP |
#define MATCH_R2_BGTU MATCH_R2_OP (BLTU) |
#define MASK_R2_BGTU MASK_R2_OP |
#define MATCH_R2_BLE MATCH_R2_OP (BGE) |
#define MASK_R2_BLE MASK_R2_OP |
#define MATCH_R2_BLEU MATCH_R2_OP (BGEU) |
#define MASK_R2_BLEU MASK_R2_OP |
#define MATCH_R2_BLT MATCH_R2_OP (BLT) |
#define MASK_R2_BLT MASK_R2_OP |
#define MATCH_R2_BLTU MATCH_R2_OP (BLTU) |
#define MASK_R2_BLTU MASK_R2_OP |
#define MATCH_R2_BNE MATCH_R2_OP (BNE) |
#define MASK_R2_BNE MASK_R2_OP |
#define MATCH_R2_BNEZ_N MATCH_R2_OP (BNEZ_N) |
#define MASK_R2_BNEZ_N MASK_R2_OP |
#define MATCH_R2_BR MATCH_R2_OP (BR) |
#define MASK_R2_BR MASK_R2_OP | IW_F2I16_A_SHIFTED_MASK | IW_F2I16_B_SHIFTED_MASK |
#define MATCH_R2_BREAK MATCH_R2_OPX (BREAK, 0, 0, 0x1e) |
#define MASK_R2_BREAK MASK_R2_OPX (1, 1, 1, 0) |
#define MATCH_R2_BREAK_N MATCH_R2_R_N (BREAK_N) |
#define MASK_R2_BREAK_N MASK_R2_R_N |
#define MATCH_R2_BRET MATCH_R2_OPX (BRET, 0x1e, 0, 0) |
#define MASK_R2_BRET MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_BR_N MATCH_R2_OP (BR_N) |
#define MASK_R2_BR_N MASK_R2_OP |
#define MATCH_R2_CALL MATCH_R2_OP (CALL) |
#define MASK_R2_CALL MASK_R2_OP |
#define MATCH_R2_CALLR MATCH_R2_OPX (CALLR, 0, 0, 0x1f) |
#define MASK_R2_CALLR MASK_R2_OPX (0, 1, 1, 1) |
#define MATCH_R2_CALLR_N MATCH_R2_R_N (CALLR_N) |
#define MASK_R2_CALLR_N MASK_R2_R_N |
#define MATCH_R2_CMPEQ MATCH_R2_OPX0 (CMPEQ) |
#define MASK_R2_CMPEQ MASK_R2_OPX0 |
#define MATCH_R2_CMPEQI MATCH_R2_OP (CMPEQI) |
#define MASK_R2_CMPEQI MASK_R2_OP |
#define MATCH_R2_CMPGE MATCH_R2_OPX0 (CMPGE) |
#define MASK_R2_CMPGE MASK_R2_OPX0 |
#define MATCH_R2_CMPGEI MATCH_R2_OP (CMPGEI) |
#define MASK_R2_CMPGEI MASK_R2_OP |
#define MATCH_R2_CMPGEU MATCH_R2_OPX0 (CMPGEU) |
#define MASK_R2_CMPGEU MASK_R2_OPX0 |
#define MATCH_R2_CMPGEUI MATCH_R2_OP (CMPGEUI) |
#define MASK_R2_CMPGEUI MASK_R2_OP |
#define MATCH_R2_CMPGT MATCH_R2_OPX0 (CMPLT) |
#define MASK_R2_CMPGT MASK_R2_OPX0 |
#define MATCH_R2_CMPGTI MATCH_R2_OP (CMPGEI) |
#define MASK_R2_CMPGTI MASK_R2_OP |
#define MATCH_R2_CMPGTU MATCH_R2_OPX0 (CMPLTU) |
#define MASK_R2_CMPGTU MASK_R2_OPX0 |
#define MATCH_R2_CMPGTUI MATCH_R2_OP (CMPGEUI) |
#define MASK_R2_CMPGTUI MASK_R2_OP |
#define MATCH_R2_CMPLE MATCH_R2_OPX0 (CMPGE) |
#define MASK_R2_CMPLE MASK_R2_OPX0 |
#define MATCH_R2_CMPLEI MATCH_R2_OP (CMPLTI) |
#define MASK_R2_CMPLEI MASK_R2_OP |
#define MATCH_R2_CMPLEU MATCH_R2_OPX0 (CMPGEU) |
#define MASK_R2_CMPLEU MASK_R2_OPX0 |
#define MATCH_R2_CMPLEUI MATCH_R2_OP (CMPLTUI) |
#define MASK_R2_CMPLEUI MASK_R2_OP |
#define MATCH_R2_CMPLT MATCH_R2_OPX0 (CMPLT) |
#define MASK_R2_CMPLT MASK_R2_OPX0 |
#define MATCH_R2_CMPLTI MATCH_R2_OP (CMPLTI) |
#define MASK_R2_CMPLTI MASK_R2_OP |
#define MATCH_R2_CMPLTU MATCH_R2_OPX0 (CMPLTU) |
#define MASK_R2_CMPLTU MASK_R2_OPX0 |
#define MATCH_R2_CMPLTUI MATCH_R2_OP (CMPLTUI) |
#define MASK_R2_CMPLTUI MASK_R2_OP |
#define MATCH_R2_CMPNE MATCH_R2_OPX0 (CMPNE) |
#define MASK_R2_CMPNE MASK_R2_OPX0 |
#define MATCH_R2_CMPNEI MATCH_R2_OP (CMPNEI) |
#define MASK_R2_CMPNEI MASK_R2_OP |
#define MATCH_R2_CUSTOM MATCH_R2_OP (CUSTOM) |
#define MASK_R2_CUSTOM MASK_R2_OP |
#define MATCH_R2_DIV MATCH_R2_OPX0 (DIV) |
#define MASK_R2_DIV MASK_R2_OPX0 |
#define MATCH_R2_DIVU MATCH_R2_OPX0 (DIVU) |
#define MASK_R2_DIVU MASK_R2_OPX0 |
#define MATCH_R2_ENI MATCH_R2_OPX (ENI, 0, 0, 0) |
#define MASK_R2_ENI MASK_R2_OPX (1, 1, 1, 0) |
#define MATCH_R2_ERET MATCH_R2_OPX (ERET, 0x1d, 0x1e, 0) |
#define MASK_R2_ERET MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_EXTRACT MATCH_R2_OPX (EXTRACT, 0, 0, 0) |
#define MASK_R2_EXTRACT MASK_R2_OPX (0, 0, 0, 0) |
#define MATCH_R2_FLUSHD MATCH_R2_DCACHE (FLUSHD) |
#define MASK_R2_FLUSHD MASK_R2_DCACHE |
#define MATCH_R2_FLUSHDA MATCH_R2_DCACHE (FLUSHDA) |
#define MASK_R2_FLUSHDA MASK_R2_DCACHE |
#define MATCH_R2_FLUSHI MATCH_R2_OPX (FLUSHI, 0, 0, 0) |
#define MASK_R2_FLUSHI MASK_R2_OPX (0, 1, 1, 1) |
#define MATCH_R2_FLUSHP MATCH_R2_OPX (FLUSHP, 0, 0, 0) |
#define MASK_R2_FLUSHP MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_INITD MATCH_R2_DCACHE (INITD) |
#define MASK_R2_INITD MASK_R2_DCACHE |
#define MATCH_R2_INITDA MATCH_R2_DCACHE (INITDA) |
#define MASK_R2_INITDA MASK_R2_DCACHE |
#define MATCH_R2_INITI MATCH_R2_OPX (INITI, 0, 0, 0) |
#define MASK_R2_INITI MASK_R2_OPX (0, 1, 1, 1) |
#define MATCH_R2_INSERT MATCH_R2_OPX (INSERT, 0, 0, 0) |
#define MASK_R2_INSERT MASK_R2_OPX (0, 0, 0, 0) |
#define MATCH_R2_JMP MATCH_R2_OPX (JMP, 0, 0, 0) |
#define MASK_R2_JMP MASK_R2_OPX (0, 1, 1, 1) |
#define MATCH_R2_JMPI MATCH_R2_OP (JMPI) |
#define MASK_R2_JMPI MASK_R2_OP |
#define MATCH_R2_JMPR_N MATCH_R2_R_N (JMPR_N) |
#define MASK_R2_JMPR_N MASK_R2_R_N |
#define MATCH_R2_LDB MATCH_R2_OP (LDB) |
#define MASK_R2_LDB MASK_R2_OP |
#define MATCH_R2_LDBIO MATCH_R2_I12 (LDBIO) |
#define MASK_R2_LDBIO MASK_R2_I12 |
#define MATCH_R2_LDBU MATCH_R2_OP (LDBU) |
#define MASK_R2_LDBU MASK_R2_OP |
#define MATCH_R2_LDBUIO MATCH_R2_I12 (LDBUIO) |
#define MASK_R2_LDBUIO MASK_R2_I12 |
#define MATCH_R2_LDBU_N MATCH_R2_OP (LDBU_N) |
#define MASK_R2_LDBU_N MASK_R2_OP |
#define MATCH_R2_LDEX MATCH_R2_OPX (LDEX, 0, 0, 0) |
#define MASK_R2_LDEX MASK_R2_OPX (0, 1, 0, 1) |
#define MATCH_R2_LDH MATCH_R2_OP (LDH) |
#define MASK_R2_LDH MASK_R2_OP |
#define MATCH_R2_LDHIO MATCH_R2_I12 (LDHIO) |
#define MASK_R2_LDHIO MASK_R2_I12 |
#define MATCH_R2_LDHU MATCH_R2_OP (LDHU) |
#define MASK_R2_LDHU MASK_R2_OP |
#define MATCH_R2_LDHUIO MATCH_R2_I12 (LDHUIO) |
#define MASK_R2_LDHUIO MASK_R2_I12 |
#define MATCH_R2_LDHU_N MATCH_R2_OP (LDHU_N) |
#define MASK_R2_LDHU_N MASK_R2_OP |
#define MATCH_R2_LDSEX MATCH_R2_OPX (LDSEX, 0, 0, 0) |
#define MASK_R2_LDSEX MASK_R2_OPX (0, 1, 0, 1) |
#define MATCH_R2_LDW MATCH_R2_OP (LDW) |
#define MASK_R2_LDW MASK_R2_OP |
#define MATCH_R2_LDWIO MATCH_R2_I12 (LDWIO) |
#define MASK_R2_LDWIO MASK_R2_I12 |
#define MATCH_R2_LDWM MATCH_R2_I12 (LDWM) |
#define MASK_R2_LDWM MASK_R2_I12 |
#define MATCH_R2_LDWSP_N MATCH_R2_OP (LDWSP_N) |
#define MASK_R2_LDWSP_N MASK_R2_OP |
#define MATCH_R2_LDW_N MATCH_R2_OP (LDW_N) |
#define MASK_R2_LDW_N MASK_R2_OP |
#define MATCH_R2_MERGE MATCH_R2_OPX (MERGE, 0, 0, 0) |
#define MASK_R2_MERGE MASK_R2_OPX (0, 0, 0, 0) |
#define MATCH_R2_MOV MATCH_R2_OPX (ADD, 0, 0, 0) |
#define MASK_R2_MOV MASK_R2_OPX (0, 1, 0, 1) |
#define MATCH_R2_MOVHI MATCH_R2_OP (ORHI) | SET_IW_F2I16_A (0) |
#define MASK_R2_MOVHI MASK_R2_OP | IW_F2I16_A_SHIFTED_MASK |
#define MATCH_R2_MOVI MATCH_R2_OP (ADDI) | SET_IW_F2I16_A (0) |
#define MASK_R2_MOVI MASK_R2_OP | IW_F2I16_A_SHIFTED_MASK |
#define MATCH_R2_MOVUI MATCH_R2_OP (ORI) | SET_IW_F2I16_A (0) |
#define MASK_R2_MOVUI MASK_R2_OP | IW_F2I16_A_SHIFTED_MASK |
#define MATCH_R2_MOV_N MATCH_R2_OP (MOV_N) |
#define MASK_R2_MOV_N MASK_R2_OP |
#define MATCH_R2_MOVI_N MATCH_R2_OP (MOVI_N) |
#define MASK_R2_MOVI_N MASK_R2_OP |
#define MATCH_R2_MUL MATCH_R2_OPX0 (MUL) |
#define MASK_R2_MUL MASK_R2_OPX0 |
#define MATCH_R2_MULI MATCH_R2_OP (MULI) |
#define MASK_R2_MULI MASK_R2_OP |
#define MATCH_R2_MULXSS MATCH_R2_OPX0 (MULXSS) |
#define MASK_R2_MULXSS MASK_R2_OPX0 |
#define MATCH_R2_MULXSU MATCH_R2_OPX0 (MULXSU) |
#define MASK_R2_MULXSU MASK_R2_OPX0 |
#define MATCH_R2_MULXUU MATCH_R2_OPX0 (MULXUU) |
#define MASK_R2_MULXUU MASK_R2_OPX0 |
#define MATCH_R2_NEG_N MATCH_R2_R_N (NEG_N) |
#define MASK_R2_NEG_N MASK_R2_R_N |
#define MATCH_R2_NEXTPC MATCH_R2_OPX (NEXTPC, 0, 0, 0) |
#define MASK_R2_NEXTPC MASK_R2_OPX (1, 1, 0, 1) |
#define MATCH_R2_NOP MATCH_R2_OPX (ADD, 0, 0, 0) |
#define MASK_R2_NOP MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_NOP_N (MATCH_R2_OP (MOV_N) | SET_IW_F2_A (0) | SET_IW_F2_B (0)) |
#define MASK_R2_NOP_N (MASK_R2_OP | IW_F2_A_SHIFTED_MASK | IW_F2_B_SHIFTED_MASK) |
#define MATCH_R2_NOR MATCH_R2_OPX0 (NOR) |
#define MASK_R2_NOR MASK_R2_OPX0 |
#define MATCH_R2_NOT_N MATCH_R2_R_N (NOT_N) |
#define MASK_R2_NOT_N MASK_R2_R_N |
#define MATCH_R2_OR MATCH_R2_OPX0 (OR) |
#define MASK_R2_OR MASK_R2_OPX0 |
#define MATCH_R2_OR_N MATCH_R2_R_N (OR_N) |
#define MASK_R2_OR_N MASK_R2_R_N |
#define MATCH_R2_ORHI MATCH_R2_OP (ORHI) |
#define MASK_R2_ORHI MASK_R2_OP |
#define MATCH_R2_ORI MATCH_R2_OP (ORI) |
#define MASK_R2_ORI MASK_R2_OP |
#define MATCH_R2_POP_N (MATCH_R2_OP (PP_N) | SET_IW_L5I4X1_X (R2_PP_N_POP_N)) |
#define MASK_R2_POP_N (MASK_R2_OP | IW_L5I4X1_X_SHIFTED_MASK) |
#define MATCH_R2_PUSH_N (MATCH_R2_OP (PP_N) | SET_IW_L5I4X1_X (R2_PP_N_PUSH_N)) |
#define MASK_R2_PUSH_N (MASK_R2_OP | IW_L5I4X1_X_SHIFTED_MASK) |
#define MATCH_R2_RDCTL MATCH_R2_OPX (RDCTL, 0, 0, 0) |
#define MASK_R2_RDCTL MASK_R2_OPX (1, 1, 0, 0) |
#define MATCH_R2_RDPRS MATCH_R2_I12 (RDPRS) |
#define MASK_R2_RDPRS MASK_R2_I12 |
#define MATCH_R2_RET MATCH_R2_OPX (RET, 0x1f, 0, 0) |
#define MASK_R2_RET MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_RET_N (MATCH_R2_R_N (RET_N) | SET_IW_X2L5_IMM5 (0)) |
#define MASK_R2_RET_N (MASK_R2_R_N | IW_X2L5_IMM5_SHIFTED_MASK) |
#define MATCH_R2_ROL MATCH_R2_OPX0 (ROL) |
#define MASK_R2_ROL MASK_R2_OPX0 |
#define MATCH_R2_ROLI MATCH_R2_OPX (ROLI, 0, 0, 0) |
#define MASK_R2_ROLI MASK_R2_OPX (0, 1, 0, 0) |
#define MATCH_R2_ROR MATCH_R2_OPX0 (ROR) |
#define MASK_R2_ROR MASK_R2_OPX0 |
#define MATCH_R2_SLL MATCH_R2_OPX0 (SLL) |
#define MASK_R2_SLL MASK_R2_OPX0 |
#define MATCH_R2_SLLI MATCH_R2_OPX (SLLI, 0, 0, 0) |
#define MASK_R2_SLLI MASK_R2_OPX (0, 1, 0, 0) |
#define MATCH_R2_SLL_N MATCH_R2_R_N (SLL_N) |
#define MASK_R2_SLL_N MASK_R2_R_N |
#define MATCH_R2_SLLI_N (MATCH_R2_OP (SHI_N) | SET_IW_T2X1L3_X (R2_SHI_N_SLLI_N)) |
#define MASK_R2_SLLI_N (MASK_R2_OP | IW_T2X1L3_X_SHIFTED_MASK) |
#define MATCH_R2_SPADDI_N MATCH_R2_OP (SPADDI_N) |
#define MASK_R2_SPADDI_N MASK_R2_OP |
#define MATCH_R2_SPDECI_N (MATCH_R2_OP (SPI_N) | SET_IW_X1I7_X (R2_SPI_N_SPDECI_N)) |
#define MASK_R2_SPDECI_N (MASK_R2_OP | IW_X1I7_X_SHIFTED_MASK) |
#define MATCH_R2_SPINCI_N (MATCH_R2_OP (SPI_N) | SET_IW_X1I7_X (R2_SPI_N_SPINCI_N)) |
#define MASK_R2_SPINCI_N (MASK_R2_OP | IW_X1I7_X_SHIFTED_MASK) |
#define MATCH_R2_SRA MATCH_R2_OPX0 (SRA) |
#define MASK_R2_SRA MASK_R2_OPX0 |
#define MATCH_R2_SRAI MATCH_R2_OPX (SRAI, 0, 0, 0) |
#define MASK_R2_SRAI MASK_R2_OPX (0, 1, 0, 0) |
#define MATCH_R2_SRL MATCH_R2_OPX0 (SRL) |
#define MASK_R2_SRL MASK_R2_OPX0 |
#define MATCH_R2_SRLI MATCH_R2_OPX (SRLI, 0, 0, 0) |
#define MASK_R2_SRLI MASK_R2_OPX (0, 1, 0, 0) |
#define MATCH_R2_SRL_N MATCH_R2_R_N (SRL_N) |
#define MASK_R2_SRL_N MASK_R2_R_N |
#define MATCH_R2_SRLI_N (MATCH_R2_OP (SHI_N) | SET_IW_T2X1L3_X (R2_SHI_N_SRLI_N)) |
#define MASK_R2_SRLI_N (MASK_R2_OP | IW_T2X1L3_X_SHIFTED_MASK) |
#define MATCH_R2_STB MATCH_R2_OP (STB) |
#define MASK_R2_STB MASK_R2_OP |
#define MATCH_R2_STBIO MATCH_R2_I12 (STBIO) |
#define MASK_R2_STBIO MASK_R2_I12 |
#define MATCH_R2_STB_N MATCH_R2_OP (STB_N) |
#define MASK_R2_STB_N MASK_R2_OP |
#define MATCH_R2_STBZ_N (MATCH_R2_OP (STZ_N) | SET_IW_T1X1I6_X (R2_STZ_N_STBZ_N)) |
#define MASK_R2_STBZ_N (MASK_R2_OP | IW_T1X1I6_X_SHIFTED_MASK) |
#define MATCH_R2_STEX MATCH_R2_OPX0 (STEX) |
#define MASK_R2_STEX MASK_R2_OPX0 |
#define MATCH_R2_STH MATCH_R2_OP (STH) |
#define MASK_R2_STH MASK_R2_OP |
#define MATCH_R2_STHIO MATCH_R2_I12 (STHIO) |
#define MASK_R2_STHIO MASK_R2_I12 |
#define MATCH_R2_STH_N MATCH_R2_OP (STH_N) |
#define MASK_R2_STH_N MASK_R2_OP |
#define MATCH_R2_STSEX MATCH_R2_OPX0 (STSEX) |
#define MASK_R2_STSEX MASK_R2_OPX0 |
#define MATCH_R2_STW MATCH_R2_OP (STW) |
#define MASK_R2_STW MASK_R2_OP |
#define MATCH_R2_STWIO MATCH_R2_I12 (STWIO) |
#define MASK_R2_STWIO MASK_R2_I12 |
#define MATCH_R2_STWM MATCH_R2_I12 (STWM) |
#define MASK_R2_STWM MASK_R2_I12 |
#define MATCH_R2_STWSP_N MATCH_R2_OP (STWSP_N) |
#define MASK_R2_STWSP_N MASK_R2_OP |
#define MATCH_R2_STW_N MATCH_R2_OP (STW_N) |
#define MASK_R2_STW_N MASK_R2_OP |
#define MATCH_R2_STWZ_N MATCH_R2_OP (STZ_N) |
#define MASK_R2_STWZ_N MASK_R2_OP |
#define MATCH_R2_SUB MATCH_R2_OPX0 (SUB) |
#define MASK_R2_SUB MASK_R2_OPX0 |
#define MATCH_R2_SUBI MATCH_R2_OP (ADDI) |
#define MASK_R2_SUBI MASK_R2_OP |
#define MATCH_R2_SUB_N (MATCH_R2_OP (AS_N) | SET_IW_T3X1_X (R2_AS_N_SUB_N)) |
#define MASK_R2_SUB_N (MASK_R2_OP | IW_T3X1_X_SHIFTED_MASK) |
#define MATCH_R2_SUBI_N (MATCH_R2_OP (ASI_N) | SET_IW_T2X1I3_X (R2_ASI_N_SUBI_N)) |
#define MASK_R2_SUBI_N (MASK_R2_OP | IW_T2X1I3_X_SHIFTED_MASK) |
#define MATCH_R2_SYNC MATCH_R2_OPX (SYNC, 0, 0, 0) |
#define MASK_R2_SYNC MASK_R2_OPX (1, 1, 1, 1) |
#define MATCH_R2_TRAP MATCH_R2_OPX (TRAP, 0, 0, 0x1d) |
#define MASK_R2_TRAP MASK_R2_OPX (1, 1, 1, 0) |
#define MATCH_R2_TRAP_N MATCH_R2_R_N (TRAP_N) |
#define MASK_R2_TRAP_N MASK_R2_R_N |
#define MATCH_R2_WRCTL MATCH_R2_OPX (WRCTL, 0, 0, 0) |
#define MASK_R2_WRCTL MASK_R2_OPX (0, 1, 1, 0) |
#define MATCH_R2_WRPIE MATCH_R2_OPX (WRPIE, 0, 0, 0) |
#define MASK_R2_WRPIE MASK_R2_OPX (0, 1, 0, 1) |
#define MATCH_R2_WRPRS MATCH_R2_OPX (WRPRS, 0, 0, 0) |
#define MASK_R2_WRPRS MASK_R2_OPX (0, 1, 0, 1) |
#define MATCH_R2_XOR MATCH_R2_OPX0 (XOR) |
#define MASK_R2_XOR MASK_R2_OPX0 |
#define MATCH_R2_XORHI MATCH_R2_OP (XORHI) |
#define MASK_R2_XORHI MASK_R2_OP |
#define MATCH_R2_XORI MATCH_R2_OP (XORI) |
#define MASK_R2_XORI MASK_R2_OP |
#define MATCH_R2_XOR_N MATCH_R2_R_N (XOR_N) |
#define MASK_R2_XOR_N MASK_R2_R_N |
#endif /* _NIOS2R2_H */ |
/contrib/toolchain/binutils/include/opcode/np1.h |
---|
1,5 → 1,5 |
/* Print GOULD NPL instructions for GDB, the GNU debugger. |
Copyright 1986, 1987, 1989, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1986-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/opcode/ns32k.h |
---|
1,5 → 1,5 |
/* ns32k-opcode.h -- Opcode table for National Semi 32k processor |
Copyright 1987, 1991, 1994, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 1987-2015 Free Software Foundation, Inc. |
This file is part of GAS, the GNU Assembler. |
/contrib/toolchain/binutils/include/opcode/pdp11.h |
---|
1,5 → 1,5 |
/* PDP-11 opcde list. |
Copyright 2001, 2002, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This file is part of GDB and GAS. |
/contrib/toolchain/binutils/include/opcode/pj.h |
---|
1,5 → 1,5 |
/* Definitions for decoding the picoJava opcode table. |
Copyright 1999, 2002, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
Contributed by Steve Chamberlain of Transmeta (sac@pobox.com). |
This program is free software; you can redistribute it and/or modify |
/contrib/toolchain/binutils/include/opcode/pn.h |
---|
1,5 → 1,5 |
/* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger. |
Copyright 1986, 1987, 1989, 1991, 2010 Free Software Foundation, Inc. |
Copyright (C) 1986-2015 Free Software Foundation, Inc. |
This file is part of GDB. |
/contrib/toolchain/binutils/include/opcode/ppc.h |
---|
1,6 → 1,5 |
/* ppc.h -- Header file for PowerPC opcode table |
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, |
2007, 2008, 2009, 2010, 2012 Free Software Foundation, Inc. |
Copyright (C) 1994-2015 Free Software Foundation, Inc. |
Written by Ian Lance Taylor, Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
196,6 → 195,21 |
that isn't a superset of POWER8, we can define this to its own mask. */ |
#define PPC_OPCODE_HTM PPC_OPCODE_POWER8 |
/* Opcode is supported by ppc750cl. */ |
#define PPC_OPCODE_750 0x4000000000ull |
/* Opcode is supported by ppc7450. */ |
#define PPC_OPCODE_7450 0x8000000000ull |
/* Opcode is supported by ppc821/850/860. */ |
#define PPC_OPCODE_860 0x10000000000ull |
/* Opcode is only supported by Power9 architecture. */ |
#define PPC_OPCODE_POWER9 0x20000000000ull |
/* Opcode is supported by Vector-Scalar (VSX) Unit from ISA 2.08. */ |
#define PPC_OPCODE_VSX3 0x40000000000ull |
/* A macro to extract the major opcode from an instruction. */ |
#define PPC_OP(i) (((i) >> 26) & 0x3f) |
278,7 → 292,7 |
/* Use with the shift field of a struct powerpc_operand to indicate |
that BITM and SHIFT cannot be used to determine where the operand |
goes in the insn. */ |
#define PPC_OPSHIFT_INV (-1 << 31) |
#define PPC_OPSHIFT_INV (-1U << 31) |
/* Values defined for the flags field of a struct powerpc_operand. */ |
382,6 → 396,11 |
/* This is a CR FIELD that does not use symbolic names. */ |
#define PPC_OPERAND_CR_REG (0x200000) |
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand |
is omitted, then the value it should use for the operand is stored |
in the SHIFT field of the immediatly following operand field. */ |
#define PPC_OPERAND_OPTIONAL_VALUE (0x400000) |
/* The POWER and PowerPC assemblers use a few macros. We keep them |
with the operands table for simplicity. The macro table is an |
array of struct powerpc_macro. */ |
410,4 → 429,12 |
extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, ppc_cpu_t *, const char *); |
static inline long |
ppc_optional_operand_value (const struct powerpc_operand *operand) |
{ |
if ((operand->flags & PPC_OPERAND_OPTIONAL_VALUE) != 0) |
return (operand+1)->shift; |
return 0; |
} |
#endif /* PPC_H */ |
/contrib/toolchain/binutils/include/opcode/pyr.h |
---|
1,6 → 1,6 |
/* pyramid.opcode.h -- gdb initial attempt. |
Copyright 2001, 2010 Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/rl78.h |
---|
1,6 → 1,5 |
/* Opcode decoder for the Renesas RL78 |
Copyright 2011 |
Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
Written by DJ Delorie <dj@redhat.com> |
This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. |
27,6 → 26,17 |
#ifndef RL78_OPCODES_H_INCLUDED |
#define RL78_OPCODES_H_INCLUDED |
#ifdef __cplusplus |
extern "C" { |
#endif |
typedef enum { |
RL78_ISA_DEFAULT, |
RL78_ISA_G10, |
RL78_ISA_G13, |
RL78_ISA_G14, |
} RL78_Dis_Isa; |
/* For the purposes of these structures, the RL78 registers are as |
follows, despite most of these being memory-mapped and |
bank-switched: */ |
163,6 → 173,10 |
RL78_Opcode_Operand op[2]; |
} RL78_Opcode_Decoded; |
int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *); |
int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa); |
#ifdef __cplusplus |
} |
#endif |
#endif |
/contrib/toolchain/binutils/include/opcode/rx.h |
---|
1,6 → 1,5 |
/* Opcode decoder for the Renesas RX |
Copyright 2008, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2008-2015 Free Software Foundation, Inc. |
Written by DJ Delorie <dj@redhat.com> |
This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. |
24,6 → 23,10 |
analyzer, and the disassembler. Given an opcode data source, |
it decodes the next opcode into the following structures. */ |
#ifdef __cplusplus |
extern "C" { |
#endif |
typedef enum |
{ |
RX_AnySize = 0, |
35,6 → 38,8 |
RX_SWord, |
RX_3Byte, |
RX_Long, |
RX_Bad_Size, |
RX_MAX_SIZE |
} RX_Size; |
typedef enum |
43,6 → 48,7 |
RX_Operand_Immediate, /* #addend */ |
RX_Operand_Register, /* Rn */ |
RX_Operand_Indirect, /* [Rn + addend] */ |
RX_Operand_Zero_Indirect,/* [Rn] */ |
RX_Operand_Postinc, /* [Rn+] */ |
RX_Operand_Predec, /* [-Rn] */ |
RX_Operand_Condition, /* eq, gtu, etc */ |
98,6 → 104,10 |
RXO_nop, |
RXO_nop2, |
RXO_nop3, |
RXO_nop4, |
RXO_nop5, |
RXO_nop6, |
RXO_nop7, |
RXO_scmpu, |
RXO_smovu, |
213,3 → 223,7 |
registers. 32..47 are condition codes. */ |
int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *); |
#ifdef __cplusplus |
} |
#endif |
/contrib/toolchain/binutils/include/opcode/s390.h |
---|
1,5 → 1,5 |
/* s390.h -- Header file for S390 opcode table |
Copyright 2000, 2001, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). |
This file is part of BFD, the Binary File Descriptor library. |
41,9 → 41,16 |
S390_OPCODE_Z10, |
S390_OPCODE_Z196, |
S390_OPCODE_ZEC12, |
S390_OPCODE_Z13, |
S390_OPCODE_MAXCPU |
}; |
/* Instruction specific flags. */ |
#define S390_INSTR_FLAG_OPTPARM 0x1 |
#define S390_INSTR_FLAG_HTM 0x2 |
#define S390_INSTR_FLAG_VX 0x4 |
#define S390_INSTR_FLAG_FACILITY_MASK 0x6 |
/* The opcode table is an array of struct s390_opcode. */ |
struct s390_opcode |
74,6 → 81,9 |
/* First cpu this opcode is available for. */ |
enum s390_opcode_cpu_val min_cpu; |
/* Instruction specific flags. */ |
unsigned int flags; |
}; |
/* The table itself is sorted by major opcode number, and is otherwise |
86,7 → 96,7 |
extern const struct s390_opcode s390_opformats[]; |
extern const int s390_num_opformats; |
/* Values defined for the flags field of a struct powerpc_opcode. */ |
/* Values defined for the flags field of a struct s390_opcode. */ |
/* The operands table is an array of struct s390_operand. */ |
103,7 → 113,7 |
}; |
/* Elements in the table are retrieved by indexing with values from |
the operands field of the powerpc_opcodes table. */ |
the operands field of the s390_opcodes table. */ |
extern const struct s390_operand s390_operands[]; |
151,4 → 161,14 |
/* The operand needs to be a valid GP or FP register pair. */ |
#define S390_OPERAND_REG_PAIR 0x800 |
/* This operand names a vector register. The disassembler uses this |
to print register names with a leading 'v'. */ |
#define S390_OPERAND_VR 0x1000 |
#define S390_OPERAND_CP16 0x2000 |
#define S390_OPERAND_OR1 0x4000 |
#define S390_OPERAND_OR2 0x8000 |
#define S390_OPERAND_OR8 0x10000 |
#endif /* S390_H */ |
/contrib/toolchain/binutils/include/opcode/score-datadep.h |
---|
1,5 → 1,5 |
/* score-datadep.h -- Score Instructions data dependency table |
Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
Contributed by: |
Brain.lin (brain.lin@sunplusct.com) |
Mei Ligang (ligang@sunnorth.com.cn) |
/contrib/toolchain/binutils/include/opcode/score-inst.h |
---|
1,5 → 1,5 |
/* score-inst.h -- Score Instructions Table |
Copyright 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
Contributed by: |
Brain.lin (brain.lin@sunplusct.com) |
Mei Ligang (ligang@sunnorth.com.cn) |
/contrib/toolchain/binutils/include/opcode/sparc.h |
---|
1,6 → 1,5 |
/* Definitions for opcode table for the sparc. |
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2002, |
2003, 2005, 2010, 2011 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and |
the GNU Binutils. |
101,6 → 100,7 |
/* This was called "delayed" in versions before the flags. */ |
unsigned int flags; |
unsigned int hwcaps; |
unsigned int hwcaps2; |
short architecture; /* Bitmask of sparc_opcode_arch_val's. */ |
} sparc_opcode; |
116,7 → 116,8 |
#define F_PREF_ALIAS (F_ALIAS|F_PREFERRED) |
/* These must match the HWCAP_* values precisely. */ |
/* These must match the ELF_SPARC_HWCAP_* and ELF_SPARC_HWCAP2_* |
values precisely. See include/elf/sparc.h. */ |
#define HWCAP_MUL32 0x00000001 /* umul/umulcc/smul/smulcc insns */ |
#define HWCAP_DIV32 0x00000002 /* udiv/udivcc/sdiv/sdivcc insns */ |
#define HWCAP_FSMULD 0x00000004 /* 'fsmuld' insn */ |
149,6 → 150,20 |
#define HWCAP_CBCOND 0x10000000 /* Compare and Branch insns */ |
#define HWCAP_CRC32C 0x20000000 /* CRC32C insn */ |
#define HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */ |
#define HWCAP2_VIS3B 0x00000002 /* Subset of VIS3 present on sparc64 X+. */ |
#define HWCAP2_ADP 0x00000004 /* Application Data Protection */ |
#define HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */ |
#define HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */ |
#define HWCAP2_XMPMUL 0x00000020 /* XOR multiple precision multiply */ |
#define HWCAP2_XMONT 0x00000040 /* XOR Montgomery mult/sqr instructions */ |
#define HWCAP2_NSEC \ |
0x00000080 /* pause insn with support for nsec timings */ |
#define HWCAP2_FJATHHPC 0x00001000 /* Fujitsu HPC instrs */ |
#define HWCAP2_FJDES 0x00002000 /* Fujitsu DES instrs */ |
#define HWCAP2_FJAES 0x00010000 /* Fujitsu AES instrs */ |
/* All sparc opcodes are 32 bits, except for the `set' instruction (really a |
macro), which is 64 bits. It is handled as a special case. |
174,6 → 189,7 |
g frsd floating point register. |
H frsd floating point register (double/even). |
J frsd floating point register (quad/multiple of 4). |
} frsd floating point register (double/even) that is == frs2 |
b crs1 coprocessor register |
c crs2 coprocessor register |
D crsd coprocessor register |
215,6 → 231,7 |
s %fprs. (v9) |
P %pc. (v9) |
W %tick. (v9) |
{ %mcdper. (v9b) |
o %asi. (v9) |
6 %fcc0. (v9) |
7 %fcc1. (v9) |
/contrib/toolchain/binutils/include/opcode/spu-insns.h |
---|
1,6 → 1,6 |
/* SPU ELF support for BFD. |
Copyright 2006, 2007, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/opcode/spu.h |
---|
1,6 → 1,6 |
/* SPU ELF support for BFD. |
Copyright 2006, 2010 Free Software Foundation, Inc. |
Copyright (C) 2006-2015 Free Software Foundation, Inc. |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/tahoe.h |
---|
2,7 → 2,7 |
* Ported by the State University of New York at Buffalo by the Distributed |
* Computer Systems Lab, Department of Computer Science, 1991. |
*/ |
/* Copyright 2012 Free Software Foundation, Inc. |
/* Copyright (C) 2012-2015 Free Software Foundation, Inc. |
This file is part of GDB and BINUTILS. |
/contrib/toolchain/binutils/include/opcode/tic30.h |
---|
1,5 → 1,5 |
/* tic30.h -- Header file for TI TMS320C30 opcode table |
Copyright 1998, 2005, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au) |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/tic4x.h |
---|
1,6 → 1,6 |
/* Table of opcodes for the Texas Instruments TMS320C[34]X family. |
Copyright (C) 2002, 2003, 2010 Free Software Foundation. |
Copyright (C) 2002-2015 Free Software Foundation, Inc. |
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz) |
/contrib/toolchain/binutils/include/opcode/tic54x.h |
---|
1,5 → 1,5 |
/* tic54x.h -- Header file for TI TMS320C54X opcode table |
Copyright 1999, 2000, 2001, 2005, 2009, 2010 Free Software Foundation, Inc. |
Copyright (C) 1999-2015 Free Software Foundation, Inc. |
Written by Timothy Wall (twall@cygnus.com) |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/tic6x-control-registers.h |
---|
1,6 → 1,5 |
/* TI C6X control register information. |
Copyright 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/tic6x-insn-formats.h |
---|
1,5 → 1,5 |
/* TI C6X instruction format information. |
Copyright 2010-2013 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/tic6x-opcode-table.h |
---|
1,5 → 1,5 |
/* TI C6X opcode table. |
Copyright 2010-2013 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/tic6x.h |
---|
1,5 → 1,5 |
/* TI C6X opcode information. |
Copyright 2010-2013 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/tic80.h |
---|
1,5 → 1,5 |
/* tic80.h -- Header file for TI TMS320C80 (MV) opcode table |
Copyright 1996, 1997, 2003, 2010 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Written by Fred Fish (fnf@cygnus.com), Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/tilegx.h |
---|
1,6 → 1,6 |
/* TILE-Gx opcode information. |
* |
* Copyright 2011 Free Software Foundation, Inc. |
* Copyright (C) 2011-2015 Free Software Foundation, Inc. |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
21,6 → 21,10 |
#ifndef opcode_tile_h |
#define opcode_tile_h |
#ifdef __cplusplus |
extern "C" { |
#endif |
typedef unsigned long long tilegx_bundle_bits; |
1301,4 → 1305,8 |
#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ |
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES |
#ifdef __cplusplus |
} |
#endif |
#endif /* opcode_tilegx_h */ |
/contrib/toolchain/binutils/include/opcode/tilepro.h |
---|
1,6 → 1,6 |
/* TILEPro opcode information. |
* |
* Copyright 2011 Free Software Foundation, Inc. |
* Copyright (C) 2011-2015 Free Software Foundation, Inc. |
* |
* This program is free software; you can redistribute it and/or modify |
* it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/opcode/v850.h |
---|
1,5 → 1,5 |
/* v850.h -- Header file for NEC V850 opcode table |
Copyright 1996-2013 Free Software Foundation, Inc. |
Copyright (C) 1996-2015 Free Software Foundation, Inc. |
Written by J.T. Conklin, Cygnus Support |
This file is part of GDB, GAS, and the GNU binutils. |
/contrib/toolchain/binutils/include/opcode/vax.h |
---|
1,5 → 1,5 |
/* Vax opcde list. |
Copyright 1989, 1991, 1992, 1995, 2010 Free Software Foundation, Inc. |
Copyright (C) 1989-2015 Free Software Foundation, Inc. |
This file is part of GDB and GAS. |
/contrib/toolchain/binutils/include/opcode/visium.h |
---|
0,0 → 1,337 |
/* Opcode table header for Visium. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
This file is part of GDB, GAS, and GNU binutils. |
GDB, GAS and the GNU binutils are free software; you can redistribute |
them and/or modify them under the terms of the GNU General Public |
License as published by the Free Software Foundation; either version 3, |
or (at your option) any later version. |
GDB, GAS, and the GNU binutils are distributed in the hope that they |
will be useful, but WITHOUT ANY WARRANTY; without even the implied |
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
the GNU General Public License for more details. |
You should have received a copy of the GNU General Public License |
along with this file; see the file COPYING3. If not, write to the Free |
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
MA 02110-1301, USA. */ |
enum visium_opcode_arch_val |
{ |
VISIUM_OPCODE_ARCH_DEF = 0, |
VISIUM_OPCODE_ARCH_GR5, |
VISIUM_OPCODE_ARCH_GR6, |
VISIUM_OPCODE_ARCH_BAD |
}; |
/* The highest architecture in the table. */ |
#define VISIUM_OPCODE_ARCH_MAX (VISIUM_OPCODE_ARCH_BAD - 1) |
/* Given an enum visium_opcode_arch_val, return the bitmask to use in |
insn encoding/decoding. */ |
#define VISIUM_OPCODE_ARCH_MASK(arch) (1 << (arch)) |
/* Some defines to make life easy. */ |
#define MASK_DEF VISIUM_OPCODE_ARCH_MASK (VISIUM_OPCODE_ARCH_DEF) |
#define MASK_GR5 VISIUM_OPCODE_ARCH_MASK (VISIUM_OPCODE_ARCH_GR5) |
#define MASK_GR6 VISIUM_OPCODE_ARCH_MASK (VISIUM_OPCODE_ARCH_GR6) |
/* Bit masks of architectures supporting the insn. */ |
#define def (MASK_DEF | MASK_GR5 | MASK_GR6) |
#define gr5 (MASK_GR5 | MASK_GR6) |
#define gr6 (MASK_GR6) |
/* The condition code field is not used (zero) for most instructions. |
BRR and BRA make normal use of it. Floating point instructions use |
it as a sub-opcode. */ |
#define CC_MASK (0xf << 27) |
/* It seems a shame not to use these bits in a class 0 instruction, |
since they could be used to extend the range of the branch. */ |
#define CLASS0_UNUSED_MASK (0x1f << 16) |
/* For class 1 instructions the following bit is unused. */ |
#define CLASS1_UNUSED_MASK (1 << 9) |
/* For class 1 instructions this field gives the index for a write |
instruction, the specific operation for an EAM instruction, or |
the floating point destination register for a floating point |
instruction. */ |
#define CLASS1_INDEX_MASK (0x1f << 10) |
/* For class 3 instructions the following field gives the destination |
general register. */ |
#define CLASS3_DEST_MASK (0x1f << 10) |
/* For class 1 and class 3 instructions the following bit selects an |
EAM write/read rather than a memory write/read. */ |
#define EAM_SELECT_MASK (1 << 15) |
/* Floating point instructions are distinguished from general EAM |
instructions by the following bit. */ |
#define FP_SELECT_MASK (1 << 3) |
/* For both class 1 and class 3 the following fields give, where |
appropriate the srcA and srcB registers whether floating point |
or general. */ |
#define SRCA_MASK (0x1f << 16) |
#define SRCB_MASK (0x1f << 4) |
/* The class 3 interrupt bit. It turns a BRA into a SYS1, and an |
RFLAG into a SYS2. This bit should not be set in the user's |
class 3 instructions. This bit is also used in class 3 |
to distinguish between floating point and other EAM operations. |
(see FP_SELECT_MASK). */ |
#define CLASS3_INT (1 << 3) |
/* Class 3 shift instructions use this bit to indicate that the |
srcB field is a 5 bit immediate shift count rather than a |
register number. */ |
#define CLASS3_SOURCEB_IMMED (1 << 9) |
#define BMD 0x02630004 |
#define BMI 0x82230004 |
#define DSI 0x82800004 |
#define ENI 0x02a00004 |
#define RFI 0x82fe01d4 |
struct reg_entry |
{ |
char *name; |
unsigned char code; |
}; |
static const struct reg_entry gen_reg_table[] = |
{ |
{"fp", 0x16}, |
{"r0", 0x0}, |
{"r1", 0x1}, |
{"r10", 0xA}, |
{"r11", 0xB}, |
{"r12", 0xC}, |
{"r13", 0xD}, |
{"r14", 0xE}, |
{"r15", 0xF}, |
{"r16", 0x10}, |
{"r17", 0x11}, |
{"r18", 0x12}, |
{"r19", 0x13}, |
{"r2", 0x2}, |
{"r20", 0x14}, |
{"r21", 0x15}, |
{"r22", 0x16}, |
{"r23", 0x17}, |
{"r24", 0x18}, |
{"r25", 0x19}, |
{"r26", 0x1a}, |
{"r27", 0x1b}, |
{"r28", 0x1c}, |
{"r29", 0x1d}, |
{"r3", 0x3}, |
{"r30", 0x1e}, |
{"r31", 0x1f}, |
{"r4", 0x4}, |
{"r5", 0x5}, |
{"r6", 0x6}, |
{"r7", 0x7}, |
{"r8", 0x8}, |
{"r9", 0x9}, |
{"sp", 0x17}, |
}; |
static const struct reg_entry fp_reg_table[] = |
{ |
{"f0", 0x0}, |
{"f1", 0x1}, |
{"f10", 0xa}, |
{"f11", 0xb}, |
{"f12", 0xc}, |
{"f13", 0xd}, |
{"f14", 0xe}, |
{"f15", 0xf}, |
{"f2", 0x2}, |
{"f3", 0x3}, |
{"f4", 0x4}, |
{"f5", 0x5}, |
{"f6", 0x6}, |
{"f7", 0x7}, |
{"f8", 0x8}, |
{"f9", 0x9}, |
}; |
static const struct cc_entry |
{ |
char *name; |
int code; |
} cc_table [] = |
{ |
{"cc", 6}, |
{"cs", 2}, |
{"eq", 1}, |
{"fa", 0}, |
{"ge", 9}, |
{"gt", 10}, |
{"hi", 11}, |
{"le", 12}, |
{"ls", 13}, |
{"lt", 14}, |
{"nc", 8}, |
{"ne", 5}, |
{"ns", 4}, |
{"oc", 7}, |
{"os", 3}, |
{"tr", 15}, |
}; |
enum addressing_mode |
{ |
mode_d, /* register := */ |
mode_a, /* op= register */ |
mode_da, /* register := register */ |
mode_ab, /* register * register */ |
mode_dab, /* register := register * register */ |
mode_iab, /* 5-bit immediate * register * register */ |
mode_0ab, /* zero * register * register */ |
mode_da0, /* register := register * zero */ |
mode_cad, /* condition * register * register */ |
mode_das, /* register := register * 5-bit immed/register shift count */ |
mode_di, /* register := 5-bit immediate */ |
mode_ir, /* 5-bit immediate * register */ |
mode_ai, /* register 16-bit unsigned immediate */ |
mode_i, /* 16-bit unsigned immediate */ |
mode_bax, /* register * register * 5-bit immediate */ |
mode_dax, /* register := register * 5-bit immediate */ |
mode_s, /* special mode */ |
mode_sr, /* special mode with register */ |
mode_ci, /* condition * 16-bit signed word displacement */ |
mode_fdab, /* float := float * float */ |
mode_ifdab, /* fpinst: 4-bit immediate * float * float * float */ |
mode_idfab, /* fpuread: 4-bit immediate * register * float * float */ |
mode_fda, /* float := float */ |
mode_fdra, /* float := register */ |
mode_rdfab, /* register := float * float */ |
mode_rdfa, /* register := float */ |
mode_rrr, /* 3 register sources and destinations (block move) */ |
}; |
#define class0 (0<<25) |
#define class1 (1<<25) |
#define class2 (2<<25) |
#define class3 (3<<25) |
static const struct opcode_entry |
{ |
char *mnem; |
enum addressing_mode mode; |
unsigned code; |
char flags; |
} |
opcode_table[] = |
{ |
{ "adc.b", mode_dab, class3|(1<<21)|(1), def }, |
{ "adc.l", mode_dab, class3|(1<<21)|(4), def }, |
{ "adc.w", mode_dab, class3|(1<<21)|(2), def }, |
{ "add.b", mode_dab, class3|(0<<21)|(1), def }, |
{ "add.l", mode_dab, class3|(0<<21)|(4), def }, |
{ "add.w", mode_dab, class3|(0<<21)|(2), def }, |
{ "addi", mode_ai, class2, def }, |
{ "and.b", mode_dab, class3|(10<<21)|(1), def}, |
{ "and.l", mode_dab, class3|(10<<21)|(4), def }, |
{ "and.w", mode_dab, class3|(10<<21)|(2), def }, |
{ "asl.b", mode_das, class3|(7<<21)|(1), def }, |
{ "asl.l", mode_das, class3|(7<<21)|(4), def }, |
{ "asl.w", mode_das, class3|(7<<21)|(2), def }, |
{ "asld", mode_a, class1|(15<<21)|(1<<15)|(11<<10)|(4), def }, |
{ "asr.b", mode_das, class3|(5<<21)|(1), def }, |
{ "asr.l", mode_das, class3|(5<<21)|(4), def }, |
{ "asr.w", mode_das, class3|(5<<21)|(2), def }, |
{ "asrd", mode_a, class1|(15<<21)|(1<<15)|(9<<10)|(4), def }, |
{ "bmd", mode_rrr, class1|(3<<21)|(3<<16)|(4), gr6 }, |
{ "bmi", mode_rrr, class1|(1<<21)|(3<<16)|(4), gr6 }, |
{ "bra", mode_cad, class3|(12<<21)|(4), def }, |
{ "brr", mode_ci, class0, def }, |
{ "cmp.b", mode_0ab, class3|(2<<21)|(1), def }, |
{ "cmp.l", mode_0ab, class3|(2<<21)|(4), def }, |
{ "cmp.w", mode_0ab, class3|(2<<21)|(2), def }, |
{ "cmpc.b", mode_0ab, class3|(3<<21)|(1), def }, |
{ "cmpc.l", mode_0ab, class3|(3<<21)|(4), def }, |
{ "cmpc.w", mode_0ab, class3|(3<<21)|(2), def }, |
{ "divds", mode_a, class1|(15<<21)|(1<<15)|(6<<10)|(4), def }, |
{ "divdu", mode_a, class1|(15<<21)|(1<<15)|(7<<10)|(4), def }, |
{ "divs", mode_a, class1|(15<<21)|(1<<15)|(2<<10)|(4), def }, |
{ "divu", mode_a, class1|(15<<21)|(1<<15)|(3<<10)|(4), def }, |
{ "dsi", mode_s, class1|(4<<21)|(4), def }, |
{ "eamread", mode_di, class3|(15<<21)|(1<<15)|(1<<9)|(4), def }, |
{ "eamwrite", mode_iab, class1|(15<<21)|(1<<15)|(4), def }, |
{ "eni", mode_s, class1|(5<<21)|(4), def }, |
{ "extb.b", mode_da, class3|(14<<21)|(1), def }, |
{ "extb.l", mode_da, class3|(14<<21)|(4), def }, |
{ "extb.w", mode_da, class3|(14<<21)|(2), def }, |
{ "extw.l", mode_da, class3|(4<<21)|(4), def }, |
{ "extw.w", mode_da, class3|(4<<21)|(2), def }, |
{ "fabs", mode_fda, class1|(7<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fadd", mode_fdab, class1|(1<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fcmp", mode_rdfab,class3|(10<<27)|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 }, |
{ "fcmpe", mode_rdfab,class3|(11<<27)|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 }, |
{ "fdiv", mode_fdab, class1|(4<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fload", mode_fdra, class1|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fmove", mode_fda, class1|(12<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5}, |
{ "fmult", mode_fdab, class1|(3<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fneg", mode_fda, class1|(6<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fpinst", mode_ifdab,class1|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fpuread", mode_idfab,class3|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 }, |
{ "fsqrt", mode_fda, class1|(5<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "fstore", mode_rdfa, class3|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 }, |
{ "fsub", mode_fdab, class1|(2<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "ftoi", mode_fda, class1|(8<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "itof", mode_fda, class1|(9<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 }, |
{ "lsr.b", mode_das, class3|(6<<21)|(1), def }, |
{ "lsr.l", mode_das, class3|(6<<21)|(4), def }, |
{ "lsr.w", mode_das, class3|(6<<21)|(2), def }, |
{ "lsrd", mode_a, class1|(15<<21)|(1<<15)|(10<<10)|(4), def }, |
{ "move.b", mode_da0, class3|(9<<21)|(1), def }, |
{ "move.l", mode_da0, class3|(9<<21)|(4), def }, |
{ "move.w", mode_da0, class3|(9<<21)|(2), def }, |
{ "movil", mode_ai, class2|(4<<21), def }, |
{ "moviq", mode_ai, class2|(6<<21), def }, |
{ "moviu", mode_ai, class2|(5<<21), def }, |
{ "mults", mode_ab, class1|(15<<21)|(1<<15)|(0<<10)|(4), def }, |
{ "multu", mode_ab, class1|(15<<21)|(1<<15)|(1<<10)|(4), def }, |
{ "nop", mode_s, class0, def }, |
{ "not.b", mode_da, class3|(11<<21)|(1), def }, |
{ "not.l", mode_da, class3|(11<<21)|(4), def }, |
{ "not.w", mode_da, class3|(11<<21)|(2), def }, |
{ "or.b", mode_dab, class3|(9<<21)|(1), def }, |
{ "or.l", mode_dab, class3|(9<<21)|(4), def }, |
{ "or.w", mode_dab, class3|(9<<21)|(2), def }, |
{ "read.b", mode_dax, class3|(15<<21)|(1<<9)|(1), def }, |
{ "read.l", mode_dax, class3|(15<<21)|(1<<9)|(4), def }, |
{ "read.w", mode_dax, class3|(15<<21)|(1<<9)|(2), def }, |
{ "readmda", mode_d, class3|(15<<21)|(1<<15)|(1<<9)|(4), def }, |
{ "readmdb", mode_d, class3|(15<<21)|(1<<15)|(1<<9)|(1<<4)|(4), def }, |
{ "readmdc", mode_d, class3|(15<<21)|(1<<15)|(1<<9)|(2<<4)|(4), def }, |
{ "rfi", mode_s, class1|(7<<21)|(30<<16)|(29<<4)|(4), def }, |
{ "rflag", mode_d, class3|(13<<21)|(4), def }, |
{ "stop", mode_ir, class1|(0<<21)|(4), def }, |
{ "sub.b", mode_dab, class3|(2<<21)|(1), def }, |
{ "sub.l", mode_dab, class3|(2<<21)|(4), def }, |
{ "sub.w", mode_dab, class3|(2<<21)|(2), def }, |
{ "subc.b", mode_dab, class3|(3<<21)|(1), def }, |
{ "subc.l", mode_dab, class3|(3<<21)|(4), def }, |
{ "subc.w", mode_dab, class3|(3<<21)|(2), def }, |
{ "subi", mode_ai, class2|(2<<21), def }, |
{ "trace", mode_ir, class1|(13<<21), def }, |
{ "write.b", mode_bax, class1|(15<<21)|(1), def }, |
{ "write.l", mode_bax, class1|(15<<21)|(4), def }, |
{ "write.w", mode_bax, class1|(15<<21)|(2), def }, |
{ "writemd", mode_ab, class1|(15<<21)|(1<<15)|(4<<10)|(4), def }, |
{ "writemdc", mode_a, class1|(15<<21)|(1<<15)|(5<<10)|(4), def }, |
{ "wrtl", mode_i, class2|(8<<21), gr6 }, |
{ "wrtu", mode_i, class2|(9<<21), gr6 }, |
{ "xor.b", mode_dab, class3|(8<<21)|(1), def }, |
{ "xor.l", mode_dab, class3|(8<<21)|(4), def }, |
{ "xor.w", mode_dab, class3|(8<<21)|(2), def }, |
}; |
/contrib/toolchain/binutils/include/opcode/xgate.h |
---|
1,5 → 1,5 |
/* xgate.h -- Freescale XGATE opcode list |
Copyright 2010, 2011, 2012 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Sean Keys (skeys@ipdatasys.com) |
This file is part of the GNU opcodes library. |
46,37 → 46,23 |
#define XGATE_CYCLE_A 0x40 |
#define XGATE_CYCLE_f 0x80 |
/* Opcode format abbreviations. */ |
#define XG_INH 0x0001 /* Inherent. */ |
#define XG_I 0x0002 /* 3-bit immediate address. */ |
#define XG_R_I 0x0004 /* Register followed by 4/8-bit immediate value. */ |
#define XG_R_R 0x0008 /* Register followed by a register. */ |
#define XG_R_R_R 0x0010 /* Register followed by two registers. */ |
#define XG_R 0x0020 /* Single register. */ |
#define XG_PC 0x0040 /* PC relative 10 or 11 bit. */ |
#define XG_R_C 0x0080 /* General register followed by ccr register. */ |
#define XG_C_R 0x0100 /* CCR register followed by a general register. */ |
#define XG_R_P 0x0200 /* General register followed by pc register. */ |
#define XG_R_R_I 0x0400 /* Two general registers followed by an immediate value. */ |
#define XG_PCREL 0x0800 /* Immediate value that is relative to the current pc. */ |
/* XGATE operand formats as stored in the XGATE_opcode table. |
They are only used by GAS to recognize operands. */ |
#define XGATE_OP_INH "" |
#define XGATE_OP_TRI "r,r,r" |
#define XGATE_OP_DYA "r,r" |
#define XGATE_OP_IMM16 "r,if" |
#define XGATE_OP_IMM8 "r,i8" |
#define XGATE_OP_IMM4 "r,i4" |
#define XGATE_OP_IMM3 "i3" |
#define XGATE_OP_MON "r" |
#define XGATE_OP_MON_R_C "r,c" |
#define XGATE_OP_MON_C_R "c,r" |
#define XGATE_OP_MON_R_P "r,p" |
#define XGATE_OP_IDR "r,r,+" |
#define XGATE_OP_IDO5 "r,r,i5" |
#define XGATE_OP_REL9 "b9" |
#define XGATE_OP_REL10 "ba" |
#define XGATE_OP_INH "" /* Inherent. */ |
#define XGATE_OP_TRI "r,r,r" /* Register followed by two registers. */ |
#define XGATE_OP_DYA "r,r" /* Register followed by a register. */ |
#define XGATE_OP_IMM16 "r,if" /* Register followed by 16-bit value. */ |
#define XGATE_OP_IMM8 "r,i8" /* Register followed by 8-bit value. */ |
#define XGATE_OP_IMM4 "r,i4" /* Register followed by 4-bit value. */ |
#define XGATE_OP_IMM3 "i3" /* Register followed by 3-bit value. */ |
#define XGATE_OP_MON "r" /* Single register. */ |
#define XGATE_OP_MON_R_C "r,c" /* General register followed by ccr register. */ |
#define XGATE_OP_MON_C_R "c,r" /* CCR register followed by a general register. */ |
#define XGATE_OP_MON_R_P "r,p" /* General register followed by pc register. */ |
#define XGATE_OP_IDR "r,r,+" /* Three registers with the third having a -/+ directive. */ |
#define XGATE_OP_IDO5 "r,r,i5" /* Two general registers followed by an immediate value. */ |
#define XGATE_OP_REL9 "b9" /* 9-bit value that is relative to the current pc. */ |
#define XGATE_OP_REL10 "ba" /* 10-bit value that is relative to the current pc. */ |
#define XGATE_OP_DYA_MON "=r" |
/* Macro definitions. */ |
#define XGATE_OP_IMM16mADD "r,if; addl addh" |
90,11 → 76,6 |
#define XGATE_V2 0x2 |
#define XGATE_V3 0x4 |
/* Max opcodes per opcode handle. */ |
#define MAX_OPCODES 0x05 |
#define MAX_DETECT_CHARS 0x10 |
/* The opcode table definitions. */ |
struct xgate_opcode |
{ |
101,7 → 82,6 |
char * name; /* Op-code name. */ |
char * constraints; /* Constraint chars. */ |
char * format; /* Bit definitions. */ |
unsigned int sh_format; /* Shorthand format mask. */ |
unsigned int size; /* Opcode size in bytes. */ |
unsigned int bin_opcode; /* Binary opcode with operands masked off. */ |
unsigned char cycles_min; /* Minimum cpu cycles needed. */ |
/contrib/toolchain/binutils/include/os9k.h |
---|
1,5 → 1,5 |
/* os9k.h - OS-9000 i386 module header definitions |
Copyright 2000 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This file is part of GNU CC. |
/contrib/toolchain/binutils/include/partition.h |
---|
45,12 → 45,12 |
struct partition_elem |
{ |
/* The next element in this class. Elements in each class form a |
circular list. */ |
struct partition_elem* next; |
/* The canonical element that represents the class containing this |
element. */ |
int class_element; |
/* The next element in this class. Elements in each class form a |
circular list. */ |
struct partition_elem* next; |
/* The number of elements in this class. Valid only if this is the |
canonical element for its class. */ |
unsigned class_count; |
/contrib/toolchain/binutils/include/plugin-api.h |
---|
1,6 → 1,6 |
/* plugin-api.h -- External linker plugin API. */ |
/* Copyright 2009, 2010 Free Software Foundation, Inc. |
/* Copyright (C) 2009-2015 Free Software Foundation, Inc. |
Written by Cary Coutant <ccoutant@google.com>. |
This file is part of binutils. |
/contrib/toolchain/binutils/include/progress.h |
---|
1,5 → 1,5 |
/* Default definitions for progress macros. |
Copyright 1994, 2010 Free Software Foundation, Inc. |
Copyright (C) 1994-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/safe-ctype.h |
---|
1,6 → 1,6 |
/* <ctype.h> replacement macros. |
Copyright (C) 2000, 2001 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Zack Weinberg <zackw@stanford.edu>. |
This file is part of the libiberty library. |
/contrib/toolchain/binutils/include/sha1.h |
---|
1,7 → 1,6 |
/* Declarations of functions and data types used for SHA1 sum |
library functions. |
Copyright (C) 2000, 2001, 2003, 2005, 2006, 2008, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the |
/contrib/toolchain/binutils/include/simple-object.h |
---|
1,5 → 1,5 |
/* simple-object.h -- simple routines to read and write object files |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Ian Lance Taylor, Google. |
This program is free software; you can redistribute it and/or modify it |
/contrib/toolchain/binutils/include/som/ChangeLog |
---|
1,3 → 1,11 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2010-06-10 Tristan Gingold <gingold@adacore.com> |
* aout.h: New file. |
6,7 → 14,7 |
* reloc.h: Likewise. |
* internal.h: Likewise. |
Copyright (C) 2010-2012 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/som/aout.h |
---|
1,5 → 1,5 |
/* SOM a.out definitions for BFD. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Contributed by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/som/clock.h |
---|
1,5 → 1,5 |
/* SOM clock definition for BFD. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Contributed by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/som/internal.h |
---|
1,5 → 1,5 |
/* SOM internal definitions for BFD. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Contributed by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/som/lst.h |
---|
1,5 → 1,5 |
/* SOM lst definitions for BFD. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Contributed by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/som/reloc.h |
---|
1,5 → 1,5 |
/* SOM relocation definitions for BFD. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Contributed by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/sort.h |
---|
1,5 → 1,5 |
/* Sorting algorithms. |
Copyright (C) 2000, 2002 Free Software Foundation, Inc. |
Copyright (C) 2000-2015 Free Software Foundation, Inc. |
Contributed by Mark Mitchell <mark@codesourcery.com>. |
This file is part of GCC. |
/contrib/toolchain/binutils/include/splay-tree.h |
---|
1,6 → 1,5 |
/* A splay-tree datatype. |
Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2009, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
Contributed by Mark Mitchell (mark@markmitchell.com). |
This file is part of GCC. |
44,10 → 43,6 |
#include <inttypes.h> |
#endif |
#ifndef GTY |
#define GTY(X) |
#endif |
/* Use typedefs for the key and data types to facilitate changing |
these types, if necessary. These types should be sufficiently wide |
that any pointer or scalar can be cast to these types, and then |
86,22 → 81,22 |
typedef void (*splay_tree_deallocate_fn) (void *, void *); |
/* The nodes in the splay tree. */ |
struct GTY(()) splay_tree_node_s { |
struct splay_tree_node_s { |
/* The key. */ |
splay_tree_key GTY ((use_param1)) key; |
splay_tree_key key; |
/* The value. */ |
splay_tree_value GTY ((use_param2)) value; |
splay_tree_value value; |
/* The left and right children, respectively. */ |
splay_tree_node GTY ((use_params)) left; |
splay_tree_node GTY ((use_params)) right; |
splay_tree_node left; |
splay_tree_node right; |
}; |
/* The splay tree itself. */ |
struct GTY(()) splay_tree_s { |
struct splay_tree_s { |
/* The root of the tree. */ |
splay_tree_node GTY ((use_params)) root; |
splay_tree_node root; |
/* The comparision function. */ |
splay_tree_compare_fn comp; |
119,7 → 114,7 |
splay_tree_deallocate_fn deallocate; |
/* Parameter for allocate/free functions. */ |
void * GTY((skip)) allocate_data; |
void *allocate_data; |
}; |
typedef struct splay_tree_s *splay_tree; |
/contrib/toolchain/binutils/include/symcat.h |
---|
1,6 → 1,6 |
/* Symbol concatenation utilities. |
Copyright (C) 1998, 2000, 2010 Free Software Foundation, Inc. |
Copyright (C) 1998-2015 Free Software Foundation, Inc. |
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
/contrib/toolchain/binutils/include/timeval-utils.h |
---|
1,5 → 1,5 |
/* Basic struct timeval utilities. |
Copyright (C) 2011 Free Software Foundation, Inc. |
Copyright (C) 2011-2015 Free Software Foundation, Inc. |
This file is part of the libiberty library. |
Libiberty is free software; you can redistribute it and/or |
/contrib/toolchain/binutils/include/vms/ChangeLog |
---|
1,3 → 1,11 |
2015-01-01 Alan Modra <amodra@gmail.com> |
Update year range in copyright notice of all files. |
2014-03-05 Alan Modra <amodra@gmail.com> |
Update copyright years. |
2012-03-08 Tristan Gingold <gingold@adacore.com> |
* lbr.h (struct vms_lhd): Add comments. |
73,7 → 81,7 |
* eiaf.h, eicp.h, eiha.h, eihd.h, eihi.h, eihs.h, eihvn.h: Ditto. |
* eisd.h, emh.h, eobjrec.h, esdf.h, esrf.h, etir.h, shl.h: Ditto. |
Copyright (C) 2010-2012 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Copying and distribution of this file, with or without modification, |
are permitted in any medium without royalty provided the copyright |
/contrib/toolchain/binutils/include/vms/dcx.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format for DeCompression. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/dmt.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Debug Module Table. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/dsc.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Descriptors. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/dst.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Debug Symbol Table. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eeom.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended End Of Module. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/egps.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Program Section Definition. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/egsd.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Global Symbol Directory. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/egst.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Global Symbol Definition. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/egsy.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Global Symbol. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eiaf.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Activator Fixup section. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eicp.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image section Change Protection. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eidc.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Ident Consistency check. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eiha.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Activation. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eihd.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Header. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eihi.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Identification. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eihs.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Symbols and debug table. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eihvn.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Header Version. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eisd.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Image Section Descriptor. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/emh.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Module Header. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/eobjrec.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Object Records. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/esdf.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended GSD Global Symbol Definition. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/esdfm.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Symbol Definition for version Mask. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/esdfv.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Symbol Def for Vectored symbols. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/esgps.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Shared Program Section Definition. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/esrf.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended GSD Global Symbol Reference. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/etir.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Extended Text Information and Relocation. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/internal.h |
---|
1,6 → 1,6 |
/* Alpha VMS internal format. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/lbr.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Libraries. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/prt.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Protection values. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vms/shl.h |
---|
1,6 → 1,6 |
/* Alpha VMS external format of Shareable image List. |
Copyright 2010 Free Software Foundation, Inc. |
Copyright (C) 2010-2015 Free Software Foundation, Inc. |
Written by Tristan Gingold <gingold@adacore.com>, AdaCore. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/vtv-change-permission.h |
---|
1,5 → 1,4 |
/* Copyright (C) 2013 |
Free Software Foundation |
/* Copyright (C) 2013-2015 Free Software Foundation, Inc. |
This file is part of GCC. |
/contrib/toolchain/binutils/include/xregex2.h |
---|
1,8 → 1,7 |
/* Definitions for data structures and routines for the regular |
expression library, version 0.12. |
Copyright (C) 1985, 1989, 1990, 1991, 1992, 1993, 1995, 1996, 1997, |
1998, 2000, 2005 Free Software Foundation, Inc. |
Copyright (C) 1985-2015 Free Software Foundation, Inc. |
This file is part of the GNU C Library. Its master source is NOT part of |
the C library, however. The master source lives in /gd/gnu/lib. |
/contrib/toolchain/binutils/include/xtensa-config.h |
---|
1,6 → 1,5 |
/* Xtensa configuration settings. |
Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 |
Free Software Foundation, Inc. |
Copyright (C) 2001-2015 Free Software Foundation, Inc. |
Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica. |
This program is free software; you can redistribute it and/or modify |
/contrib/toolchain/binutils/include/xtensa-isa-internal.h |
---|
1,5 → 1,5 |
/* Internal definitions for configurable Xtensa ISA support. |
Copyright 2003, 2004, 2005, 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |
/contrib/toolchain/binutils/include/xtensa-isa.h |
---|
1,5 → 1,5 |
/* Interface definition for configurable Xtensa ISA support. |
Copyright 2003, 2004, 2005, 2006, 2008, 2010 Free Software Foundation, Inc. |
Copyright (C) 2003-2015 Free Software Foundation, Inc. |
This file is part of BFD, the Binary File Descriptor library. |