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Regard whitespace Rev 3032 → Rev 3033

/drivers/video/drm/i915/bitmap.c
1,26 → 1,29
 
#include <drmP.h>
#include <drm.h>
#include "i915_drm.h"
#include <drm/drmP.h>
#include <drm/i915_drm.h>
#include "i915_drv.h"
#include "intel_drv.h"
#include "hmm.h"
#include "bitmap.h"
 
#define memmove __builtin_memmove
#define DRIVER_CAPS_0 HW_BIT_BLIT;
#define DRIVER_CAPS_1 0
 
int gem_object_lock(struct drm_i915_gem_object *obj);
struct context *context_map[256];
 
#define DRIVER_CAPS_0 HW_BIT_BLIT | HW_TEX_BLIT;
#define DRIVER_CAPS_1 0
struct hmm bm_mm;
 
extern struct drm_device *main_device;
 
struct hman bm_man;
 
 
void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
{
dma_addr_t *pages = bitmap->obj->allocated_pages;;
int i;
 
printf("destroy bitmap %d\n", bitmap->handle);
free_handle(&bm_man, bitmap->handle);
free_handle(&bm_mm, bitmap->handle);
bitmap->handle = 0;
bitmap->obj->base.read_domains = I915_GEM_DOMAIN_GTT;
bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
29,21 → 32,87
drm_gem_object_unreference(&bitmap->obj->base);
mutex_unlock(&main_device->struct_mutex);
 
if(pages != NULL)
{
for (i = 0; i < bitmap->page_count; i++)
FreePage(pages[i]);
 
free(pages);
};
UserFree(bitmap->uaddr);
__DestroyObject(bitmap);
};
 
int init_bitmaps()
 
static int bitmap_get_pages_gtt(struct drm_i915_gem_object *obj)
{
int ret;
int page_count;
 
ret = init_hman(&bm_man, 1024);
/* Get the list of pages out of our struct file. They'll be pinned
* at this point until we release them.
*/
page_count = obj->base.size / PAGE_SIZE;
BUG_ON(obj->allocated_pages == NULL);
BUG_ON(obj->pages.page != NULL);
 
return ret;
obj->pages.page = obj->allocated_pages;
obj->pages.nents = page_count;
 
 
// if (obj->tiling_mode != I915_TILING_NONE)
// i915_gem_object_do_bit_17_swizzle(obj);
 
return 0;
}
 
static void bitmap_put_pages_gtt(struct drm_i915_gem_object *obj)
{
int ret, i;
 
BUG_ON(obj->madv == __I915_MADV_PURGED);
 
ret = i915_gem_object_set_to_cpu_domain(obj, true);
if (ret) {
/* In the event of a disaster, abandon all caches and
* hope for the best.
*/
WARN_ON(ret != -EIO);
i915_gem_clflush_object(obj);
obj->base.read_domains = obj->base.write_domain = I915_GEM_DOMAIN_CPU;
}
 
if (obj->madv == I915_MADV_DONTNEED)
obj->dirty = 0;
 
obj->dirty = 0;
}
 
static const struct drm_i915_gem_object_ops bitmap_object_ops = {
.get_pages = bitmap_get_pages_gtt,
.put_pages = bitmap_put_pages_gtt,
};
 
 
int create_surface(struct io_call_10 *pbitmap)
 
#if 0
struct io_call_10 /* SRV_CREATE_SURFACE */
{
u32 handle; // ignored
void *data; // ignored
 
u32 width;
u32 height;
u32 pitch; // ignored
 
u32 max_width;
u32 max_height;
u32 format; // reserved mbz
};
 
#endif
 
int create_surface(struct drm_device *dev, struct io_call_10 *pbitmap)
{
struct drm_i915_gem_object *obj;
 
bitmap_t *bitmap;
53,7 → 122,11
u32 size, max_size;
u32 pitch, max_pitch;
void *uaddr;
dma_addr_t *pages;
u32 page_count;
 
int i;
 
int ret;
 
pbitmap->handle = 0;
62,10 → 135,10
width = pbitmap->width;
height = pbitmap->height;
 
/*
if((width==0)||(height==0)||(width>4096)||(height>4096))
goto err1;
 
/*
if( ((pbitmap->max_width !=0 ) &&
(pbitmap->max_width < width)) ||
(pbitmap->max_width > 4096) )
83,7 → 156,7
max_width = (pbitmap->max_width ==0) ? width : pbitmap->max_width;
max_height = (pbitmap->max_height==0) ? height : pbitmap->max_height;
 
handle = alloc_handle(&bm_man);
handle = alloc_handle(&bm_mm);
// printf("%s %d\n",__FUNCTION__, handle);
 
if(handle == 0)
92,55 → 165,64
bitmap = CreateObject(GetPid(), sizeof(*bitmap));
// printf("bitmap %x\n", bitmap);
if( bitmap == NULL)
goto err1;
goto err2;
 
bitmap->handle = handle;
bitmap->header.destroy = destroy_bitmap;
bitmap->obj = NULL;
 
hmm_set_data(&bm_mm, handle, bitmap);
 
hman_set_data(&bm_man, handle, bitmap);
 
pitch = ALIGN(width*4,64);
 
size = roundup(pitch*height, PAGE_SIZE);
 
// printf("pitch %d size %d\n", pitch, size);
 
obj = i915_gem_alloc_object(main_device, size);
if (obj == NULL)
goto err2;
 
ret = i915_gem_object_pin(obj, 4096, true);
if (ret)
goto err3;
 
max_pitch = ALIGN(max_width*4,64);
max_size = roundup(max_pitch*max_height, PAGE_SIZE);
 
// printf("max_pitch %d max_size %d\n", max_pitch, max_size);
 
uaddr = UserAlloc(max_size);
if( uaddr == NULL)
goto err4;
goto err3;
else
{
u32_t *src, *dst;
u32 count, max_count;
u32 max_count;
dma_addr_t page;
char *vaddr = uaddr;
 
#define page_tabs 0xFDC00000 /* really dirty hack */
page_count = size/PAGE_SIZE;
max_count = max_size/PAGE_SIZE;
 
src = (u32_t*)obj->pages;
dst = &((u32_t*)page_tabs)[(u32_t)uaddr >> 12];
count = size/4096;
max_count = max_size/4096 - count;
pages = kzalloc(max_count*sizeof(dma_addr_t), 0);
if( pages == NULL)
goto err4;
 
while(count--)
for(i = 0; i < page_count; i++, vaddr+= PAGE_SIZE)
{
*dst++ = (0xFFFFF000 & *src++) | 0x207 ; // map as shared page
page = AllocPage();
if ( page == 0 )
goto err4;
pages[i] = page;
 
MapPage(vaddr, page, 0x207); //map as shared page
};
while(max_count--)
*dst++ = 0; // cleanup unused space
}
bitmap->page_count = page_count;
bitmap->max_count = max_count;
};
 
obj = i915_gem_alloc_object(dev, size);
if (obj == NULL)
goto err4;
 
obj->ops = &bitmap_object_ops;
obj->allocated_pages = pages;
 
ret = i915_gem_object_pin(obj, PAGE_SIZE, true,true);
if (ret)
goto err5;
 
obj->mapped = uaddr ;
 
bitmap->handle = handle;
166,16 → 248,23
 
return 0;
 
err5:
mutex_lock(&dev->struct_mutex);
drm_gem_object_unreference(&obj->base);
mutex_unlock(&dev->struct_mutex);
 
err4:
i915_gem_object_unpin(obj);
while (i--)
FreePage(pages[i]);
free(pages);
UserFree(uaddr);
 
err3:
drm_gem_object_unreference(&obj->base);
__DestroyObject(bitmap);
err2:
free_handle(&bm_man, handle);
__DestroyObject(bitmap);
free_handle(&bm_mm, handle);
err1:
return -1;
 
};
 
 
183,19 → 272,18
{
int ret;
 
drm_i915_private_t *dev_priv = main_device->dev_private;
 
bitmap_t *bitmap;
 
if(unlikely(pbitmap->handle == 0))
return -1;
 
bitmap = (bitmap_t*)hman_get_data(&bm_man, pbitmap->handle);
bitmap = (bitmap_t*)hmm_get_data(&bm_mm, pbitmap->handle);
 
if(unlikely(bitmap==NULL))
return -1;
 
ret = gem_object_lock(bitmap->obj);
ret = i915_gem_object_set_to_cpu_domain(bitmap->obj, true);
 
if(ret !=0 )
{
pbitmap->data = NULL;
212,136 → 300,91
};
 
 
int init_hman(struct hman *man, u32 count)
{
u32* data;
 
data = malloc(count*sizeof(u32*));
if(data)
 
int init_bitmaps()
{
int i;
int ret;
 
for(i=0;i < count-1;)
data[i] = ++i;
data[i] = 0;
ret = init_hmm(&bm_mm, 1024);
 
man->table = data;
man->next = 0;
man->avail = count;
man->count = count;
 
return 0;
return ret;
};
return -ENOMEM;
};
 
u32 alloc_handle(struct hman *man)
{
u32 handle = 0;
 
if(man->avail)
 
int get_driver_caps(hwcaps_t *caps)
{
handle = man->next;
man->next = man->table[handle];
man->avail--;
handle++;
}
return handle;
};
int ret = 0;
 
int free_handle(struct hman *man, u32 handle)
switch(caps->idx)
{
int ret = -1;
case 0:
caps->opt[0] = DRIVER_CAPS_0;
caps->opt[1] = DRIVER_CAPS_1;
break;
 
handle--;
 
if(handle < man->count)
{
man->table[handle] = man->next;
man->next = handle;
man->avail++;
ret = 0;
case 1:
caps->cap1.max_tex_width = 4096;
caps->cap1.max_tex_height = 4096;
break;
default:
ret = 1;
};
 
caps->idx = 1;
return ret;
};
}
 
 
void *drm_intel_bo_map(struct drm_i915_gem_object *obj, int write_enable)
void __attribute__((regparm(1))) destroy_context(struct context *context)
{
u8 *kaddr;
printf("destroy context %x\n", context);
 
kaddr = AllocKernelSpace(obj->base.size);
if( kaddr != NULL)
{
u32_t *src = (u32_t*)obj->pages;
u32_t *dst = &((u32_t*)page_tabs)[(u32_t)kaddr >> 12];
context_map[context->slot] = NULL;
 
u32 count = obj->base.size/4096;
mutex_lock(&main_device->struct_mutex);
drm_gem_object_unreference(&context->obj->base);
mutex_unlock(&main_device->struct_mutex);
 
while(count--)
{
*dst++ = (0xFFFFF000 & *src++) | 0x003 ;
__DestroyObject(context);
};
return kaddr;
};
return NULL;
}
 
void destroy_gem_object(uint32_t handle)
{
struct drm_i915_gem_object *obj = (void*)handle;
drm_gem_object_unreference(&obj->base);
 
};
#define CURRENT_TASK (0x80003000)
 
 
void write_gem_object(uint32_t handle, u32 offset, u32 size, u8* src)
struct context *get_context(struct drm_device *dev)
{
struct drm_i915_gem_object *obj = (void*)handle;
u8 *dst;
struct context *context;
struct io_call_10 io_10;
int slot = *((u8*)CURRENT_TASK);
int ret;
 
ret = i915_gem_object_pin(obj, 4096, true);
if (ret)
return;
context = context_map[slot];
 
dst = drm_intel_bo_map(obj, true);
if( dst != NULL )
{
memmove(dst+offset, src, size);
FreeKernelSpace(dst);
};
};
if( context != NULL)
return context;
 
u32 get_buffer_offset(uint32_t handle)
context = CreateObject(GetPid(), sizeof(*context));
printf("context %x\n", context);
if( context != NULL)
{
struct drm_i915_gem_object *obj = (void*)handle;
drm_i915_private_t *dev_priv = dev->dev_private;
struct drm_i915_gem_object *obj;
 
return obj->gtt_offset;
};
obj = i915_gem_alloc_object(dev, 4096);
i915_gem_object_pin(obj, 4096, true, true);
 
context->obj = obj;
context->cmd_buffer = MapIoMem((addr_t)obj->pages.page[0], 4096, PG_SW|PG_NOCACHE);
context->cmd_offset = obj->gtt_offset;
 
int get_driver_caps(hwcaps_t *caps)
{
int ret = 0;
ENTER();
context->header.destroy = destroy_context;
context->mask = NULL;
context->seqno = 0;
context->slot = slot;
 
switch(caps->idx)
{
case 0:
caps->opt[0] = DRIVER_CAPS_0;
caps->opt[1] = DRIVER_CAPS_1;
break;
 
case 1:
caps->cap1.max_tex_width = 4096;
caps->cap1.max_tex_height = 4096;
break;
default:
ret = 1;
context_map[slot] = context;
};
caps->idx = 1;
return ret;
}
return context;
};
 
/drivers/video/drm/i915/bitmap.h
2,27 → 2,7
typedef struct tag_object kobj_t;
typedef struct tag_display display_t;
 
struct hman
{
u32 *table;
u32 next;
u32 avail;
u32 count;
};
 
extern struct hman bm_man;
 
int init_hman(struct hman *man, u32 count);
u32 alloc_handle(struct hman *man);
int free_handle(struct hman *man, u32 handle);
 
#define hman_get_data(man, handle) \
((man)->table[(handle)-1])
 
#define hman_set_data(man, handle, val) \
((man)->table[(handle)-1]) = (u32)(val)
 
 
struct tag_object
{
uint32_t magic;
46,6 → 26,8
u32 height;
u32 max_width;
u32 max_height;
u32 page_count;
u32 max_count;
 
u32 format;
struct drm_i915_gem_object *obj;
94,19 → 76,25
#define HW_TEX_BLIT (1<<1) /* stretch blit */
#define HW_VID_BLIT (1<<2) /* planar and packed video */
/* 3 - 63 reserved */
 
struct context
{
kobj_t header;
 
struct drm_i915_gem_object *obj;
u32 cmd_buffer;
u32 cmd_offset;
 
bitmap_t *mask;
u32 seqno;
int slot;
 
};
 
int get_driver_caps(hwcaps_t *caps);
int create_surface(struct io_call_10 *pbitmap);
int create_surface(struct drm_device *dev, struct io_call_10 *pbitmap);
int lock_surface(struct io_call_12 *pbitmap);
 
struct context *get_context(struct drm_device *dev);
 
int init_bitmaps();
 
/drivers/video/drm/i915/hmm.c
0,0 → 1,71
 
#include <linux/types.h>
#include <syscall.h>
#include "hmm.h"
 
int init_hmm(struct hmm *mm, u32 count)
{
u32* data;
 
if( mm == NULL)
return -EINVAL;
 
data = malloc(count*sizeof(u32*));
if( data )
{
int i;
 
for(i = 0; i < count-1; )
data[i] = ++i;
data[i] = 0;
 
mm->table = data;
mm->next = 0;
mm->avail = count;
mm->count = count;
 
return 0;
};
return -ENOMEM;
};
 
u32 alloc_handle(struct hmm *mm)
{
u32 handle = 0;
u32 ifl;
 
ifl = safe_cli();
if(mm->avail)
{
handle = mm->next;
mm->next = mm->table[handle];
mm->avail--;
handle++;
}
safe_sti(ifl);
 
return handle;
};
 
int free_handle(struct hmm *mm, u32 handle)
{
int ret = -1;
u32 ifl;
 
handle--;
 
ifl = safe_cli();
if(handle < mm->count)
{
mm->table[handle] = mm->next;
mm->next = handle;
mm->avail++;
ret = 0;
};
safe_sti(ifl);
 
return ret;
};
 
 
 
/drivers/video/drm/i915/hmm.h
0,0 → 1,24
 
#ifndef __HMM_H__
#define __HMM_H__
 
struct hmm
{
u32 *table;
u32 next;
u32 avail;
u32 count;
};
 
int init_hmm(struct hmm *mm, u32 count);
u32 alloc_handle(struct hmm *mm);
int free_handle(struct hmm *mm, u32 handle);
 
#define hmm_get_data(mm, handle) \
((mm)->table[(handle)-1])
 
#define hmm_set_data(mm, handle, val) \
((mm)->table[(handle)-1]) = (u32)(val)
 
 
#endif /* __HMM_H__ */
/drivers/video/drm/i915/i915_drv.h
1012,6 → 1012,7
unsigned int has_global_gtt_mapping:1;
unsigned int has_dma_mapping:1;
 
dma_addr_t *allocated_pages;
struct pagelist pages;
int pages_pin_count;
 
/drivers/video/drm/i915/i915_gem_gtt.c
309,15 → 309,7
 
int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
{
if (obj->has_dma_mapping)
return 0;
 
// if (!dma_map_sg(&obj->base.dev->pdev->dev,
// obj->pages->sgl, obj->pages->nents,
// PCI_DMA_BIDIRECTIONAL))
// return -ENOSPC;
 
return 0;
}
 
void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
/drivers/video/drm/i915/i915_irq.c
2518,7 → 2518,7
 
void irq_handler_kms()
{
// printf("%s\n",__FUNCTION__);
printf("%s\n",__FUNCTION__);
ironlake_irq_handler(irq_device);
}
 
/drivers/video/drm/i915/kms_display.c
15,6 → 15,7
 
#include <syscall.h>
 
#include "hmm.h"
#include "bitmap.h"
 
extern struct drm_device *main_device;
275,6 → 276,7
 
cursor_t *cursor;
u32_t ifl;
int err;
 
// ENTER();
 
366,31 → 368,8
};
safe_sti(ifl);
 
#define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4))
#define BLT_WRITE_ALPHA (1<<21)
#define BLT_WRITE_RGB (1<<20)
 
#if 0
 
#if 1
{
 
drm_i915_private_t *dev_priv = dev->dev_private;
struct drm_i915_gem_object *obj;
struct intel_ring_buffer *ring;
 
obj = i915_gem_alloc_object(dev, 4096);
i915_gem_object_pin(obj, 4096, true, true);
 
cmd_buffer = MapIoMem((addr_t)obj->pages.page[0], 4096, PG_SW|PG_NOCACHE);
cmd_offset = obj->gtt_offset;
};
#endif
 
main_device = dev;
 
int err;
 
err = init_bitmaps();
if( !err )
{
397,8 → 376,6
printf("Initialize bitmap manager\n");
};
 
sna_init();
#endif
 
// LEAVE();
 
657,11 → 634,13
return old;
};
 
#if 0
 
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
 
 
 
extern struct hmm bm_mm;
 
 
typedef struct
{
int left;
686,18 → 665,57
return *(u32_t*)addr;
}
 
#define XY_COLOR_BLT ((2<<29)|(0x50<<22)|(0x4))
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
#define XY_SRC_COPY_CHROMA_CMD ((2<<29)|(0x73<<22)|8)
#define ROP_COPY_SRC 0xCC
#define FORMAT8888 3
 
#define BLT_WRITE_ALPHA (1<<21)
#define BLT_WRITE_RGB (1<<20)
 
 
 
typedef int v4si __attribute__ ((vector_size (16)));
 
 
static void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
struct intel_ring_buffer *ring)
{
struct drm_i915_gem_request *request;
u32 invalidate;
u32 req;
/*
* Ensure that the commands in the batch buffer are
* finished before the interrupt fires.
*
* The sampler always gets flushed on i965 (sigh).
*/
invalidate = I915_GEM_DOMAIN_COMMAND;
if (INTEL_INFO(dev)->gen >= 4)
invalidate |= I915_GEM_DOMAIN_SAMPLER;
if (ring->flush(ring, invalidate, 0)) {
i915_gem_next_request_seqno(ring);
return;
}
 
/* Add a breadcrumb for the completion of the batch buffer */
if (request == NULL || i915_add_request(ring, NULL, &req)) {
i915_gem_next_request_seqno(ring);
}
}
 
 
 
 
 
int blit_video(u32 hbitmap, int dst_x, int dst_y,
int src_x, int src_y, u32 w, u32 h)
{
drm_i915_private_t *dev_priv = main_device->dev_private;
struct intel_ring_buffer *ring;
struct context *context;
 
bitmap_t *bitmap;
rect_t winrc;
714,11 → 732,14
if(unlikely(hbitmap==0))
return -1;
 
bitmap = (bitmap_t*)hman_get_data(&bm_man, hbitmap);
bitmap = (bitmap_t*)hmm_get_data(&bm_mm, hbitmap);
 
if(unlikely(bitmap==NULL))
return -1;
 
context = get_context(main_device);
if(unlikely(context == NULL))
return -1;
 
GetWindowRect(&winrc);
 
860,12 → 881,12
}
#endif
 
if((cmd_buffer & 0xFC0)==0xFC0)
cmd_buffer&= 0xFFFFF000;
if((context->cmd_buffer & 0xFC0)==0xFC0)
context->cmd_buffer&= 0xFFFFF000;
 
b = (u32_t*)ALIGN(cmd_buffer,16);
b = (u32_t*)ALIGN(context->cmd_buffer,16);
 
offset = cmd_offset + ((u32_t)b & 0xFFF);
offset = context->cmd_offset + ((u32_t)b & 0xFFF);
 
cmd = XY_SRC_COPY_CHROMA_CMD | BLT_WRITE_RGB | BLT_WRITE_ALPHA;
cmd |= 3 << 17;
890,29 → 911,26
if( n & 1)
b[n++] = MI_NOOP;
 
i915_gem_object_set_to_gtt_domain(bitmap->obj, false);
context->cmd_buffer+= n*4;
 
// i915_gem_object_set_to_gtt_domain(bitmap->obj, false);
 
if (HAS_BLT(main_device))
{
int ret;
 
ring = &dev_priv->ring[BCS];
ring->dispatch_execbuffer(ring, cmd_offset, n*4);
// printf("dispatch... ");
ring->dispatch_execbuffer(ring, offset, n*4);
// printf("done\n");
 
ret = intel_ring_begin(ring, 4);
if (ret)
return ret;
 
intel_ring_emit(ring, MI_FLUSH_DW);
intel_ring_emit(ring, 0);
intel_ring_emit(ring, 0);
intel_ring_emit(ring, MI_NOOP);
intel_ring_advance(ring);
i915_gem_execbuffer_retire_commands(main_device, ring);
// printf("retire\n");
}
else
{
ring = &dev_priv->ring[RCS];
ring->dispatch_execbuffer(ring, cmd_offset, n*4);
ring->dispatch_execbuffer(ring, offset, n*4);
ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER);
};
 
925,6 → 943,9
};
 
 
#if 0
 
i915_gem_execbuffer_retire_commands(dev, ring);
/* For display hotplug interrupt */
static void
ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
1082,8 → 1103,6
int w, int h, bitmap_t *src_bitmap, int src_x, int src_y,
bitmap_t *mask_bitmap);
 
int create_context();
struct context *get_context();
 
int blit_tex(u32 hbitmap, int dst_x, int dst_y,
int src_x, int src_y, u32 w, u32 h)
1257,75 → 1276,6
};
 
 
struct context *context_map[256];
 
void __attribute__((regparm(1))) destroy_context(struct context *context)
{
printf("destroy context %x\n", context);
 
context_map[context->slot] = NULL;
__DestroyObject(context);
};
 
 
int create_context()
{
struct context *context;
 
bitmap_t *mask;
int slot;
 
struct io_call_10 io_10;
int ret;
 
slot = *((u8*)CURRENT_TASK);
 
if(context_map[slot] != NULL)
return 0;
 
context = CreateObject(GetPid(), sizeof(*context));
// printf("context %x\n", coontext);
if( context == NULL)
goto err1;
context->header.destroy = destroy_context;
 
dbgprintf("Create mask surface\n");
 
io_10.width = os_display->width/4; /* need bitmap format here */
io_10.height = os_display->height+1;
io_10.max_width = os_display->width/4;
io_10.max_height = os_display->height+1;
 
ret = create_surface(&io_10);
if(ret)
goto err2;
 
mask= (bitmap_t*)hman_get_data(&bm_man, io_10.handle);
if(unlikely(mask == NULL)) /* something really terrible happend */
goto err2;
dbgprintf("done\n");
 
context->mask = mask;
context->seqno = os_display->mask_seqno-1;
context->slot = slot;
 
context_map[slot] = context;
return 0;
 
err2:
__DestroyObject(context);
err1:
return -1;
};
 
struct context *get_context()
{
 
int slot = *((u8*)CURRENT_TASK);
 
return context_map[slot];
}
 
#endif
 
 
/drivers/video/drm/i915/main.c
13,6 → 13,8
 
#include "bitmap.h"
 
extern struct drm_device *main_device;
 
void cpu_detect();
 
void parse_cmdline(char *cmdline, char *log);
142,7 → 144,7
if( i915_modeset )
retval = set_user_mode((videomode_t*)inp);
break;
#if 0
 
case SRV_GET_CAPS:
retval = get_driver_caps((hwcaps_t*)inp);
break;
149,7 → 151,7
 
case SRV_CREATE_SURFACE:
// check_input(8);
retval = create_surface((struct io_call_10*)inp);
retval = create_surface(main_device, (struct io_call_10*)inp);
break;
 
case SRV_LOCK_SURFACE:
157,16 → 159,15
break;
 
case SRV_BLIT_VIDEO:
// blit_video( inp[0], inp[1], inp[2],
blit_video( inp[0], inp[1], inp[2],
inp[3], inp[4], inp[5], inp[6]);
 
// blit_tex( inp[0], inp[1], inp[2],
// inp[3], inp[4], inp[5], inp[6]);
 
blit_tex( inp[0], inp[1], inp[2],
inp[3], inp[4], inp[5], inp[6]);
 
 
retval = 0;
break;
#endif
 
};